Constant modulus exponentiation device, constant modulus exponentiation method and related apparatus

Abstract

The application discloses a constant modulus power operator, a constant modulus power operation method and related devices, the constant modulus power operator comprises n cascaded controlled constant modulus multiplication operators, the constant of the i-th controlled constant modulus multiplication operator is modulus N, the input of the constant modulus power operator is exponent x, the i-th controlled constant modulus multiplication operator is used for calculating the modulus multiplication result of the output of the previous controlled constant modulus multiplication operator and the N according to the x, and the constant modulus power operator is used for calculating the modulus power operation result a x mod N according to the modulus multiplication result of the n-th controlled constant modulus multiplication operator. x mod N by converting the modulus power operation into n controlled constant modulus multiplication operations.

Description

Technical Field

[0001] This invention belongs to the field of quantum computing technology, specifically a constant modular exponentiation operator, a constant modular exponentiation method, and related devices. Background Technology

[0002] A quantum computer is a physical device that performs high-speed mathematical and logical operations, stores and processes quantum information in accordance with the laws of quantum mechanics. When a device processes and calculates quantum information and runs quantum algorithms, it is a quantum computer. Because of its ability to process mathematical problems more efficiently than ordinary computers—for example, reducing the time to crack RSA keys from hundreds of years to hours—quantum computers have become a key technology under research.

[0003] Modular operations have wide applications in number theory and cryptography, from parity and prime number determination to the Caesar cipher, from finite fields to the implementation of block ciphers and field towers, and from elliptic curves over finite fields to elliptic curve-based public-key cryptography. Modular operations are ubiquitous in these applications. Therefore, modular operations are the most commonly used function in arithmetic units, and this is also true for quantum computing. How to implement constant modular exponentiation is a technical problem that urgently needs to be solved in quantum computing. Summary of the Invention

[0004] The purpose of this invention is to provide a constant modular exponentiation operator, a constant modular exponentiation method, and related devices, which aim to realize modular exponentiation in quantum computing.

[0005] One embodiment of this application provides a constant modular exponentiation operator, which includes n cascaded controlled constant modular multiplication operators, wherein the constant of the i-th controlled constant modular multiplication operator is . The modulus is N, the input of the constant modular exponentiation operator is the exponent x, and the i-th controlled constant modular multiplication operator is used to calculate the output of the previous controlled constant modular multiplication operator based on x. The constant modular exponentiation unit is used to calculate the modular exponentiation result based on the modular multiplication result of the (n-1)th controlled constant modular multiplication unit. mod N, where 0≤i≤n-1.

[0006] Optionally, the i-th controlled constant modular multiplication unit includes a constant modular addition and modular multiplication unit, a SWAP gate, and an inverse constant modular addition and modular multiplication unit cascaded in sequence.

[0007] Optionally, the constant modular addition and modular multiplication operator includes m cascaded controlled constant modular addition operators, where the constant of the j-th controlled constant modular addition operator is the constant of the m-th controlled constant modular addition operator. The modulus is N, where 0≤j≤m-1.

[0008] Optionally, the j-th controlled constant modular adder includes a modular adder module; the modular adder module includes a first constant adder, a first constant subtractor, a first CNOT gate, and a controlled constant adder cascaded in sequence, wherein the constant of the first constant adder is the... The constants of the first constant subtractor and the controlled constant adder are both N. The modular addition module is used to calculate the output of the previous controlled constant modular adder and the... And the result of the modulo addition operation of N.

[0009] Optionally, one input terminal of the modular addition module is connected to the input terminal of the first constant adder, and the other input terminal of the modular addition module is connected to one input terminal of the first CNOT gate. The two output terminals of the controlled constant adder are connected one-to-one with the two output terminals of the modular addition module. One input terminal of the modular addition module is used to input the output of the previous controlled constant modular adder, and the other input terminal is used to input initial auxiliary data. One output terminal of the modular addition module is used to output the output of the previous controlled constant modular adder and the... The result of the modular addition operation of N, and the other output of the modular addition operation module is used to output target auxiliary data.

[0010] Optionally, the output of the first constant adder is connected to the input of the first constant subtractor, the output of the first constant subtractor is connected to the other input of the first CNOT gate, and the two outputs of the first CNOT gate are connected one-to-one with the two inputs of the controlled constant adder.

[0011] Optionally, the output of the first constant subtractor includes a data output and a sign output, one of the inputs of the controlled constant adder includes a data input and a sign input, the data output of the first constant subtractor is connected to the data input of the controlled constant adder, the sign output of the first constant subtractor is connected to the other input of the first CNOT gate, and one of the outputs of the first CNOT gate is connected to the sign input of the controlled constant adder.

[0012] Optionally, the j-th controlled constant modulo adder further includes an auxiliary bit reset module, which is used to reset the target auxiliary data to the initial auxiliary data; the auxiliary bit reset module includes a second constant subtractor, a first NOT gate, and a second CNOT gate cascaded in sequence; the constant of the second constant subtractor is the... .

[0013] Optionally, one input terminal of the auxiliary bit reset module is connected to the input terminal of the second constant subtractor, and the other input terminal of the auxiliary bit reset module is connected to one input terminal of the second CNOT gate. The output terminal of the second constant subtractor is connected to the input terminal of the first NOT gate, and the output terminal of the first NOT gate is connected to one input terminal of the second CNOT gate. The two output terminals of the second CNOT gate are connected one-to-one with the two output terminals of the auxiliary bit reset module. One output terminal of the auxiliary bit reset module is used to output intermediate data, and the other output terminal of the auxiliary bit reset module is used to output the initial auxiliary data.

[0014] Optionally, the output of the second constant subtractor includes a data output and a sign output. One of the outputs of the auxiliary bit reset module includes a data output and a sign output. The data output of the second constant subtractor is connected to the data output of the auxiliary bit reset module. The sign output of the second constant subtractor is connected to the input of the first NOT gate. One of the outputs of the second CNOT gate is connected to the sign output of the auxiliary bit reset module. The other output of the second CNOT gate is connected to the other output of the auxiliary bit reset module.

[0015] Optionally, the j-th controlled constant modular adder further includes a modular adder result reset module, which is used to reset the intermediate data to the output of the previous controlled constant modular adder and the... and the modular addition result of N; the modular addition result reset module includes a second NOT gate and a second constant adder cascaded in sequence, the constant of the second constant adder being the... .

[0016] Optionally, the input terminals of the modular addition result reset module include a sign input terminal and a data input terminal, and the input terminals of the second constant adder include a sign input terminal and a data input terminal; the sign input terminal of the modular addition result reset module is connected to the input terminal of the second NOT gate, the output terminal of the second NOT gate is connected to the sign input terminal of the second constant adder, the data input terminal of the modular addition result reset module is connected to the data input terminal of the second constant adder, and the output terminal of the second constant adder is connected to the output terminal of the modular addition result reset module; the output terminal of the modular addition result reset module is used to output the output of the previously controlled constant modular adder and the... And the result of the modulo addition operation of N.

[0017] Optionally, the two input terminals of the constant modular adder are connected one-to-one with the two input terminals of the modular adder module, the two output terminals of the modular adder module are connected one-to-one with the two input terminals of the auxiliary bit reset module, one output terminal of the auxiliary bit reset module is connected to the input terminal of the modular adder result reset module, one output terminal of the auxiliary bit reset module is connected to one output terminal of the constant modular adder, and the output terminal of the modular adder result reset module is connected to the other output terminal of the constant modular adder.

[0018] Another embodiment of this application provides a method for modulo exponentiation of a constant, the method comprising:

[0019] Obtain the constant modular exponentiation operator and the exponent x described in the above embodiments; The quantum state of x is input into the constant modular exponentiation unit to obtain the modular exponentiation result. The quantum state corresponding to mod N; Based on the above The quantum state corresponding to mod N determines the mod N.

[0020] Another embodiment of this application provides a constant modular exponentiation apparatus, the apparatus comprising: The data acquisition unit is used to acquire the constant modular exponentiation operator and the exponent x described in the above embodiments; The modular exponentiation unit is used to input the quantum state of x into the constant modular exponentiation unit to obtain the modular exponentiation result. The quantum state corresponding to mod N; The result determination unit is used to determine the result based on the above. The quantum state corresponding to mod N determines the mod N.

[0021] Another embodiment of this application provides a storage medium storing a computer program, wherein the computer program is configured to execute the method described in any of the preceding claims when running.

[0022] Another embodiment of this application provides an electronic device including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the method described in any of the preceding claims.

[0023] Compared with the prior art, the present invention provides a constant modular exponentiation operator, which includes n cascaded controlled constant modular multiplication operators, wherein the constant of the i-th controlled constant modular multiplication operator is . The modulus is N, and the input of the constant modular exponentiation unit is the exponent x. The constant modular exponentiation unit is used to calculate the modular exponentiation result based on the modular multiplication result. Modulo N is calculated by transforming modular exponentiation into the modular multiplication of n controlled constants. mod N. Attached Figure Description

[0024] Figure 1 A hardware structure block diagram of a computer terminal for a constant modular exponentiation unit provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of the structure of a constant modular exponentiation operator 100 provided in an embodiment of the present invention; Figure 3 This is a schematic diagram of the structure of a constant modular multiplication operator 200 provided in an embodiment of the present invention; Figure 4 This is a schematic diagram of the structure of a constant modular addition and modular multiplication arithmetic unit 210 provided in an embodiment of the present invention; Figure 5 This is a schematic diagram of the structure of a constant modulo adder 300 based on quantum Fourier transform, provided in an embodiment of the present invention. Figure 6 This is a schematic diagram of the structure of a modular addition operation module 310 provided in an embodiment of the present invention; Figure 7 A schematic diagram of another constant modular adder 300 based on quantum Fourier transform provided in an embodiment of the present invention; Figure 8 This is a schematic diagram of the structure of an auxiliary bit reset module 320 provided in an embodiment of the present invention; Figure 9 This is a schematic diagram of the structure of a modular addition result reset module 330 provided in an embodiment of the present invention; Figure 10 A schematic diagram of a constant adder 400 based on quantum Fourier transform provided in an embodiment of the present invention; Figure 11 A flowchart illustrating a constant modular exponentiation method provided in an embodiment of the present invention; Figure 12 This is a schematic diagram of a constant modular exponentiation device provided in an embodiment of the present invention. Detailed Implementation

[0025] The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0026] The present invention first provides a constant modular exponentiation operator, which can be applied to electronic devices, such as computer terminals, specifically ordinary computers, quantum computers, etc.

[0027] The following detailed explanation uses a computer terminal as an example. Figure 1 This is a hardware structure block diagram of a computer terminal providing a constant modular exponentiation operator according to an embodiment of the present invention. (See diagram below.) Figure 1 As shown, a computer terminal may include one or more ( Figure 1 Only one is shown in the diagram. A processor 102 (which may include, but is not limited to, a microprocessor MCU or a programmable logic device FPGA, etc.) and a memory 104 for storing a constant modular exponentiation unit are also shown. Optionally, the computer terminal may further include a transmission device 106 for communication functions and an input / output device 108. Those skilled in the art will understand that... Figure 1 The structure shown is for illustrative purposes only and does not limit the structure of the computer terminal described above. For example, the computer terminal may also include components that are more complex than those described above. Figure 1 The more or fewer components shown, or having the same Figure 1 The different configurations shown.

[0028] The memory 104 can be used to store software programs and modules of application software, such as program instructions / modules corresponding to a constant modular exponentiation arithmetic unit in an embodiment of this application. The processor 102 executes various functional applications and data processing by running the software programs and modules stored in the memory 104, thereby implementing the aforementioned constant modular exponentiation arithmetic unit. The memory 104 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 104 may further include memory remotely located relative to the processor 102, and these remote memories can be connected to a computer terminal via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0029] The transmission device 106 is used to receive or send data via a network. Specific examples of the network described above may include a wireless network provided by a communication provider for the computer terminal. In one example, the transmission device 106 includes a Network Interface Controller (NIC), which can connect to other network devices via a base station to communicate with the Internet. In another example, the transmission device 106 may be a Radio Frequency (RF) module, used for wireless communication with the Internet.

[0030] It's important to note that a true quantum computer has a hybrid structure, comprising two main parts: a classical computer responsible for performing classical computations and control, and a quantum device responsible for running quantum programs to achieve quantum computation. A quantum program is a sequence of instructions written in a quantum language such as QRunes that can run on a quantum computer, supporting operations on quantum logic gates and ultimately enabling quantum computing. Specifically, a quantum program is a sequence of instructions that operates on quantum logic gates according to a specific timing order.

[0031] In practical applications, due to limitations in the development of quantum device hardware, quantum computing simulations are typically required to verify quantum algorithms, quantum applications, and so on. Quantum computing simulation is the process of simulating the execution of a quantum program corresponding to a specific problem using a virtual architecture (i.e., a quantum virtual machine) built with the resources of a conventional computer. Typically, it is necessary to construct a quantum program corresponding to a specific problem. The quantum program referred to in this embodiment of the invention is a program written in a classical language that represents qubits and their evolution, where qubits, quantum logic gates, etc., related to quantum computing all have corresponding classical code representations.

[0032] Quantum circuits, also known as quantum logic circuits, are a manifestation of quantum programming and are the most commonly used general-purpose quantum computing model. They represent circuits that operate on qubits under an abstract concept. They consist of qubits, circuits (timelines), and various quantum logic gates, and the results are often read out through quantum measurement operations.

[0033] Unlike traditional circuits that use metal wires to transmit voltage or current signals, in quantum circuits, the circuits can be seen as being connected by time. That is, the state of a quantum bit evolves naturally over time, following the instructions of the Hamiltonian operator until it encounters a logic gate and is operated on.

[0034] A quantum program corresponds to a total quantum circuit. The quantum program described in this invention refers to this total quantum circuit, where the total number of qubits in the total quantum circuit is the same as the total number of qubits in the quantum program. This can be understood as follows: a quantum program can consist of a quantum circuit, measurement operations on the qubits within the quantum circuit, registers for storing measurement results, and control flow nodes (jump instructions). A quantum circuit can contain dozens, hundreds, or even thousands of quantum logic gate operations. The execution process of a quantum program is the process of executing all the quantum logic gates according to a certain timing order. It should be noted that the timing order refers to the chronological order in which individual quantum logic gates are executed.

[0035] It's important to note that in classical computing, the most basic unit is the bit, and the most fundamental control mode is the logic gate. Circuit control can be achieved through combinations of logic gates. Similarly, the way to process qubits is through quantum logic gates. Quantum logic gates enable the evolution of quantum states and are the foundation of quantum circuits. Quantum logic gates include single-qubit gates, such as Hadamard gates (H-gates), Pauli-X gates (X-gates), Pauli-Y gates (Y-gates), Pauli-Z gates (Z-gates), RX gates, RY gates, RZ gates, etc.; and multi-qubit gates, such as CNOT gates, CR gates, iSWAP gates, Tofoli gates, etc. Quantum logic gates are generally represented using unitary matrices, which are not only matrix forms but also operations and transformations. Generally, the effect of a quantum logic gate on a quantum state is calculated by left-multiplying the unitary matrix by the matrix corresponding to the right vector of the quantum state.

[0036] See Figure 2 , Figure 2 This is a schematic diagram of a constant modular exponentiation operator 100 provided in an embodiment of the present invention. The constant modular exponentiation operator 100 includes n cascaded controlled constant modular multiplication operators 200 (represented by ConMULT in the figure), where the constant of the i-th controlled constant modular multiplication operator 200 is... The modulus is N, and the input of the constant modular exponentiation unit 100 is the exponent x. The i-th controlled constant modular multiplication unit is used to calculate the output of the previous controlled constant modular multiplication unit based on x. The constant modular exponentiation unit 100 is used to calculate the modular exponentiation result based on the modular multiplication result of the (n-1)th controlled constant modular multiplication unit. mod N.

[0037] The constant modular exponentiation unit 100 includes three input terminals and three output terminals, one of which receives the quantum state corresponding to the exponent x. This is used to control whether the constant modular multiplication operator 200 is executed.

[0038] In this embodiment of the invention, the data is encoded using ground-state encoding, therefore Accordingly, there are n control input terminals (to prevent data overflow, the number of qubits requested can also be greater than or equal to n), and each controlled constant modular multiplication unit is controlled by the quantum state input to the control input terminals in the same order, such as the quantum state being... Then, the corresponding constant modular multiplication operation is performed; if the quantum state is If the constant is not multiplied, then the corresponding constant modular multiplication operation will not be performed.

[0039] The other two input terminals of the constant modular exponentiation unit 100 are connected to the two input terminals of the constant modular multiplication unit 200. One input terminal of the constant modular multiplication unit 200 is used to input the data to be multiplied, which is here... , can be like Figure 2 As shown, the initial state of all qubits encoding the data to be multiplied is set to... Then, an NOT gate (X gate) is applied to the least significant qubit to obtain... Alternatively, it can be directly... The quantum state as the least significant qubit.

[0040] Another input terminal of the constant modular multiplication operator 200 is used to input the data to be added. In the constant modular exponentiation operation, the data to be added, b, is 0. Therefore, the input here is also 0. .

[0041] The specific principle is as follows: For modulus ,constant , Modular exponentiation is:

[0042] It can be seen that modular exponentiation... This can be transformed into n controlled constant modular multiplication operations, where the constant in each constant modular multiplication operator is... , ... ... All constant modular multipliers have a modulus of N. Whether each constant modular multiplier performs its operation is controlled by the binary value of its corresponding exponent x. The i-th controlled constant modular multiplier is used to perform its operation according to... The output of the controlled constant modular multiplication unit preceding the binary numerical computation, the The modular multiplication result of N. The modular multiplication result of the (n-1)th controlled constant modular multiplier is ,Right now .

[0043] See Figure 3 , Figure 3 This is a schematic diagram of a constant modular multiplication operator 200 provided in an embodiment of the present invention. The i-th controlled constant modular multiplication operator 200 includes a constant modular addition and modular multiplication operator 210, a SWAP gate 220, and an inverse constant modular addition and modular multiplication operator 230 cascaded together.

[0044] The two input terminals 200p and 200q of the constant modular multiplication operator 200 are connected to the two input terminals 210p and 210q of the constant modular addition and modular multiplication operator 210, and the two output terminals 200m and 200n of the constant modular multiplication operator 200 are connected to the two output terminals 230m and 230n of the inverse constant modular addition and modular multiplication operator 230.

[0045] The two input terminals 200p and 200q of the constant modular multiplication operator 200 are used to input the quantum states corresponding to the data to be multiplied. The quantum state corresponding to the data b to be added The two output terminals 200m and 200n of the constant modular multiplication unit 200 are used to output the results of modular addition and modular multiplication operations. Corresponding quantum states and quantum states .

[0046] See Figure 4 , Figure 4 This is a schematic diagram of a constant modular addition and modular multiplication arithmetic unit 210 provided in an embodiment of the present invention. The constant modular addition arithmetic unit uses symbols indicating the constant and the modulus. Indicate, for example The constant is And a constant modular adder with a modulus of N. The constant modular adder / multiplier 210 includes m cascaded controlled constant modular adders 300, where the constant of the j-th controlled constant modular adder 300 is the constant of the m-th controlled constant modular adder 300. The modulus is N, where 0≤j≤m-1.

[0047] like Figure 4 As shown, each controlled constant modular adder 300 includes a data input terminal and a control input terminal. The data input terminal of each controlled constant modular adder 300 is connected to the data output terminal of the previous controlled constant modular adder 300, taking the output of the previous controlled constant modular adder 300 as input. The data input terminal of the 0th controlled constant modular adder 300 is connected to the input terminal 210q of the constant modular adder-multiplier 210, and its input is the quantum state corresponding to the data b to be added. The control input of each controlled constant modular adder 300 is connected to the input 210p of the constant modular adder / multiplier 210, and the input is the modular multiplication result output by the previous controlled constant modular multiplier 200. The corresponding quantum state ( It controls whether to execute its m cascaded controlled constant modulo arithmetic units 300.

[0048] It should be noted that for the 0th controlled constant modular adder 300, since there is no preceding constant modular adder, if the input is... The calculation result is This results in all subsequent calculations being 0. Therefore, the input to the 0th controlled constant modulo adder 300 can only be... This input is in the above embodiment ( Figure 2 It is implemented using NOT gates (X gates) in ).

[0049] It can be seen that modular addition and modular multiplication operations can be transformed into m controlled constant modular addition operations, where the constant in each constant modular adder is... , ... ... The modulus is N, and whether each constant modulus adder is executed depends on its corresponding order. Binary numerical control.

[0050] See Figure 5 , Figure 5 This is a schematic diagram of a constant modular adder 300 based on quantum Fourier transform provided in an embodiment of the present invention. The j-th controlled constant modular adder 300 includes a modular adder module 310. The two input terminals 300p and 300q of the constant modular adder 300 are connected one-to-one with the two input terminals 310p and 310q of the modular adder module 310. The two output terminals 300m and 300n of the constant modular adder 300 are connected one-to-one with the two output terminals 310m and 310n of the modular adder module 310.

[0051] Specifically, one input terminal 310p of the modular addition module 310 is used to input the output of the previous controlled constant modular addition unit 300, and the other input terminal 310q of the modular addition module 310 is used to input the initial auxiliary data 0; one output terminal 310m of the modular addition module 310 is used to output the output of the previous controlled constant modular addition unit 300, and the other output terminal 310n of the modular addition module 310 is used to output the target auxiliary data.

[0052] Among them, the quantum state corresponding to the initial auxiliary data 0 The quantum state corresponding to the target auxiliary data is or .

[0053] See Figure 6 , Figure 6 This is a schematic diagram of a modular addition module 310 provided in an embodiment of the present invention, wherein the constant adder uses constants marked on it. This indicates that the constant subtractor uses the constant marked with a symbol. SUB means, for example The constant is constant adder, The constant is The constant subtractor. The modular addition module 310 includes a first constant adder 311, a first constant subtractor 312, a first CNOT gate 313, and a controlled constant adder 314, which are cascaded in sequence. The constant of the first constant adder 311 is the constant of the... The constants of the first constant subtractor 312 and the controlled constant adder 314 are both N. The modular addition module 310 is used to calculate the output of the previous controlled constant modular adder 300 and the... And the result of the modulo addition operation of N.

[0054] In this module, one input terminal 310p of the modular addition module 310 is connected to the input terminal 311p of the first constant adder 311, and the other input terminal 310q of the modular addition module 310 is connected to one input terminal 313p of the first CNOT gate 313. The two output terminals 314m and 314n of the controlled constant adder 314 are connected to the two output terminals 310m and 310n of the modular addition module 310 in a one-to-one correspondence. One input terminal 310p of the modular addition module 310 is used to input the output of the previous controlled constant modular adder 300, and the other input terminal 310q of the modular addition module 310 is used to input initial auxiliary data. One output terminal 310m of the modular addition module 310 is used to output the output of the previous controlled constant modular adder and the... The modulo addition result of N, and the other output terminal 310n of the modulo addition module 310 is used to output target auxiliary data.

[0055] Specifically, the output terminal 311m of the first constant adder 311 is connected to the input terminal 312p of the first constant subtractor 312, the output terminal 312m of the first constant subtractor 312 is connected to the other input terminal 313q of the first CNOT gate 313, and the two output terminals 313m and 313n of the first CNOT gate 313 are connected to the two input terminals 314p and 314q of the controlled constant adder 314 in a one-to-one correspondence.

[0056] The first constant subtractor 312 has an output terminal 312m, which includes a data output terminal 312m1 and a sign output terminal 312m2. One of the input terminals 314p of the controlled constant adder 314 includes a data input terminal 314p1 and a sign input terminal 314p2. The data output terminal 312m1 of the first constant subtractor 312 is connected to the data input terminal 314p1 of the controlled constant adder 314. The sign output terminal 312m2 of the first constant subtractor 312 is connected to the other input terminal 313q of the first CNOT gate 313. One of the output terminals 313m of the first CNOT gate 313 is connected to the sign input terminal 314p2 of the controlled constant adder 314.

[0057] If i=0 and j=0, taking the 0th constant modular multiplication operator of the 0th controlled constant modular addition operator as an example, the specific principle of its modular addition operator 210 is as follows: Input the quantum state corresponding to the data to be added, b. The quantum state is output after passing through the first constant adder 311. Then, after passing through the first constant subtractor 312, the quantum state is output. ; Then the quantum state The quantum state corresponding to the initial auxiliary data 0 Input to the first CNOT gate 313, the control bit of the first CNOT gate 313 is a quantum state. The corresponding symbolic qubit, If ≥ N, then the quantum state of the symbolic qubit is Without executing the first CNOT gate 313 and the controlled constant adder 314, the modulo addition result output by the output terminal 310m is... -N, the target auxiliary data output by the output terminal 310n is .

[0058] As can be seen, the embodiments of the present invention can obtain the result of modular addition and realize modular addition, but the final quantum state of the auxiliary bits used may be... or If the final quantum state of the auxiliary bit is If the problem persists, a reset is required before the device can be used for other calculations and storage. Please refer to the next embodiment for a solution to this problem.

[0059] See Figure 7 , Figure 7This is a schematic diagram of another constant modular adder 300 based on quantum Fourier transform provided in an embodiment of the present invention. The j-th controlled constant modular adder 300 includes a modular adder module 310, an auxiliary bit reset module 320, and a modular adder result reset module 330 cascaded together.

[0060] Specifically, one input terminal 310p of the modular addition module 310 is used to input the output of the previously controlled constant modular addition unit, and the other input terminal 310q of the modular addition module 310 is used to input initial auxiliary data; one output terminal 310m of the modular addition module 310 is used to output the output of the previously controlled constant modular addition unit 300 and the... The modulo addition result of N, and the other output terminal 310n of the modulo addition module 310 is used to output target auxiliary data.

[0061] One of the output terminals 320m of the auxiliary bit reset module 320 is used to output intermediate data, and the other output terminal 320n of the auxiliary bit reset module 320 is used to output the initial auxiliary data.

[0062] The output terminal 330m of the modular addition result reset module 330 is used to output the output of the previously controlled constant modular addition unit 300 and the... The result of the modulo addition operation with the modulus N.

[0063] The modular addition module 310 is used to calculate the output of the previously controlled constant modular addition unit 300 and the... And the result of the modular addition operation of the modulus N, the auxiliary bit reset module 320 is used to reset the target auxiliary data to the initial auxiliary data, and the modular addition result reset module 330 is used to reset the intermediate data to the output of the previous controlled constant modular adder 300 and the And the result of the modulus N addition operation.

[0064] As can be seen, in this embodiment of the invention, the auxiliary bit reset module resets the target auxiliary data to the initial auxiliary data. Since the auxiliary bit reset module also changes the modulo addition result during the reset, the modulo addition result reset module then resets the changed intermediate data to the output of the previously controlled constant modulo adder and the... The result of the modulus N addition operation is obtained, thus not only realizing the modulus addition operation, but also resetting the auxiliary bits, so that the auxiliary bits can be used for other calculations and storage in the future.

[0065] See Figure 8 , Figure 8 This is a schematic diagram of an auxiliary bit reset module 320 provided in an embodiment of the present invention. The auxiliary bit reset module 320 is used to reset the target auxiliary data to the initial auxiliary data; the auxiliary bit reset module 320 includes a second constant subtractor 321, a first NOT gate 322, and a second CNOT gate 323 cascaded in sequence; the constant of the second constant subtractor 321 is the... .

[0066] In this configuration, one input terminal 320p of the auxiliary bit reset module 320 is connected to the input terminal 321p of the second constant subtractor 321, and the other input terminal 320q of the auxiliary bit reset module 320 is connected to one input terminal 323p of the second CNOT gate 323. The output terminal 321m of the second constant subtractor 321 is connected to the input terminal 322p of the first NOT gate 322, and the output terminal 322m of the first NOT gate 322 is connected to the other input terminal 323q of the second CNOT gate 323. The two output terminals 323m and 323n of the second CNOT gate 323 are connected one-to-one with the two output terminals 320m and 320n of the auxiliary bit reset module 320. One output terminal 320m of the auxiliary bit reset module 320 is used to output intermediate data, and the other output terminal 320n of the auxiliary bit reset module 320 is used to output the initial auxiliary data.

[0067] The second constant subtractor 321 has an output terminal 321m, which includes a data output terminal 321m1 and a sign output terminal 321m2. One of the output terminals 320m of the auxiliary bit reset module 320 includes a data output terminal 320m1 and a sign output terminal 320m2. The data output terminal 321m1 of the second constant subtractor 321 is connected to the data output terminal 320m1 of the auxiliary bit reset module 320. The sign output terminal 321m2 of the second constant subtractor 321 is connected to the input terminal 322p of the first NOT gate 322. One of the output terminals 323m of the second CNOT gate 323 is connected to the sign output terminal 320m2 of the auxiliary bit reset module 320. The other output terminal 323n of the second CNOT gate 323 is connected to the other output terminal 320n of the auxiliary bit reset module 320.

[0068] Taking the 0th modular multiplier of the 0th controlled constant modular multiplier as an example, the specific principle of its auxiliary bit reset module 220 is as follows: If ≥N, then the input at input terminal 320p is... The input at input terminal 320q is After passing through the second constant subtractor 321, -N is obtained, -N < 0. Therefore, the output of output terminal 321m1 is... The output of the 321m2 is , This represents a negative number. After passing through the first NOT gate 322, the output of terminal 322m is... Therefore, the inputs to the second CNOT gate 323, 323q and 323p, are both... Finally, the output of 320n is This refers to the initial auxiliary data, which resets the auxiliary bits. The output of the 320m1 terminal is... The output of the 320m² terminal is... Therefore, the intermediate data output from the 320m output terminal is .

[0069] See Figure 9 , Figure 9 This is a schematic diagram of a modular addition result reset module 330 provided in an embodiment of the present invention. The modular addition result reset module 330 is used to reset the intermediate data to the output of the previously controlled constant modular adder 300 and the... The result of the modular addition operation with the modulus N; the modular addition result reset module 330 includes a second NOT gate 331 and a second constant adder 332 cascaded in sequence, the constant of the second constant adder 332 being the modulus N. .

[0070] The modular addition result reset module 330 has an input terminal 330p including a sign input terminal 330p2 and a data input terminal 330p1. The second constant adder 332 has an input terminal 332p including a sign input terminal 332p2 and a data input terminal 332p1. The sign input terminal 330p2 of the modular addition result reset module 330 is connected to the input terminal 331p of the second NOT gate 331. The output terminal 331m of the second NOT gate 331 is connected to the sign input terminal 332p2 of the second constant adder 332. The data input terminal 330p1 of the modular addition result reset module 330 is connected to the data input terminal 332p1 of the second constant adder 332. The output terminal 332m of the second constant adder 332 is connected to the output terminal 330m of the modular addition result reset module 330. The output terminal 330m of the modular addition result reset module 330 is used to output the output of the previous controlled constant modular adder 300 and the... And the result of the modulo addition operation of N.

[0071] Taking the 0th modular multiplication unit of the 0th controlled constant modular multiplication unit as an example, the specific principle of its modular addition result reset module 230 is as follows: ≥N, the input at input terminal 331p is After passing through the second NOT gate 331, the output of the output terminal 331m is... Therefore, the input at input terminal 332p1 is... The input at input terminal 332p2 is The input at input terminal 332p is After passing through the second constant adder 332, the output of the output terminal 332m is... This achieves the reset of the result of the modular addition operation.

[0072] See Figure 10 , Figure 10 This is a schematic diagram of a constant adder 400 based on quantum Fourier transform, provided in an embodiment of the present invention. The constant adder 400 includes a quantum Fourier transform module 410, a phase transform module 420, and an inverse quantum Fourier transform module 430 cascaded together. The phase transform parameters in the phase transform module 420 are based on... Confirmed; the constant adder 400 is used to calculate the... The sum of the output of the previous controlled constant modulo arithmetic unit.

[0073] The quantum Fourier transform module 410 is used to evolve the quantum state of the output of the previous controlled constant modular arithmetic unit into a first Fourier state, and the phase transform module 420 is used to evolve the first Fourier state into the... The inverse quantum Fourier transform module 430 is used to evolve the second Fourier state into the second Fourier state, which is the sum of the outputs of the previously controlled constant modular adder. The quantum state is summed with the output of the previous controlled constant modulo arithmetic unit and output.

[0074] The constant adder 400 includes n data input terminals 401, which are used to input the quantum state of the output of the previous controlled constant modular adder. The quantum state of the output of the previous controlled constant modular adder is obtained by encoding the binary data to be added into the ground state of n qubits.

[0075] The constant adder 400 further includes n data output terminals 402, which are used to output the... The quantum state of the sum of the output of the previous controlled constant modulo arithmetic unit.

[0076] The phase transformation module 420 includes n RZ gates, and the rotation angle of each RZ gate is based on the... The binary representation is determined.

[0077] The matrix expression for the RZ gate is:

[0078] in, The angle is the rotation angle.

[0079] Among them, the The binary form is The rotation angle of the RZ gate is determined based on the following formula:

[0080] in, Let be the rotation angle of the k-th RZ gate. The value can be 0 or 1.

[0081] The phase transformation module 420 further includes n input terminals 421 and output terminals 422 that correspond one-to-one with the RZ gates.

[0082] It should be noted that, for the sake of simplicity, the above examples... Both b and 'b' are encoded using n qubits, which can be used in practice according to... The size of b is used to set the encoding of the qubit, and therefore is used for encoding. The number of qubits and the number of qubits used to encode b can also be different.

[0083] The above Figures 4-9 The first constant adder 311, the second constant adder 332, and the controlled constant adder 314 described herein can be based on Figure 10 The constant adder 400 shown is directly obtained, except that the input data to be added and the constant are different. The first constant subtractor 312 and the second constant subtractor 321 can be based on... Figure 10 The constant adder 400 shown is obtained indirectly, for example, by negating the sign bit of the qubit to obtain the negative number of the data to be added, or for example, by... Figure 10 The constant adder 400 shown is transposed and conjugated to obtain the constant subtractor. Examples will not be given here.

[0084] It should also be noted that the quantum logic gates included in the quantum circuit corresponding to the inverse constant modular addition and modular multiplication operator are transposed and conjugate with the quantum logic gates included in the quantum circuit corresponding to the constant modular addition and modular multiplication operator. For specific implementation methods, please refer to the constant modular addition and modular multiplication operator, which will not be repeated here.

[0085] Compared with existing technologies, this invention provides a constant modular adder based on quantum Fourier transform, wherein the constant modular adder includes a modular adder module; the modular adder module includes a first constant adder, a first constant subtractor, a first CNOT gate, and a controlled constant adder cascaded in sequence, wherein the constant of the first constant adder is... The constants of the first constant subtractor and the controlled constant adder are both modulo numbers. The first constant adder and the first constant subtractor are used to calculate the input data to be added and the... The sum is subtracted from the difference in the modulus, and then the calculation result is judged by the first CNOT gate. If it is greater than 0, the result is directly used as the data to be added and the difference in the modulus. And the result of the modular addition operation of the modulus; if it is less than 0, then the result is added to the modulus by a controlled constant adder. Add them together to obtain the data to be added and the stated data. And the result of the modulus addition operation. Compared with the prior art, the present invention provides a constant modular exponentiation operator, which includes n cascaded controlled constant modular multiplication operators, wherein the constant of the i-th controlled constant modular multiplication operator is . The modulus is N, and the input of the constant modular exponentiation unit is the exponent x. The constant modular exponentiation unit is used to calculate the modular exponentiation result based on the modular multiplication result. Modulo N is calculated by transforming modular exponentiation into the modular multiplication of n controlled constants. mod N.

[0086] See Figure 11 , Figure 11 This is a flowchart illustrating a method for modulo exponentiation of a constant provided in an embodiment of the present invention. The method includes: Step 1101: Obtain the constant modular exponentiation operator and the exponent x described in the above embodiments; Step 1102: Input the quantum state of x into the constant modular exponentiation unit to obtain the modular exponentiation result. The quantum state corresponding to mod N; Step 1103: Based on the above The quantum state corresponding to mod N determines the mod N.

[0087] See Figure 12 , Figure 12 This is a schematic diagram of a constant modular exponentiation device provided in an embodiment of the present invention. The device includes: Data acquisition unit 1201 is used to acquire the constant modular exponentiation operator and the exponent x described in the above embodiment; Modular exponentiation unit 1202 is used to input the quantum state of x into the constant modular exponentiation unit to obtain the modular exponentiation result. The quantum state corresponding to mod N; Result determination unit 1203, used for determining the result based on the The quantum state corresponding to mod N determines the mod N.

[0088] Another embodiment of the present invention provides a storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the method embodiments above when running.

[0089] Specifically, in this embodiment, the storage medium can be configured to store a computer program for performing the following steps: Obtain the constant modular exponentiation operator and the exponent x described in the above embodiments; The quantum state of x is input into the constant modular exponentiation unit to obtain the modular exponentiation result. The quantum state corresponding to mod N; Based on the above The quantum state corresponding to mod N determines the mod N.

[0090] Specifically, in this embodiment, the storage medium may include, but is not limited to, various media capable of storing computer programs, such as USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks.

[0091] Another embodiment of the present invention provides an electronic device including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the steps in any of the method embodiments described above.

[0092] Specifically, the aforementioned electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the aforementioned processor, and the input / output device is connected to the aforementioned processor.

[0093] Specifically, in this embodiment, the processor can be configured to perform the following steps via a computer program: Obtain the constant modular exponentiation operator and the exponent x described in the above embodiments; The quantum state of x is input into the constant modular exponentiation unit to obtain the modular exponentiation result. The quantum state corresponding to mod N; Based on the above The quantum state corresponding to mod N determines the mod N.

[0094] The above description, based on the embodiments shown in the figures, details the structure, features, and effects of the present invention. The above description is only a preferred embodiment of the present invention, but the present invention is not limited to the scope of implementation shown in the figures. Any changes made in accordance with the concept of the present invention, or equivalent embodiments modified to have equivalent changes, that do not exceed the spirit covered by the specification and figures, should be within the protection scope of the present invention.

Claims

1. A constant modular exponentiation operator, characterized in that, The constant modular exponentiation unit comprises n cascaded controlled constant modular multiplication units, wherein the constant of the i-th controlled constant modular multiplication unit is . The modulus is N, the input of the constant modular exponentiation operator is the exponent x, and the i-th controlled constant modular multiplication operator is used to calculate the output of the previous controlled constant modular multiplication operator based on x. The constant modular exponentiation unit is used to calculate the modular exponentiation result based on the modular multiplication result of the (n-1)th controlled constant modular multiplication unit. mod N, where 0≤i≤n-1; The i-th controlled constant modular multiplication unit includes a constant modular addition and modular multiplication unit, a SWAP gate, and an inverse constant modular addition and modular multiplication unit cascaded in sequence; The constant modular addition and modular multiplication arithmetic unit includes m cascaded controlled constant modular addition arithmetic units; the j-th controlled constant modular addition arithmetic unit includes a modular addition module, an auxiliary bit reset module, and a modular addition result reset module; The modular arithmetic module is used to calculate the output of the previously controlled constant modular arithmetic unit and the... and the result of the modular addition operation of N; one input terminal of the modular addition module is used to input the output of the previous controlled constant modular addition unit, and the other input terminal of the modular addition module is used to input the initial auxiliary data; one output terminal of the modular addition module is used to output the output of the previous controlled constant modular addition unit and the result of the modular addition operation of N. The modular addition operation result of N, and another output terminal of the modular addition operation module is used to output target auxiliary data; the modular addition operation module includes a first constant adder, a first constant subtractor, a first CNOT gate and a controlled constant adder cascaded in sequence; The auxiliary bit reset module is used to reset the target auxiliary data to the initial auxiliary data; one output terminal of the auxiliary bit reset module is used to output intermediate data, and the other output terminal of the auxiliary bit reset module is used to output the initial auxiliary data; the auxiliary bit reset module includes a second constant subtractor, a first NOT gate, and a second CNOT gate cascaded in sequence. The modular arithmetic result reset module is used to reset the intermediate data to the output of the previous controlled constant modular arithmetic unit and the... And the modular addition result of N; the modular addition result reset module includes a second NOT gate and a second constant adder cascaded in sequence.

2. The constant modular exponentiation operator according to claim 1, characterized in that, The constant of the j-th controlled constant modular arithmetic unit is the... The modulus is N, where 0≤j≤m-1.

3. The constant modular exponentiation operator according to claim 2, characterized in that, The constant of the first constant adder is the The constants of the first constant subtractor and the controlled constant adder are both N. The modular addition module is used to calculate the output of the previous controlled constant modular adder and the... And the result of the modulo addition operation of N.

4. The constant modular exponentiation operator according to claim 3, characterized in that, One input terminal of the modular addition module is connected to the input terminal of the first constant adder, and the other input terminal of the modular addition module is connected to one input terminal of the first CNOT gate. The two output terminals of the controlled constant adder are connected one-to-one with the two output terminals of the modular addition module.

5. The constant modular exponentiation unit according to claim 4, characterized in that, The output of the first constant adder is connected to the input of the first constant subtractor, the output of the first constant subtractor is connected to the other input of the first CNOT gate, and the two outputs of the first CNOT gate are connected one-to-one with the two inputs of the controlled constant adder.

6. The constant modular exponentiation unit according to claim 5, characterized in that, The output of the first constant subtractor includes a data output and a sign output. One of the inputs of the controlled constant adder includes a data input and a sign input. The data output of the first constant subtractor is connected to the data input of the controlled constant adder. The sign output of the first constant subtractor is connected to the other input of the first CNOT gate. One of the outputs of the first CNOT gate is connected to the sign input of the controlled constant adder.

7. The constant modular exponentiation operator according to claim 1, characterized in that, The constant of the second constant subtractor is the .

8. The constant modular exponentiation unit according to claim 1, characterized in that, One input terminal of the auxiliary bit reset module is connected to the input terminal of the second constant subtractor, and the other input terminal of the auxiliary bit reset module is connected to one input terminal of the second CNOT gate. The output terminal of the second constant subtractor is connected to the input terminal of the first NOT gate, the output terminal of the first NOT gate is connected to one input terminal of the second CNOT gate, and the two output terminals of the second CNOT gate are connected to the two output terminals of the auxiliary bit reset module in a one-to-one correspondence.

9. The constant modular exponentiation unit according to claim 8, characterized in that, The output of the second constant subtractor includes a data output and a sign output. One of the outputs of the auxiliary bit reset module includes a data output and a sign output. The data output of the second constant subtractor is connected to the data output of the auxiliary bit reset module. The sign output of the second constant subtractor is connected to the input of the first NOT gate. One of the outputs of the second CNOT gate is connected to the sign output of the auxiliary bit reset module. The other output of the second CNOT gate is connected to the other output of the auxiliary bit reset module.

10. The constant modular exponentiation unit according to claim 7, characterized in that, The constant of the second constant adder is the .

11. The constant modular exponentiation unit according to claim 10, characterized in that, The input terminals of the modular addition result reset module include a sign input terminal and a data input terminal, and the input terminals of the second constant adder also include a sign input terminal and a data input terminal. The sign input terminal of the modular addition result reset module is connected to the input terminal of the second NOT gate, the output terminal of the second NOT gate is connected to the sign input terminal of the second constant adder, the data input terminal of the modular addition result reset module is connected to the data input terminal of the second constant adder, and the output terminal of the second constant adder is connected to the output terminal of the modular addition result reset module. The output terminal of the modular addition result reset module is used to output the output of the previously controlled constant modular adder and the... And the result of the modulo addition operation of N.

12. The constant modular exponentiation operator according to claim 11, characterized in that, The two input terminals of the constant modular adder are connected one-to-one with the two input terminals of the modular adder module. The two output terminals of the modular adder module are connected one-to-one with the two input terminals of the auxiliary bit reset module. One output terminal of the auxiliary bit reset module is connected to the input terminal of the modular adder result reset module. One output terminal of the auxiliary bit reset module is connected to one output terminal of the constant modular adder. The output terminal of the modular adder result reset module is connected to the other output terminal of the constant modular adder.

13. A method for modulo exponentiation of a constant, characterized in that, The method includes: Obtain the constant modular exponentiation operator and the exponent x as described in any one of claims 1-12; The quantum state of x is input into the constant modular exponentiation unit to obtain the modular exponentiation result. The quantum state corresponding to mod N; Based on the above The quantum state corresponding to mod N determines the mod N.

14. A constant modular exponentiation device, characterized in that, The device includes: The data acquisition unit is used to acquire the constant modular exponentiation operator and the exponent x as described in any one of claims 1-12; The modular exponentiation unit is used to input the quantum state of x into the constant modular exponentiation unit to obtain the modular exponentiation result. The quantum state corresponding to mod N; The result determination unit is used to determine the result based on the above. The quantum state corresponding to mod N determines the mod N.

15. A storage medium, characterized in that, The storage medium stores a computer program, wherein the computer program is configured to execute the method of claim 13 at runtime.

16. An electronic device comprising a memory and a processor, characterized in that, The memory stores a computer program, and the processor is configured to run the computer program to perform the method of claim 13.

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