Constant modulus plus modular multiplication operator, modular multiplication operator, method of operation and related apparatus

Abstract

The application discloses a constant modulus plus modulus multiplication operator, a modulus multiplication operator, an operation method and related devices. The constant modulus plus modulus multiplication operator comprises n cascaded controlled constant modulus plus operators. The constant of the i-th controlled constant modulus plus operator is 2 i a, and the modulus is N. The input of the constant modulus plus modulus multiplication operator is data to be added b and data to be multiplied x. The constant modulus plus modulus multiplication operator is used to calculate a modulus plus modulus multiplication result b+ax mod N. The modulus plus modulus multiplication is converted into n controlled constant modulus plus operations, so that the modulus plus modulus multiplication result b+ax mod N is calculated.

Description

Technical Field

[0001] This invention belongs to the field of quantum computing technology, specifically a constant modular addition and modular multiplication operator, a modular multiplication operator, an operation method, and related devices. Background Technology

[0002] A quantum computer is a physical device that performs high-speed mathematical and logical operations, stores and processes quantum information in accordance with the laws of quantum mechanics. When a device processes and calculates quantum information and runs quantum algorithms, it is a quantum computer. Because of its ability to process mathematical problems more efficiently than ordinary computers—for example, reducing the time to crack RSA keys from hundreds of years to hours—quantum computers have become a key technology under research.

[0003] Modular operations have wide applications in number theory and cryptography, from parity and prime number determination to the Caesar cipher, from finite fields to the implementation of block ciphers and field towers, and from elliptic curves over finite fields to elliptic curve-based public-key cryptography. Modular operations are ubiquitous in these applications. Therefore, modular operations are the most commonly used function in arithmetic units, and this is also true for quantum computing. How to implement constant modular addition and modular multiplication operations is a technical problem that urgently needs to be solved in quantum computing. Summary of the Invention

[0004] The purpose of this invention is to provide a constant modular addition and modular multiplication operator, a modular multiplication operator, an operation method, and related devices, which aim to realize modular addition and modular multiplication operations in quantum computing.

[0005] One embodiment of the present invention provides a constant modular addition and modular multiplication operator, wherein the constant modular addition and modular multiplication operator comprises n cascaded controlled constant modular addition operators, and the constant of the i-th controlled constant modular addition operator is . The modulus is N, and the input of the constant modulus addition and multiplication operator is the quantum state corresponding to the data b to be added. The quantum state corresponding to the data x to be multiplied The constant modular addition and modular multiplication operator is used to calculate the result of the modular addition and modular multiplication operation b+ax mod N, where 0≤i≤n-1.

[0006] Optionally, the i-th controlled constant modular adder includes a modular adder module; the modular adder module includes a first constant adder, a first constant subtractor, a first CNOT gate, and a controlled constant adder cascaded in sequence, wherein the constant of the first constant adder is the... The constants of the first constant subtractor and the controlled constant adder are both N. The modular addition module is used to calculate the output of the previous controlled constant modular adder and the... And the result of the modulo addition operation of N.

[0007] Optionally, one input terminal of the modular addition module is connected to the input terminal of the first constant adder, and the other input terminal of the modular addition module is connected to one input terminal of the first CNOT gate. The two output terminals of the controlled constant adder are connected one-to-one with the two output terminals of the modular addition module. One input terminal of the modular addition module is used to input the output of the previous controlled constant modular adder, and the other input terminal is used to input initial auxiliary data. One output terminal of the modular addition module is used to output the output of the previous controlled constant modular adder and the... The result of the modular addition operation of N, and the other output of the modular addition operation module is used to output target auxiliary data.

[0008] Optionally, the output of the first constant adder is connected to the input of the first constant subtractor, the output of the first constant subtractor is connected to the other input of the first CNOT gate, and the two outputs of the first CNOT gate are connected one-to-one with the two inputs of the controlled constant adder.

[0009] Optionally, the output of the first constant subtractor includes a data output and a sign output, one of the inputs of the controlled constant adder includes a data input and a sign input, the data output of the first constant subtractor is connected to the data input of the controlled constant adder, the sign output of the first constant subtractor is connected to the other input of the first CNOT gate, and one of the outputs of the first CNOT gate is connected to the sign input of the controlled constant adder.

[0010] Optionally, the i-th controlled constant modulo adder further includes an auxiliary bit reset module, which is used to reset the target auxiliary data to the initial auxiliary data; the auxiliary bit reset module includes a second constant subtractor, a first NOT gate, and a second CNOT gate cascaded in sequence; the constant of the second constant subtractor is the... .

[0011] Optionally, one input terminal of the auxiliary bit reset module is connected to the input terminal of the second constant subtractor, and the other input terminal of the auxiliary bit reset module is connected to one input terminal of the second CNOT gate. The output terminal of the second constant subtractor is connected to the input terminal of the first NOT gate, and the output terminal of the first NOT gate is connected to one input terminal of the second CNOT gate. The two output terminals of the second CNOT gate are connected one-to-one with the two output terminals of the auxiliary bit reset module. One output terminal of the auxiliary bit reset module is used to output intermediate data, and the other output terminal of the auxiliary bit reset module is used to output the initial auxiliary data.

[0012] Optionally, the output of the second constant subtractor includes a data output and a sign output. One of the outputs of the auxiliary bit reset module includes a data output and a sign output. The data output of the second constant subtractor is connected to the data output of the auxiliary bit reset module. The sign output of the second constant subtractor is connected to the input of the first NOT gate. One of the outputs of the second CNOT gate is connected to the sign output of the auxiliary bit reset module. The other output of the second CNOT gate is connected to the other output of the auxiliary bit reset module.

[0013] Optionally, the i-th controlled constant modular adder further includes a modular adder result reset module, which is used to reset the intermediate data to the output of the previous controlled constant modular adder and the... and the modular addition result of N; the modular addition result reset module includes a second NOT gate and a second constant adder cascaded in sequence, the constant of the second constant adder being the... .

[0014] Optionally, the input terminals of the modular addition result reset module include a sign input terminal and a data input terminal, and the input terminals of the second constant adder include a sign input terminal and a data input terminal; the sign input terminal of the modular addition result reset module is connected to the input terminal of the second NOT gate, the output terminal of the second NOT gate is connected to the sign input terminal of the second constant adder, the data input terminal of the modular addition result reset module is connected to the data input terminal of the second constant adder, and the output terminal of the second constant adder is connected to the output terminal of the modular addition result reset module; the output terminal of the modular addition result reset module is used to output the output of the previously controlled constant modular adder and the... And the result of the modulo addition operation of N.

[0015] Optionally, the two input terminals of the constant modular adder are connected one-to-one with the two input terminals of the modular adder module, the two output terminals of the modular adder module are connected one-to-one with the two input terminals of the auxiliary bit reset module, one output terminal of the auxiliary bit reset module is connected to the input terminal of the modular adder result reset module, one output terminal of the auxiliary bit reset module is connected to one output terminal of the constant modular adder, and the output terminal of the modular adder result reset module is connected to the other output terminal of the constant modular adder.

[0016] Another embodiment of the present invention provides a constant modular multiplication operator, which includes the constant modular addition and modular multiplication operator described in any of the above embodiments, wherein the data to be added b is 0, and the constant modular multiplication operator is used to calculate the modular multiplication result ax mod N.

[0017] Optionally, the constant modular multiplication operator further includes a SWAP gate and an inverse constant modular addition and modular multiplication operator, wherein the SWAP gate is connected to the constant modular addition and modular multiplication operator and the inverse constant modular addition and modular multiplication operator, respectively.

[0018] Another embodiment of the present invention provides a method for constant modular addition and modular multiplication, the method comprising:

[0019] Obtain the constant modular addition and modular multiplication operator described in the above embodiments, the data to be added b, and the data to be multiplied x; The quantum states of b and x are input into the constant modular addition and modular multiplication operator to obtain the quantum state corresponding to the modular addition and modular multiplication result b+ax mod N; The b+ax mod N is determined based on the quantum state corresponding to the b+ax mod N.

[0020] Another embodiment of the present invention provides a constant modular addition and modular multiplication operation device, the device comprising: The data acquisition unit is used to acquire the constant modular addition and modular multiplication operator described in the above embodiments, the data to be added b, and the data to be multiplied x; The modular multiplication and modular addition operation unit is used to input the quantum states of b and x into the constant modular addition and modular multiplication operator to obtain the quantum state corresponding to the modular addition and modular multiplication operation result b+ax mod N; The result determination unit is used to determine the b+ax mod N based on the quantum state corresponding to the b+ax mod N.

[0021] Another embodiment of the present invention provides a method for constant modular multiplication, the method comprising: Obtain the constant modular multiplication operator and the data x to be multiplied as described in the above embodiments; The quantum state of x is input into the constant modular multiplication unit to obtain the quantum state corresponding to the modular multiplication result ax mod N; The ax mod N is determined based on the quantum state corresponding to the ax mod N.

[0022] Another embodiment of the present invention provides a constant modular multiplication apparatus, the apparatus comprising: The data acquisition unit is used to acquire the constant modular multiplication operator described in the above embodiments and the data to be multiplied x; The modular multiplication unit is used to input the quantum state of x into the constant modular multiplication unit to obtain the quantum state corresponding to the modular multiplication result ax mod N; The result determination unit is used to determine the ax mod N based on the quantum state corresponding to the ax mod N.

[0023] Another embodiment of the present invention provides a storage medium storing a computer program, wherein the computer program is configured to execute the method described in any of the preceding claims when running.

[0024] Another embodiment of the present invention provides an electronic device including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the method described in any of the preceding claims.

[0025] Compared with the prior art, the present invention provides a constant modular addition and modular multiplication operator, wherein the constant modular addition and modular multiplication operator comprises n cascaded controlled constant modular addition operators, and the constant of the i-th controlled constant modular addition operator is . The modulus is N. The input of the constant modulo addition and modulo multiplication operator is the data to be added b and the data to be multiplied x. The constant modulo addition and modulo multiplication operator is used to calculate the result of the modulo addition and modulo multiplication operation b+ax mod N. By converting the modulo addition and modulo multiplication operation into n controlled constant modulo addition operations, the result of the modulo addition and modulo multiplication operation b+ax mod N can be calculated. Attached Figure Description

[0026] Figure 1 A schematic diagram of the hardware structure of a computer terminal for a constant modular addition and modular multiplication arithmetic unit provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of the structure of a constant modular addition and modular multiplication arithmetic unit 100 provided in an embodiment of the present invention; Figure 3 A schematic diagram of a constant modulo adder 200 based on quantum Fourier transform provided in an embodiment of the present invention; Figure 4This is a schematic diagram of the structure of a modular addition operation module 210 provided in an embodiment of the present invention; Figure 5 A schematic diagram of another constant modular adder 200 based on quantum Fourier transform provided in an embodiment of the present invention; Figure 6 This is a schematic diagram of the structure of an auxiliary bit reset module 220 provided in an embodiment of the present invention; Figure 7 This is a schematic diagram of the structure of a modular addition result reset module 230 provided in an embodiment of the present invention; Figure 8 A schematic diagram of a constant adder 300 based on quantum Fourier transform provided in an embodiment of the present invention; Figure 9 This is a schematic diagram of another constant modular addition and modular multiplication arithmetic unit 100 provided in an embodiment of the present invention; Figure 10 A flowchart illustrating a constant modular addition and modular multiplication operation method provided in an embodiment of the present invention; Figure 11 This is a schematic diagram of a constant modular addition and modular multiplication arithmetic device provided in an embodiment of the present invention; Figure 12 A flowchart illustrating a constant modular multiplication method provided in an embodiment of the present invention; Figure 13 This is a schematic diagram of a constant modular multiplication device provided in an embodiment of the present invention. Detailed Implementation

[0027] The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0028] The present invention first provides a constant modular addition and modular multiplication arithmetic unit, which can be applied to electronic devices, such as computer terminals, specifically ordinary computers, quantum computers, etc.

[0029] The following detailed explanation uses a computer terminal as an example. Figure 1 This is a schematic diagram of the hardware structure of a computer terminal providing a constant modular addition and modular multiplication arithmetic unit according to an embodiment of the present invention. Figure 1 As shown, a computer terminal may include one or more ( Figure 1 Only one is shown in the diagram. A processor (which may include, but is not limited to, a microprocessor (MCU) or a programmable logic device (FPGA)) and a memory for storing a constant modular addition and multiplication arithmetic unit are also included. Optionally, the computer terminal may further include a transmission device for communication functions and input / output devices. Those skilled in the art will understand that... Figure 1The structure shown is for illustrative purposes only and does not limit the structure of the computer terminal described above. For example, the computer terminal may also include components that are more complex than those described above. Figure 1 The more or fewer components shown, or having the same Figure 1 The different configurations shown.

[0030] The memory can be used to store software programs and modules of application software, such as the program instructions / modules corresponding to a constant modular addition and multiplication arithmetic unit in an embodiment of the present invention. The processor executes various functional applications and data processing by running the software programs and modules stored in the memory, thereby realizing the aforementioned constant modular addition and multiplication arithmetic unit. The memory may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory may further include memory remotely located relative to the processor, and these remote memories can be connected to a computer terminal via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0031] The transmission device is used to receive or send data via a network. Specific examples of the network described above may include a wireless network provided by the computer terminal's communication provider. In one example, the transmission device includes a Network Interface Controller (NIC), which can connect to other network devices via a base station to communicate with the Internet. In another example, the transmission device may be a Radio Frequency (RF) module, used for wireless communication with the Internet.

[0032] It's important to note that a true quantum computer has a hybrid structure, comprising two main parts: a classical computer responsible for performing classical computations and control, and a quantum device responsible for running quantum programs to achieve quantum computation. A quantum program is a sequence of instructions written in a quantum language such as QRunes that can run on a quantum computer, supporting operations on quantum logic gates and ultimately enabling quantum computing. Specifically, a quantum program is a sequence of instructions that operates on quantum logic gates according to a specific timing order.

[0033] In practical applications, due to limitations in the development of quantum device hardware, quantum computing simulations are typically required to verify quantum algorithms, quantum applications, and so on. Quantum computing simulation is the process of simulating the execution of a quantum program corresponding to a specific problem using a virtual architecture (i.e., a quantum virtual machine) built with the resources of a conventional computer. Typically, it is necessary to construct a quantum program corresponding to a specific problem. The quantum program referred to in this embodiment of the invention is a program written in a classical language that represents qubits and their evolution, where qubits, quantum logic gates, etc., related to quantum computing all have corresponding classical code representations.

[0034] Quantum circuits, also known as quantum logic circuits, are a manifestation of quantum programming and are the most commonly used general-purpose quantum computing model. They represent circuits that operate on qubits under an abstract concept. They consist of qubits, circuits (timelines), and various quantum logic gates, and the results are often read out through quantum measurement operations.

[0035] Unlike traditional circuits that use metal wires to transmit voltage or current signals, in quantum circuits, the circuits can be seen as being connected by time. That is, the state of a quantum bit evolves naturally over time, following the instructions of the Hamiltonian operator until it encounters a logic gate and is operated on.

[0036] A quantum program corresponds to a total quantum circuit. The quantum program described in this invention refers to this total quantum circuit, where the total number of qubits in the total quantum circuit is the same as the total number of qubits in the quantum program. This can be understood as follows: a quantum program can consist of a quantum circuit, measurement operations on the qubits within the quantum circuit, registers for storing measurement results, and control flow nodes (jump instructions). A quantum circuit can contain dozens, hundreds, or even thousands of quantum logic gate operations. The execution process of a quantum program is the process of executing all the quantum logic gates according to a certain timing order. It should be noted that the timing order refers to the chronological order in which individual quantum logic gates are executed.

[0037] It's important to note that in classical computing, the most basic unit is the bit, and the most fundamental control mode is the logic gate. Circuit control can be achieved through combinations of logic gates. Similarly, the way to process qubits is through quantum logic gates. Quantum logic gates enable the evolution of quantum states and are the foundation of quantum circuits. Quantum logic gates include single-qubit gates, such as Hadamard gates (H-gates), Pauli-X gates (X-gates), Pauli-Y gates (Y-gates), Pauli-Z gates (Z-gates), RX gates, RY gates, RZ gates, etc.; and multi-qubit gates, such as CNOT gates, CR gates, iSWAP gates, Tofoli gates, etc. Quantum logic gates are generally represented using unitary matrices, which are not only matrix forms but also operations and transformations. Generally, the effect of a quantum logic gate on a quantum state is calculated by left-multiplying the unitary matrix by the matrix corresponding to the right vector of the quantum state.

[0038] See Figure 2 , Figure 2 This is a schematic diagram of a constant modular addition and modular multiplication arithmetic unit 100 provided in an embodiment of the present invention. The constant modular addition arithmetic unit uses symbols indicating the constant and the modulus. Indicate, for example The constant is The constant modular addition and multiplication module 110 includes n cascaded controlled constant modular addition units 200, where the constant of the i-th controlled constant modular addition unit 200 is N. The modulus is N, and the input of the constant modulus addition and multiplication operator is the quantum state corresponding to the data x to be multiplied. The quantum state corresponding to the data b to be added The constant modular addition and modular multiplication operator is used to calculate the result of the modular addition and modular multiplication operation b+ax mod N.

[0039] like Figure 2 As shown, each controlled constant modular adder 200 includes a data input terminal and a control input terminal. The data input terminal of each controlled constant modular adder 200 is connected to the data output terminal of the previous controlled constant modular adder 200, taking the output of the previous controlled constant modular adder 200 as input. The data input terminal of the 0th controlled constant modular adder 200 is connected to the input terminal 110q of the constant modular adder / multiply module 110, and its input is the quantum state corresponding to the data b to be added. The control input of each controlled constant modular adder 200 is connected to the input of the constant modular adder / multiplier 100, and the quantum state of the input data x to be multiplied is used to determine the input. Control whether to perform constant modulo addition operation.

[0040] In this embodiment of the invention, the data is encoded using ground-state encoding, therefore Accordingly, there are n control input terminals (to prevent data overflow, the number of qubits requested can also be greater than or equal to n), and each controlled constant modulo addition arithmetic unit is controlled by the quantum state input to the control input terminals in the same order, such as the quantum state being... Then, the corresponding constant modulo addition operation is performed; if the quantum state is If the constant modulo addition operation is not performed, then the corresponding constant addition operation will not be performed.

[0041] The specific principle is as follows: For modulus ,constant , Modular addition and modular multiplication are: )mod N.

[0042] It can be seen that modular addition and modular multiplication operations This can be transformed into n controlled constant modular addition operations, where the constant in each constant modular addition operator is... , ... ... The modulus is N, and whether each constant modulo adder is executed is controlled by the binary value of x in its corresponding order.

[0043] See Figure 3 , Figure 3 This is a schematic diagram of a constant modular adder 200 based on quantum Fourier transform, provided in an embodiment of the present invention. The constant modular adder 200 includes a modular adder module 210. The two input terminals 200p and 200q of the constant modular adder 200 are connected one-to-one with the two input terminals 210p and 210q of the modular adder module 210. The two output terminals 200m and 200n of the constant modular adder 200 are connected one-to-one with the two output terminals 210m and 210n of the modular adder module 210.

[0044] Specifically, one of the input terminals 210p of the modular addition module 210 is used to input the output of the previously controlled constant modular addition unit 200, i.e. If i=0, then there is no previously controlled constant modulo adder 200 whose input is... .

[0045] Another input terminal 210q of the modular addition module 210 is used to input initial auxiliary data 0; one of the output terminals 210m of the modular addition module 210 is used to output the output of the previously controlled constant modular addition unit 200. and the target data And the result of the modulus N modulo addition operation, i.e. The other output terminal 210n of the modulo addition operation module 210 is used to output target auxiliary data.

[0046] Among them, the quantum state corresponding to the initial auxiliary data 0 The quantum state corresponding to the target auxiliary data is or .

[0047] It should be noted that the above-mentioned modular addition operation module 210 and other modules described below can all be composed of basic quantum logic gates. The input and output terms of each module can be qubits. Data is encoded onto the quantum state of the qubits. Each module acts on the qubits, causing the quantum state of the qubits to evolve.

[0048] See Figure 4 , Figure 4 This is a schematic diagram of a modular addition module 210 provided in an embodiment of the present invention, wherein the constant adder uses constants marked with symbols. This indicates that the constant subtractor uses the constant marked with a symbol. SUB means, for example The constant is constant adder, The constant is The constant subtractor. The modular addition module 210 includes a first constant adder 211, a first constant subtractor 212, a first CNOT gate 213, and a controlled constant adder 214, which are cascaded in sequence. The constant of the first constant adder 211 is the constant of the... The constants of the first constant subtractor 212 and the controlled constant adder 214 are both N. The modular addition module 210 is used to calculate the output of the previous controlled constant modular adder 111 and the... And the result of the modulo addition operation of N.

[0049] In this module, one input terminal 210p of the modular addition module 210 is connected to the input terminal 211p of the first constant adder 211, and the other input terminal 210q of the modular addition module 210 is connected to one input terminal 213p of the first CNOT gate 213. The two output terminals 214m and 214n of the controlled constant adder 214 are connected to the two output terminals 210m and 210n of the modular addition module 210 in a one-to-one correspondence. One input terminal 210p of the modular addition module 210 is used to input the output of the previous controlled constant modular adder 200, and the other input terminal 210q of the modular addition module 210 is used to input initial auxiliary data. One output terminal 210m of the modular addition module 210 is used to output the output of the previous controlled constant modular adder and the... The modulo addition result of N, and the other output terminal 210n of the modulo addition module 210 is used to output target auxiliary data.

[0050] Specifically, the output terminal 211m of the first constant adder 211 is connected to the input terminal 212p of the first constant subtractor 212, the output terminal 212m of the first constant subtractor 212 is connected to the other input terminal 213q of the first CNOT gate 213, and the two output terminals 213m and 213n of the first CNOT gate 213 are connected to the two input terminals 214p and 214q of the controlled constant adder 214 in a one-to-one correspondence.

[0051] The first constant subtractor 212 has an output terminal 212m, which includes a data output terminal 212m1 and a sign output terminal 212m2. One of the input terminals 214p of the controlled constant adder 214 includes a data input terminal 214p1 and a sign input terminal 214p2. The data output terminal 212m1 of the first constant subtractor 212 is connected to the data input terminal 214p1 of the controlled constant adder 214. The sign output terminal 212m2 of the first constant subtractor 212 is connected to the other input terminal 213q of the first CNOT gate 213. One of the output terminals 213m of the first CNOT gate 213 is connected to the sign input terminal 214p2 of the controlled constant adder 214.

[0052] Taking the 0th constant modular adder as an example, the specific principle of its modular adder module 210 is as follows: Input the quantum state corresponding to the data to be added, b. The quantum state is output after passing through the first constant adder 211. Then, after passing through the first constant subtractor 212, the quantum state is output. ; Then the quantum state The quantum state corresponding to the initial auxiliary data 0 Input to the first CNOT gate 213, the control bit of the first CNOT gate 213 is a quantum state. The corresponding symbolic qubit, if If a + b ≥ N, then the quantum state of the symbolic qubit is: Without executing the first CNOT gate 213 and the controlled constant adder 214, the modulo addition result output from the output terminal 210m is... a+bN, the target auxiliary data output at the output terminal 210n is: ;like If a + b < N, then the quantum state of the symbolic qubit is: The first CNOT gate 213 and the controlled constant adder 214 are executed, and the modulo addition result output by the output terminal 210m is: a+b, the target auxiliary data output by the output terminal 210n is: .

[0053] As can be seen, the embodiments of the present invention can obtain the result of modular addition and realize modular addition, but the final quantum state of the auxiliary bits used may be... or If the final quantum state of the auxiliary bit is If the problem persists, a reset is required before the device can be used for other calculations and storage. Please refer to the next embodiment for a solution to this problem.

[0054] See Figure 5 , Figure 5 This is a schematic diagram of another constant modular adder 200 based on quantum Fourier transform provided in an embodiment of the present invention. The constant modular adder 200 includes a modular adder module 210, an auxiliary bit reset module 220, and a modular adder result reset module 230, which are cascaded together.

[0055] Specifically, one input terminal 210p of the modular addition module 210 is used to input the output of the previously controlled constant modular addition unit, and the other input terminal 210q of the modular addition module 210 is used to input initial auxiliary data; one output terminal 210m of the modular addition module 210 is used to output the output of the previously controlled constant modular addition unit 200 and the... The modulo addition result of N, and the other output terminal 210n of the modulo addition module 210 is used to output target auxiliary data.

[0056] One of the output terminals 220m of the auxiliary bit reset module 220 is used to output intermediate data, and the other output terminal 220n of the auxiliary bit reset module 220 is used to output the initial auxiliary data.

[0057] The output terminal 230m of the modular addition result reset module 230 is used to output the output of the previously controlled constant modular addition unit 200 and the... The result of the modulo addition operation with the modulus N.

[0058] The modular addition module 210 is used to calculate the output of the previously controlled constant modular addition unit 200 and the... And the result of the modular addition operation of the modulus N, the auxiliary bit reset module 220 is used to reset the target auxiliary data to the initial auxiliary data, and the modular addition result reset module 230 is used to reset the intermediate data to the output of the previous controlled constant modular addition operator 200 and the And the result of the modulus N addition operation.

[0059] As can be seen, in this embodiment of the invention, the auxiliary bit reset module resets the target auxiliary data to the initial auxiliary data. Since the auxiliary bit reset module also changes the modulo addition result during the reset, the modulo addition result reset module then resets the changed intermediate data to the output of the previously controlled constant modulo adder and the... The result of the modulus N addition operation is obtained, thus not only realizing the modulus addition operation, but also resetting the auxiliary bits, so that the auxiliary bits can be used for other calculations and storage in the future.

[0060] See Figure 6 , Figure 6 This is a schematic diagram of an auxiliary bit reset module 220 provided in an embodiment of the present invention. The auxiliary bit reset module 220 is used to reset the target auxiliary data to the initial auxiliary data; the auxiliary bit reset module 220 includes a second constant subtractor 221, a first NOT gate 222, and a second CNOT gate 223 cascaded in sequence; the constant of the second constant subtractor 221 is the... .

[0061] In this configuration, one input terminal 220p of the auxiliary bit reset module 220 is connected to the input terminal 221p of the second constant subtractor 221, and the other input terminal 220q of the auxiliary bit reset module 220 is connected to one input terminal 223p of the second CNOT gate 223. The output terminal 221m of the second constant subtractor 221 is connected to the input terminal 222p of the first NOT gate 222, and the output terminal 222m of the first NOT gate 222 is connected to the other input terminal 223q of the second CNOT gate 223. The two output terminals 223m and 223n of the second CNOT gate 223 are connected to the two output terminals 220m and 220n of the auxiliary bit reset module 220 in a one-to-one correspondence. One output terminal 220m of the auxiliary bit reset module 220 is used to output intermediate data, and the other output terminal 220n of the auxiliary bit reset module 220 is used to output the initial auxiliary data.

[0062] The second constant subtractor 221 has an output terminal 221m that includes a data output terminal 221m1 and a sign output terminal 221m2. One of the output terminals 220m of the auxiliary bit reset module 220 includes a data output terminal 220m1 and a sign output terminal 220m2. The data output terminal 221m1 of the second constant subtractor 221 is connected to the data output terminal 220m1 of the auxiliary bit reset module 220. The sign output terminal 221m2 of the second constant subtractor 221 is connected to the input terminal 222p of the first NOT gate 222. One of the output terminals 223m of the second CNOT gate 223 is connected to the sign output terminal 220m2 of the auxiliary bit reset module 220. The other output terminal 223n of the second CNOT gate 223 is connected to the other output terminal 220n of the auxiliary bit reset module 220.

[0063] Taking the 0th constant modulo adder as an example, the specific principle of its auxiliary bit reset module 220 is as follows: like If a+b≥N, then the input at input terminal 220p is The input at input terminal 220q is After passing through the second constant subtractor 221, we obtain bN, where bN < 0. Therefore, the output of output terminal 221m1 is... The output of the 221m2 terminal is , This represents a negative number. After passing through the first NOT gate 222, the output of terminal 222m is... Therefore, the inputs to the second CNOT gate 223, 223q and 223p, are both... Finally, the output of 220n is This refers to the initial auxiliary data, which resets the auxiliary bits. The output of the 220m1 terminal is... The output of the 220m² terminal is... Therefore, the intermediate data output from the 220m output terminal is .

[0064] like If a + b < N, then the input at input terminal 220p is The input at input terminal 220q is After passing through the second constant subtractor 221, we obtain b, where b > 0. Therefore, the output of output terminal 221m1 is... The output of the 221m2 terminal is , This represents a negative number. After passing through the first NOT gate 222, the output of terminal 222m is... Therefore, the input at the second CNOT gate 223 input terminal 223q is... The input for 223p is The exchange is performed through the second CNOT gate, and the final output of 220n is... This refers to the initial auxiliary data, which resets the auxiliary bits. The output of the 220m1 terminal is... The output of the 220m² terminal is... Therefore, the intermediate data output from the 220m output terminal is .

[0065] See Figure 7 , Figure 7 This is a schematic diagram of a modular addition result reset module 230 provided in an embodiment of the present invention. The modular addition result reset module 230 is used to reset the intermediate data to the output of the previously controlled constant modular adder and the... The result of the modular addition operation with the modulus N; the modular addition result reset module 230 includes a second NOT gate 231 and a second constant adder 232 cascaded in sequence, the constant of the second constant adder 232 being the modulus N. .

[0066] The modular addition result reset module 230 has an input terminal 230p including a sign input terminal 230p2 and a data input terminal 230p1. The second constant adder 232 has an input terminal 232p including a sign input terminal 232p2 and a data input terminal 232p1. The sign input terminal 230p2 of the modular addition result reset module 230 is connected to the input terminal 231p of the second NOT gate 231. The output terminal 231m of the second NOT gate 231 is connected to the sign input terminal 232p2 of the second constant adder 232. The data input terminal 230p1 of the modular addition result reset module 230 is connected to the data input terminal 232p1 of the second constant adder 232. The output terminal 232m of the second constant adder 232 is connected to the output terminal 230m of the modular addition result reset module 230. The output terminal 230m of the modular addition result reset module 230 is used to output the output of the previous controlled constant modular adder and the... And the result of the modulo addition operation of N.

[0067] Taking the 0th constant modular adder as an example, the specific principle of its modular adder result reset module 230 is as follows: like a+b≥N, the input at input terminal 231p is After passing through the second NOT gate 231, the output of the output terminal 231m is... Therefore, the input at input terminal 232p1 is... The input at input terminal 232p2 is The input at input terminal 232p is After passing through the second constant adder 232, the output of the output terminal 232m is... This enables the reset of the result of the modular addition operation.

[0068] like a+b<N, the input at input terminal 231p is After passing through the second NOT gate 231, the output of the output terminal 231m is... Therefore, the input at input terminal 232p1 is... The input at input terminal 232p2 is The input at input terminal 232p is After passing through the second constant adder 232, the output of the output terminal 232m is... This achieves the reset of the result of the modular addition operation.

[0069] See Figure 8 , Figure 8This is a schematic diagram of a constant adder 300 based on quantum Fourier transform, provided in an embodiment of the present invention. The constant adder 300 includes a quantum Fourier transform module 310, a phase transform module 320, and an inverse quantum Fourier transform module 330 cascaded together. The phase transform parameters in the phase transform module 320 are based on... Confirmed; the constant adder 300 is used to calculate the... The sum of the output of the previous controlled constant modulo arithmetic unit.

[0070] The quantum Fourier transform module 310 is used to evolve the quantum state of the output of the previous controlled constant modular arithmetic unit into a first Fourier state, and the phase transform module 320 is used to evolve the first Fourier state into the... The inverse quantum Fourier transform module 330 is used to evolve the second Fourier state, which is the sum of the outputs of the previously controlled constant modular adder, into the second Fourier state. The quantum state is summed with the output of the previous controlled constant modulo arithmetic unit and output.

[0071] The constant adder 300 includes n data input terminals 301, which are used to input the quantum state of the output of the previous controlled constant modular adder. The quantum state of the output of the previous controlled constant modular adder is obtained by encoding the binary data to be added into the ground state of n qubits.

[0072] The constant adder 300 further includes n data output terminals 302, which are used to output the... The quantum state of the sum of the output of the previous controlled constant modulo arithmetic unit.

[0073] Taking the first constant adder 211 included in the 0th modular addition module as an example, the binary representation of b is: This can be encoded into the ground state of n qubits to obtain the quantum state of b:

[0074] After being transformed by the quantum Fourier transform module 310, the quantum state evolves into the first Fourier state:

[0075] make Therefore, the above formula can be expressed as

[0076] After the phase transformation module 320 is applied, the first Fourier state evolves into The second Fourier state of the sum of a and b:

[0077] After the inverse quantum Fourier transform module 330, the second Fourier state evolves into... The quantum state of the sum of a and b:

[0078] By observing quantum states Decode to obtain a+b.

[0079] The phase transformation module 320 includes n RZ gates, and the rotation angle of each RZ gate is based on the... The binary representation of 'a' is determined.

[0080] The matrix expression for the RZ gate is:

[0081] in, The angle is the rotation angle.

[0082] Among them, the The binary representation of 'a' is The rotation angle of the RZ gate is determined based on the following formula:

[0083] in, Let j be the rotation angle of the RZ gate. The value can be 0 or 1.

[0084] The phase transformation module 320 further includes n input terminals 321 and output terminals 322 that correspond one-to-one with the RZ gates.

[0085] It should be noted that, for the sake of simplicity, the above examples... Both a and b are encoded using n qubits, which in practice can be determined according to... The values ​​of a and b are used to set the encoding of qubits, and therefore are used for encoding. The number of qubits in a and the number of qubits used to encode b can also be different.

[0086] The above Figures 2-7 The first constant adder 211, the second constant adder 232, and the controlled constant adder 214 described herein can be based on Figure 8 The constant adder 300 shown is directly obtained, except that the input data to be added and the constant are different. The first constant subtractor 212 and the second constant subtractor 221 can be based on... Figure 8The constant adder 300 shown is obtained indirectly, for example, by negating the sign bit of the qubit to obtain the negative number of the data to be added, or for example, by... Figure 8 The constant adder 300 shown is transposed and conjugated to obtain the constant subtractor. Examples will not be given here.

[0087] Compared with existing technologies, this invention provides a constant modular adder based on quantum Fourier transform, wherein the constant modular adder includes a modular adder module; the modular adder module includes a first constant adder, a first constant subtractor, a first CNOT gate, and a controlled constant adder cascaded in sequence, wherein the constant of the first constant adder is... a. The constants of the first constant subtractor and the controlled constant adder are both modulo numbers. The first constant adder and the first constant subtractor are used to calculate the input data to be added and the... The difference between the sum of 'a' and the modulus is then used to determine the result through the first CNOT gate. If the result is greater than 0, it is directly used as the data to be added together with the modulus. a and the result of the modulus addition operation; if it is less than 0, then the result is added to the modulus by a controlled constant adder. Add a to obtain the data to be added and the stated data. a and the result of the modulus addition operation.

[0088] This invention provides a constant modular multiplication operator, the constant modular multiplication operator including... Figures 2-8 In any one of the constant modular addition and modular multiplication operators, the data to be added b is 0, and the constant modular multiplication operator is used to calculate the modular multiplication result ax mod N.

[0089] See Figure 9 , Figure 9 This is a schematic diagram of another constant modular multiplication operator 400 provided in an embodiment of the present invention. The constant modular multiplication operator 400 includes a constant modular addition and modular multiplication operator 410, a SWAP gate 420, and an inverse constant modular addition and modular multiplication operator 430. The quantum logic gates included in the inverse constant modular addition and modular multiplication operator 430 are transposed and conjugate with the quantum logic gates included in the constant modular addition and modular multiplication operator 410.

[0090] The two input terminals 400p and 400q of the constant modular multiplication operator 400 are connected to the two input terminals 410p and 410q of the constant modular addition and modular multiplication operator 410, and the two output terminals 400m and 400n of the constant modular multiplication operator 400 are connected to the two output terminals 430m and 430n of the inverse constant modular addition and modular multiplication operator 430.

[0091] The two input terminals 400p and 400q of the constant modular multiplication operator 400 are used to input the quantum state corresponding to the data x to be multiplied. and quantum state The two outputs 400m and 400n of the constant modular multiplication unit 400 are used to output the quantum state corresponding to the modular multiplication result ax mod N. The quantum state corresponding to the data x to be multiplied .

[0092] for and After being processed by the constant modular addition and modular multiplication operator 410, it evolves into and After passing through a SWAP gate, the two quantum states exchange and evolve into... and After passing through the inverse constant modular addition and modular multiplication operator 430, it evolves into... ,Right now: .

[0093] It should be noted that, according to Figures 2-8 The constructed constant modular multiplication operator is non-reversible. Figure 9 The constant modular multiplication operator shown is reversible.

[0094] Compared with the prior art, the present invention provides a constant modular addition and modular multiplication operator, wherein the constant modular addition and modular multiplication operator comprises n cascaded controlled constant modular addition operators, and the constant of the i-th controlled constant modular addition operator is . The modulus is N. The input of the constant modulo addition and modulo multiplication operator is the data to be added b and the data to be multiplied x. The constant modulo addition and modulo multiplication operator is used to calculate the result of the modulo addition and modulo multiplication operation b+ax mod N. By converting the modulo addition and modulo multiplication operation into n controlled constant modulo addition operations, the result of the modulo addition and modulo multiplication operation b+ax mod N can be calculated.

[0095] See Figure 10 , Figure 10 This is a flowchart illustrating a method for modulo addition and modulo multiplication of constants provided in an embodiment of the present invention. The method includes: Step 1001: Obtain the constant modular addition and modular multiplication operator described in the above embodiment, the data to be added b, and the data to be multiplied x; Step 1002: Input the quantum states of b and x into the constant modular addition and modular multiplication operator to obtain the quantum state corresponding to the modular addition and modular multiplication result b + ax mod N; Step 1003: Determine the b+ax mod N based on the quantum state corresponding to the b+ax mod N.

[0096] See Figure 11 , Figure 11 This is a schematic diagram of a constant modular addition and modular multiplication operation device provided in an embodiment of the present invention. The device includes: The data acquisition unit 1101 is used to acquire the constant modular addition and modular multiplication operator, the data to be added b, and the data to be multiplied x described in the above embodiments. Modular multiplication and modular addition operation unit 1102 is used to input the quantum states of b and x to the constant modular addition and modular multiplication operator to obtain the quantum state corresponding to the modular addition and modular multiplication operation result b+ax mod N; The result determination unit 1103 is used to determine the b+ax mod N based on the quantum state corresponding to the b+ax mod N.

[0097] See Figure 12 , Figure 12 This is a flowchart illustrating a constant modular multiplication method provided in an embodiment of the present invention. The method includes: Step 1201: Obtain the constant modular multiplication operator described in the above embodiment and the data to be multiplied x; Step 1202: Input the quantum state of x into the constant modular multiplication operator to obtain the quantum state corresponding to the modular multiplication result axmod N; Step 1203: Determine the ax mod N based on the quantum state corresponding to the ax mod N.

[0098] See Figure 13 , Figure 13 This is a schematic diagram of a constant modular multiplication operation device provided in an embodiment of the present invention. The device includes: The data acquisition unit 1301 is used to acquire the constant modular multiplication operator described in the above embodiment and the data to be multiplied x; The modular multiplication unit 1302 is used to input the quantum state of x into the constant modular multiplication unit to obtain the quantum state corresponding to the modular multiplication result ax mod N; Result determination unit 1303 is used to determine the ax mod N based on the quantum state corresponding to the ax mod N.

[0099] Another embodiment of the present invention provides a constant modular division operator, wherein the quantum circuit corresponding to the constant modular division operator is transposed and conjugate with the quantum circuit corresponding to the constant modular multiplication operator.

[0100] Another embodiment of the present invention provides a storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the method embodiments above when running.

[0101] Specifically, in this embodiment, the storage medium can be configured to store a computer program for performing the following steps: Obtain the constant modular addition and modular multiplication operator described in the above embodiments, the data to be added b, and the data to be multiplied x; The quantum states of b and x are input into the constant modular addition and modular multiplication operator to obtain the quantum state corresponding to the modular addition and modular multiplication result b+ax mod N; The b+ax mod N is determined based on the quantum state corresponding to the b+ax mod N.

[0102] Specifically, in this embodiment, the storage medium may also be configured to store a computer program for performing the following steps: Obtain the constant modular multiplication operator and the data x to be multiplied as described in the above embodiments; The quantum state of x is input into the constant modular multiplication unit to obtain the quantum state corresponding to the modular multiplication result ax mod N; The ax mod N is determined based on the quantum state corresponding to the ax mod N.

[0103] Specifically, in this embodiment, the storage medium may include, but is not limited to, various media capable of storing computer programs, such as USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks.

[0104] Another embodiment of the present invention provides an electronic device including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the steps in any of the method embodiments described above.

[0105] Specifically, the aforementioned electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the aforementioned processor, and the input / output device is connected to the aforementioned processor.

[0106] Specifically, in this embodiment, the processor can be configured to perform the following steps via a computer program: Obtain the constant modular addition and modular multiplication operator described in the above embodiments, the data to be added b, and the data to be multiplied x; The quantum states of b and x are input into the constant modular addition and modular multiplication operator to obtain the quantum state corresponding to the modular addition and modular multiplication result b+ax mod N; The b+ax mod N is determined based on the quantum state corresponding to the b+ax mod N.

[0107] Specifically, in this embodiment, the processor can also be configured to perform the following steps via a computer program: Specifically, in this embodiment, the storage medium may also be configured to store a computer program for performing the following steps: Obtain the constant modular multiplication operator and the data x to be multiplied as described in the above embodiments; The quantum state of x is input into the constant modular multiplication unit to obtain the quantum state corresponding to the modular multiplication result ax mod N; The ax mod N is determined based on the quantum state corresponding to the ax mod N.

[0108] The above description, based on the embodiments shown in the figures, details the structure, features, and effects of the present invention. The above description is only a preferred embodiment of the present invention, but the present invention is not limited to the scope of implementation shown in the figures. Any changes made in accordance with the concept of the present invention, or equivalent embodiments modified to have equivalent changes, that do not exceed the spirit covered by the specification and figures, should be within the protection scope of the present invention.

Claims

1. A constant modular addition and modular multiplication arithmetic unit, characterized in that, The constant modular addition and modular multiplication arithmetic unit comprises n cascaded controlled constant modular addition arithmetic units, wherein the constant of the i-th controlled constant modular addition arithmetic unit is . The modulus is N, and the input of the constant modulus addition and multiplication operator is the quantum state corresponding to the data b to be added. The quantum state corresponding to the data x to be multiplied The constant modular addition and modular multiplication unit is used to calculate the modular addition and modular multiplication result b + ax mod N, where 0 ≤ i ≤ n-1; the i-th controlled constant modular addition unit includes a modular addition module; the modular addition module includes a first constant adder, a first constant subtractor, a first CNOT gate, and a controlled constant adder cascaded in sequence, wherein the constant of the first constant adder is the... The constants of the first constant subtractor and the controlled constant adder are both N. The modular addition module is used to calculate the output of the previous controlled constant modular adder and the... and the result of the modular addition operation of N; the i-th controlled constant modular addition unit further includes an auxiliary bit reset module, which is used to reset the target auxiliary data to the initial auxiliary data; the auxiliary bit reset module includes a second constant subtractor, a first NOT gate and a second CNOT gate cascaded in sequence; the constant of the second constant subtractor is the... The i-th controlled constant modular adder further includes a modular adder result reset module, which is used to reset the intermediate data to the output of the previous controlled constant modular adder and the... and the modular addition result of N; the modular addition result reset module includes a second NOT gate and a second constant adder cascaded in sequence, the constant of the second constant adder being the... .

2. The constant modular addition and modular multiplication arithmetic unit according to claim 1, characterized in that, One input terminal of the modular addition module is connected to the input terminal of the first constant adder, and the other input terminal of the modular addition module is connected to one input terminal of the first CNOT gate. The two output terminals of the controlled constant adder are connected one-to-one with the two output terminals of the modular addition module. One input terminal of the modular addition module is used to input the output of the previous controlled constant modular adder, and the other input terminal is used to input initial auxiliary data. One output terminal of the modular addition module is used to output the output of the previous controlled constant modular adder and the... The result of the modular addition operation of N, and the other output of the modular addition operation module is used to output target auxiliary data.

3. The constant modular addition and modular multiplication arithmetic unit according to claim 2, characterized in that, The output of the first constant adder is connected to the input of the first constant subtractor, the output of the first constant subtractor is connected to the other input of the first CNOT gate, and the two outputs of the first CNOT gate are connected one-to-one with the two inputs of the controlled constant adder.

4. The constant modular addition and modular multiplication arithmetic unit according to claim 3, characterized in that, The output of the first constant subtractor includes a data output and a sign output. One of the inputs of the controlled constant adder includes a data input and a sign input. The data output of the first constant subtractor is connected to the data input of the controlled constant adder. The sign output of the first constant subtractor is connected to the other input of the first CNOT gate. One of the outputs of the first CNOT gate is connected to the sign input of the controlled constant adder.

5. The constant modular addition and modular multiplication arithmetic unit according to claim 2, characterized in that, One input terminal of the auxiliary bit reset module is connected to the input terminal of the second constant subtractor, and the other input terminal of the auxiliary bit reset module is connected to one input terminal of the second CNOT gate. The output terminal of the second constant subtractor is connected to the input terminal of the first NOT gate, and the output terminal of the first NOT gate is connected to one input terminal of the second CNOT gate. The two output terminals of the second CNOT gate are connected one-to-one with the two output terminals of the auxiliary bit reset module. One output terminal of the auxiliary bit reset module is used to output intermediate data, and the other output terminal of the auxiliary bit reset module is used to output the initial auxiliary data.

6. The constant modular addition and modular multiplication arithmetic unit according to claim 5, characterized in that, The output of the second constant subtractor includes a data output and a sign output. One of the outputs of the auxiliary bit reset module includes a data output and a sign output. The data output of the second constant subtractor is connected to the data output of the auxiliary bit reset module. The sign output of the second constant subtractor is connected to the input of the first NOT gate. One of the outputs of the second CNOT gate is connected to the sign output of the auxiliary bit reset module. The other output of the second CNOT gate is connected to the other output of the auxiliary bit reset module.

7. The constant modular addition and modular multiplication arithmetic unit according to claim 6, characterized in that, The input terminals of the modular addition result reset module include a sign input terminal and a data input terminal, and the input terminals of the second constant adder also include a sign input terminal and a data input terminal. The sign input terminal of the modular addition result reset module is connected to the input terminal of the second NOT gate, the output terminal of the second NOT gate is connected to the sign input terminal of the second constant adder, the data input terminal of the modular addition result reset module is connected to the data input terminal of the second constant adder, and the output terminal of the second constant adder is connected to the output terminal of the modular addition result reset module. The output terminal of the modular addition result reset module is used to output the output of the previously controlled constant modular adder and the... And the result of the modulo addition operation of N.

8. The constant modular addition and modular multiplication arithmetic unit according to claim 7, characterized in that, The two input terminals of the constant modular adder are connected one-to-one with the two input terminals of the modular adder module. The two output terminals of the modular adder module are connected one-to-one with the two input terminals of the auxiliary bit reset module. One output terminal of the auxiliary bit reset module is connected to the input terminal of the modular adder result reset module. One output terminal of the auxiliary bit reset module is connected to one output terminal of the constant modular adder. The output terminal of the modular adder result reset module is connected to the other output terminal of the constant modular adder.

9. A constant modular multiplication arithmetic unit, characterized in that, The constant modular multiplication operator includes the constant modular addition and modular multiplication operator as described in any one of claims 1-8, wherein the data to be added b is 0, and the constant modular multiplication operator is used to calculate the modular multiplication result ax mod N; the modular multiplication operator further includes a SWAP gate and an inverse constant modular addition and modular multiplication operator, wherein the SWAP gate is connected to the constant modular addition and modular multiplication operator and the inverse constant modular addition and modular multiplication operator, respectively.

10. A method for modulo addition and modulo multiplication of constants, characterized in that, The method includes: Obtain the constant modular addition and modular multiplication operator as described in any one of claims 1-8, the data to be added b, and the data to be multiplied x; The quantum states of b and x are input into the constant modular addition and modular multiplication operator to obtain the quantum state corresponding to the modular addition and modular multiplication result b + ax mod N; The b+ax mod N is determined based on the quantum state corresponding to the b+ax mod N.

11. A constant modular addition and modular multiplication arithmetic device, characterized in that, The device includes: The data acquisition unit is used to acquire the constant modular addition and modular multiplication operator as described in any one of claims 1-8, the data to be added b, and the data to be multiplied x; The modular multiplication and modular addition operation unit is used to input the quantum states of b and x into the constant modular addition and modular multiplication operator to obtain the quantum state corresponding to the modular addition and modular multiplication operation result b+ax mod N; The result determination unit is used to determine the b+ax mod N based on the quantum state corresponding to the b+ax mod N.

12. A method for modular multiplication of constants, characterized in that, The method includes: Obtain the constant modular multiplication operator as described in claim 9 or 10 and the data x to be multiplied; The quantum state of x is input into the constant modular multiplication unit to obtain the quantum state corresponding to the modular multiplication result ax mod N; The ax mod N is determined based on the quantum state corresponding to the ax mod N.

13. A constant modular multiplication arithmetic device, characterized in that, The device includes: The data acquisition unit is used to acquire the constant modular multiplication operator as described in claim 9 or 10 and the data to be multiplied x; The modular multiplication unit is used to input the quantum state of x into the constant modular multiplication unit to obtain the quantum state corresponding to the modular multiplication result ax mod N; The result determination unit is used to determine the ax mod N based on the quantum state corresponding to the ax mod N.

14. A storage medium, characterized in that, The storage medium stores a computer program, wherein the computer program is configured to execute the method described in claim 9 or 10 when it is run.

15. An electronic device comprising a memory and a processor, characterized in that, The memory stores a computer program, and the processor is configured to run the computer program to perform the method described in claim 9 or 10.

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