Tuning control right switching circuit and chip, tuning circuit and electronic device

Abstract

The application relates to a tuning control right switching circuit, a chip, a tuning circuit and an electronic device. In the tuning control right switching circuit, the input end of at least one unidirectional conduction circuit is used for connecting a satellite processing circuit, and the input end of the rest unidirectional conduction circuits is used for connecting a cellular processing circuit; the controlled end of a tuning drive circuit is correspondingly connected with the output end of the multiple unidirectional conduction circuits, the output end of the tuning drive circuit is correspondingly connected with the controlled end of a tuning switch circuit, and the output end of the tuning switch circuit is connected with a tuning access point on a common communication link of the satellite processing circuit and the cellular processing circuit; the tuning drive circuit is controlled by a first tuning control signal of the satellite processing circuit when the satellite processing circuit is in a working state and is controlled by a second tuning control signal of the cellular processing circuit when the cellular processing circuit is in a working state, so that the antenna can keep optimal performance in the case of supporting satellite communication and cellular communication.

Description

Technical Field

[0001] This application relates to the field of communication technology, and in particular to a tuning control switching circuit and chip, a tuning circuit, and an electronic device. Background Technology

[0002] Satellite communication, due to its advantages, is increasingly used in electronic devices such as mobile phones. With the trend towards miniaturization in electronic devices, satellite and cellular communication systems share antennas, relying on tuning to support the transmission of both satellite and cellular signals. However, the applicant has found that current dual-communication system electronic devices struggle to achieve optimal communication performance for both systems during operation. Summary of the Invention

[0003] Therefore, it is necessary to provide a tuning control switching circuit and chip, a tuning circuit, and an electronic device.

[0004] Firstly, a tuning control switching circuit is provided for use in electronic devices. The circuit includes:

[0005] Multiple unidirectional conduction circuits, at least one of which has its input terminal connected to the satellite processing circuit, and the input terminals of the remaining unidirectional conduction circuits are used to connect to the cellular processing circuit.

[0006] A tuning drive circuit, at least one controlled terminal of the tuning drive circuit is connected to the output terminals of multiple unidirectional conduction circuits, at least one output terminal of the tuning drive circuit is connected to the controlled terminal of the tuning switch circuit, and the output terminal of the tuning switch circuit is connected to the tuning access point on the common communication link of the satellite processing circuit and the cellular processing circuit.

[0007] The tuning drive circuit is used to receive a first tuning control signal from the satellite processing circuit when the satellite processing circuit is in operation, and to receive a second tuning control signal from the cellular processing circuit when the cellular processing circuit is in operation, so as to adjust the switching state in the tuning switch circuit and support the transmission of satellite signals and cellular signals.

[0008] Secondly, a tuning circuit is provided for use in an electronic device, the circuit comprising:

[0009] The output of the tuning switch circuit is connected to the tuning access point on the common communication link of the satellite processing circuit and the cellular processing circuit.

[0010] The above-mentioned tuning control switching circuit.

[0011] Thirdly, an electronic device is provided, comprising:

[0012] Satellite processing circuitry is used to provide the first tuning control signal and support satellite signals;

[0013] Cellular processing circuitry is used to provide a second tuning control signal and support cellular signals. The satellite processing circuitry and the cellular processing circuitry have a tuning access point on their common communication link.

[0014] The above-mentioned tuning circuit.

[0015] Fourthly, a tuning control switching chip is provided, including at least one first connection pin and multiple second connection pins. The first connection pin is used to connect to a tuning access point on a common communication link between a satellite processing circuit and a cellular processing circuit, and each second connection pin is used to connect to either the satellite processing circuit or the cellular processing circuit. The tuning control switching chip includes:

[0016] Multiple unidirectional conduction circuits, at least one of which has its input terminal connected to the satellite processing circuit, and the input terminals of the remaining unidirectional conduction circuits are used to connect to the cellular processing circuit.

[0017] A tuning drive circuit, at least one controlled terminal of the tuning drive circuit is connected to the output terminals of multiple unidirectional conduction circuits, at least one output terminal of the tuning drive circuit is connected to the controlled terminal of the tuning switch circuit, and the output terminal of the tuning switch circuit is connected to the tuning access point on the common communication link of the satellite processing circuit and the cellular processing circuit.

[0018] The tuning drive circuit is used to receive a first tuning control signal from the satellite processing circuit when the satellite processing circuit is in operation, and to receive a second tuning control signal from the cellular processing circuit when the cellular processing circuit is in operation, so as to adjust the switching state in the tuning switch circuit and support the transmission of satellite signals and cellular signals.

[0019] The aforementioned tuning control switching circuit and chip, tuning circuit, and electronic device have at least one unidirectional conduction circuit input terminal connected to the satellite processing circuit, and the input terminals of the remaining unidirectional conduction circuits connected to the cellular processing circuit. The controlled terminal of the tuning drive circuit is connected to the output terminals of multiple unidirectional conduction circuits, and the output terminal of the tuning drive circuit is connected to the controlled terminal of the tuning switch circuit. The output terminal of the tuning switch circuit is connected to the tuning access point on the common communication link of the satellite processing circuit and the cellular processing circuit. The tuning drive circuit is controlled by the first tuning control signal of the satellite processing circuit when the satellite processing circuit is in operation, and by the second tuning control signal of the cellular processing circuit when the cellular processing circuit is in operation, so that the antenna maintains optimal performance when supporting both satellite communication and cellular communication. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the embodiments of this application or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is one of the schematic diagrams of a tuning control switching circuit according to an embodiment;

[0022] Figure 2 This is a second schematic diagram of the structure of a tuning control switching circuit according to an embodiment;

[0023] Figure 3 This is the third schematic diagram of the structure of a tuning control switching circuit according to an embodiment;

[0024] Figure 4 Fourth schematic diagram of a tuning control switching circuit according to an embodiment;

[0025] Figure 5 This is a schematic diagram of a tuning circuit and an electronic device according to one embodiment. Detailed Implementation

[0026] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0027] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0028] It is understood that the terms "first," "second," etc., used herein may be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of this application, a first resistor may be referred to as a second resistor, and similarly, a second resistor may be referred to as a first resistor. Both the first resistor and the second resistor are resistors, but they are not the same resistor.

[0029] It is understood that the term "connection" in the following embodiments should be understood as "electrical connection," "communication connection," etc., if the connected circuits, modules, units, etc., have electrical signal or data transmission with each other.

[0030] It is understandable that "at least one" refers to one or more, and "multiple" refers to two or more. "At least a part of an element" refers to part or all of an element.

[0031] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising,” “including,” or “having,” etc., specify the presence of the stated feature, whole, step, operation, component, part, or combination thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof.

[0032] Satellite communication, as a globally covered and consistently reliable communication method, has significant application value in many scenarios and fields. These include: broadcast television services, broadband internet access, mobile communication services, Internet of Things (IoT) services, military and government applications, emergency rescue and disaster response, aerospace, offshore oil and gas industry, distance education, and medical services. Therefore, supporting satellite and cellular communication systems with electronic devices is becoming a development trend.

[0033] Current satellite and cellular communication systems, based on at least partial overlap in frequency bands, can share antennas. To ensure communication quality, satellite and cellular communication systems are designed as mutually exclusive systems, meaning that when one is active, the other is powered off. Antenna tuners are configured to further improve communication performance. These tuners have only one control pin, which is connected to either the satellite or cellular communication system, allowing the tuner to be controlled by either system. However, the applicant has found that regardless of which system controls the tuner, the performance of the other system is always sacrificed to achieve the communication goal. This makes it impossible to achieve optimal communication performance when the shared antenna is used as both a cellular and satellite antenna.

[0034] The tuning control switching circuit and tuning circuit provided in this application embodiment can both be used in electronic devices with wireless communication functions. These electronic devices can be handheld devices, in-vehicle devices, wearable devices, computing devices, or other processing devices connected to a wireless modem, as well as various forms of user equipment (UE) (e.g., mobile phones), mobile stations (MS), etc. For ease of description, the devices mentioned above are collectively referred to as electronic devices.

[0035] This application provides a tuning control switching circuit, applied to electronic devices, such as... Figures 1-2 As shown, the circuit includes: multiple unidirectional conduction circuits 10, and a tuning drive circuit 20.

[0036] Among them, there are multiple unidirectional conduction circuits 10, at least one of the input terminals of the unidirectional conduction circuit 10 is used to connect to the satellite processing circuit 200, and the input terminals of the remaining unidirectional conduction circuits 10 are used to connect to the cellular processing circuit 300.

[0037] Satellite processing circuit 200 refers to a circuit in an electronic device that provides tuning control signals for satellite communication. Satellite processing circuit 200 is also used to provide satellite signals to be transmitted. For example, satellite processing circuit 200 may include an oscillator and a modulator. The oscillator first generates an electrical signal of a certain frequency, and then the modulator modulates the electrical signal into the required radio frequency signal. Satellite processing circuit 200 is also used to receive satellite signals received via antenna ANT. For example, it can perform filtering, mixing, demodulation, decoding, and other processing on the received satellite signals. Satellite signals refer to signals transmitted and received during communication based on satellite systems. Satellite systems may include, but are not limited to, the Tiantong satellite system, the BeiDou system, the Global Positioning System (GPS), the Indian Regional Navigation Satellite System (IRNSS), and the Galileo system. Corresponding to different satellite systems, the type of satellite signal may be Tiantong satellite signal, BeiDou satellite signal, GPS satellite signal, IRNSS satellite signal, or Galileo satellite signal.

[0038] Cellular processing circuit 300 refers to a circuit in an electronic device that provides tuning control signals required for cellular mobile communication. Cellular processing circuit 300 generates cellular signals to be transmitted. Cellular processing circuit 300 supports the reception and processing of cellular signals, such as filtering, mixing and demodulating, and decoding. Cellular signals refer to the signals transmitted and received during communication using a cellular mobile communication system. A cellular mobile communication system can be a communication system based on any of the following technologies: Code Division Multiple Access (CDMA), Third Generation (3G), Fourth Generation (4G), Fifth Generation Mobile Communication Technology (5G), Frequency Division Multiple Access (FDMA), Time Division Multiple Access (TDMA), Total Access Communication System (TACS), etc.

[0039] The frequency ranges of cellular signals and satellite signals at least partially overlap, allowing for shared antennas (ANTs) and a common communication link. To ensure communication quality and avoid interference, the cellular processing circuit 300 is powered off when the satellite processing circuit 200 is active (in satellite communication mode), and the satellite processing circuit 200 is powered off when the cellular processing circuit 300 is active (in cellular mobile communication mode). The common communication link between the satellite processing circuit 200 and the cellular processing circuit 300 has a tuning access point. This tuning access point is used to connect to a tuning circuit to accept different impedance matching parameters, thus tuning the signals transmitted and received through this common communication link and improving communication quality.

[0040] The tuning drive circuit 20 refers to a circuit that has a mapping relationship between the output signal and the input signal. The output signal of the tuning drive circuit 20 can drive the switch in the tuning switch circuit 400 to be on or off, thereby adjusting the impedance matching parameters in the tuning switch circuit 400. For example, the tuning drive circuit 20 may include an inverter circuit. In this case, when the input signal of the tuning drive circuit 20 is high, the output signal of the tuning drive circuit 20 is low, and vice versa. The output signal of the tuning drive circuit 20 can meet the voltage requirements for the on / off state of the switch in the tuning switch circuit 400. For example, when the driving voltage required for the switch to be on in the tuning switch circuit 400 is 1.6V, the voltage value of the output signal of the tuning drive circuit 20 when it is high is greater than or equal to 1.6V. To meet the driving capability requirements, the tuning switch circuit 400 may be provided with a power supply terminal to connect to the system voltage VDD. For example, when the electronic device is a mobile phone, the system voltage VDD may be the 1.8V voltage provided by the mobile phone system. The unidirectional conduction circuit 10 can also prevent the system voltage connected to the tuning drive circuit 20 from flowing back, thereby improving communication reliability and communication quality.

[0041] At least one controlled terminal of the tuning drive circuit 20 is connected to the output terminal of the plurality of unidirectional conduction circuits 10. At least one output terminal of the tuning drive circuit 20 is connected to the controlled terminal of the tuning switch circuit 400. The output terminal of the tuning switch circuit 400 is connected to the tuning access point on the common communication link of the satellite processing circuit 200 and the cellular processing circuit 300. The tuning drive circuit 20 is used to receive a first tuning control signal from the satellite processing circuit 200 when the satellite processing circuit 200 is in the working state, and to receive a second tuning control signal from the cellular processing circuit 300 when the cellular processing circuit 300 is in the working state, so as to adjust the switching state in the tuning switch circuit 400 and support the transmission of satellite signals and cellular signals.

[0042] Based on the tuning drive circuit 20, a connection is established between multiple unidirectional conduction circuits 10 and the tuning switch circuit 400, so that one controlled terminal of the tuning switch circuit 400 can correspond to multiple unidirectional conduction circuits 10. Based on the characteristic that when the satellite processing is in the working state in the electronic device, the cellular processing circuit 300 is in the power-off state, and when the cellular processing circuit 300 is in the working state, the satellite processing circuit 200 is in the power-off state. When the electronic device supports satellite communication, the cellular processing circuit 300 is powered off and does not work, and will not output the second tuning control signal. At this time, only the first tuning control signal of the satellite processing circuit 200 is transmitted to the tuning drive circuit 20. In both cases where the satellite processing circuit 200 supports satellite signal transmission and satellite signal reception, the satellite processing circuit 200 can provide different first tuning control signals to the tuning drive circuit 20, so that the tuning drive circuit 20 outputs different output signals to the tuning switch circuit 400, making the switching state in the tuning switch circuit 400 different. This supports the tuning switch circuit 400 to operate with the first impedance matching parameter when transmitting satellite signals, so as to optimize the satellite signal transmission performance, and supports the tuning switch circuit 400 to operate with the second impedance matching parameter when receiving satellite signals, so as to optimize the satellite signal reception performance. The first impedance matching parameter and the second impedance matching parameter can be different.

[0043] When the electronic device supports cellular communication, the satellite processing circuit 200 is powered off and does not operate, and does not output the first tuning control signal. At this time, only the second tuning control signal of the cellular processing circuit 300 is transmitted to the tuning drive circuit 20. Since the cellular processing circuit 300 can support cellular signal transmission and reception in multiple frequency bands, it can provide different second tuning control signals to the tuning drive circuit 20, causing the tuning drive circuit 20 to output different output signals to the tuning switch circuit 400. Adjusting the switches in the tuning switch circuit 400 to different states allows the tuning switch circuit 400 to operate at the third impedance matching parameter when supporting cellular signal transmission and reception in the first frequency band, thus optimizing the cellular signal transmission and reception performance in the first frequency band. When supporting cellular signal transmission and reception in the second frequency band, the tuning switch circuit 400 operates at the fourth impedance matching parameter, thus optimizing the cellular signal transmission and reception performance in the second frequency band. The third and fourth impedance matching parameters can be different. Of course, the cellular processing circuit can also support cellular signal communication in multiple other frequency bands, which can be understood by referring to the tuning of cellular signals in the first and second frequency bands.

[0044] The tuning control switching circuit provided in this application embodiment does not require sacrificing the performance of the satellite system to preserve the performance of the cellular communication system, nor does it require sacrificing the performance of the cellular communication system to preserve the performance of the satellite system. Regardless of whether satellite communication or cellular communication is supported, the impedance matching parameters of the tuning switch circuit 400 can meet the optimal performance of the antenna ANT.

[0045] In one embodiment, such as Figure 3 As shown, the tuning drive circuit 20 includes at least one inverter circuit.

[0046] The input terminal of the inverter circuit is connected to the output terminals of the two unidirectional conduction circuits 10 (e.g., D1 and D2 in the figure). The power supply terminal of the inverter circuit is connected to the system voltage VDD. The output terminal of the inverter circuit is connected to the controlled terminal of the tuning switch circuit 400. Specifically, when the input terminal of the inverter circuit is connected to a high level, it outputs a low level to the controlled terminal of the tuning switch circuit 400; when the input terminal of the inverter circuit is connected to a low level, it outputs a high level to the controlled terminal of the tuning switch circuit 400. The impedance matching parameters of the tuning switch circuit 400 are different when the input terminal is connected to a high level and when the input terminal is connected to a low level.

[0047] When the satellite processing circuit 200 supports satellite signal transmission, the cellular processing circuit 300 is powered down. If the first tuning control signal provided by the satellite processing circuit 200 is high, it outputs a low level after passing through the tuning drive circuit 20 to the controlled terminal of the tuning switch circuit 400. If the switch in the tuning switch circuit 400 has a high-level conduction characteristic, then the switch is in the off state, and the tuning switch circuit 400 operates at the first impedance matching parameter, resulting in optimal satellite signal transmission performance. Conversely, when the satellite processing circuit 200 supports satellite signal reception, the cellular processing circuit 300 is powered down, and the first tuning control signal provided by the satellite processing circuit 200 is low. After passing through the tuning drive circuit 20, it outputs a high level to the controlled terminal of the tuning switch circuit 400, and the switch in the tuning switch circuit 400 is in the on state. The tuning switch circuit 400 operates at the second impedance matching parameter, resulting in optimal satellite signal reception performance.

[0048] Alternatively, when the satellite processing circuit 200 supports satellite signal transmission, the first tuning control signal provided by the satellite processing circuit 200 may be at a low level, and when the satellite processing circuit 200 supports satellite signal reception, the first tuning control signal provided by the satellite processing circuit may be at a high level.

[0049] Similarly, when the cellular processing circuit 300 supports cellular signal transmission and reception in the first frequency band, the satellite processing circuit 200 is in a power-down state. If the second tuning control signal provided by the cellular processing circuit 300 is high, it will output a low level to the controlled terminal of the tuning switch circuit 400 after passing through the tuning drive circuit 20. If the switch in the tuning switch circuit 400 has a high-level conduction characteristic, then the switch is in a closed state. The tuning switch circuit 400 operates at the third impedance matching parameter (which may be the same as or different from the first impedance matching parameter), so that the performance of the shared antenna ANT when supporting cellular signal transmission and reception in the first frequency band is optimal. Conversely, when the cellular processing circuit 300 supports cellular signal transmission and reception in the second frequency band, the satellite processing circuit 200 is powered down. The second tuning control signal provided by the cellular processing circuit 300 is at a low level, and after passing through the tuning drive circuit 20, it outputs a high level to the controlled terminal of the tuning switch circuit 400. The switch in the tuning switch circuit 400 is in the on state, and the tuning switch circuit 400 operates at the fourth impedance matching parameter (the fourth impedance matching parameter can be the same as or different from the second impedance matching parameter), so that the performance of the shared antenna ANT when supporting cellular signal transmission and reception in the second frequency band is optimal.

[0050] Of course, when the cellular processing circuit 300 supports the transmission and reception of cellular signals in the first frequency band, the second tuning control signal provided by the cellular processing circuit 300 is at a low level; when the cellular processing circuit 300 supports the transmission and reception of cellular signals in the second frequency band, the second tuning control signal provided by the cellular processing circuit is at a high level. Neither of these conditions affects the functional implementation of the tuning control switching circuit provided in the embodiments of this application.

[0051] In one embodiment, such as Figure 3 As shown, the inverter circuit includes a voltage divider module 21 and a switching transistor 22.

[0052] The input terminal of the voltage divider module 21 is used to connect to the system voltage VDD. The first terminal of the switch 22 is connected to the output terminals of the two unidirectional conduction circuits 10. The second terminal of the switch 22 is connected to the output terminal of the voltage divider module 21 and the controlled terminal of the tuning switch circuit 400, respectively. The third terminal of the switch 22 is grounded.

[0053] The voltage connected to the controlled terminal of the tuning switch circuit 400 is R. 等效 *VDD / (R1+R 等效 ), where R1 is the resistor of voltage divider module 21, R 等效 R is the equivalent resistance between the second and third terminals of switch 22, and VDD is the system voltage VDD. When switch 22 is in the off state, R 等效The resistance value approaches infinity, so the second terminal of switch 22 outputs a high level to the controlled terminal of tuning switch circuit 400. When switch 22 is in the on state, R... 等效 The resistance value is relatively small (much smaller than the resistance value of the voltage divider module 21), so the second terminal of the switching transistor 22 outputs a low level to the controlled terminal of the tuning switch circuit 400. The conduction state of the switching transistor 22 is controlled by the first tuning control signal or the second tuning control signal via the unidirectional conduction circuit 10. If the switching transistor 22 has a high-level high-pass characteristic, then when the first tuning control signal or the second tuning control signal connected to the unidirectional conduction circuit 10 is controlled to a high level, the switching transistor 22 is in the conducting state and provides a low-level signal to the controlled terminal of the tuning switch circuit 400; when the first tuning control signal or the second tuning control signal connected to the unidirectional conduction circuit 10 is controlled to a low level, the switching transistor 22 is in the off state and provides a high-level signal to the controlled terminal of the tuning switch circuit 400.

[0054] In one embodiment, such as Figure 3 -like Figure 4 As shown, the voltage divider module 21 includes a first resistor R1. The input terminal of the first resistor R1 is connected to the system voltage VDD, and the output terminal of the first resistor R1 is connected to the second terminal of the switching transistor 22. Optionally, when the system voltage VDD is 1.8V, the first resistor R1 can be a 10kΩ resistor. There can be multiple first resistors R1 in the voltage divider module 21. These multiple first resistors R1 can be connected in series or in parallel, or some of the resistors in the multiple first resistors R1 can be connected in parallel and then connected in series with other first resistors R1, or some of the resistors in the multiple first resistors R1 can be connected in parallel and then connected in series with other first resistors R1.

[0055] In one embodiment, such as Figure 3 and Figure 4 As shown, the switching transistor 22 is an NMOS transistor. It can be an enhancement-mode NMOS transistor. NMOS transistors have lower switching losses, allowing the driving voltage requirements of the tuning switch circuit 400 to be met even with a lower system voltage VDD, thus reducing the overall power consumption of the electronic device. Furthermore, using an NMOS transistor effectively improves the switching response speed, which in turn improves tuning response efficiency, thereby enhancing communication performance.

[0056] In one embodiment, the circuit further includes a second resistor R2, which is connected in series between the first terminal of the switching transistor 22 and ground. The second resistor R2 can be a 10KΩ resistor.

[0057] In one embodiment, such as Figures 3-4As shown, the unidirectional conduction circuit 10 includes a diode. The anode of the diode is connected to either the satellite processing circuit 200 or the cellular processing circuit 300, and the cathode of the diode is connected to the controlled terminal of the tuning drive circuit 20. The unidirectional conduction of the diode prevents interference from backend signals to the satellite processing circuit 200 and the cellular processing circuit 300, i.e., prevents reverse backflow of backend signals, thereby ensuring communication quality.

[0058] For example Figure 3 Taking the architecture shown as an example, if the second tuning control signal provided by the cellular processing circuit 300 is at a high level and the first tuning control signal provided by the satellite processing circuit 200 is at a low level, there will be a current backflow phenomenon to the satellite processing circuit 200, which will affect the reliability of the satellite processing circuit 200.

[0059] In one embodiment, such as Figure 2 As shown, the plurality of unidirectional conduction circuits 10 and the tuning drive circuit 20 are integrated in a single package. The plurality of unidirectional conduction circuits 10 are connected to the satellite processing circuit 200 or the cellular processing circuit 300 via multiple first pins of the package. The tuning drive circuit 20 is connected to the controlled terminal of the tuning switch circuit 400 via a second pin of the package. This integrated packaging reduces circuit area, lowers cost, and further reduces port loss, thereby improving communication performance.

[0060] To better illustrate the working process of the tuning control switching circuit provided in the embodiments of this application, the following is used as an example. Figure 3 The circuit shown below will be used as an example for explanation.

[0061] The corresponding logic control table is shown in the table below:

[0062]

[0063] From the table above, we can see that:

[0064] When the cellular processing circuit 300 supports the B3 band, the satellite processing circuit 200 is powered down (L), and the GPIO 1.8V port of the satellite processing circuit 200 is at a low level (L). At this time, the GPIO 1.8V port of the cellular processing circuit 300 is at a high level (H), the diode is turned on, and the drain and source of the switching transistor 22 are connected. The controlled terminal of the tuning switch circuit 400 obtains a voltage of Rds*1.8V / (10k+Rds). However, the resistance of Rds is relatively small, so the voltage applied to the controlled terminal CTL of the SPST (Single Pole Single Throw) is at a low level (L), which meets the performance requirements of the shared antenna ANT when it is used as the B3 band antenna ANT.

[0065] When the cellular processing circuit 300 supports the B1 band, the satellite processing circuit 200 is powered down (L), and the GPIO 1.8V port of the satellite processing circuit 200 is at a high level (H). At this time, the GPIO 1.8V port of the cellular processing circuit 300 is at a low level (L), the diode is turned off, and there is no conduction between the drain and source of the switching transistor 22. The controlled terminal of the tuning switch circuit 400 obtains a voltage of Rds*1.8V / (10k+Rds), but the resistance of Rds tends to infinity, so the voltage applied to the controlled terminal is at a high level (H), which meets the performance requirements of the shared antenna ANT as the B1 band antenna ANT.

[0066] When the satellite processing circuit 200 supports satellite signal transmission, the cellular processing circuit 300 is powered down, and the GPIO 1.8V port of the cellular processing circuit 300 is at a low level (L). At this time, the GPIO 1.8V port of the satellite processing circuit 200 is at a low level (L), the diode is not conducting, the drain and source of the switching transistor 22 are not conducting, and the controlled terminal of the tuning switch circuit 400 obtains a voltage of Rds*1.8V / (10k+Rds). However, the resistance of Rds tends to infinity, so the voltage applied to the controlled terminal is at a high level (H), which meets the performance requirements when the shared antenna ANT is used as the satellite signal transmission antenna ANT.

[0067] When the satellite processing circuit 200 supports satellite signal reception, the cellular processing circuit 300 is powered down (L), and the GPIO 1.8V port of the cellular processing circuit 300 is at a low level (L). At this time, the GPIO 1.8V port of the satellite processing circuit 200 is at a high level, and the corresponding diode is turned on. The drain and source of the NMOS transistor are connected, and the controlled terminal of the tuning switch circuit 400 obtains a voltage of Rds*1.8V / (10k+Rds). However, the resistance of Rds is relatively small, so the voltage applied to the controlled terminal of SPST is at a low level (L), which meets the performance requirements when the shared antenna ANT is used as the satellite signal receiving antenna ANT.

[0068] When the GPIO 1.8V port outputs a high-level signal, the voltage is reduced to 1.5V after passing through a diode, which is insufficient to meet the driving voltage requirements of SPST in the tuning switch circuit 400. The tuning control switching circuit provided in this application can meet the driving voltage requirements of SPST by connecting the drain of the NMOS transistor to the 1.8V system voltage VDD.

[0069] In one embodiment, such as Figure 5 As shown, a tuning circuit is provided for use in an electronic device. The circuit includes a tuning switch circuit 400 and the tuning control switching circuit 100 described above.

[0070] The output of the tuning switch circuit 400 is connected to the tuning access point on the common communication link of the satellite processing circuit 200 and the cellular processing circuit 300. For an explanation of the tuning switch circuit 400, please refer to the description in the above embodiments. The tuning circuit equipped with the tuning control switching circuit 100 can support dual access of the satellite processing circuit 200 and the cellular processing circuit 300. Based on their mutual exclusion relationship, at any given time, tuning matching is performed under the corresponding network standard only under the tuning control signal provided by one processing circuit. That is, when supporting cellular communication, the cellular processing circuit 300 controls the tuning of the tuning switch circuit 400; when supporting satellite communication, the satellite processing circuit 200 controls the tuning of the tuning switch circuit 400. This ensures that the antenna ANT shared by the satellite processing circuit 200 and the cellular processing circuit 300 maintains optimal performance when used as both a satellite antenna ANT and a cellular antenna ANT.

[0071] In one embodiment, the tuning switch circuit 400 includes: at least one tuning unit and at least one single-pole single-throw switch.

[0072] The number of single-pole single-throw switches is related to the frequency bands of the supported cellular signals. If only two frequency bands of cellular signals are supported, then only one single-pole single-throw switch can be used. For example... Figure 4 As shown, the tuning unit and single-pole single-throw (SPS) switches can be connected one-to-one. When more than two frequency bands of cellular signals are supported, multiple SPS switches are used. The number of SPS switches is determined by the principle that every two unidirectional conduction circuits 10 share a single switching transistor 22, and each single switching transistor 22 is connected to a single-pole single-throw switch. For example, when it is necessary to support the reception and transmission of satellite signals and support cellular signals of 5 frequency bands, there are 4 unidirectional conduction circuits 10. One unidirectional conduction circuit 10 is connected to the satellite processing circuit 200, and the other 3 unidirectional conduction circuits 10 are respectively connected to the 3 tuning control signal output terminals of the cellular processing circuit 300.

[0073] The output terminal of the tuning unit is used to connect to the tuning access point. The single-pole single-throw switch is connected in parallel or in series with at least a portion of the tuning unit, and the controlled terminal of the single-pole single-throw switch is correspondingly connected to the output terminal of the tuning drive circuit 20.

[0074] The tuning unit may include a combination of one or more of resistors, inductors, and capacitors, and the components in the tuning unit may be connected in parallel and / or in series. The single-pole single-throw switch may be connected in parallel across some of the components or in series with at least some of the components. In this connection method, when the single-pole double-throw switch switches between the on and off states, the impedance matching parameters of the components between the tuning access point and ground change. Based on this feature, tuning can be achieved by controlling the on and off states of the single-pole single-throw switch.

[0075] In one embodiment, such as Figure 5 As shown, an electronic device is provided, including: a satellite processing circuit 200, a cellular processing circuit 300, and the aforementioned tuning circuit.

[0076] The satellite processing circuit 200 is used to provide the first tuning control signal and support satellite signals, as described in the above embodiments.

[0077] The cellular processing circuit 300 provides a second tuning control signal and supports cellular signals, as described in the above embodiments. A tuning access point is present on the common communication link between the satellite processing circuit 200 and the cellular processing circuit 300.

[0078] When the electronic device equipped with the above-mentioned tuning circuit is operating in satellite communication mode, the satellite processing circuit 200 is responsible for controlling the on / off state of the switch in the tuning switch circuit 400 to achieve tuning control under satellite communication. When the electronic device is operating in cellular communication mode, the cellular processing circuit 300 is responsible for controlling the on / off state of the switch in the tuning switch circuit 400 to achieve tuning control under cellular communication, ensuring that the performance of the shared antenna ANT is optimal when supporting both cellular and satellite communication, and improving the communication performance of the electronic device.

[0079] In one embodiment, the satellite processing circuit 200 can provide a first tuning control signal through a GPIO (General-purpose input / output) port, and the cellular processing circuit 300 can also provide a second tuning control signal through a GPIO port.

[0080] In one embodiment, where multiple unidirectional conduction circuits 10 and the tuning drive circuit 20 are integrated into a single package, the satellite processing circuit 200 includes a MIPI (Mobile Industry Processor Interface) interface and provides a first tuning control signal to a first pin based on the MIPI interface, and the cellular processing circuit 300 includes a MIPI (Mobile Industry Processor Interface) interface and provides a second tuning control signal to the first pin based on the MIPI interface.

[0081] In one embodiment, a tuning control switching chip is provided, including at least one first connection pin and a plurality of second connection pins. The first connection pin is used to connect to a tuning access point on a common communication link between a satellite processing circuit 200 and a cellular processing circuit 300. Each of the second connection pins is used to connect to the satellite processing circuit 200 or the cellular processing circuit 300. The tuning control switching chip includes a plurality of unidirectional conduction circuits 10 and a tuning drive circuit 20.

[0082] At least one input terminal of the unidirectional conduction circuit 10 is used to connect to the satellite processing circuit 200, and the input terminals of the remaining unidirectional conduction circuits 10 are used to connect to the cellular processing circuit 300. At least one controlled terminal of the tuning drive circuit 20 is correspondingly connected to the output terminal of the plurality of unidirectional conduction circuits 10, and at least one output terminal of the tuning drive circuit 20 is correspondingly connected to the controlled terminal of the tuning switch circuit 400. The output terminal of the tuning switch circuit 400 is connected to the tuning access point on the common communication link of the satellite processing circuit 200 and the cellular processing circuit 300.

[0083] The tuning drive circuit 20 is configured to receive a first tuning control signal from the satellite processing circuit 200 when the satellite processing circuit 200 is in operation, and to receive a second tuning control signal from the cellular processing circuit 300 when the cellular processing circuit 300 is in operation, so as to adjust the switching state in the tuning switch circuit 400 and support the transmission of satellite signals and cellular signals.

[0084] For details on the functional implementation of each circuit on the tuning control switching chip, please refer to the description in the above embodiments, which will not be repeated here.

[0085] In the description of this specification, references to terms such as "some embodiments," "other embodiments," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative descriptions of the above terms do not necessarily refer to the same embodiments or examples.

[0086] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0087] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these modifications and improvements all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A tuning control switching circuit, characterized in that, The circuit, applied to an electronic device, includes: Multiple unidirectional conduction circuits, wherein at least one of the unidirectional conduction circuits is used to connect to a satellite processing circuit, and the input terminals of the remaining unidirectional conduction circuits are used to connect to a cellular processing circuit. A tuning drive circuit, wherein at least one controlled terminal of the tuning drive circuit is connected to the output terminal of the plurality of unidirectional conduction circuits, at least one output terminal of the tuning drive circuit is connected to the controlled terminal of the tuning switch circuit, and the output terminal of the tuning switch circuit is connected to the tuning access point on the common communication link of the satellite processing circuit and the cellular processing circuit. The tuning drive circuit is configured to receive a first tuning control signal from the satellite processing circuit when the satellite processing circuit is in operation, and to receive a second tuning control signal from the cellular processing circuit when the cellular processing circuit is in operation, so as to adjust the switching state in the tuning switch circuit and support the transmission of satellite signals and cellular signals.

2. The circuit according to claim 1, characterized in that, The tuning drive circuit includes: At least one inverter circuit, the input of which is connected to the output of two unidirectional conduction circuits, the power supply of which is connected to the system voltage, and the output of which is connected to the controlled terminal of the tuning switch circuit.

3. The circuit according to claim 2, characterized in that, The inverter circuit includes: A voltage divider module, wherein the input terminal of the voltage divider module is used to connect to the system voltage; The switching transistor has its first terminal connected to the output terminals of the two unidirectional conduction circuits, its second terminal connected to the output terminal of the voltage divider module and the controlled terminal of the tuning switch circuit, and its third terminal grounded.

4. The circuit according to claim 3, characterized in that, The voltage divider module includes: The first resistor has its input terminal connected to the system voltage and its output terminal connected to the second terminal of the switching transistor.

5. The circuit according to claim 3, characterized in that, The switching transistor is an NMOS transistor.

6. The circuit according to any one of claims 1-5, characterized in that, The unidirectional conduction circuit includes: A diode, wherein the anode of the diode is connected to the satellite processing circuit or the cellular processing circuit, and the cathode of the diode is connected to the controlled terminal of the tuning drive circuit.

7. The circuit according to claim 1, characterized in that, The plurality of unidirectional conduction circuits and the tuning drive circuit are integrated in a single package. The plurality of unidirectional conduction circuits are connected to the satellite processing circuit or the cellular processing circuit through a plurality of first pins of the package. The tuning drive circuit is connected to the controlled terminal of the tuning switch circuit through a second pin of the package.

8. A tuning circuit, characterized in that, The circuit, applied to an electronic device, includes: A tuning switch circuit, the output of which is connected to a tuning access point on the common communication link of the satellite processing circuit and the cellular processing circuit; And the tuning control switching circuit as described in any one of claims 1-7.

9. The tuning circuit according to claim 8, characterized in that, The tuning switch circuit includes: At least one tuning unit, the output of which is used to connect to the tuning access point; At least one single-pole single-throw switch, wherein the single-pole single-throw switch is connected in parallel or in series with at least a portion of the tuning unit, and the controlled terminal of the single-pole single-throw switch is correspondingly connected to the output terminal of the tuning drive circuit.

10. An electronic device, characterized in that, include: Satellite processing circuitry is used to provide the first tuning control signal and support satellite signals; A cellular processing circuit is used to provide a second tuning control signal and support cellular signals, and the satellite processing circuit and the cellular processing circuit have a tuning access point on a common communication link; The tuning circuit according to any one of claims 8-9.

11. A tuning control switching chip, characterized in that, The chip includes at least one first connection pin and multiple second connection pins. The first connection pin is used to connect to a tuning access point on a common communication link between the satellite processing circuit and the cellular processing circuit. Each second connection pin is used to connect to either the satellite processing circuit or the cellular processing circuit. The tuning control switching chip includes: Multiple unidirectional conduction circuits, wherein at least one of the unidirectional conduction circuits is used to connect to a satellite processing circuit, and the input terminals of the remaining unidirectional conduction circuits are used to connect to a cellular processing circuit. A tuning drive circuit, wherein at least one controlled terminal of the tuning drive circuit is connected to the output terminal of the plurality of unidirectional conduction circuits, at least one output terminal of the tuning drive circuit is connected to the controlled terminal of the tuning switch circuit, and the output terminal of the tuning switch circuit is connected to the tuning access point on the common communication link of the satellite processing circuit and the cellular processing circuit. The tuning drive circuit is configured to receive a first tuning control signal from the satellite processing circuit when the satellite processing circuit is in operation, and to receive a second tuning control signal from the cellular processing circuit when the cellular processing circuit is in operation, so as to adjust the switching state in the tuning switch circuit and support the transmission of satellite signals and cellular signals.

Images