Semiconductor structure and method of forming the same

Abstract

The present disclosure relates to a semiconductor structure and a method of forming the same. The method of forming the semiconductor structure includes the steps of forming a substrate having a trench therein; selectively depositing a high-k dielectric material on the inner wall of the trench to form a first dielectric layer covering only the inner wall of the trench; and forming a fill material in the trench covering the surface of the first dielectric layer. The present disclosure helps to reduce the short channel effect in a transistor, reduce the electrode leakage phenomenon, and also reduce the quantum tunneling effect of the dielectric layer, and simplifies the manufacturing process of the semiconductor structure.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor manufacturing technology, and in particular to a semiconductor structure and a method for forming the same. Background Technology

[0002] The semiconductor integrated circuit (IC) industry has experienced exponential growth. Technological advancements in IC materials and design have led to several generations of ICs, each with smaller and more complex circuitry than its predecessor. As Moore's Law advances, the feature size of semiconductor structures continues to shrink, making the short-channel effect in transistors an increasingly significant problem. To mitigate this effect, buried gate structures were developed. However, with further shrinking gate sizes, leakage current issues in buried gates become increasingly severe, reducing semiconductor yield.

[0003] Therefore, how to reduce gate leakage current and thus improve the yield of semiconductor structures is a technical problem that urgently needs to be solved. Summary of the Invention

[0004] This disclosure provides semiconductor structures and methods for forming the same in some embodiments, which are used to reduce gate leakage problems and improve the yield of semiconductor structures.

[0005] According to some embodiments, this disclosure provides a method for forming a semiconductor structure, including the following steps:

[0006] A substrate is formed, wherein the substrate has trenches;

[0007] Selectively deposit a high-k dielectric material on the inner wall of the trench to form a first dielectric layer that only covers the inner wall of the trench;

[0008] A filling material is formed within the trench to cover the surface of the first dielectric layer.

[0009] In some embodiments, the trench extends from the top of the substrate toward the interior of the substrate; the specific steps of forming a first dielectric layer that only covers the inner walls of the trench include:

[0010] A second dielectric layer is formed covering the inner wall of the trench and the top surface of the substrate;

[0011] The high-k dielectric material is selectively deposited in the trench to form the first dielectric layer on the second dielectric layer located only in the trench, and the dielectric constant of the first dielectric layer is greater than that of the second dielectric layer.

[0012] In some embodiments, the specific steps of forming the first dielectric layer on the second dielectric layer located only within the trench include:

[0013] The second dielectric layer on the top surface of the substrate undergoes a first modification treatment;

[0014] The high-K dielectric material is deposited on the second dielectric layer, and the deposition rate of the high-K dielectric material on the second dielectric layer after the first modification treatment is less than the deposition rate of the second dielectric layer in the trench.

[0015] In some embodiments, the specific steps of performing a first modification treatment on the second dielectric layer on the top surface of the substrate include:

[0016] A first protective layer is formed covering the surface of the second dielectric layer within the trench;

[0017] The second dielectric layer exposed on the top surface of the substrate undergoes a first modification treatment.

[0018] In some embodiments, the specific steps of performing a first modification treatment on the second dielectric layer on the top surface of the substrate include:

[0019] The second dielectric layer on the top surface of the substrate is subjected to a first modification treatment using a first modifying agent, such that the hydrophilicity of the second dielectric layer after the first modification treatment is less than that of the second dielectric layer in the trench.

[0020] In some embodiments, the first modifying agent is an acidic agent; the specific steps of performing a first modification treatment on the second dielectric layer on the top surface of the substrate using the first modifying agent include:

[0021] The second dielectric layer on the top surface of the substrate is impregnated with the first modifying agent.

[0022] In some embodiments, the high-K dielectric material is any one or a combination of two or more of HfO2, HfSiO, HfSiON, HfTaO, HfTiO, HfZrO, ZrO2, Al2O3, and HfO2-Al2O3 alloy.

[0023] In some embodiments, the specific steps of depositing the high-k dielectric material on the second dielectric layer include:

[0024] Remove the first protective layer to expose the second dielectric layer within the trench;

[0025] The high-k dielectric material is deposited on the second dielectric layer using an atomic layer deposition process.

[0026] In some embodiments, the specific steps of depositing the high-k dielectric material on the second dielectric layer using atomic layer deposition (ALD) include:

[0027] The following cyclic steps are executed a preset number of times, wherein the preset number of times is 1 to 25 times, and the cyclic steps include:

[0028] A first reactant gas and a second reactant gas are transferred to the substrate, and the first reactant gas and the second reactant gas react to generate the high-K dielectric material covering the second dielectric layer in the trench;

[0029] The substrate is purged using a purging gas.

[0030] In some embodiments, the specific steps of forming the first dielectric layer on the second dielectric layer located only within the trench include:

[0031] The second medium layer within the trench undergoes a second modification treatment;

[0032] The high-K dielectric material is deposited on the second dielectric layer, and the deposition rate of the high-K dielectric material on the second dielectric layer after the second modification treatment is greater than the deposition rate on the second dielectric layer on the top surface of the substrate.

[0033] In some embodiments, the specific steps for performing a second modification treatment on the second dielectric layer within the trench include:

[0034] A second protective layer is formed covering the surface of the second dielectric layer on the top surface of the substrate;

[0035] The second medium layer exposed within the trench undergoes a second modification treatment.

[0036] In some embodiments, the specific steps for performing a second modification treatment on the second dielectric layer within the trench include:

[0037] The second medium layer in the trench is subjected to a second modification treatment using a second modifying agent, such that the hydrophilicity of the second medium layer after the second modification treatment is greater than that of the second medium layer in the trench.

[0038] In some embodiments, the specific steps of forming a filling material covering the surface of the first dielectric layer within the trench include:

[0039] A diffusion barrier layer is formed covering the surface of the first dielectric layer within the trench;

[0040] The filling material is formed to cover the surface of the diffusion barrier layer and fill the trench.

[0041] In some embodiments, the diffusion barrier layer is made of TiN, and the filler material is made of La2O3.

[0042] According to other embodiments, this disclosure also provides a semiconductor structure, including:

[0043] Substrate;

[0044] An embedded electrode structure, located within the substrate, includes a filler material and a first dielectric layer covering the filler material and located between the substrate and the filler material, wherein the material of the first dielectric layer is a high-k dielectric material.

[0045] In some embodiments, the embedded electrode structure further includes:

[0046] A second dielectric layer covers the first dielectric layer, and the second dielectric layer is located at least between the first dielectric layer and the substrate, wherein the dielectric constant of the second dielectric layer is less than that of the first dielectric layer.

[0047] In some embodiments, the high-K dielectric material is any one or a combination of two or more of HfO2, HfSiO, HfSiON, HfTaO, HfTiO, HfZrO, ZrO2, Al2O3, and HfO2-Al2O3 alloy.

[0048] In some embodiments, the second dielectric layer further covers the top surface of the substrate;

[0049] The hydrophilicity of the second dielectric layer located on the top surface of the substrate is less than that of the second dielectric layer covering the first dielectric layer.

[0050] In some embodiments, the thickness of the first dielectric layer is 1 nm to 3 nm.

[0051] In some embodiments, the filler material includes La2O3.

[0052] The semiconductor structure and its formation method provided in some embodiments of this disclosure, by providing a filling material in the buried electrode structure and a first dielectric layer made of a high-k dielectric material covering the surface of the filling material, helps to reduce the short-channel effect in the transistor and reduce electrode leakage. Furthermore, the high dielectric properties of the high-k dielectric material can be utilized to reduce the quantum tunneling effect of the first dielectric layer, thereby improving the electrical performance of the semiconductor structure and increasing its manufacturing yield. In addition, some embodiments of this disclosure can employ a selective deposition process so that the high-k dielectric material is deposited only on the inner wall of the trench, thus eliminating the need for a re-etching process after deposition, simplifying the semiconductor structure manufacturing process, reducing manufacturing costs, and improving manufacturing efficiency. Attached Figure Description

[0053] Appendix Figure 1This is a flowchart of a method for forming a semiconductor structure according to a specific embodiment of this disclosure;

[0054] Appendix Figure 2 -Appendix Figure 8 This is a schematic diagram of the main process cross-sections during the formation of the semiconductor structure according to a specific embodiment of this disclosure;

[0055] Appendix Figure 9 This is a schematic diagram of the semiconductor structure in a specific embodiment of this disclosure. Detailed Implementation

[0056] The specific embodiments of the semiconductor structure and its formation method provided in this disclosure will be described in detail below with reference to the accompanying drawings.

[0057] This specific embodiment provides a method for forming a semiconductor structure, with appended... Figure 1 This is a flowchart illustrating the method for forming a semiconductor structure according to a specific embodiment of this disclosure, with appended... Figure 2 -Appendix Figure 8 This is a schematic diagram of the main process cross-sections during the formation of the semiconductor structure according to a specific embodiment of this disclosure. For example... Figures 1-8 As shown, the method for forming the semiconductor structure includes the following steps:

[0058] Step S11, forming a substrate 20, wherein the substrate 20 has trenches 21, such as Figure 2 As shown.

[0059] Step S12: Selectively deposit a high-k dielectric material on the inner wall of the trench 21 to form a first dielectric layer 70 that only covers the inner wall of the trench 21, such as... Figure 7 As shown.

[0060] Step S13: A filling material covering the surface of the first dielectric layer 70 is formed within the trench 21, such as... Figure 8 As shown.

[0061] The semiconductor structure described in this specific embodiment can be, but is not limited to, DRAM (Dynamic Random Access Memory). This specific embodiment uses DRAM as an example for illustration. The substrate 20 can be, but is not limited to, a silicon substrate. This specific embodiment uses silicon as an example for illustration. In other embodiments, the substrate 20 can also be a semiconductor substrate such as gallium nitride, gallium arsenide, gallium carbide, silicon carbide, or SOI. The substrate 20 is used to support the device structure on it. The high-K dielectric material described in this specific embodiment refers to a dielectric material with a dielectric constant greater than that of silicon dioxide. In one example, the dielectric constant of silicon dioxide is 3.9. The high-K dielectric material can be any one or a combination of two or more of hafnium dioxide (HfO2), HfSiO, HfSiON, HfTaO, HfTiO, HfZrO, zirconium oxide (ZrO2), alumina, and hafnium dioxide-alumina alloy.

[0062] In some embodiments, the trench 21 extends from the top of the substrate 20 toward the interior of the substrate 20; the specific steps of forming a first dielectric layer 70 that only covers the inner wall of the trench 21 include:

[0063] A second dielectric layer 22 is formed covering the inner wall of the trench 21 and the top surface of the substrate 20, such as... Figure 2 As shown;

[0064] The high-k dielectric material is selectively deposited in the trench 21 to form the first dielectric layer 70 located only on the second dielectric layer 22 within the trench 21, and the dielectric constant of the first dielectric layer 70 is greater than the dielectric constant of the second dielectric layer 22.

[0065] Specifically, the substrate 20 includes a bottom surface and a top surface that are distributed opposite to each other. An etching process can be used to etch the substrate 20 along a direction perpendicular to the top surface, starting from the top surface of the substrate 20, to form the trench 21 extending from the top surface of the substrate 20 into the interior of the substrate 20, facilitating the subsequent formation of a buried electrode structure within the trench 21. Subsequently, a deposition process or an in-situ growth process can be used to form the second dielectric layer 22, which continuously covers the top surface of the substrate 20 and the inner walls (including the sidewalls and bottom wall) of the trench 21. In one example, the material of the second dielectric layer 22 can be an insulating dielectric material such as an oxide material (e.g., silicon dioxide). The second dielectric layer 22 can be a single-layer structure or a multi-layer structure; this specific embodiment is described using a single-layer structure as an example.

[0066] Subsequently, by controlling the deposition process parameters and modifying the second dielectric layer 22 on the top surface of the substrate 20 or the second dielectric layer 22 within the trench 21, the high-k dielectric material can be selectively deposited only within the trench 21, forming the first dielectric layer 21 covering the second dielectric layer 22 within the trench 21. This specific embodiment uses a selective deposition process to deposit the high-k dielectric material only within the trench 21, thus eliminating the need for subsequent etch-back processes to remove the high-k dielectric material on the top surface of the substrate 20. This simplifies the semiconductor structure manufacturing process, reduces the manufacturing difficulty of the semiconductor structure, and improves the manufacturing efficiency of the semiconductor structure.

[0067] Because the high-k dielectric material has strong dielectric properties, the thickness of the first dielectric layer 70 can be reduced accordingly, thereby adapting to the manufacturing requirements of increasingly miniaturized semiconductor structures. In some embodiments, the thickness of the first dielectric layer 70 is 1 nm to 3 nm. In one example, the thickness of the first dielectric layer 70 is 1.5 nm.

[0068] Taking the buried electrode structure as an example of a buried gate structure, in one example, the filling material includes a gate electrode material, and the first dielectric layer 21 and the second dielectric layer 22 together serve as the gate dielectric layer in the transistor. In another example, the second dielectric layer 22 may not be formed, and only the first dielectric layer 70 may serve as the gate dielectric layer in the transistor.

[0069] In some embodiments, the specific steps for forming the first dielectric layer 70 on the second dielectric layer 22 located only within the trench 21 include:

[0070] The second dielectric layer 22 on the top surface of the substrate 20 is subjected to a first modification treatment;

[0071] The high-K dielectric material is deposited on the second dielectric layer 22, and the deposition rate of the high-K dielectric material on the second dielectric layer 22 after the first modification treatment is less than the deposition rate of the second dielectric layer 22 in the trench 21.

[0072] In some embodiments, the specific steps for performing a first modification treatment on the second dielectric layer 22 on the top surface of the substrate 20 include:

[0073] A first protective layer 30 is formed covering the surface of the second dielectric layer 22 within the trench 21, such as Figure 4 As shown;

[0074] The second dielectric layer 22 exposed on the top surface of the substrate 20 is subjected to a first modification treatment.

[0075] For example, after forming the second dielectric layer 22 that continuously covers the top surface of the substrate 20 and the inner wall of the trench 21, a spin-on hard mask (SOH) material or a photoresist material is spin-coated onto the substrate 20 to form the first protective layer 30 that continuously covers the second dielectric layer 22 on the top surface of the substrate 20 and the second dielectric layer 22 located in the trench 21. Figure 3 As shown. Subsequently, the first protective layer 30 on top of the second dielectric layer 22 on the top surface of the substrate 20 can be removed by an ashing process or an etch-back process, leaving only the first protective layer 30 on top of the second dielectric layer 22 within the trench 21, thus exposing the second dielectric layer 22 on the top surface of the substrate 20, as shown. Figure 4 As shown. Then, the second dielectric layer 22 on the top surface of the substrate 20 undergoes a first modification treatment, such that the second dielectric layer 22 after the first modification treatment has different physical or chemical properties from the second dielectric layer 22 located in the trench 21. This results in the high-K dielectric material being deposited at a lower deposition rate on the second dielectric layer 22 after the first modification treatment than on the second dielectric layer 22 in the trench 21, thus selectively allowing the first dielectric layer 70 to be formed only on the second dielectric layer 22 within the trench 21. In one example, parameters during the first modification treatment process (e.g., the time, temperature, type of first modifying agent, amount of first modifying agent, etc.) can be adjusted so that the deposition rate of the high-K dielectric material on the second dielectric layer 22 after the first modification treatment is 0, meaning the high-K dielectric material does not deposit on the second dielectric layer 22 after the first modification treatment.

[0076] In some embodiments, the specific steps for performing a first modification treatment on the second dielectric layer 22 on the top surface of the substrate 20 include:

[0077] The second dielectric layer 22 on the top surface of the substrate 20 is subjected to a first modification treatment using a first modification agent, such that the hydrophilicity of the second dielectric layer 22 after the first modification treatment is less than that of the second dielectric layer 22 in the trench 21.

[0078] In some embodiments, the first modifying agent is an acidic agent; the specific steps of performing the first modification treatment on the second dielectric layer 22 on the top surface of the substrate 20 using the first modifying agent include:

[0079] The second dielectric layer 22 on the top surface of the substrate 20 is impregnated with the first modifying agent.

[0080] The following explanation uses the first modification treatment as a surface treatment process, the high-K dielectric material as ZrO2, the material of the second dielectric layer 22 as SiO2, and the first modification agent as HCl as an example. The high-K dielectric material ZrO2 is generated using ZrCl4 as the first reactant gas and H2O as the second reactant gas. The chemical reaction equation for generating ZrO2 is: ZrO2 + 2H2O = ZrO2 + HCl. Through the first modification treatment, the hydrophilicity of the second dielectric layer 22 after the first modification treatment is less than that of the second dielectric layer 22 within the trench 21. This reduces the adhesion ability of the first reactant gas ZrCl4 and the second reactant gas H2O to the surface of the second dielectric layer 22 on the top surface of the substrate 20. Ultimately, this results in the deposition rate of the high-K dielectric material on the second dielectric layer 22 after the first modification treatment being lower than the deposition rate of the second dielectric layer 22 within the trench 21. By adjusting parameters such as the number of times the cyclic steps are executed during the first modification process, the amount of the first modification agent, and the specific duration of the first preset time, the deposition rate of the high-K dielectric material ZrO2 on the surface of the second dielectric layer 22 on the top surface of the substrate 20 can be made to be 0.

[0081] When modifying the second dielectric layer 22 on the top surface of the substrate 20, an acidic treatment agent such as HCl can be used to pickle the second dielectric layer 22 on the top surface of the substrate 20, so that the second dielectric layer 22 on the top surface of the substrate 20 is wetted by the acidic treatment agent, thereby allowing hydrogen ions in the acidic treatment agent to adhere to the surface of the second dielectric layer 22 on the top surface of the substrate 20, thereby reducing the hydrophilicity of the second dielectric layer 22 on the top surface of the substrate 20.

[0082] In some embodiments, the specific steps of depositing the high-k dielectric material on the second dielectric layer 22 include:

[0083] Removing the first protective layer 30 exposes the second dielectric layer 22 within the trench 21, such as... Figure 6 As shown;

[0084] The high-k dielectric material is deposited on the second dielectric layer 22 using an atomic layer deposition process, such as... Figure 7 As shown.

[0085] In some embodiments, the specific steps of depositing the high-k dielectric material on the second dielectric layer 22 using atomic layer deposition include:

[0086] The following cyclic steps are executed a preset number of times, wherein the preset number of times is 1 to 25 times, and the cyclic steps include:

[0087] A first reactant gas and a second reactant gas are transferred to the substrate 20, and the first reactant gas and the second reactant gas react to generate the high-K dielectric material covering the second dielectric layer 22 in the trench;

[0088] The substrate 20 is purged using a purging gas.

[0089] Specifically, after the first modification process is completed, the remaining first protective layer 30 in the trench 21 can be removed by an ashing process or an etching process, thereby exposing the second dielectric layer 22 in the trench 21, such as... Figure 6 As shown. Subsequently, an atomic layer deposition process (e.g., using ZrCl4 as the first reactant gas and H2O as the second reactant gas) can be used to deposit the high-k dielectric material (e.g., ZrO2) onto the substrate 20. At this time, due to the first modification treatment, the high-k dielectric material is generated only on the surface of the second dielectric layer 22 within the trench 21, forming a first dielectric layer 70 that only covers the second dielectric layer 22 within the trench 21. In one example, the first dielectric layer 70 covers the entire surface of the second dielectric layer 22 within the trench 21.

[0090] When depositing the high-k dielectric material using atomic layer deposition (ALD), a predetermined number of cyclic steps can be performed to form a first dielectric layer 70 of predetermined thickness on the surface of the second dielectric layer 22 within the trench 21. In one example, the first reactant gas is ZrCl4, and the second reactant gas is H2O. The purge gas is N2 or an inert gas. In this specific embodiment, the inert gas refers to a gas formed from elements of Group VIII in the periodic table. During the formation of the high-k dielectric material using ALD, the number of cyclic steps should not be too large; otherwise, the high-k dielectric material may also be deposited on the surface of the second dielectric layer 22 on the top surface of the substrate 20. To ensure that the high-k dielectric material is completely not deposited on the surface of the second dielectric layer 22 on the top surface of the substrate 20, the predetermined number of steps is limited to the range of 1 to 25. In one example, those skilled in the art can also adjust the specific value of the predetermined number of steps by adjusting parameters such as the amount and concentration of the first modifying agent to generate a first dielectric layer 70 of predetermined thickness on the second dielectric layer 22 within the trench 21.

[0091] In other embodiments, the specific steps for forming the first dielectric layer 70 on the second dielectric layer 22 located only within the trench 21 include:

[0092] The second dielectric layer 22 within the trench 21 undergoes a second modification treatment;

[0093] The high-K dielectric material is deposited on the second dielectric layer 22, and the deposition rate of the high-K dielectric material on the second dielectric layer 22 after the second modification treatment is greater than the deposition rate on the second dielectric layer 22 on the top surface of the substrate 20.

[0094] In some embodiments, the specific steps for performing a second modification treatment on the second dielectric layer 22 within the trench 21 include:

[0095] A second protective layer is formed covering the surface of the second dielectric layer 22 on the top surface of the substrate 20;

[0096] The second medium layer 22 exposed within the trench 21 is subjected to a second modification treatment.

[0097] In some embodiments, the specific steps for performing a second modification treatment on the second dielectric layer 22 within the trench 21 include:

[0098] The second medium layer 22 in the trench 21 is subjected to a second modification treatment using a second modifying agent, such that the hydrophilicity of the second medium layer 22 after the second modification treatment is greater than that of the second medium layer 22 in the trench 21.

[0099] For example, the second modification treatment is a surface treatment process. The material of the second dielectric layer 22 can be a hydrophobic dielectric material. By performing the second modification treatment on the second dielectric layer 22 in the trench 21, the hydrophilicity of the second dielectric layer 22 in the trench 21 can be made greater than that of the second dielectric layer 22 on the top surface of the substrate 20. When ZrO2 is grown using ZrCl4 as the first reactant gas, H2O as the second reactant gas, and combined with atomic layer deposition, ZrO2 can be grown only on the surface of the second dielectric layer 22 in the trench 21 where the hydrophilicity is stronger, thereby selectively forming the first dielectric layer 70 only on the surface of the second dielectric layer 22 in the trench 21.

[0100] In other embodiments, the hydrophilicity of the second dielectric layer 22 on the top surface of the substrate 20 can be reduced while the hydrophilicity of the second dielectric layer 22 in the trench 21 can be increased, thereby better ensuring that the first dielectric layer 70 is formed only in the trench 21.

[0101] In some embodiments, the specific steps of forming a filling material covering the surface of the first dielectric layer 70 within the trench 21 include:

[0102] A diffusion barrier layer is formed covering the surface of the first dielectric layer 70 within the trench 21;

[0103] The filling material 80 forms a layer that covers the surface of the diffusion barrier layer and fills the trench 21, such as... Figure 8 As shown.

[0104] In some embodiments, the diffusion barrier layer is made of TiN, and the filler material 80 is made of La2O3. Taking the filler material 80 as a gate electrode as an example, using La2O3 to form the gate electrode can improve the switching speed of the transistor including the gate electrode, thereby improving the response speed of the semiconductor structure.

[0105] This specific embodiment also provides a semiconductor structure, attached... Figure 9 This is a schematic diagram of a semiconductor structure according to a specific embodiment of this disclosure. The semiconductor structure provided in this specific embodiment can employ, for example... Figures 1-8 The semiconductor structure shown is formed using the method described. Figure 9 As shown, the semiconductor structure includes:

[0106] Substrate 20;

[0107] An embedded electrode structure is located within the substrate 20 and includes a filler material and a first dielectric layer 70 covering the filler material 80 and located between the substrate 20 and the filler material 80. The material of the first dielectric layer 70 is a high-k dielectric material.

[0108] The semiconductor structure described in this specific embodiment can be, but is not limited to, DRAM. This specific embodiment uses DRAM as an example for illustration. The substrate 20 can be, but is not limited to, a silicon substrate. This specific embodiment uses silicon as an example for illustration. In other embodiments, the substrate 20 can also be a semiconductor substrate such as gallium nitride, gallium arsenide, gallium carbide, silicon carbide, or SOI. The substrate 20 is used to support the device structure on it. The high-K dielectric material described in this specific embodiment refers to a dielectric material with a dielectric constant greater than that of silicon dioxide. In one example, the dielectric constant of silicon dioxide is 3.9. The high-K dielectric material can be any one or a combination of two or more of hafnium dioxide (HfO2), HfSiO, HfSiON, HfTaO, HfTiO, HfZrO, zirconium oxide (ZrO2), alumina, and hafnium dioxide-alumina alloy. Taking the buried electrode structure as a buried gate structure as an example, the first dielectric layer 70 serves as the gate dielectric layer of the transistor in the semiconductor structure; or, the first dielectric layer 70 serves as part of the gate dielectric layer of the transistor in the semiconductor structure. The first dielectric layer 70 formed using the high-k dielectric material can increase the dielectric properties of the dielectric layer (e.g., the first dielectric layer 70), thereby reducing the quantum tunneling effect of the dielectric layer (e.g., the first dielectric layer 70) and improving the electrical performance of the semiconductor structure. Simultaneously, the high-k dielectric material can also reduce the short-channel effect in the transistor and reduce leakage current in the buried electrode, thereby further improving the electrical performance of the semiconductor structure.

[0109] In some embodiments, the embedded electrode structure further includes:

[0110] The second dielectric layer 22 covers the first dielectric layer 70, and the second dielectric layer 22 is located at least between the first dielectric layer 70 and the substrate 20. The dielectric constant of the second dielectric layer 22 is less than the dielectric constant of the first dielectric layer 70.

[0111] In some embodiments, the high-K dielectric material is any one or a combination of two or more of HfO2, HfSiO, HfSiON, HfTaO, HfTiO, HfZrO, ZrO2, Al2O3, and HfO2-Al2O3 alloy.

[0112] In some embodiments, the second dielectric layer 22 further covers the top surface of the substrate 20;

[0113] The hydrophilicity of the second dielectric layer 22 located on the top surface of the substrate 20 is less than that of the second dielectric layer 22 covering the first dielectric layer 70.

[0114] Specifically, by making the hydrophilicity of the second dielectric layer 22 on the top surface of the substrate 20 less than that of the second dielectric layer 22 covering the first dielectric layer 70, the high-K dielectric material is grown only on the surface of the second dielectric layer 22 with stronger hydrophilicity, that is, selective growth of the high-K dielectric material is achieved, thereby simplifying the manufacturing process of the semiconductor structure and reducing the manufacturing cost of the semiconductor structure.

[0115] This specific embodiment is illustrated using the example of the first dielectric layer 70 covering the surface of the second dielectric layer 22. In other specific embodiments, the second dielectric layer 22 may not be provided in the semiconductor structure, so that the first dielectric layer 70 directly covers the surface of the substrate 20.

[0116] Because the high-k dielectric material has strong dielectric properties, the thickness of the first dielectric layer 70 can be reduced accordingly, thereby adapting to the manufacturing requirements of increasingly miniaturized semiconductor structures. In some embodiments, the thickness of the first dielectric layer 70 is 1 nm to 3 nm. In one example, the thickness of the first dielectric layer 70 is 1.5 nm.

[0117] In some embodiments, the filler material comprises La2O3. The filler material includes an electrode 80, and using La2O3 to form the electrode 80 can improve the switching speed of the transistor including the electrode 80, thereby improving the response speed of the semiconductor structure. In one example, the semiconductor structure further includes a diffusion barrier layer located between the first dielectric layer 70 and the electrode 80. The material of the diffusion barrier layer may be, but is not limited to, TiN.

[0118] The semiconductor structure and its formation method provided in some embodiments of this specific implementation, by providing a filling material in the buried electrode structure and a first dielectric layer made of a high-k dielectric material covering the surface of the filling material, helps to reduce the short-channel effect in the transistor and reduce leakage current of the buried electrode. Furthermore, the high dielectric properties of the high-k dielectric material can be used to reduce the quantum tunneling effect of the gate dielectric layer (e.g., the first dielectric layer), thereby improving the electrical performance of the semiconductor structure and increasing the manufacturing yield. In addition, some embodiments of this specific implementation can employ a selective deposition process so that the high-k dielectric material is deposited only on the inner wall of the trench, thus eliminating the need for a re-etching process after deposition, simplifying the semiconductor structure manufacturing process, reducing the manufacturing cost of the semiconductor structure, and improving the manufacturing efficiency of the semiconductor structure.

[0119] The above description is only a preferred embodiment of this disclosure. It should be noted that those skilled in the art can make several improvements and modifications without departing from the principles of this disclosure, and these improvements and modifications should also be considered within the scope of protection of this disclosure.

Claims

1. A method for forming a semiconductor structure, characterized in that, Includes the following steps: A substrate is formed, wherein the substrate has trenches; Selectively deposit a high-k dielectric material on the inner wall of the trench to form a first dielectric layer that only covers the inner wall of the trench; A filling material is formed within the trench to cover the surface of the first dielectric layer; The trench extends from the top of the substrate toward the interior of the substrate; The specific steps for forming a first dielectric layer that covers only the inner wall of the trench include: A second dielectric layer is formed covering the inner wall of the trench and the top surface of the substrate; The high-k dielectric material is selectively deposited in the trench to form the first dielectric layer on the second dielectric layer located only in the trench, and the dielectric constant of the first dielectric layer is greater than that of the second dielectric layer; The specific steps for forming the first dielectric layer on the second dielectric layer located only within the trench include: The second dielectric layer on the top surface of the substrate undergoes a first modification treatment; The high-K dielectric material is deposited on the second dielectric layer, and the deposition rate of the high-K dielectric material on the second dielectric layer after the first modification treatment is less than the deposition rate of the second dielectric layer in the trench.

2. The method for forming a semiconductor structure according to claim 1, characterized in that, The specific steps for performing a first modification treatment on the second dielectric layer on the top surface of the substrate include: A first protective layer is formed covering the surface of the second dielectric layer within the trench; The second dielectric layer exposed on the top surface of the substrate is subjected to a first modification treatment.

3. The method for forming a semiconductor structure according to claim 2, characterized in that, The specific steps for performing a first modification treatment on the second dielectric layer on the top surface of the substrate include: The second dielectric layer on the top surface of the substrate is subjected to a first modification treatment using a first modifying agent, such that the hydrophilicity of the second dielectric layer after the first modification treatment is less than that of the second dielectric layer in the trench.

4. The method for forming a semiconductor structure according to claim 3, characterized in that, The first modifying agent is an acidic agent; the specific steps for performing the first modification treatment on the second dielectric layer on the top surface of the substrate using the first modifying agent include: The second dielectric layer on the top surface of the substrate is impregnated with the first modifying agent.

5. The method for forming a semiconductor structure according to claim 3, characterized in that, The high-K dielectric material is any one or a combination of two or more of HfO2, HfSiO, HfSiON, HfTaO, HfTiO, HfZrO, ZrO2, Al2O3, and HfO2-Al2O3 alloy.

6. The method for forming a semiconductor structure according to claim 4, characterized in that, The specific steps for depositing the high-k dielectric material on the second dielectric layer include: Remove the first protective layer to expose the second dielectric layer within the trench; The high-k dielectric material is deposited on the second dielectric layer using an atomic layer deposition process.

7. The method for forming a semiconductor structure according to claim 6, characterized in that, The specific steps for depositing the high-k dielectric material onto the second dielectric layer using atomic layer deposition (ALD) include: The following cyclic steps are executed a preset number of times, wherein the preset number of times is 1 to 25 times, and the cyclic steps include: A first reactant gas and a second reactant gas are transferred to the substrate, and the first reactant gas and the second reactant gas react to generate the high-K dielectric material covering the second dielectric layer in the trench; The substrate is purged using a purging gas.

8. The method for forming a semiconductor structure according to claim 1, characterized in that, The specific steps for forming the first dielectric layer on the second dielectric layer located only within the trench include: The second medium layer within the trench undergoes a second modification treatment; The high-K dielectric material is deposited on the second dielectric layer, and the deposition rate of the high-K dielectric material on the second dielectric layer after the second modification treatment is greater than the deposition rate on the second dielectric layer on the top surface of the substrate.

9. The method for forming a semiconductor structure according to claim 8, characterized in that, The specific steps for performing a second modification treatment on the second medium layer within the trench include: A second protective layer is formed covering the surface of the second dielectric layer on the top surface of the substrate; The second medium layer exposed within the trench undergoes a second modification treatment.

10. The method for forming a semiconductor structure according to claim 8, characterized in that, The specific steps for performing a second modification treatment on the second medium layer within the trench include: The second medium layer in the trench is subjected to a second modification treatment using a second modifying agent, such that the hydrophilicity of the second medium layer after the second modification treatment is greater than that of the second medium layer in the trench.

11. The method for forming a semiconductor structure according to claim 1, characterized in that, The specific steps for forming a filling material covering the surface of the first dielectric layer within the trench include: A diffusion barrier layer is formed covering the surface of the first dielectric layer within the trench; The filling material forms a layer that covers the surface of the diffusion barrier layer and fills the trench.

12. The method for forming a semiconductor structure according to claim 11, characterized in that, The diffusion barrier layer is made of TiN, and the filler material is made of La2O3.

13. A semiconductor structure, characterized in that, include: Substrate; An embedded electrode structure, located within the substrate, includes a filler material and a first dielectric layer covering the filler material and located between the substrate and the filler material, wherein the material of the first dielectric layer is a high-k dielectric material; The embedded electrode structure also includes: A second dielectric layer covers the first dielectric layer, and the second dielectric layer is located at least between the first dielectric layer and the substrate, wherein the dielectric constant of the second dielectric layer is less than the dielectric constant of the first dielectric layer; The second dielectric layer also covers the top surface of the substrate; The hydrophilicity of the second dielectric layer located on the top surface of the substrate is less than that of the second dielectric layer covering the first dielectric layer.

14. The semiconductor structure according to claim 13, characterized in that, The high-K dielectric material is any one or a combination of two or more of HfO2, HfSiO, HfSiON, HfTaO, HfTiO, HfZrO, ZrO2, Al2O3, and HfO2-Al2O3 alloy.

15. The semiconductor structure according to claim 13, characterized in that, The thickness of the first dielectric layer is 1 nm to 3 nm.

16. The semiconductor structure according to claim 13, characterized in that, The filler material includes La2O3.

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