Solid state disk data read-write method and solid state disk

Abstract

The present disclosure relates to a solid state disk data read-write method and a solid state disk. The present disclosure switches the current running mode to the target mode in response to receiving the target mode switching instruction of the host device; receives the data access request of the target mode sent by the host device, the data access request including the target data to be operated; when the target mode is the memory test mode, the read / write operation of the target data is performed in the memory space of the solid state disk in response to the data access request of the memory test mode; when the target mode is the normal mode, the read / write operation of the target data is performed between the non-volatile storage space and the memory space of the solid state disk in response to the data access request of the normal mode, the data read / write of the solid state disk can be flexibly and conveniently controlled according to the data access request of each mode sent by the host device, the memory test can be completed without passing through the non-volatile storage space, and the efficiency of data read / write and the memory test efficiency can be improved.

Description

Technical Field

[0001] This disclosure relates to the field of data processing technology, and in particular to a solid-state drive (SSD) data read / write method and a solid-state drive. Background Technology

[0002] Solid-state drives (SSDs) are hard drives made of solid-state electronic storage chip arrays. As a new generation of data storage devices, SSDs are widely used in various fields.

[0003] In related technologies, when testing the Double Data Rate (DDR) memory of a solid-state drive (SSD), the host device sends memory test mode parameters to the SSD through a communication interface (such as PCIe / UART), and the control unit in the SSD performs stress read and write operations on the memory according to the relevant parameters of the memory test mode.

[0004] However, in related technologies, the data read / write process of solid-state drives (SSDs) in memory testing mode is complex, time-consuming, and inefficient. Furthermore, the testing requirements in the memory testing mode of SSDs may change, requiring adjustments to the testing model and the entire data read / write process of the SSD. This process is time-consuming and carries many potential risks. For example, for large-capacity SSDs, the memory capacity increases exponentially with the storage capacity of the SSD. However, memory stability and reliability testing requires repeated high-pressure read / write operations. To achieve this, the time required to perform a complete stress test on the memory of a large-capacity SSD through control components can even reach more than ten hours. Memory reliability testing is time-consuming and inefficient. Summary of the Invention

[0005] To address the aforementioned technical issues, this disclosure provides a method for reading and writing data on a solid-state drive (SSD) and an SSD.

[0006] The first aspect of this disclosure provides a method for reading and writing data on a solid-state drive, the method comprising:

[0007] In response to receiving a target mode switching command from the host device, the current operating mode is switched to the target mode;

[0008] Receive a data access request for the target mode sent by the host device. The data access request includes the target data to be operated.

[0009] When the target mode is memory test mode, in response to the data access request of memory test mode, read / write operations of target data are performed in the memory space of the solid-state drive;

[0010] When the target mode is normal mode, in response to data access requests in normal mode, read / write operations of the target data are performed between the non-volatile storage space of the solid-state drive and the memory space.

[0011] A second aspect of this disclosure provides a method for reading and writing data on a solid-state drive, the method comprising:

[0012] In response to the setting operation of the solid-state drive's operating mode, a target mode switching command is generated;

[0013] Send the target mode switching command to the solid-state drive so that the solid-state drive can switch the target mode based on the target mode switching command;

[0014] In response to receiving the target mode switching completion instruction from the solid-state drive (SSD), a target mode data access request is sent to the SSD. The data access request includes the target data to be operated on, so that when the target mode is memory test mode, the SSD can perform read / write operations on the target data in the memory space of the SSD in response to the data access request of memory test mode, or when the target mode is normal mode, the SSD can perform read / write operations on the target data between the non-volatile storage space and the memory space in response to the data access request of normal mode.

[0015] A third aspect of this disclosure provides a solid-state drive data read / write device, the device comprising:

[0016] The switching module is used to switch the current operating mode to the target mode in response to receiving a target mode switching command from the host device;

[0017] The first receiving module is used to receive a data access request for a target mode sent by the host device. The data access request includes the target data to be operated.

[0018] The first read / write module is used to perform read / write operations on the target data in the memory space of the solid-state drive in response to data access requests when the target mode is memory test mode.

[0019] The second read / write module, when the target mode is normal mode, responds to data access requests and performs read / write operations on the target data between the non-volatile storage space of the solid-state drive and the memory space.

[0020] A fourth aspect of this disclosure provides a solid-state drive data read / write apparatus, the apparatus comprising:

[0021] The instruction generation module is used to generate target mode switching instructions in response to the setting operation of the solid-state drive's operating mode;

[0022] The first instruction sending module is used to send the target mode switching instruction to the solid-state drive (SSD) so that the SSD can switch the target mode based on the target mode switching instruction.

[0023] The second instruction sending module is used to send a data access request to the solid-state drive in response to receiving the target mode switching completion instruction. The data access request includes the target data to be operated on, so that when the target mode is memory test mode, the solid-state drive can perform read / write operations on the target data in the memory space of the solid-state drive in response to the data access request, or when the target mode is normal mode, the solid-state drive can perform read / write operations on the target data between the non-volatile storage space and the memory space of the solid-state drive in response to the data access request.

[0024] The fifth aspect of this disclosure provides a solid-state drive (SSD) including a control unit and a memory, wherein the memory stores a computer program, and when the computer program is executed by the control unit, the SSD data read / write method of the first aspect described above can be implemented.

[0025] The sixth aspect of this disclosure provides a host device including a memory and a processor, wherein the memory stores a computer program that, when executed by the processor, enables the solid-state drive data read / write method of the second aspect described above.

[0026] The technical solution provided in this disclosure has the following advantages compared with the prior art:

[0027] This disclosure involves switching the current operating mode to the target mode in response to a target mode switching instruction received from the host device; receiving a data access request from the host device for the target mode, the data access request including the target data to be operated on; when the target mode is memory test mode, performing read / write operations on the target data in the memory space of the solid-state drive in response to the data access request of memory test mode; and when the target mode is normal mode, performing read / write operations on the target data between the non-volatile storage space and the memory space of the solid-state drive in response to the data access request of normal mode. The solid-state drive can flexibly and conveniently control data read and write operations according to the data access requests of each mode sent by the host device. Different data read and write strategies are adopted in different operating modes, which can improve the efficiency of data read and write operations of the solid-state drive. Furthermore, in memory test mode, data read and write operations can be completed without going through the non-volatile storage space, which can greatly reduce the memory test time and improve the memory test efficiency. Attached Figure Description

[0028] The accompanying drawings, which are incorporated in and form a part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure.

[0029] To more clearly illustrate the technical solutions in the embodiments of this disclosure or the prior art, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0030] Figure 1 This is a flowchart of a solid-state drive data read / write method provided in an embodiment of this disclosure;

[0031] Figure 2 This is a flowchart of another solid-state drive data read / write method provided in this embodiment of the disclosure;

[0032] Figure 3 This is a flowchart of another solid-state drive data read / write method provided in this disclosure embodiment;

[0033] Figure 4 This is a flowchart of another solid-state drive data read / write method provided in this disclosure embodiment;

[0034] Figure 5 This is a schematic diagram of a data transmission path provided in an embodiment of this disclosure;

[0035] Figure 6 This is a schematic diagram of the structure of a solid-state drive data read / write device provided in an embodiment of this disclosure;

[0036] Figure 7 This is a schematic diagram of another solid-state drive data read / write device provided in an embodiment of this disclosure. Detailed Implementation

[0037] To better understand the above-mentioned objectives, features, and advantages of this disclosure, the solutions disclosed herein will be further described below. It should be noted that, unless otherwise specified, the embodiments and features described herein can be combined with each other.

[0038] Numerous specific details are set forth in the following description to provide a thorough understanding of this disclosure, but this disclosure may also be implemented in other ways different from those described herein; obviously, the embodiments in the specification are only a part of the embodiments of this disclosure, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0039] The following detailed embodiments are provided to aid the reader in gaining a comprehensive understanding of the methods, apparatus, and / or systems described herein. However, various changes, modifications, and equivalents of the methods, apparatus, and / or systems described herein will become apparent upon understanding this disclosure. For example, the order of operations described herein is merely illustrative and is not limited to those orders set forth herein, but may be changed as will become clear upon understanding this disclosure, except for operations that must occur in a specific order. Furthermore, for the sake of clarity and conciseness, descriptions of features known upon understanding this disclosure may be omitted.

[0040] The features described herein may be implemented in different forms and should not be construed as being limited to the examples described herein. Rather, the examples described herein are provided merely to illustrate some of the many feasible ways of implementing the methods, apparatus, and / or systems described herein that will be clear upon understanding the disclosure of this application.

[0041] Throughout this specification, when a component is described as "connected to" or "attached to" another component, the component may be directly "connected to" or "attached to" the other component, or there may be one or more other components in between. Conversely, when an element is described as "directly connected to" or "directly attached to" another element, there may be no other elements in between. Similarly, similar expressions (e.g., "between" and "immediately between," and "adjacent to" and "closely adjacent to") should be interpreted in the same manner. As used herein, the term "and / or" includes any one of the relevant listed items or any combination of any two or more of the relevant listed items.

[0042] Although terms such as “first,” “second,” and “third” may be used herein to describe various components, assemblies, regions, layers, or parts, these components, assemblies, regions, layers, or parts are not limited by these terms. Rather, these terms are used only to distinguish one component, assembly, region, layer, or part from another. Therefore, without departing from the teaching of the examples described herein, the first component, first assembly, first region, first layer, or first part referred to as the first component, first assembly, first region, first layer, or first part may also be referred to as the second component, second assembly, second region, second layer, or second part.

[0043] The terminology used herein is for the purpose of describing various examples only and is not intended to limit disclosure. Unless the context clearly indicates otherwise, the singular form is intended to include the plural form as well. The terms “comprising,” “including,” and “having” indicate the presence of the features, quantities, operations, components, elements, and / or combinations thereof stated therein, but do not preclude the presence or addition of one or more other features, quantities, operations, components, elements, and / or combinations thereof.

[0044] It should be noted that, unless there is a conflict, the various features in the embodiments of this application can be combined with each other, all of which are within the protection scope of this application. Furthermore, although functional modules are divided in the device schematic diagram and a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in a different order than the module division in the device or the order in the flowchart. Moreover, the terms "first," "second," and "third" used in this application do not limit the data or execution order, but only distinguish identical or similar items with essentially the same function and effect.

[0045] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as understood based on the disclosure of this application and as commonly understood by one of ordinary skill in the art to which this disclosure pertains. Unless expressly defined herein, terms (such as those defined in a general dictionary) shall be interpreted as having the meaning consistent with their meaning in the context of the relevant art and in the disclosure of this application, and shall not be interpreted ideally or overly formally. The use of the term “may” herein with respect to examples or embodiments (e.g., regarding what an example or embodiment may include or implement) indicates the existence of at least one example or embodiment that includes or implements such a feature, while not all examples are limited thereto.

[0046] Since the test models that can be set in the self-test mode of solid-state drives are limited, any new test requirements can only be met by re-importing a new self-test mode.

[0047] In addition, the self-testing memory testing mode is usually only available during hard drive production and is not open to users. If the hard drive malfunctions during subsequent use, users cannot quickly determine whether the problem is caused by a problem with the hard drive memory, which makes it difficult to diagnose hard drive malfunctions.

[0048] To address the aforementioned deficiencies in related technologies, this disclosure provides a solid-state drive (SSD) data read / write method and an SSD. The SSD can flexibly and conveniently control data read / write based on data access requests sent by the host device in various modes. By employing different data read / write strategies in different operating modes, the efficiency of data read / write on the SSD can be improved. Furthermore, in memory testing mode, data read / write operations can be completed without traversing non-volatile storage space, significantly reducing memory testing time and improving memory testing efficiency.

[0049] To better understand the inventive concept of the embodiments of this disclosure, the technical solutions of the embodiments of this disclosure will be described below in conjunction with exemplary embodiments.

[0050] Figure 1This is a flowchart illustrating a solid-state drive (SSD) data read / write method according to an embodiment of this disclosure. This method can be executed by an SSD, such as... Figure 1 As shown, the method provided in this embodiment includes the following steps:

[0051] Step 110: In response to receiving the target mode switching command from the host device, switch the current operating mode to the target mode.

[0052] The host device in this disclosure can be understood as any device with processing and computing capabilities. This device may include, but is not limited to, mobile terminals such as smartphones, laptops, personal digital assistants (PDAs), tablet computers (PADs), portable multimedia players (PMPs), in-vehicle terminals, and wearable devices, as well as fixed electronic devices such as digital TVs, desktop computers, and smart home devices.

[0053] The target mode can be understood as the target operating mode of the solid-state drive (SSD), which can include normal mode or memory test mode. Normal mode can be understood as the operating mode in which the SSD performs normal data read and write operations, while memory test mode can be understood as the operating mode in which the SSD performs data read and write operations on the memory to test stability and reliability.

[0054] In this embodiment of the disclosure, the host device can send a target mode switching command to the solid-state drive, and the control unit in the solid-state drive can switch the current operating mode to the target mode in response to receiving the target mode switching command from the host device.

[0055] Step 120: Receive a data access request for the target mode sent by the host device. The data access request includes the target data to be operated.

[0056] In this embodiment of the disclosure, the data access request of the target mode may include the target data to be operated on and the necessary parameters for performing read / write operations on the target data.

[0057] In some embodiments, a data access request can be an NVMe data read / write command corresponding to the target data. Non-volatile memory express (NVMe) is a logical device interface specification, a bus transmission protocol specification based on the device logical interface (equivalent to the application layer in communication protocols), used to access non-volatile memory media (e.g., solid-state drives using flash memory) attached via a high-speed serial computer expansion bus (peripheral component interconnect express, PCIe). NVMe provides a low-latency, internally concurrent native interface specification for flash-based solid-state drives, reducing input / output (I / O) operation latency, increasing the number of operations performed simultaneously, and supporting larger operation queues. NVMe data read / write commands are data read / write commands based on NVMe transmission.

[0058] In this embodiment of the disclosure, after the solid-state drive switches its current operating mode to the target mode, the host device can send a data access request for the target mode to the solid-state drive. The data access request includes the target data to be operated. The control component in the solid-state drive can receive the data access request for the target mode sent by the host device.

[0059] Step 130: When the target mode is memory test mode, in response to the data access request of memory test mode, perform read / write operations on the target data in the memory space of the solid-state drive.

[0060] In this embodiment, the memory space of the solid-state drive (SSD) is the storage space of the solid-state drive memory (DDR), used for data caching. It can temporarily store read and write data of the SSD and serves as a bridge for data transmission between the control unit and the non-volatile storage space of the SSD, playing a crucial role in the efficiency of hard drive data read and write. Non-volatile storage space can permanently store data, such as the storage space of NAND flash memory.

[0061] In this embodiment of the disclosure, when the target mode is memory test mode, the solid-state drive can respond to the data access request of the memory test mode and perform read / write operations on the target data in the memory space of the solid-state drive.

[0062] Step 140: When the target mode is normal mode, in response to the data access request in normal mode, perform read / write operations on the target data between the non-volatile storage space of the solid-state drive and the memory space.

[0063] In this embodiment of the disclosure, the non-volatile storage space of the solid-state drive can permanently store data, such as the storage space of a NAND flash memory.

[0064] In this embodiment of the disclosure, when the target mode is normal mode, the control unit in the solid-state drive can respond to the data access request in normal mode and perform read / write operations on the target data between the non-volatile storage space and the memory space of the solid-state drive.

[0065] In this embodiment, in response to receiving a target mode switching instruction from a host device, the current operating mode is switched to the target mode; a data access request for the target mode sent by the host device is received, the data access request including the target data to be operated; when the target mode is memory test mode, in response to the data access request for memory test mode, read / write operations on the target data are performed in the memory space of the solid-state drive; when the target mode is normal mode, in response to the data access request for normal mode, read / write operations on the target data are performed between the non-volatile storage space and the memory space of the solid-state drive. The solid-state drive can flexibly and conveniently control the data read and write of the solid-state drive according to the data access requests for each mode sent by the host device. Different data read and write strategies are adopted in different operating modes, which can improve the efficiency of data read and write of the solid-state drive. Furthermore, in memory test mode, data read and write operations can be completed without going through the non-volatile storage space, which can greatly reduce the memory test time and improve the memory test efficiency.

[0066] In some embodiments of this disclosure, when the target mode is memory test mode, in response to a data access request in memory test mode, read / write operations of the target data are performed in the memory space of the solid-state drive (SSD), and the SSD can execute... Figure 2 A flowchart of a solid-state drive (SSD) data read / write method is provided, such as... Figure 2 As shown, the method provided in this embodiment includes the following steps:

[0067] Step 210: When the target mode is memory test mode, determine at least one first logical block address in the memory space of the solid-state drive that stores the target data based on the data access request of the memory test mode.

[0068] In this embodiment of the disclosure, the Logical Block Address (LBA) is a logical location describing the area where data is located on the storage device. The first logical block address can be understood as the logical area location in the memory space of the solid-state drive where the target data is stored.

[0069] In this embodiment of the disclosure, when the target mode is memory test mode, the control unit in the solid-state drive can determine at least one first logical block address storing the target data in the memory space of the solid-state drive based on the data access request of the memory test mode.

[0070] In some embodiments, determining the address of at least one first logical block storing target data in the memory space of the solid-state drive based on a data access request in a memory test mode may include steps 2101-2102:

[0071] Step 2101: Obtain the first starting logical block address corresponding to the read command or write command and the length of the first address interval required to store the target data corresponding to each first starting logical block address from the data access request in the memory test mode.

[0072] In this embodiment of the disclosure, the first Start Logical Block Address (sLBA) can be understood as the starting logical location for storing the target data in the memory space of the solid-state drive (SSD). The first address range length can be understood as the address range length required to store the target data corresponding to the first start logical block address in the memory space of the SSD.

[0073] In this embodiment of the disclosure, the solid-state drive can obtain the first starting logical block address corresponding to the read command or write command and the length of the first address interval required to store the target data corresponding to each first starting logical block address from the data access request in the memory test mode.

[0074] Step 2102: Generate at least one first logical block address based on at least one first starting logical block address and the length of the first address range.

[0075] In this embodiment of the disclosure, the control unit in the solid-state drive can generate at least one first logical block address based on at least one first starting logical block address and a first address interval length.

[0076] Step 220: Based on the conversion relationship between logical block addresses in memory space and physical addresses in memory space, convert each first logical block address into a first physical address in memory space.

[0077] In this embodiment of the disclosure, the first physical address is the physical address of the memory space, that is, the physical memory address (PMA), which can be understood as the physical location of the memory area in the solid-state drive.

[0078] The control unit in a solid-state drive can convert the address of each first logical block into the first physical address in memory based on the translation relationship between the address of a logical block in memory and the physical address in memory.

[0079] In some embodiments, the conversion relationship can be that the logical block address in the memory space is the same as the physical address in the memory space; in other embodiments, the conversion relationship can be that there is a mapping or functional relationship between the logical block address in the memory space and the physical address in the memory space.

[0080] Step 230: Perform read / write operations on the target data in the target memory space pointed to by the first physical address.

[0081] In this embodiment of the disclosure, the solid-state drive can perform read / write operations on target data in the target memory space pointed to by the first physical address.

[0082] In some embodiments, the solid-state drive can read target data from the target memory space pointed to by the first physical address.

[0083] In other embodiments, the solid-state drive (SSD) can write target data from the host device to the target memory space pointed to by a first physical address using Direct Memory Access (DMA). DMA is a feature provided by computer bus architecture that allows data to be transferred between additional devices (such as SSDs) and the computer motherboard's memory.

[0084] Therefore, solid-state drives (SSDs) can perform data read and write operations in memory space in memory test mode, which can greatly reduce memory test time and improve memory test efficiency. In addition, SSDs can flexibly and conveniently control data read and write operations based on data access requests issued by the host device in various modes.

[0085] In some embodiments of this disclosure, when the target mode is memory test mode, in response to the data access request of memory test mode, after performing read / write operations on the target data in the memory space of the solid-state drive, the solid-state drive may also respond to the mode recovery command received from the host device to restore the memory test mode to normal mode.

[0086] In some embodiments of this disclosure, when the target mode is normal mode, in response to a data access request in normal mode, read / write operations of the target data are performed between the non-volatile storage space and the memory space of the solid-state drive (SSD), and the SSD can perform... Figure 3 A flowchart of a solid-state drive (SSD) data read / write method is provided, such as... Figure 3 As shown, the method provided in this embodiment includes the following steps:

[0087] Step 310: When the target mode is normal mode, determine at least one second logical block address storing the target data in the non-volatile storage space of the solid-state drive based on the data access request in normal mode.

[0088] In this embodiment of the disclosure, the second logical block address can be understood as the location of the logical region storing the target data in the non-volatile storage space of the solid-state drive.

[0089] When the target mode is normal mode, the solid-state drive can determine the address of at least one second logical block storing the target data in the non-volatile storage space of the solid-state drive based on the data access request in normal mode.

[0090] In some embodiments, determining the address of at least one second logical block storing the target data in the non-volatile storage space of the solid-state drive based on a normal mode data access request may include steps 3101-3102:

[0091] Step 3101: Obtain the second starting logical block address corresponding to the read command or write command and the length of the second address interval required to store the target data corresponding to each second starting logical block address from the data access request in normal mode.

[0092] In this embodiment of the disclosure, the second starting logical block address can be understood as the starting logical location for storing the target data in the non-volatile storage space of the solid-state drive. The second address range length can be understood as the address range length required to store the target data corresponding to the second starting logical block address in the non-volatile storage space of the solid-state drive.

[0093] In this embodiment of the disclosure, the solid-state drive can obtain the second starting logical block address corresponding to the read command or write command and the length of the second address interval required to store the target data corresponding to each second starting logical block address from the data access request in normal mode.

[0094] Step 3102: Generate at least one second logical block address based on at least one second starting logical block address and the second address interval length.

[0095] In this embodiment of the disclosure, the control unit in the solid-state drive can generate at least one second logical block address based on at least one second starting logical block address and a second address interval length.

[0096] Step 320: Based on the mapping relationship between logical block addresses and physical addresses of non-volatile memory spaces in the flash memory translation table, determine the second physical address of the non-volatile memory space corresponding to each second logical block address.

[0097] In this embodiment of the disclosure, the Flash Translation Layer (FTL) can be understood as a mapping relationship between the address of each second logical block stored in the solid-state drive and a physical address in the non-volatile storage space of the hard drive. The Flash Translation Layer can be stored in the non-volatile storage space or memory space of the solid-state drive.

[0098] The second physical address is the physical block address (PBA) of the non-volatile storage space of the hard drive, which can be understood as the physical location of the non-volatile storage space of the solid-state drive.

[0099] In this embodiment of the disclosure, the solid-state drive can determine the second physical address of the non-volatile storage space corresponding to each second logical block address based on the mapping relationship between logical block addresses and physical addresses of non-volatile storage space in the flash memory translation table.

[0100] Step 330: Perform read / write operations on the target data between the target non-volatile storage space and the memory space pointed to by the second physical address.

[0101] In this embodiment of the disclosure, the solid-state drive can perform read / write operations on the target data between the target non-volatile storage space pointed to by the second physical address and the memory space of the solid-state drive.

[0102] In some embodiments, the solid-state drive can read target data from the target non-volatile storage space pointed to by the second physical address and send the read target data to the solid-state drive's memory space.

[0103] In other embodiments, writing the target data between the target non-volatile storage space and the memory space pointed to by the second physical address may include steps 3301-3303:

[0104] Step 3301: Allocate temporary cache space for the target data in memory space.

[0105] In this embodiment of the disclosure, the solid-state drive can allocate temporary cache space for the target data in the memory space.

[0106] Step 3302: Based on the direct memory access method, send the target data in the host to the temporary cache space in the memory space.

[0107] In this embodiment of the disclosure, the solid-state drive can send target data from the host to a temporary cache space in the memory space based on the direct memory access method.

[0108] Step 3303: Write the target data in the temporary cache space to the target non-volatile storage space pointed to by the second physical address.

[0109] In this embodiment of the disclosure, the solid-state drive (SSD) can write target data from the temporary cache space to the target non-volatile storage space pointed to by the second physical address. Thus, the operation of writing target data to the non-volatile storage space of the SSD can be completed.

[0110] Therefore, in normal mode, solid-state drives (SSDs) can perform data read and write operations between their non-volatile storage space and memory space, which can improve the efficiency of data read and write operations. Furthermore, SSDs can flexibly and conveniently control data read and write operations based on data access requests issued by the host device for various modes.

[0111] In some embodiments of this disclosure, in normal mode, the solid-state drive (SSD) can save the flash memory translation table to the non-volatile storage space of the SSD in response to receiving a mode switching instruction to switch the current operating mode to memory test mode.

[0112] In some other embodiments of this disclosure, in normal mode, the solid-state drive (SSD) can save the flash translation table to the SSD's memory space; in response to detecting an abnormal power loss of the SSD, the SSD can save the flash translation table in the memory space to the SSD's non-volatile storage space.

[0113] This avoids the loss of flash memory translation tables.

[0114] In some embodiments of this disclosure, when the target mode is a memory test mode, target data read / write operations are performed in the memory space of the solid-state drive (SSD); or when the target mode is a normal mode, target data read / write operations are performed between the non-volatile storage space and the memory space of the SSD. After the SSD completes the target data read / write operation, it can generate a target data read / write result and save the result to a log file in the non-volatile storage space. Then, the read / write result or the log file is sent to the host device. This allows the host device to obtain information about data read / write operations on the SSD.

[0115] Using a solid-state drive as the execution unit, the data access request processing procedures in different modes are shown in Examples 1 to 6, as detailed below:

[0116] Example 1: Processing read commands in normal mode of a solid-state drive

[0117] S11. The solid-state drive receives a data access request (i.e., a read command). The read command (NVMe Read) is generated by the host device. The read command carries the second starting logical block address sLBA and the second address range length Length, and the host memory space described by the physical region page PRP or the hash list SGL, which is used to hold the read data.

[0118] A PRP (Physical Region Page) is a simple descriptor that specifies the address and length of a segment of physical memory. The host can specify the target location for data transfer by allocating memory to the PRP, and the solid-state drive (SSD) writes the read data to this memory using Direct Memory Access (DMA).

[0119] Scatter-Gather List (SGL) allows a host device to specify multiple non-contiguous memory regions as data transfer buffers, assigning an address and length to each region. In a read command, an SGL typically consists of multiple descriptors, each describing the address and length of a memory region. Solid-state drives (SSDs) use Direct Memory Access (DMA) to write read data to these memory regions for efficient data transfer.

[0120] It's important to note that both PRP and SGL are host-specified buffers, and the host must ensure that these buffers remain valid throughout data transmission. An invalid buffer will lead to data transmission errors. Therefore, when using PRP and SGL for data transmission, the host needs to manage and maintain these buffers to ensure the correctness and reliability of data transmission.

[0121] S12. The solid-state drive extracts the second starting logical block address sLBA and the second address interval length Length from the received data access request (i.e., read command), generates one or more second logical block addresses LBA, and uses the generated second logical block addresses to query the flash translation table FTL table to obtain the second physical address PBA of the non-volatile storage space (e.g., NAND) corresponding to each second logical block address.

[0122] S13. The solid-state drive accesses the target non-volatile storage space pointed to by the second physical address PBA, reads the target data from the target non-volatile storage space, and sends the read target data to the host memory space through direct memory access (DMA). The target location of the target data in the host memory space is determined by the PRP or SGL associated with the read command.

[0123] S14. The solid-state drive sends a data access request (i.e., read command) to the host device, indicating that the processing is complete.

[0124] Example 2: Switching the operating mode of a solid-state drive

[0125] S21. The solid-state drive receives the target mode switching command sent by the host device.

[0126] S22. The solid-state drive parses the target mode switching command and finds that the target mode is memory test mode. The solid-state drive can then switch the current running mode to memory test mode.

[0127] S23. Solid-state drives save the current state data of memory space (such as FTL table) to non-volatile storage space (such as NAND).

[0128] In some embodiments, the solid-state drive (SSD) can clear the memory space. That is, when the SSD is in normal mode, the FTL table is stored in a designated space in the memory space. Before the SSD is powered off, the entire FTL table needs to be written to the non-volatile storage space for permanent storage.

[0129] S24. The solid-state drive sends a command to the host device indicating that the mode switch is complete.

[0130] S25. When the SSD restarts, if the SSD is set to memory test mode, the saved memory space status data will not be loaded; if the SSD is set to normal mode, the previously saved memory space status data (such as the FTL table) will be loaded. That is, after the SSD powers on and restarts, the FTL table will be read from the non-volatile storage space and restored to the specified space in the memory space.

[0131] Example 3: Processing read commands in solid-state drive memory test mode

[0132] S31. The solid-state drive receives a data access request (i.e., a read command). The read command (NVMe Read) is generated by the host device. The read command carries the first starting logical block address sLBA and the first address range length Length. The host memory space described by the physical region page PRP or the hash table SGL is used to hold the read data.

[0133] S32. The solid-state drive extracts the first starting logical block address sLBA and the first address range length Length from the received data access request (i.e., read command), generates one or more first logical block addresses LBA, and converts each first logical block address LBA into the first physical address PMA of the hard disk's memory space.

[0134] In some embodiments, the logical block address (LBA) can be the same as the first physical address (PMA), and the logical block address (LBA) can be used as the first physical address (PMA) of the memory space.

[0135] In other embodiments, there is a mapping (function) relationship between the logical block address LBA and the first physical address PMA. Based on the mapping (function) relationship, the logical block address LBA can be converted into the first physical address PMA of the memory space.

[0136] S33. The solid-state drive accesses the target memory space pointed to by the first physical address PMA, reads the target data from the target memory space, and sends the read target data to the host memory space through direct memory access (DMA). The target location of the target data in the host memory space is determined by the PRP or SGL associated with the read command.

[0137] S34, The solid-state drive sends a data access request (i.e., read command) to the host device, and the processing is complete.

[0138] In some embodiments, if the solid-state drive fails to read data from the physical address PMA in the memory space into the host memory space, the data read failure result is recorded in the log file, and a data access request (i.e., read command) is sent to the host device to handle the failure.

[0139] Example 4: Processing write commands in normal mode of a solid-state drive

[0140] S41. The solid-state drive receives a data access request (i.e., a write command). The write command (NVMe Write) is generated by the host device. The write command carries the second starting logical block address sLBA and the second address range length Length, and the host memory space described by the physical region page PRP or the hash list SGL, which is used to accommodate the data to be written.

[0141] S42. The solid-state drive extracts the second starting logical block address sLBA and the second address interval length Length from the received data access request (i.e., read command), generates one or more second logical block addresses LBA, allocates a second physical address PBA of non-volatile storage space for each generated second logical block address LBA, and records the correspondence between the second logical block address LBA and the second physical address PBA of the allocated non-volatile storage space in the FTL table.

[0142] S43. The solid-state drive allocates temporary cache space in the hard drive's memory space, and moves target data from the host memory space described by PRP or SGL to the temporary cache space of the hard drive's memory space through direct memory access (DMA).

[0143] S44. The solid-state drive accesses the target non-volatile storage space pointed to by the second physical address PBA and writes the target data in the temporary cache space of the memory space into the target non-volatile storage space pointed to by the second physical address PBA.

[0144] S45, The solid-state drive sends a data access request (i.e., write command) to the host device, indicating that the processing is complete.

[0145] Example 5: Processing write commands in solid-state drive memory test mode

[0146] S51. The solid-state drive receives a data access request (i.e., a read command). The read command (NVMe Read) is generated by the host device. The read command carries the first starting logical block address sLBA and the first address range length Length. The host memory space described by the physical region page PRP or the hash table SGL is used to hold the data to be written.

[0147] S52. The solid-state drive extracts the first starting logical block address sLBA and the first address range length Length from the received data access request (i.e., write command), generates one or more first logical block addresses LBA, and converts each first logical block address LBA into the first physical address PMA in the memory space.

[0148] S53: The solid-state drive reads the target data from the host memory space described by PRP or SGL through direct memory access (DMA) and writes the read target data to the target memory space of the hard drive pointed to by the first physical address PMA.

[0149] S54, the solid-state drive sends a data access request (i.e., write command) to the host device, indicating that the processing is complete.

[0150] In some embodiments, if the solid-state drive fails to write data from the host memory space to the hard disk memory space, the failure result is recorded in a log file, and a data access request (i.e., a write command) is sent to the host device to handle the failure.

[0151] Example 6: Solid State Drive Sending Log Files

[0152] S61. The solid-state drive receives a log file retrieval command sent by the host device.

[0153] S62, Solid State Drive Log File Parsing and Acquisition Command, determines the target log file that the host device needs to acquire.

[0154] S63, the solid-state drive sends the target log file to the host device.

[0155] Therefore, solid-state drives (SSDs) can flexibly and conveniently control data read and write operations based on data access requests sent by the host device in various modes. By adopting different data read and write strategies in different operating modes, the efficiency of SSD data read and write operations can be improved. Furthermore, in memory test mode, data read and write operations can be completed without going through non-volatile storage space, which can greatly reduce memory test time and improve memory test efficiency.

[0156] Figure 4 This is a flowchart illustrating a solid-state drive (SSD) data read / write method according to an embodiment of this disclosure. This method can be executed by a host device, such as... Figure 4 As shown, the method provided in this embodiment includes the following steps:

[0157] Step 410: In response to the setting operation of the solid-state drive operating mode, generate a target mode switching command.

[0158] In this embodiment of the disclosure, when it is necessary to switch the operating mode of the solid-state drive, the user can set the operating mode of the solid-state drive in the host device, such as by clicking or sliding the target mode button. The host device can respond to the setting operation of the solid-state drive operating mode and generate a target mode switching command.

[0159] Step 420: Send the target mode switching command to the solid-state drive so that the solid-state drive can switch the target mode based on the target mode switching command.

[0160] In this embodiment of the disclosure, after generating the target mode switching instruction, the host device can send the target mode switching instruction to the solid-state drive so that the solid-state drive can switch the target mode based on the target mode switching instruction.

[0161] Step 430: In response to receiving the target mode switching completion instruction from the solid-state drive (SSD), a target mode data access request is sent to the SSD. The data access request includes the target data to be operated on, so that when the target mode is memory test mode, the SSD can perform read / write operations on the target data in the memory space of the SSD in response to the data access request of memory test mode, or when the target mode is normal mode, the SSD can perform read / write operations on the target data between the non-volatile storage space and the memory space of the SSD in response to the data access request of normal mode.

[0162] In this embodiment of the disclosure, after the solid-state drive (SSD) switches its current operating mode to the target mode based on the target mode switching instruction, it can send a target mode switching completion instruction to the host device. In response to receiving the target mode switching completion instruction from the SSD, the host device can send a target mode data access request to the SSD. The data access request includes the target data to be operated on, so that when the target mode is memory test mode, the SSD can respond to the data access request of memory test mode to perform read / write operations on the target data in the memory space of the SSD, or when the target mode is normal mode, the SSD can respond to the data access request of normal mode to perform read / write operations on the target data between the non-volatile storage space and the memory space of the SSD.

[0163] Specifically, when the target mode is memory test mode, the data access request in memory test mode may include at least one first starting logical block address in the hard disk memory space of the solid-state drive to store the target data and the length of the first address interval required to store the target data corresponding to each first starting logical block address.

[0164] When the target mode is normal mode, the data access request in normal mode may include at least one second starting logical block address in the non-volatile storage space of the solid-state drive for storing the target data, and the length of the second address interval required to store the target data corresponding to each second starting logical block address.

[0165] In this embodiment of the disclosure, the host device sends data access requests for various modes to the solid-state drive (SSD) according to actual needs. This allows for flexible and convenient control of SSD data read / write operations, improving the efficiency of SSD data read / write. The SSD performs data read / write operations based on the data access requests, employing different data read / write strategies in different operating modes to further enhance the efficiency of SSD data read / write. Furthermore, in memory test mode, data read / write operations can be completed without traversing non-volatile storage space, significantly reducing memory test time and improving memory test efficiency.

[0166] In some embodiments of this disclosure, after receiving a target mode switching completion instruction from the solid-state drive (SSD) and sending a target mode data access request to the SSD, the host device can determine whether the memory operation status of the SSD is normal based on the data fed back by the SSD.

[0167] In some embodiments, the host device can receive read data of target data sent by the solid-state drive (SSD) and compare the difference between the read data and the target data. Based on this difference, it can determine whether the SSD's memory operation status is normal. For example, when the difference between the read data and the target data is greater than a preset range, it can be determined that the SSD's memory operation status is abnormal; when the difference between the read data and the target data is less than or equal to the preset range, it can be determined that the SSD's memory operation status is normal. The preset range can be set as needed and is not specifically limited here.

[0168] In other embodiments, the host device may send a log file retrieval instruction to the solid-state drive (SSD), the log file retrieval instruction may include a file identifier corresponding to the read / write result of the target data; receive the target log file corresponding to the file identifier returned by the SSD based on the log file retrieval instruction; and determine whether the memory operation status of the SSD is normal based on the target log file.

[0169] The target log file can include read / write results of the target data, including read / write addresses. For example, if abnormal read / write results of the target data exist in the target log file, the host device can determine that the SSD's memory operation is abnormal. Based on the abnormal read / write addresses included in the abnormal read / write results, the host device can adjust the data access requests in the target mode, causing the SSD to re-perform the read / write operation of the target data at the abnormal read / write addresses.

[0170] The process of handling data access requests in different modes, with the host device as the execution entity, is described in Example 7 below:

[0171] Example 7: Host device performs memory test on solid-state drive

[0172] S71. The host device generates a target mode switching instruction with the target mode set to memory test mode, and sends the target mode switching instruction to the solid-state drive so that the solid-state drive switches its current operating mode to memory test mode.

[0173] In some embodiments, the host device can control the solid-state drive to restart.

[0174] In other embodiments, the host device may send a capacity request to the solid-state drive (SSD) so that the SSD returns its capacity to the host device based on the capacity request.

[0175] S72. The host device obtains the test model for solid-state drive memory testing and maps the test model to the memory space of the solid-state drive to be tested, that is, determines the physical address range of the memory space of the solid-state drive corresponding to the test model.

[0176] S73. The host device generates one or more data access requests (read commands or write commands) based on the test model. The first starting logical block address sLBA and the first address range length Length in the data access request come from the memory address under test used in the test model. The PRP or SGL in the data access request comes from the host memory space that describes the data required to store the test model.

[0177] S74. The host device sends the generated data access request to the solid-state drive (SSD) so that the SSD can write the target data in the host memory space to the SSD's memory space or read the target data in the SSD's memory space to the host memory space based on the data access request.

[0178] S75. In response to the completion of the solid-state drive memory test, the host device sends a target mode switching command from the target mode to the normal mode to the solid-state drive, so that the solid-state drive switches the memory test mode to the normal mode.

[0179] Therefore, it is possible to flexibly and conveniently control the data read and write of solid-state drives (SSDs), and adopt different data read and write strategies in different operating modes. This can improve the efficiency of data read and write of SSDs. Furthermore, in memory test mode, data read and write operations can be completed without going through non-volatile storage space, which can greatly reduce memory test time and improve memory test efficiency.

[0180] In some embodiments, the host device can receive read data of target data sent by the solid-state drive, compare the difference between the read data and the target data, and determine whether the memory operation status of the solid-state drive is normal based on the difference.

[0181] In other embodiments, the host device can send a log file retrieval command to the solid-state drive (SSD), the log file retrieval command contains a file identifier corresponding to the read / write result of the target data, the host device receives the target log file corresponding to the file identifier returned by the SSD based on the log file retrieval command, and the host device determines whether the memory operation status of the SSD is normal based on the target log file.

[0182] Figure 5 This is a schematic diagram of a data transmission path provided in an embodiment of this disclosure, such as... Figure 5 As shown, data transfer between the solid-state drive (SSD) and the host device occurs via the SSD's PCIe interface and NVMe commands. For data in the SSD's DDR memory, non-volatile storage, or log file, NVMe commands are parsed and processed to convert the data into NVMe commands, which are then sent to the host device via the PCIe interface. Conversely, for data on the host device, the data is converted into NVMe commands, sent to the SSD via the PCIe interface for NVMe command parsing and processing, and finally, the data is sent to the SSD's DDR memory, non-volatile storage, or log file. This enables data transfer between the SSD and the host device.

[0183] Figure 6 This is a schematic diagram of a solid-state drive (SSD) data read / write device provided in an embodiment of this disclosure. This device can be understood as the aforementioned SSD or a portion of the functional modules within the aforementioned SSD. For example... Figure 6 As shown, the solid-state drive data read / write device 600 may include:

[0184] The switching module 610 is used to switch the current operating mode to the target mode in response to receiving a target mode switching command from the host device;

[0185] The first receiving module 620 is used to receive a data access request for a target mode sent by the host device, the data access request including the target data to be operated;

[0186] The first read / write module 630 is used to perform read / write operations on target data in the memory space of the solid-state drive in response to data access requests in the memory test mode when the target mode is memory test mode.

[0187] The second read / write module 640 is used to perform read / write operations on target data between the non-volatile storage space of the solid-state drive and the memory space in response to data access requests in the normal mode when the target mode is normal mode.

[0188] Optionally, the first read / write module 630 mentioned above includes:

[0189] The first determining submodule is used to determine, based on the data access request of the memory test mode, at least one first logical block address in the memory space of the solid-state drive that stores the target data when the target mode is memory test mode.

[0190] The conversion submodule is used to convert each first logical block address into the first physical address in memory space based on the conversion relationship between logical block addresses in memory space and physical addresses in memory space.

[0191] The first read / write submodule is used to perform read / write operations on the target data in the target memory space pointed to by the first physical address.

[0192] Optionally, the second read / write module 640 mentioned above includes:

[0193] The second determining submodule is used to determine, based on the data access request in the normal mode, at least one second logical block address in the non-volatile storage space of the solid-state drive that stores the target data when the target mode is normal mode.

[0194] The third determining submodule is used to determine the second physical address of the non-volatile memory space corresponding to each second logical block address based on the mapping relationship between logical block addresses and physical addresses of non-volatile memory space in the flash memory translation table.

[0195] The second read / write submodule is used to perform read / write operations on the target data between the target non-volatile storage space and the memory space pointed to by the second physical address.

[0196] Optionally, the first determined submodule includes:

[0197] The first acquisition unit is used to acquire the first starting logical block address corresponding to the read command or write command and the length of the first address interval required to store the target data corresponding to each first starting logical block address from the data access request of the memory test mode.

[0198] The first generation unit is used to generate at least one first logical block address based on at least one first starting logical block address and a first address range length.

[0199] Optionally, the first read / write submodule mentioned above includes:

[0200] The first read unit is used to read target data from the target memory space pointed to by the first physical address;

[0201] Alternatively, the first write unit is used to write target data from the host device to the target memory space pointed to by the first physical address based on the direct memory access method.

[0202] Optionally, the second determining submodule mentioned above includes:

[0203] The second acquisition unit is used to acquire the second starting logical block address corresponding to the read command or write command and the length of the second address interval required to store the target data corresponding to each second starting logical block address from the data access request in normal mode.

[0204] The second generation unit is used to generate at least one second logical block address based on at least one second starting logical block address and the second address interval length.

[0205] Optionally, the second read / write submodule mentioned above includes:

[0206] The second read unit is used to read target data from the target non-volatile storage space pointed to by the second physical address and send the read target data to the memory space.

[0207] Optionally, the second read / write submodule mentioned above includes:

[0208] The second allocation unit is used to allocate temporary cache space for the target data in memory space;

[0209] The third sending unit is used to send the target data in the host to the temporary cache space in the memory space based on the direct memory access method;

[0210] The second write unit is used to write the target data in the temporary cache space to the target non-volatile storage space pointed to by the second physical address.

[0211] Optionally, the above-mentioned solid-state drive data read / write device 600 includes:

[0212] The first saving module is used in normal mode to save the flash conversion table to the non-volatile storage space of the solid-state drive in response to receiving a mode switching instruction that switches the current running mode to memory test mode.

[0213] Alternatively, a second storage module is used to save the flash translation table to the solid-state drive's memory space in normal mode;

[0214] The third storage module is used to save the flash translation table in memory to the non-volatile storage space of the solid-state drive in response to the detection of an abnormal power failure.

[0215] Optionally, the above-mentioned solid-state drive data read / write device 600 includes:

[0216] The generation module is used to generate the read / write result of the target data in response to the completion of the read / write operation of the target data, and save the read / write result to the log file of the non-volatile storage space on the hard disk;

[0217] The sending module is used to send read / write results or log files to the host device.

[0218] The solid-state drive data read / write device 600 provided in this embodiment can achieve the above-mentioned... Figures 1-3 The methods of any embodiment are similar in their execution and beneficial effects, and will not be described again here.

[0219] Figure 7 This is a schematic diagram of a solid-state drive data read / write device provided in an embodiment of this disclosure. This device can be understood as the aforementioned host device or a functional module within the aforementioned host device. For example... Figure 7 As shown, the solid-state drive data read / write device 700 may include:

[0220] The instruction generation module 710 is used to generate a target mode switching instruction in response to the setting operation of the solid-state drive's operating mode.

[0221] The first instruction sending module 720 is used to send the target mode switching instruction to the solid-state drive so that the solid-state drive can switch the target mode based on the target mode switching instruction;

[0222] The second instruction sending module 730 is used to send a target mode data access request to the solid-state drive in response to receiving a target mode switching completion instruction from the solid-state drive. The data access request includes the target data to be operated on, so that when the target mode is memory test mode, the solid-state drive can perform read / write operations on the target data in the memory space of the solid-state drive in response to the data access request of memory test mode, or when the target mode is normal mode, the solid-state drive can perform read / write operations on the target data between the non-volatile storage space and the memory space of the solid-state drive in response to the data access request of normal mode.

[0223] Optionally, when the target mode is memory test mode, the data access request in memory test mode includes at least one first starting logical block address in the memory space of the solid-state drive to store the target data and the length of the first address interval required to store the target data corresponding to each first starting logical block address;

[0224] Optionally, when the target mode is normal mode, the data access request in normal mode includes at least one second starting logical block address in the non-volatile storage space of the solid-state drive for storing the target data and the length of the second address interval required to store the target data corresponding to each second starting logical block address.

[0225] Optionally, the aforementioned solid-state drive data read / write device 700 may include:

[0226] The second receiving module is used to receive read data of the target data sent by the solid-state drive;

[0227] The comparison module is used to compare the differences between the read data and the target data;

[0228] The first state determination module is used to determine whether the memory operation status of the solid-state drive is normal based on the differences.

[0229] Alternatively, the third instruction sending module is used to send a log file retrieval instruction to the solid-state drive. The log file retrieval instruction includes the file identifier corresponding to the read / write result of the target data.

[0230] The third receiving module is used to receive the target log file corresponding to the file identifier returned by the solid-state drive based on the log file acquisition command;

[0231] The second state determination module is used to determine whether the memory operation status of the solid-state drive is normal based on the target log file.

[0232] The solid-state drive data read / write device 700 provided in this embodiment can achieve the above-mentioned... Figure 4 The methods of any embodiment are similar in their execution and beneficial effects, and will not be described again here.

[0233] This disclosure also provides a solid-state drive (SSD) including a control unit and a memory, wherein the memory stores a computer program, and when the computer program is executed by the control unit, it can achieve the above-mentioned functions. Figures 1-3 The methods of any embodiment are similar in their execution and beneficial effects, and will not be described again here.

[0234] This disclosure also provides a host device, which includes a processor and a memory, wherein the memory stores a computer program, and when the computer program is executed by the processor, it can perform the above-described functions. Figure 4The methods of any embodiment are similar in their execution and beneficial effects, and will not be described again here.

[0235] This disclosure provides a non-volatile computer-readable storage medium storing a computer program. When the computer program is executed by a processor, it can implement the methods of any of the above embodiments. The execution method and beneficial effects are similar, and will not be described again here.

[0236] The aforementioned computer-readable storage medium may be any combination of one or more readable media. A readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may, for example, include, but is not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatuses, or devices, or any combination thereof. More specific examples of readable storage media (a non-exhaustive list) include: electrical connections having one or more wires, portable disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0237] The computer program described above can be written in any combination of one or more programming languages ​​to perform the operations of the embodiments of this disclosure. The programming languages ​​include object-oriented programming languages ​​such as Java and C++, as well as conventional procedural programming languages ​​such as C or similar languages. The program code can be executed entirely on the user's computer device, partially on the user's device, as a standalone software package, partially on the user's computer device and partially on a remote computer device, or entirely on a remote computer device or server.

[0238] The apparatus or device embodiments described above are merely illustrative. The unit module blocks described as separate components may or may not be physically separated. The components shown as module block units may or may not be physical units; that is, they may be located in one place or distributed across multiple network module block units. Some or all of the module blocks can be selected to achieve the purpose of this embodiment according to actual needs.

[0239] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented using software plus a general-purpose hardware platform, or of course, using hardware. Based on this understanding, the above technical solutions, in essence or the parts that contribute to the related technology, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., including several instructions for a computer device (which may be a personal computer, server, or network device, etc.) to execute the various embodiments or some parts of the embodiments.

[0240] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and not to limit them; under the concept of this application, the technical features of the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations of different aspects of this application as described above. For the sake of brevity, they are not provided in detail; although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A method for reading and writing data on a solid-state drive, characterized in that, include: In response to receiving a target mode switching command from the host device, the current operating mode is switched to the target mode; Receive a data access request for the target mode sent by the host device, wherein the data access request includes the target data to be operated; When the target mode is memory test mode, in response to the data access request of the memory test mode, read / write operations of the target data are performed in the memory space of the solid-state drive; When the target mode is normal mode, in response to a data access request in normal mode, read / write operations of the target data are performed between the non-volatile storage space and memory space of the solid-state drive; When the target mode is memory test mode, in response to a data access request in the memory test mode, read / write operations on the target data are performed in the memory space of the solid-state drive, including: When the target mode is memory test mode, based on the data access request of the memory test mode, determine at least one first logical block address in the memory space of the solid-state drive that stores the target data; Based on the conversion relationship between logical block addresses and physical addresses in memory space, each first logical block address is converted into a first physical address in the memory space; Perform read / write operations on the target data in the target memory space pointed to by the first physical address; The data access request based on the memory test mode, determining at least one first logical block address in the memory space of the solid-state drive storing the target data, includes: From the data access request of the memory test mode, obtain the first starting logical block address corresponding to the read command or write command, and the length of the first address interval required to store the target data corresponding to each first starting logical block address; At least one first logical block address is generated based on the at least one first starting logical block address and the length of the first address interval.

2. The method according to claim 1, characterized in that, When the target mode is normal mode, in response to a data access request in normal mode, the read / write operation of the target data is performed between the non-volatile storage space and the memory space of the solid-state drive, including: When the target mode is normal mode, based on the data access request of the normal mode, determine at least one second logical block address in the non-volatile storage space of the solid-state drive that stores the target data; Based on the mapping relationship between logical block addresses and physical addresses of non-volatile memory spaces in the flash memory translation table, the second physical address of the non-volatile memory space corresponding to each second logical block address is determined; The target data is read / written between the target non-volatile storage space pointed to by the second physical address and the memory space.

3. The method according to claim 1, characterized in that, The step of performing read / write operations on target data in the target memory space pointed to by the first physical address includes: Read the target data from the target memory space pointed to by the first physical address; Alternatively, based on the direct memory access method, the target data in the host device is written into the target memory space pointed to by the first physical address.

4. The method according to claim 2, characterized in that, When the target mode is normal mode, determining at least one second logical block address storing the target data in the non-volatile storage space of the solid-state drive based on the data access request of the target mode includes: From the data access request in the normal mode, obtain the second starting logical block address corresponding to the read command or write command, and the length of the second address interval required to store the target data corresponding to each second starting logical block address; At least one second logical block address is generated based on the at least one second starting logical block address and the length of the second address interval.

5. The method according to claim 2, characterized in that, The step of reading the target data between the target non-volatile storage space pointed to by the second physical address and the memory space includes: The target data is read from the target non-volatile storage space pointed to by the second physical address, and the read target data is sent to the memory space.

6. The method according to claim 2, characterized in that, The step of writing the target data between the target non-volatile storage space pointed to by the second physical address and the memory space includes: Allocate temporary cache space for the target data in the memory space; Based on the direct memory access method, the target data in the host is sent to the temporary cache space of the memory space; The target data in the temporary cache space is written to the target non-volatile storage space pointed to by the second physical address.

7. The method according to any one of claims 1-6, characterized in that, The method further includes: In normal mode, in response to receiving a mode switching command to switch the current operating mode to memory test mode, the flash memory translation table is saved to the non-volatile storage space of the solid-state drive; or In normal mode, the flash translation table is saved to the memory space of the solid-state drive; In response to the detection of an abnormal power outage, the flash translation table in the memory space is saved to the non-volatile storage space of the solid-state drive.

8. The method according to any one of claims 1-6, characterized in that, The method further includes: In response to the completion of the read / write operation on the target data, the read / write result of the target data is generated and the read / write result is saved to the log file of the non-volatile storage space; The read / write results or the log file are sent to the host device.

9. A method for reading and writing data on a solid-state drive, characterized in that, include: In response to the setting operation of the solid-state drive's operating mode, a target mode switching command is generated; The target mode switching command is sent to the solid-state drive so that the solid-state drive can switch the target mode based on the target mode switching command; In response to receiving the target mode switching completion instruction of the solid-state drive, a data access request for the target mode is sent to the solid-state drive. The data access request includes the target data to be operated on, so that when the target mode is memory test mode, the solid-state drive can perform read / write operations on the target data in the memory space of the solid-state drive in response to the data access request of the memory test mode, or when the target mode is normal mode, the solid-state drive can perform read / write operations on the target data between the non-volatile storage space and the memory space of the solid-state drive in response to the data access request of the normal mode. When the target mode is memory test mode, the data access request of the memory test mode includes at least one first starting logical block address in the memory space of the solid-state drive to store the target data and the length of the first address interval required to store the target data corresponding to each first starting logical block address; When the target mode is normal mode, the data access request in normal mode includes at least one second starting logical block address in the non-volatile storage space of the solid-state drive where the target data is stored, and the length of the second address interval required to store the target data corresponding to each second starting logical block address.

10. The method according to claim 9, characterized in that, The method further includes: Receive read data of the target data sent by the solid-state drive; Compare the differences between the read data and the target data; Based on the differences, determine whether the memory operation status of the solid-state drive is normal; Alternatively, a log file retrieval instruction may be sent to the solid-state drive, wherein the log file retrieval instruction includes the file identifier corresponding to the read / write result of the target data; Receive the target log file corresponding to the file identifier returned by the solid-state drive based on the log file retrieval instruction; Based on the target log file, determine whether the memory operation status of the solid-state drive is normal.

11. A solid-state drive data read / write device, characterized in that, include: The switching module is used to switch the current operating mode to the target mode in response to receiving a target mode switching command from the host device; The first receiving module is configured to receive a data access request for the target mode sent by the host device, wherein the data access request includes target data to be operated; The first read / write module is used to perform read / write operations on the target data in the memory space of the solid-state drive in response to the data access request when the target mode is memory test mode. The second read / write module is used to perform read / write operations on the target data between the non-volatile storage space and the memory space of the solid-state drive in response to the data access request when the target mode is normal mode. The first read / write module includes: The first determining submodule is used to determine, based on the data access request of the memory test mode, at least one first logical block address in the memory space of the solid-state drive that stores the target data when the target mode is memory test mode. The conversion submodule is used to convert each first logical block address into a first physical address of the memory space based on the conversion relationship between logical block addresses in the memory space and physical addresses in the memory space. The first read / write submodule is used to perform read / write operations on target data in the target memory space pointed to by the first physical address; The first determination submodule includes: The first acquisition unit is used to acquire, from the data access request of the memory test mode, the first starting logical block address corresponding to the read command or write command and the length of the first address interval required to store the target data corresponding to each first starting logical block address; The first generation unit is configured to generate at least one first logical block address based on the at least one first starting logical block address and the length of the first address interval.

12. A solid-state drive data read / write device, characterized in that, include: The instruction generation module is used to generate target mode switching instructions in response to the setting operation of the solid-state drive's operating mode; The first instruction sending module is used to send the target mode switching instruction to the solid-state drive, so that the solid-state drive can switch the target mode based on the target mode switching instruction; The second instruction sending module is used to send a data access request to the solid-state drive in response to receiving the target mode switching completion instruction of the solid-state drive. The data access request includes target data to be operated on, so that when the target mode is memory test mode, the solid-state drive can perform read / write operations on the target data in the memory space of the solid-state drive in response to the data access request, or when the target mode is normal mode, the solid-state drive can perform read / write operations on the target data between the non-volatile storage space and the memory space of the solid-state drive in response to the data access request. When the target mode is memory test mode, the data access request of the memory test mode includes at least one first starting logical block address in the memory space of the solid-state drive to store the target data and the length of the first address interval required to store the target data corresponding to each first starting logical block address; When the target mode is normal mode, the data access request in normal mode includes at least one second starting logical block address in the non-volatile storage space of the solid-state drive where the target data is stored, and the length of the second address interval required to store the target data corresponding to each second starting logical block address.

13. A solid-state drive, characterized in that, include: A control unit and a memory, wherein the memory stores a computer program that, when executed by the control unit, implements the solid-state drive data read / write method as described in any one of claims 1-8.

14. A host device, characterized in that, include: A memory and a processor, wherein the memory stores a computer program that, when executed by the processor, implements the solid-state drive data read / write method as described in claim 9 or 10.

15. A non-volatile computer-readable storage medium, characterized in that, The storage medium stores a computer program, which, when executed by a processor, implements the solid-state drive data read / write method as described in any one of claims 1-8 or claim 9 or 10.

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