A chip internal communication method and device, a chip and a medium

Abstract

The application discloses a communication method and device based on a chip, a chip and a medium, and relates to the technical field of communication. In the whole communication transmission process, a point-to-point communication mode is not required, a virtual queue of a queue manager is added, a specific routing mode of an interactive communication path (a sending actual queue and a receiving actual queue) is used to realize generality, data interaction modes are uniformly managed, the selection of a communication mode is completed in the queue manager, information communication is completed by using the interactive communication path, the number of high-speed interfaces caused by point-to-point communication in the chip is greatly reduced, the chip area occupied by the high-speed interfaces is greatly reduced, and the manufacturing cost is reduced. Compared with the prior art, when the communication frequency is low, the corresponding high-speed interface cannot be used due to point-to-point communication, and power consumption is generated at the same time. In the corresponding routing mode, the high-speed communication interface is highly utilized by using different sending actual queues and receiving actual queues, and the single communication path is avoided.

Description

Technical Field

[0001] This invention relates to the field of communication technology, and in particular to a communication method, device, chip, and medium based on the internal structure of a chip. Background Technology

[0002] With the rapid development of chip technology, the manufacturing process of System-on-a-Chip (SOC) chips is constantly shrinking, and the number of functional modules contained in a single SOC chip system is increasing. The communication between the Central Processing Unit (CPU) and functional modules, as well as between functional modules, within the SOC chip system is more frequent and complex, and will be carried out through a "point-to-point" communication method.

[0003] Because of the point-to-point communication method, the number of high-speed interfaces increases with the number of functional modules, resulting in these interfaces occupying a large area within the chip and increasing manufacturing costs. If the communication frequency between the sending and receiving ends is low, the effective operating time of the high-speed interfaces is short, leading to more time spent in an idle state, which still consumes power, resulting in significant resource waste. Furthermore, the internal data exchange communication paths tend to be similar across different usage scenarios. The communication paths between the CPU and functional modules, and between functional modules themselves, are relatively simple, making the chip's application scenarios relatively fixed and limited, resulting in poor versatility.

[0004] Therefore, how to reduce the chip's footprint, reduce costs, save resources, and improve versatility are technical problems that urgently need to be solved by those skilled in the art. Summary of the Invention

[0005] The purpose of this invention is to provide a communication method, device, chip, and medium based on the internal structure of a chip, in order to solve the problems of point-to-point communication methods, such as having many high-speed interfaces, occupying a large area, consuming a lot of resources when idle, having a single communication path, and poor versatility.

[0006] To address the aforementioned technical problems, this invention provides a communication method based on an internal chip, applied at the transmitting end, comprising:

[0007] Get the current data to be transmitted;

[0008] The current data is sent to the queue manager so that the queue manager can determine the actual sending queue corresponding to the receiving end based on the current data; and the virtual queue in the queue manager is invoked to store the current data.

[0009] The current data is sent to the receiving end through the actual sending queue of the receiving end so that the receiving end can process the current data to obtain the corresponding feedback data, and determine the actual receiving queue of the receiving end and the actual sending queue of the sending end in the queue manager based on the feedback data, and receive the feedback data into the corresponding virtual queue through the actual receiving queue of the receiving end.

[0010] The feedback data sent by the actual sending queue corresponding to the sending end in the queue manager is received to complete the communication transmission of the current data.

[0011] Preferably, the current data transmission type includes transmission types between the CPU and functional modules or between the functional modules, and invoking the virtual queue within the queue manager includes:

[0012] When the sending end is the CPU, the current data is parsed to determine the corresponding virtual queue; and the virtual queue is called according to the parsed and determined virtual queue.

[0013] When the sending end is a first functional module, the actual receiving queue corresponding to the first functional module in the queue manager is determined according to the current data.

[0014] The first functional module receives the current data through the corresponding actual queue in the queue manager, routes the current data to the first virtual queue corresponding to the first functional module, and makes a call according to the routed first virtual queue.

[0015] Preferably, the process of establishing the virtual queue includes:

[0016] Obtain the data to be transmitted and the corresponding transmission direction, wherein the transmission direction includes the transmission direction based on the actual sending queue and the reception direction based on the actual receiving queue;

[0017] Determine the prefetch command pointer or prefill pointer in the virtual queue based on the transmission direction;

[0018] When the transmission direction is based on the actual transmission queue, the FW firmware read data pointer and the pointer in the actual transmission queue are determined according to the data to be transmitted;

[0019] When the transmission direction is the receiving direction based on the actual receiving queue, the FW firmware write data pointer and the pointer in the actual receiving queue are determined according to the data to be transmitted;

[0020] The sending status of the actual sending queue and the receiving status of the actual receiving queue are determined based on the data to be transmitted.

[0021] The actual flow rate of the actual transmission queue is determined based on the data to be transmitted.

[0022] The virtual queue is established by determining its empty / full state and the FW firmware's abnormal state through a first-in-first-out (FIFO) state.

[0023] Preferably, when the transmission direction of the data to be transmitted is the transmission direction of the actual transmission queue, determining the transmission status of the actual transmission queue based on the data to be transmitted includes:

[0024] A first preset data volume and a critical data volume to be sent are preset, wherein the critical data volume is greater than the first preset data volume;

[0025] Obtain the actual data volume of the data to be transmitted;

[0026] When the actual data volume is less than the first preset data volume, other data to be transmitted is acquired and merged, so that when the actual data volume of the data to be transmitted and the other data to be transmitted reach the first preset data volume, the data to be transmitted and the other data to be transmitted are transmitted through the actual transmission queue to determine the transmission status of the actual transmission queue.

[0027] When the actual data volume is greater than the first preset data volume and reaches the critical data volume, the data to be transmitted is sent through the actual sending queue to determine the sending status of the actual sending queue.

[0028] Correspondingly, when the transmission direction is the reception direction based on the actual reception queue, determining the reception status of the actual reception queue according to the data to be transmitted includes:

[0029] Obtain the current data volume and saturation data volume within the virtual queue;

[0030] When the difference between the current data volume and the saturated data volume reaches a second preset data volume, a first flag bit is set in the virtual queue.

[0031] Send the first flag bit to the current actual receiving queue;

[0032] Obtain the data to be transmitted currently in the actual receive queue;

[0033] After the data to be transmitted in the current actual receiving queue is sent to the sending end, the current actual receiving queue is reverse-pressed to determine the receiving status of the actual receiving queue.

[0034] Preferably, determining the actual flow rate of the actual transmission queue based on the data to be transmitted includes:

[0035] Obtain the flow control upper limit and current flow rate within the actual sending queue;

[0036] If the current flow rate is less than the flow control upper limit, obtain a token bucket;

[0037] Request a token from the token bucket based on the transmission rate of the data to be transmitted;

[0038] If the token is obtained, then the token generation rate in the token bucket is obtained;

[0039] The current traffic rate is adjusted based on the token generation speed to determine the actual traffic rate.

[0040] Preferably, when the actual sending queue includes multiple sub-actual sending queues, the process of establishing the actual sending queue includes:

[0041] Obtain the current data;

[0042] The current data is stored in the SRAM space within the actual transmission queue so that the current data can be allocated to the target sub-transmission actual queue;

[0043] When the SRAM space allocated to the actual sending queue of the target sub-transmission is less than the preset space and there is a portion of the unsent data in the other SRAM spaces, after the target sub-transmission data sends other data in the current data excluding the unsent data, a data transmission request is applied to the actual sending queue to facilitate the transmission of the unsent data.

[0044] To address the aforementioned technical problems, this invention also provides a communication method based on the internal structure of a chip, applied at the receiving end, comprising:

[0045] Obtain the current data sent by the sending end through the actual sending queue corresponding to the receiving end in the queue manager, wherein the actual sending queue is obtained from the current data to be transmitted in the queue manager, and the current data is stored in a virtual queue in the queue manager;

[0046] The current data is processed to obtain the corresponding feedback data;

[0047] Based on the feedback data, determine the actual receiving queue corresponding to the receiving end and the actual sending queue corresponding to the sending end in the queue manager;

[0048] The feedback data is received by the receiving end through the actual receiving queue and then sent to the corresponding virtual queue so that the sending end can receive the feedback data sent by the sending actual sending queue corresponding to the sending end in the queue manager to complete the communication transmission of the current data.

[0049] To address the aforementioned technical problems, the present invention also provides a communication device based on an internal chip, applied at the transmitting end, comprising:

[0050] The first acquisition module is used to acquire the current data to be transmitted;

[0051] The first determining module is used to send the current data to the queue manager so that the queue manager can determine the actual sending queue corresponding to the receiving end based on the current data; and call the virtual queue in the queue manager to store the current data;

[0052] The first sending module is used to send the current data to the receiving end through the actual sending queue of the receiving end so that the receiving end can process the current data to obtain corresponding feedback data, and determine the actual receiving queue of the receiving end and the actual sending queue of the sending end in the queue manager according to the feedback data, and receive the feedback data into the corresponding virtual queue through the actual receiving queue of the receiving end.

[0053] The first receiving module is used to receive the feedback data sent by the actual sending queue corresponding to the sending end in the queue manager to complete the communication transmission of the current data.

[0054] To address the aforementioned technical problems, the present invention also provides a communication device based on an internal chip, applied at a receiving end, comprising:

[0055] The second acquisition module is used to acquire the current data sent by the sending end through the actual sending queue corresponding to the receiving end in the queue manager, wherein the actual sending queue is obtained from the current data to be transmitted in the queue manager, and the current data is stored in a virtual queue in the queue manager;

[0056] The first processing module is used to process the current data to obtain corresponding feedback data;

[0057] The second determining module is used to determine the actual receiving queue corresponding to the receiving end and the actual sending queue corresponding to the sending end in the queue manager based on the feedback data.

[0058] The second receiving module is used to receive the feedback data into a corresponding virtual queue through the receiving actual queue of the receiving end, so that the sending end can receive the feedback data sent by the sending actual queue corresponding to the sending end in the queue manager to complete the communication transmission of the current data.

[0059] To address the aforementioned technical problems, the present invention also provides a chip, comprising:

[0060] Memory, used to store computer programs;

[0061] A processor for executing the computer program to implement the steps of the chip-based communication method as described above.

[0062] To address the aforementioned technical problems, the present invention also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the chip-based communication method described above.

[0063] This invention provides a chip-based communication method applied to the transmitting end. Using the current data to be transmitted, the transmitting end controls a queue manager to determine the corresponding actual transmission queue at the receiving end. This current data is stored in a virtual queue for transmission to the receiving end via the actual transmission queue. At the receiving end, the current data is processed to obtain feedback data. Based on this feedback data, the receiving end's actual reception queue and the corresponding actual transmission queue at the transmitting end are determined. The feedback data is received through the actual reception queue determined by the feedback data and then transmitted to the transmitting end through the same actual transmission queue. The entire communication transmission process eliminates the need for point-to-point communication. The addition of a virtual queue in the queue manager and interactive communication paths (transmitting and receiving queues) achieves universality, unifying the management of data interaction methods. Communication method selection is completed solely within the queue manager, utilizing interactive communication paths for information communication. This significantly reduces the problem of a large number of high-speed interfaces and significant chip area required by point-to-point communication, while also reducing manufacturing costs. In addition, compared to the existing method of power consumption caused by the inability of the corresponding high-speed interface due to point-to-point communication at low communication frequencies, this invention uses specific routing methods in combination within the queue manager. Under the corresponding routing method, different actual sending queues and actual receiving queues are used to achieve high utilization of the high-speed communication interface and avoid a single communication path.

[0064] In addition, the present invention also provides a chip-based communication method applied to the receiving end, a chip-based communication device applied to the transmitting end and the receiving end, a chip and a medium, which have the same beneficial effects as the chip-based communication method applied to the transmitting end described above. Attached Figure Description

[0065] To more clearly illustrate the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0066] Figure 1 This is a schematic diagram illustrating the communication between the functional modules of the sending and receiving modules in point-to-point communication.

[0067] Figure 2 This is a schematic diagram illustrating the point-to-point communication method between the CPU and external storage.

[0068] Figure 3 A flowchart illustrating a chip-based communication method applied to a transmitting end, as provided in an embodiment of the present invention;

[0069] Figure 4 A structural diagram of a virtual queue group provided in an embodiment of the present invention;

[0070] Figure 5 A structural diagram of a virtual queue provided in an embodiment of the present invention;

[0071] Figure 6 A schematic diagram of a token bucket provided in an embodiment of the present invention;

[0072] Figure 7 A flowchart of a virtual queue application provided in an embodiment of the present invention;

[0073] Figure 8 This is a structural diagram of the actual sending queue module provided in an embodiment of the present invention;

[0074] Figure 9 This is a structural diagram of the actual sub-transmission queue provided in an embodiment of the present invention;

[0075] Figure 10 This is a structural diagram of a receiving actual queue module provided in an embodiment of the present invention;

[0076] Figure 11 This is a structural diagram of a sub-receiving actual queue provided in an embodiment of the present invention;

[0077] Figure 12A structural diagram of a high-speed communication interface provided in an embodiment of the present invention;

[0078] Figure 13 A flowchart illustrating a chip-based communication method applied at a receiving end, as provided in an embodiment of the present invention;

[0079] Figure 14 A structural diagram of a chip-based communication device applied to a transmitting end, provided in an embodiment of the present invention;

[0080] Figure 15 A structural diagram of a chip-based communication device applied at a receiving end, provided in an embodiment of the present invention;

[0081] Figure 16 A structural diagram of a chip provided in an embodiment of the present invention;

[0082] Figure 17 This is a schematic diagram of a queue manager provided in an embodiment of the present invention. Detailed Implementation

[0083] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present invention.

[0084] The core of this invention is to provide a communication method, device, chip, and medium based on the chip's internal structure, in order to solve the problems of point-to-point communication methods having many high-speed interfaces, occupying a large area, consuming a lot of resources when idle, and having a single communication path and poor versatility.

[0085] To enable those skilled in the art to better understand the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0086] In point-to-point communication, all communication relies on high-speed interface stub connections. Figure 1 This is a communication diagram illustrating the functional modules between the sending and receiving modules in point-to-point communication, as shown below. Figure 1As shown, when the sending module A1 wants to send data to the receiving module B2, the data is packaged in the sending module. Then, based on the determination that the receiving module B2 can receive the data, the data packet is directly transmitted to the receiving module B2 through the high-speed interface connecting the sending module A1 and the receiving module B2. After receiving the data packet, the receiving module B2 parses the data packet. Thus, a data transmission is completed between the sending module A1 and the receiving module B2. The principle of the receiving module C3 is the same.

[0087] The communication algorithm involved in "point-to-point" communication is very simple, belonging to the simplest unicast communication, meaning that only two entities (CPU or chip functional modules) communicate with each other at a time, and the sender and receiver are uniquely identified. In a SOC chip, "point-to-point" communication is simply a high-speed interface connecting the sender and receiver, and the high-speed interfaces between different senders and receivers are independent of each other.

[0088] Figure 2 This is a schematic diagram illustrating the point-to-point communication method between the CPU and external storage, such as... Figure 2As shown, the communication between the CPU 4 and the external Dynamic Random Access Memory (DRAM) in the SOC chip is a typical "point-to-point" communication. Each time the CPU wants to initiate a read or write operation to Double Data Rate (DDR), it sends the request to the DDR Ctrl via the Advanced eXtensible Interface slave (AXI slave). After receiving the data from the CPU, the DDR Ctrl sends the data to the DDR port physical layer 6 (DDR PHY) via the Digital Facility Interface (DFI). After relevant timing conversions, the DDR PHY sends the command and address data to the Synchronous Dynamic Random Access Memory (SDRAM) via the cable (CA). The stored data is then processed through Distributed Queueing (DQ), Distributed Queuing Service (DQS), and Data Manager. The DDR (Manager, DM) is sent to SDRAM. Communication between the CPU and DDR is achieved through direct connection between the sender and receiver via high-speed interfaces. For example, the CPU and DDR Ctrl are directly connected via the AXI slave interface, and the DDR Ctrl and DDR PHY are directly connected via the DDR PHY Interface (DFI).

[0089] In a System-on-a-Chip (SoC) chip, traditional point-to-point communication between the CPU and functional modules, and between functional modules themselves, relies on a direct high-speed interface between the sending and receiving ends. When the number of modules requiring communication is large and the data communication scenario is complex, a significant number of high-speed interfaces are needed to ensure communication feasibility. For example, if the CPU only needs to communicate with a single functional module, one high-speed interface is sufficient. If the CPU needs to communicate with two functional modules, and these modules also need to communicate with each other, three high-speed interfaces are required. If the CPU needs to communicate with three functional modules, and these modules also need to communicate with each other, six high-speed interfaces are required. If the CPU needs to communicate with N functional modules, and these modules also need to communicate with each other, 1+2+3+...+N high-speed interfaces are needed. When the number of functional modules requiring communication in an SoC chip is large, a significant number of high-speed interfaces are required. These high-speed interfaces occupy a large area within the SoC chip, significantly increasing the chip's design and manufacturing costs.

[0090] Traditional point-to-point communication within a System-on-a-Chip (SoC) relies on unicast communication, with the sender and receiver directly connected via a high-speed interface. If the communication frequency between the sender and receiver is low during system operation, the high-speed interface will have a very short effective operating time, spending a significant amount of time in an idle state. Even in idle state, the interface still consumes power, resulting in substantial resource waste and high power consumption. Furthermore, in traditional point-to-point communication within an SoC, when the CPU communicates with multiple functional modules, its frequency of operation within the L1 / L2 / L3 cache is low, while its external access frequency is high. This increases CPU load and reduces CPU efficiency, ultimately dragging down the overall system performance.

[0091] Due to the drawbacks of traditional point-to-point communication in SOC chips, such as wasted chip area, increased chip design and manufacturing costs, additional power consumption, and wasted CPU operating efficiency, most current SOC chip designs focus on dedicated chip design. In SOC chips, the internal data interaction and communication paths tend to be similar across different usage scenarios, and the communication paths between the CPU and functional modules, and between functional modules themselves, are relatively simple. Dedicated chip designs are essentially based on specific usage scenarios, resulting in relatively fixed application scenarios and poor chip versatility. Therefore, the chip-based communication method provided by this invention can solve the above-mentioned technical problems.

[0092] Figure 3A flowchart illustrating an internal chip-based communication method applied to a transmitting end, as provided in an embodiment of the present invention, is shown below. Figure 3 As shown, the method includes:

[0093] S11: Obtain the current data to be transmitted;

[0094] S12: Send the current data to the queue manager so that the queue manager can determine the actual sending queue corresponding to the receiving end based on the current data; and call the virtual queue in the queue manager to store the current data;

[0095] S13: The current data is sent to the receiving end through the actual sending queue of the receiving end so that the receiving end can process the current data to obtain the corresponding feedback data, and determine the actual receiving queue of the receiving end and the actual sending queue of the sending end in the queue manager according to the feedback data, and receive the feedback data into the corresponding virtual queue through the actual receiving queue of the receiving end.

[0096] S14: Receive feedback data sent by the actual sending queue corresponding to the sending end in the queue manager to complete the communication transmission of the current data.

[0097] Specifically, the current data to be transmitted is acquired. In this embodiment, the current data can be transmitted between the CPU and the functional modules or between the functional modules themselves. If it is a transmission between the CPU and the functional modules, the sending end is the CPU, and the data is generated by the CPU itself and sent to the functional modules. The acquisition period of this data is not limited; it can be acquired in real time or based on a preset period. If it is a transmission between the functional modules, the sending end is the first functional module, and the data is sent by the first functional module to the second functional module.

[0098] Step S12 involves sending the current data to the queue manager. In this embodiment, the purpose of the queue manager is to manage communication queues between the CPU and functional modules, and between functional modules within the SOC chip system. It utilizes routing to connect the various communication modules within the SOC chip system, achieving high-speed, low-latency communication between them. It should be noted that the functional modules in this invention are based on data functions defined for specific business scenarios, such as receiving modules, sending modules, and writing modules.

[0099] After sending the current data to the queue manager, the queue manager determines the actual queue (AQX) corresponding to the receiving end based on the current data. This can be divided into two cases: First, in the transmission between the CPU and functional modules, the queue manager needs to analyze and process the current data to determine the corresponding actual queue within its own queue manager. Second, in the transmission between functional modules, the actual queue to which the receiving end's second functional module belongs is determined solely based on the marker carried within the current data.

[0100] Simultaneously, the virtual queue (VQX) within the queue manager is invoked to store the current data for subsequent transmission. It is understood that in this embodiment, the virtual queue is mapped to Random Access Memory (RAM) space, and the virtual queue records the starting address and data width of the RAM space; this storage is only a temporary process. The invocation process varies depending on the transmission type. In some embodiments, the current data transmission type includes transmission between the CPU and functional modules or between functional modules. Invoking the virtual queue within the queue manager includes:

[0101] When the sending end is a CPU, the current data is parsed to determine the corresponding virtual queue; and the call is performed according to the parsed and determined virtual queue.

[0102] When the sending end is the first functional module, the actual receiving queue (rx queue, RXQ) corresponding to the first functional module in the queue manager is determined based on the current data;

[0103] The first functional module receives the current data in the corresponding actual queue within the queue manager, routes the current data to the first virtual queue corresponding to the first functional module, and makes calls based on the routed first virtual queue.

[0104] If the transmission is between the CPU and the functional module, the sending end is the CPU, which parses the current data to determine the corresponding virtual queue, and then makes a call based on the virtual queue determined by the parsing.

[0105] If the transmission between functional modules is the first functional module, the receiving actual queue of the first functional module in the queue manager is determined according to the tag carried by the current data. The current data is received based on the receiving actual queue of the first functional module, and the current data is routed to the first virtual queue corresponding to the first functional module, so as to make a call according to the first virtual queue of the route.

[0106] In step S13, the current data is sent to the receiving end through the actual sending queue of the receiving end, so that the receiving end can process the current data to obtain the corresponding feedback data. The processing procedure in this embodiment is not limited and can be analyzed and processed based on different business scenarios. For example, for message data, after the receiving end receives the message data, it processes it to obtain the corresponding feedback request as feedback data. Based on the feedback data, the actual receiving queue corresponding to the receiving end and the actual sending queue corresponding to the sending end are determined in the queue manager. Then, the feedback data is received by the actual receiving queue of the receiving end in the queue manager and sent to the virtual queue in the queue manager. The sending end receives the feedback data sent by the actual sending queue corresponding to the sending end in the queue manager to complete the communication transmission of the current data.

[0107] In summary, regarding communication between the CPU and functional modules: When the CPU needs to send current data to a functional module, it selects the corresponding actual transmission queue for that functional module within the queue manager (there is a one-to-one correspondence between actual transmission queues and functional modules within the queue manager), and maps the corresponding virtual queue. The virtual queue is then started via the Camera Interface (CIF) for storage. The current data is sent to the actual transmission queue via the AXI Master Interface (AXI MIF), and finally to the receiving end via the High Speed ​​Interface (HSI). When a functional module sends feedback data obtained from processing the current data to the CPU, the CPU needs to pre-set the corresponding virtual queue. When the actual receiving queue in the queue manager receives the feedback data sent by the functional module, it automatically sends the feedback data to memory via the MIF interface through the CPU's actual transmission queue within the queue manager, and notifies the CPU via the virtual queue.

[0108] In communication between functional modules, when the first functional module needs to send current data to the second functional module, the current data is routed through the port of the receiving actual queue corresponding to the first functional module in the queue manager to the corresponding virtual queue (VQX index "N"). Based on this virtual queue, it is further mapped to the port of the sending actual queue corresponding to the second functional module in the queue manager, and the destination ID of VQX index "N" is configured as "M". After receiving the current data, the second functional module processes the request in the sending actual queue where the destination ID is equal to "M", and then returns feedback data through the receiving actual queue. This feedback data carries data with the destination identification number (Industrial Design, ID) as M. The receiving actual queue corresponding to the second module is automatically routed in the VQX index "M" virtual queue to the sending actual queue corresponding to the first functional module in the queue manager for transmission to the first functional module. This completes one hardware channel communication between functional modules.

[0109] This invention provides a chip-based communication method applied to the transmitting end. Using the current data to be transmitted, the transmitting end controls a queue manager to determine the corresponding actual transmission queue for the receiving end. This current data is stored in a virtual queue for transmission to the receiving end via the actual transmission queue. At the receiving end, the current data is processed to obtain feedback data. Based on the feedback data, the receiving end determines its own actual receiving queue and the corresponding actual transmission queue for the transmitting end. The feedback data is received through the actual receiving queue determined by the feedback data and then transmitted to the transmitting end through the same queue. The entire communication transmission process eliminates the need for point-to-point communication. The addition of a virtual queue in the queue manager and interactive communication paths (transmitting and receiving queues) achieves universality, unifying the data interaction method. The choice of communication method is completed only within the queue manager, utilizing interactive communication paths to complete information communication. This significantly reduces the problem of a large number of high-speed interfaces and large chip area required by point-to-point communication, while also reducing manufacturing costs. In addition, compared to the existing method of power consumption caused by the inability of the corresponding high-speed interface due to point-to-point communication at low communication frequencies, this invention uses specific routing methods in combination within the queue manager. Under the corresponding routing method, different actual sending queues and actual receiving queues are used to achieve high utilization of the high-speed communication interface and avoid a single communication path.

[0110] In some embodiments, the process of establishing a virtual queue includes:

[0111] Obtain the data to be transmitted and the corresponding transmission direction, wherein the transmission direction includes the sending direction based on the actual sending queue and the receiving direction based on the actual receiving queue;

[0112] The prefetch command pointer or prefill pointer in the virtual queue is determined based on the transmission direction;

[0113] When the transmission direction is based on the actual transmission queue, the FW firmware read data pointer and the pointer in the actual transmission queue are determined according to the data to be transmitted;

[0114] When the transmission direction is based on the actual receive queue, the FW firmware write data pointer and the pointer in the actual receive queue are determined according to the data to be transmitted.

[0115] The sending status of the actual sending queue and the receiving status of the actual receiving queue are determined based on the data to be transmitted.

[0116] Determine the actual flow rate of the actual queue to be transmitted based on the data to be transmitted.

[0117] The virtual queue is established by determining its empty / full state and the FW firmware's abnormal state through the first-in-first-out (FIFO) state.

[0118] Specifically, a virtual queue consists of a group of virtual queues. Multiple virtual queues can be set up according to the actual needs of the SOC chip system. The actual sending queue and the actual receiving queue share the virtual queue rights. The mapping relationship of these virtual queue groups can be configured through software configuration registers. Figure 4 A structural diagram of a virtual queue group provided in an embodiment of the present invention is shown below. Figure 4 As shown, after the software reads / writes to the memory bus fully decoded address through the Mem interface, it uses register read flags and register write flags to store data in each virtual queue (VQX_QUE 0-VQX_QUE 127).

[0119] Figure 5 A structural diagram of a virtual queue provided in an embodiment of the present invention, such as... Figure 5 As shown, a virtual queue includes registers, interrupts, pre-fetch pointers (PPTR), fill pointers (FPTR), write pointers (WPTR), read pointers (RPTR), transmit status of the actual transmit queue (AQX STATE), receive status of the actual receive queue (RXQ STATE), virtual queue empty / full status (VFF STATE), and flow control limit value (MAX FIFO) status.

[0120] The data to be transmitted and the corresponding transmission direction are obtained. In this embodiment, the transmission direction mainly includes the sending direction of the actual sending queue and the receiving direction of the actual receiving queue. The prefetch command pointer or prefill pointer in the virtual queue is determined according to the transmission direction. When the transmission direction is the sending direction of the actual sending queue, the firmware (FW) read data pointer and the pointer in the actual sending queue are determined according to the data to be transmitted. When the transmission direction is the receiving direction based on the actual receiving queue, the FW firmware write data pointer and the pointer in the actual receiving queue are determined according to the data to be transmitted.

[0121] Simultaneously, the sending status of the actual sending queue and the receiving status of the actual receiving queue are determined based on the data to be transmitted. In some embodiments, when the transmission direction of the data to be transmitted is the sending direction of the actual sending queue, determining the sending status of the actual sending queue based on the data to be transmitted includes:

[0122] A first preset data volume and a critical data volume to be sent are preset, wherein the critical data volume is greater than the first preset data volume;

[0123] Obtain the actual amount of data to be transmitted;

[0124] When the actual data volume is less than the first preset data volume, other data to be transmitted is acquired and merged, so that when the actual data volume of the data to be transmitted and other data to be transmitted reaches the first preset data volume, the actual data to be transmitted and other data to be transmitted are sent through the actual queue to determine the sending status of the actual queue.

[0125] When the actual data volume is greater than the first preset data volume and reaches the critical data volume, the actual data to be transmitted is sent by sending the actual queue to determine the sending status of the actual queue.

[0126] Correspondingly, when the transmission direction is based on the actual receiving queue, the receiving status of the actual receiving queue is determined according to the data to be transmitted, including:

[0127] Get the current data volume and saturation data volume in the virtual queue;

[0128] When the difference between the current data volume and the saturation data volume reaches the second preset data volume, a first flag is set in the virtual queue;

[0129] Send the first flag bit to the current actual receive queue;

[0130] Get the data to be transmitted in the current receive queue;

[0131] After the data to be transmitted in the current receiving queue is sent to the sending end, the current receiving queue is reversed to determine the receiving status of the receiving queue.

[0132] Specifically, a first preset data volume and a critical data volume are preset. In this embodiment, the first preset data volume is the maximum number of entries that can be sent, and the critical data volume is the first-in-first-out boundary of the virtual queue. If the critical data volume is greater than the first preset data volume, the actual data volume of the data to be transmitted is obtained. If the actual data volume is less than the first preset data volume, considering the resources occupied by data transmission, a maximum number of entries request is sent at a time. It is necessary to wait for other data to be transmitted to be merged into the data to be transmitted so that when the actual data volume after merging the two types of data reaches the first preset data volume, the data to be transmitted and other data to be transmitted are sent through the actual queue. Each time 10 data are sent, they are not sent immediately after receiving a data, but wait until 10 data are collected before sending.

[0133] If the actual data volume exceeds the first preset data volume and reaches the critical data volume, the current transmission status is determined by sending the actual queue of data to be transmitted.

[0134] In other words, this sending state uses the First In First Out (FIFO) principle to calculate the amount of data that can be sent in an entry. When the number of entries meets the first preset data amount that can be sent at one time, the first preset data amount is sent at one time. If the data to be transmitted corresponding to the prefetch command pointer reaches the critical data amount, it is sent according to the maximum number of entries that have reached the boundary (critical data amount). If the FW firmware requires the virtual queue to strictly adhere to sending the first preset data amount every time, it should ensure that each write pointer update must be an integer multiple of the first preset data amount.

[0135] When the transmission direction is the receiving direction of the actual receiving queue, the receiving status of the actual receiving queue is determined based on the data to be transmitted. The current data volume and saturation data volume in the virtual queue are obtained. The saturation data volume is the data volume reached when the current receiving virtual queue is in a saturated state. When the difference between the current data volume and the saturation data volume reaches a second preset data volume, that is, when the saturation data volume is about to be reached, the current receiving virtual queue is about to be full. At this time, a first flag bit is set in the virtual queue. The virtual queue will pull up an almost-full signal. In this embodiment, the first flag bit is the corresponding high-level signal, and the first flag bit is sent to the current actual receiving queue. The data to be transmitted in the current actual receiving queue is obtained. After the data to be transmitted in the current actual receiving queue is sent to the transmitting end, the current actual receiving queue is reverse-pressurized until the corresponding actual receiving queue pulls its high-level signal low.

[0136] In this embodiment, the current data volume has not yet reached the saturation point. At this time, there is still data being transmitted within the actual receiving queue. Therefore, once this data arrives in the queue manager, an entry is written, and the current actual receiving queue is officially backpressured. The aforementioned first flag is merely an early warning mechanism.

[0137] The method provided in this embodiment for determining the sending status of the actual sending queue and the receiving status of the actual receiving queue based on the data to be transmitted fully considers the amount of data in the actual queues (the actual sending queue and the actual receiving queue), avoiding the phenomenon of data congestion and excessive resource consumption caused by the amount of data to be sent and received.

[0138] Additionally, for the virtual queue's empty / full state, the FIFO principle is used to calculate whether the current virtual queue is empty / full for reading / writing and to check for firmware operation anomalies. The flow control limit (MAX FIFO) state uses the FIFO principle to calculate whether the actual sending queue has reached the set flow control limit. If it has, even if there is data in the virtual queue, the virtual queue needs to stop sending until the actual receiving queue returns the corresponding source ID (SIID) to lift the flow control limit. In other words, after sending data through the actual sending queue, if the set flow control limit is reached, and feedback is received from the actual receiving queue, if the feedback is normal, the flow control limit is lifted.

[0139] In this embodiment, the state settings within the virtual queue ensure coordinated operation of the virtual queue management, the sending of data to the actual queue, and the receiving of data from the actual queue, thereby guaranteeing data transmission.

[0140] Based on the above embodiments, in some embodiments, the actual flow rate of the actual transmission queue is determined according to the data to be transmitted, including:

[0141] Get the flow control limit value and current flow rate of the actual sending queue;

[0142] Acquire a token bucket if the current flow rate is less than the flow control limit.

[0143] Request a token from the token bucket based on the transmission rate of the data to be transmitted;

[0144] If a token is obtained, the token generation rate in the token bucket is obtained;

[0145] The current traffic rate is adjusted based on the token generation rate to determine the actual traffic rate.

[0146] Specifically, flow control is actually a protection for hardware. If the flow limit is exceeded, the hardware will be damaged. The token is a software-based flow control system, similar to water flow control, which adjusts the flow in real time to prevent it from reaching the flow limit.

[0147] A token bucket is set up when transmitting data in a virtual queue. A token is removed from the bucket every time a certain amount of data is transmitted. Simultaneously, the software adds tokens to the bucket according to the rate-limiting requirements of the virtual queue's data transmission. Initially, the token bucket is configured to be full, so that the rate-limiting effect is achieved when the existing tokens in the bucket are exhausted. Generally, the token bucket depth is twice the rate at which rate-limiting tokens are added.

[0148] Figure 6 This is a schematic diagram of a token bucket provided in an embodiment of the present invention, as shown below. Figure 6 As shown, the software continuously adds tokens to the virtual queue token bucket according to the virtual queue's performance limits or rate-limiting requirements. Each time a certain amount of data is transmitted on the virtual queue, a token is removed from the virtual queue token bucket. When the current traffic rate is less than the flow control limit, the software retrieves tokens from the token bucket based on the current data transmission rate. If a token is retrieved, the token generation speed needs to be determined. The process for determining the generation speed in this embodiment can be the same as or different from existing token generation speed processes; no limitation is made here. The current traffic rate is adjusted based on the token generation speed to determine the actual traffic rate. The adjustment process is based on the token generation speed; if the generation speed is faster, the current traffic rate will also increase, and vice versa.

[0149] The process of determining the actual traffic rate in this embodiment maximizes the use of virtual queue resources, improves the communication rate between the CPU and functional modules, and between functional modules, and can also implement functions such as rate-limited communication and Quality of Service (QoS). After invoking the virtual queue, the process also includes:

[0150] Configure the actual sending queue and actual receiving queue for the current data based on the current data configuration;

[0151] The configuration information is stored in a virtual queue, which is an idle virtual queue requested from the virtual queue resource pool when the current data is received within a preset time.

[0152] Enable timestamps on the virtual queue to detect whether the current data has been transmitted to the corresponding actual send queue or actual receive queue based on the timestamp.

[0153] If transmission is required, check whether the transmission pressure of the current data meets the preset requirements.

[0154] If the conditions are met, other idle virtual queues will be requested from the virtual queue resource pool to alleviate the transmission pressure of the current data.

[0155] If no data is transmitted, the communication connection for the current data is considered to have ended, and the virtual queue is reclaimed into the virtual queue resource pool.

[0156] Specifically, when communication needs arise between the CPU and functional modules, or between functional modules within the SOC system, an idle virtual queue is requested from the virtual queue resource pool. If no idle virtual queue is available, it waits for one. If an idle virtual queue is available, it is retrieved from the pool, and the virtual queue is configured to connect the sending and receiving ends of the communication. Simultaneously, a timestamp and a "watchdog" are enabled to monitor data transmission on the virtual queue. When data transmission on the virtual queue approaches its performance limit, another idle virtual queue is requested from the virtual queue resource pool for data transmission to alleviate the data transmission pressure on the original virtual queue (forming a round-robin transmission with the original virtual queue). If no data transmission occurs on the virtual queue for a certain period, the communication between the two parties connected by the virtual queue is considered complete. Data transmission monitoring on the virtual queue is then disabled, and the virtual queue is released and returned to the virtual queue resource pool. This system only monitors; if there is no data transmission, resources are reclaimed to save resources; if the data transmission pressure is high, the load is distributed to achieve rational resource utilization.

[0157] The preset requirements for transmission pressure in this embodiment can be characterized by the amount of data transmitted, or by other parameters such as transmission rate. The specific requirements can be set according to the actual situation and are not limited here.

[0158] Figure 7 A flowchart for virtual queue application provided in an embodiment of the present invention is shown below. Figure 7 As shown, the method includes:

[0159] S21: Internal communication requirements of the chip;

[0160] S22: Determine if there are any free virtual queues in the virtual queue resource pool. If there are, proceed to step S23; otherwise, return to step S21.

[0161] S23: Remove the idle virtual queue from the resource pool;

[0162] S24: Configure the virtual queue retrieved to connect the two communicating parties;

[0163] S25: Open the virtual queue timestamp and watchdog;

[0164] S26: Determine whether the data transmission of the virtual queue has reached its limit. If yes, return to step S22; otherwise, proceed to step S27.

[0165] S27: Determine whether the current communication has ended. If it has ended, proceed to step S28; otherwise, return to step S26.

[0166] S28: Disable the virtual queue's timestamp and watchdog;

[0167] S29: Add the virtual queue to the resource pool.

[0168] In some embodiments, when the actual sending queue includes multiple sub-actual sending queues, the process of establishing the actual sending queue includes:

[0169] Get the current data;

[0170] The current data is stored in the SRAM space within the actual transmission queue so that it can be allocated to the target sub-transmission queue;

[0171] When the SRAM space allocated to the actual sending queue of the target sub-transmission is less than the preset space and there is unsent data in other SRAM spaces, after the target sub-transmission sends the data other than the unsent data in the current data, it requests a data transmission request in the actual sending queue in order to transmit the unsent data.

[0172] Understandably, there can be one or more actual transmit queues. In the case where the actual transmit queue includes multiple sub-actual transmit queues, the actual transmit queue module consists of several actual transmit queues, an actual transmit queue aggregation (TX queue aggregation, TX AGG), and a static random-access memory (TXG SRAM) for the actual transmit queues. Each virtual queue corresponds one-to-one with the actual transmit queue of the hardware module through the HTX interface.

[0173] The current data is acquired and stored in the SRAM space within the actual transmission queue. The actual transmission queue aggregation module primarily aggregates and arbitrates read data requests from various virtual queues to the actual transmission queue master interface (AXI masterinterface, AXI MIF). The read data returned by AXI MIF is stored in this SRAM space, which is shared by all virtual queues via an SRAM FIFO and pre-allocated by the firmware to the corresponding sub-actual transmission queues of each virtual queue. If the SRAM space allocated to the target sub-actual transmission queue is less than the preset space and other SRAM spaces contain untransmitted portions of the current data, after the target sub-actual transmission queue transmits the remaining data (excluding the untransmitted portions), it requests a data transmission request from the actual transmission queue to transmit the untransmitted portions. In other words, when the allocated SRAM space is insufficient and there is still untransmitted data in the SRAM, the actual transmission queue requests a transmission from the TX AGG within the actual transmission queue after each entry is transmitted to transmit the untransmitted portions.

[0174] The TX AGG calculates whether the AQX has space to receive the data returned by the MIF. If the TX AGG determines that the AQX has no space to receive the data, it returns NACK to the AQX; otherwise, it returns ACK.

[0175] Figure 8 This is a structural diagram of the actual sending queue module provided in an embodiment of the present invention, as shown below. Figure 8 As shown, this includes multiple sub-transmit queues, which are connected to the memory bus (MEM bus) via a memory read / write interface. These sub-transmit queues are registered via address decoding and stored in SRAM. The TX AGG calculates whether the AQX has enough space to receive the MIF return data. If the AQX has no space, it returns a NACK to the AQX. The transmit queue sends a transmission request to the TX AGG. After calculation, if the AQX has finished sending data to the SRAM FIFO and still cannot obtain an ACK from the TX AGG, it automatically initiates a forced transmission. When the TX AGG receives the forced transmission command from the AQX, it will no longer check whether the AQX has enough space to receive data. MIF return read data may be back-pressured by the AQX receive FIFO, affecting the transmission of other AQX data through the MIF interface.

[0176] Figure 9 This is a structural diagram of the sub-sending actual queue provided in an embodiment of the present invention, such as... Figure 9As shown, the system receives requests from virtual queues, arbitrates the priority of these requests through a virtual queue arbitrator (VQX_ARB), and sends the arbitrated virtual queue requests to the transmit actual queue request (TXQ_REQ) within the sub-transmit actual queue. The transmit actual queue state machine (AQX FSM) then converts the virtual queue requests into transmit actual queue requests and sends them to the transmit actual queue set (TX_AGG). Data returned from the transmit actual queue set (TX_AGG) is temporarily stored in the virtual queue command first-in-first-out (VFFCMD FIFO) for transmission. When the sub-transmit actual queue transmits data, it sends the transmit request from the virtual queue command first-in-first-out (VFFCMDFIFO) and the data to be transmitted stored in the transmit actual queue static random access memory first-in-first-out (TX_SRAM_FIFO) to the transmit asynchronous first-in-first-out (TX_ASYM_FIFO), and then sends it to the high-speed interface for transmission.

[0177] In some embodiments, after allocating the current data to the target sub-transmission actual queue, the method further includes:

[0178] Determine if there is any free space in the SRAM space of the target child's actual transmission queue;

[0179] If it exists, a second flag is generated and sent to the target sub-send actual queue;

[0180] If the second flag bit is not successfully obtained after other data is sent in the target sub-send actual queue, the current data is forcibly sent to the target sub-send actual queue.

[0181] Specifically, if AQX fails to receive TX AGG ACK after sending SRAM FIFO data, it will automatically initiate forced transmission. When TX AGG receives the AQX forced transmission command, it will no longer check whether AQX has receiving space. The MIF return read data may be back-pressured by the AQX receiving FIFO, affecting the transmission of other AQX data by the MIF interface.

[0182] If there is free space in the actual queue of the target data, a second flag is generated to send other data. If the second flag is not obtained, the current data needs to be forcibly sent to ensure the transmission of the data.

[0183] The embodiment of the present invention provides that placing the data in the SRAM space ensures timing convergence, and temporarily storing it in the space reduces timing requirements.

[0184] Based on the above embodiments, the receiving actual queue module consists of several receiving actual queues and a receiving actual queue collection module. Each receiving actual queue and hardware module corresponds one-to-one through the HRX interface. The receiving actual queue module mainly aggregates and arbitrates various RXQ transmission requests to initiate write data requests to the AXI MIF interface. The write status returned by the AXI MIF is fed back to the corresponding virtual queue.

[0185] Figure 10 This is a structural diagram of a receiving actual queue module provided in an embodiment of the present invention, as shown below. Figure 10 As shown, by receiving each request and mapping it to the corresponding sub-receiving queue, and by receiving the return data corresponding to the receiving queue set module, a write data request is initiated through the AXI MIF interface.

[0186] Figure 11 This is a structural diagram of a sub-receiver actual queue provided in an embodiment of the present invention, as shown below. Figure 11 As shown, ptx_rxq is the data packet sent from the functional module to QM; rxq is the data packet received by the HSI interface from the functional module, which parses the package to obtain the return data information contained therein (i.e., the entry data in the HSI interface packet) and sends the parsed data information to the command queue buffer (CQ data buffer); rxd is the data packet sent by the CQ data buffer to the CPU in response to the CPU's request when the CPU requests data from the CQ data buffer.

[0187] Based on the above embodiments, in some embodiments, the high-speed communication interfaces corresponding to the actual sending queue and the actual receiving queue include at least the AIF interface, the CIF interface and the HSI interface;

[0188] The AIF interface is used for communication between the queue manager and external memory or the CPU's internal cache; the CIF interface is used for communication between the CPU and the queue manager; and the HSI interface is used for communication between the queue manager and functional modules.

[0189] Specifically, Figure 12 A structural diagram of a high-speed communication interface provided in an embodiment of the present invention is shown below. Figure 12 As shown, the HSI interface facilitates communication between the QM and SOC system functional modules. The HSI interface encapsulates the data to be transmitted (packaging the information to be transmitted with a header into a package similar to a packet in IPv4 / IPv6 communication) and then performs data communication. Its HSI packet format is as follows: Figure 12 As shown, it can also be flexibly modified in actual use.

[0190] The high-speed communication ports provided in this embodiment simplify the communication methods within the SOC chip.

[0191] In some embodiments, when the sending end is a CPU and the receiving end is a functional module, after receiving the feedback data sent by the actual sending queue in the queue manager, the method further includes:

[0192] Feedback data is sent to the external memory corresponding to the CPU or the internal cache of the CPU through the actual send queue in the queue manager.

[0193] Specifically, in this embodiment, the memory is not only stored in external memory, but also in the CPU's internal cache. It is also necessary to make the CPU run more in L1 / L2 / L3 cache, reduce the frequency of external access to the CPU, reduce the CPU load, and improve the CPU's operating efficiency.

[0194] Figure 13 A flowchart illustrating an internal chip-based communication method applied at a receiving end, as provided in an embodiment of the present invention, is shown below. Figure 13 As shown, the method includes:

[0195] S31: Get the current data sent by the sender through the actual send queue corresponding to the receiver in the queue manager;

[0196] The actual sending queue is obtained from the current data to be transmitted within the queue manager, and the current data is stored in the virtual queue within the queue manager.

[0197] S32: Process the current data to obtain the corresponding feedback data;

[0198] S33: Determine the actual receiving queue and the actual sending queue of the sending end in the queue manager based on the feedback data;

[0199] S34: The feedback data is received by the receiving end through the actual receiving queue and then sent to the corresponding virtual queue so that the sending end can receive the feedback data sent by the sending end through the actual sending queue in the queue manager to complete the communication transmission of the current data.

[0200] For an introduction to the communication method based on the chip inside the receiving end provided by the present invention, please refer to the above method embodiments. The present invention will not be described again here, but it has the same beneficial effects as the above-described communication method based on the chip inside the sending end.

[0201] The foregoing has described in detail various embodiments of the communication method based on the chip's internal structure. Based on this, the present invention also discloses a communication device based on the chip's internal structure corresponding to the aforementioned method. Figure 14This is a structural diagram of a chip-based communication device applied at the transmitting end, provided as an embodiment of the present invention. (See diagram below.) Figure 14 As shown, the device includes:

[0202] The first acquisition module 11 is used to acquire the current data to be transmitted;

[0203] The first determining module 12 is used to send the current data to the queue manager so that the queue manager can determine the actual sending queue corresponding to the receiving end based on the current data; and call the virtual queue in the queue manager to store the current data.

[0204] The first sending module 13 is used to send the current data to the receiving end through the actual sending queue of the receiving end so that the receiving end can process the current data to obtain the corresponding feedback data, and determine the actual receiving queue of the receiving end and the actual sending queue of the sending end in the queue manager according to the feedback data, and receive the feedback data into the corresponding virtual queue through the actual receiving queue of the receiving end.

[0205] The first receiving module 14 is used to receive feedback data sent by the actual sending queue corresponding to the sending end in the queue manager to complete the communication transmission of the current data.

[0206] Figure 15 This is a structural diagram of a chip-based communication device applied at a receiving end, provided as an embodiment of the present invention. Figure 15 As shown, the device includes:

[0207] The second acquisition module 15 is used to acquire the current data sent by the sending end through the actual sending queue corresponding to the receiving end in the queue manager, wherein the actual sending queue is obtained from the current data to be transmitted in the queue manager, and the current data is stored in the virtual queue in the queue manager.

[0208] The first processing module 16 is used to process the current data to obtain the corresponding feedback data;

[0209] The second determining module 17 is used to determine the actual receiving queue and the actual sending queue of the sending end in the queue manager based on the feedback data.

[0210] The second receiving module 18 is used to receive feedback data into the corresponding virtual queue through the receiving actual queue of the receiving end so that the sending end can receive the feedback data sent by the sending actual queue of the sending end in the queue manager to complete the communication transmission of the current data.

[0211] Since the embodiments of the device part correspond to the embodiments described above, please refer to the embodiments described in the method part for the embodiments of the device part, and will not be repeated here.

[0212] For an introduction to the communication device based on the chip provided by the present invention, please refer to the above method embodiments. The present invention will not be described again here, but it has the same beneficial effects as the above-described communication method based on the chip.

[0213] Figure 16 A structural diagram of a chip provided in an embodiment of the present invention, such as... Figure 16 As shown, the chip includes:

[0214] Memory 21 is used to store computer programs;

[0215] Processor 22 is used to implement steps of communication methods based on the chip when executing computer programs.

[0216] The processor 22 may include one or more processing cores, such as a quad-core processor or an octa-core processor. The processor 22 may be implemented using at least one of the following hardware forms: Digital Signal Processor (DSP), Field-Programmable Gate Array (FPGA), or Programmable Logic Array (PLA). The processor 22 may also include a main processor and a coprocessor. The main processor, also known as the Central Processing Unit (CPU), is used to process data in the wake-up state; the coprocessor is a low-power processor used to process data in the standby state. In some embodiments, the processor 22 may integrate a Graphics Processing Unit (GPU), which is responsible for rendering and drawing the content to be displayed on the screen. In some embodiments, the processor 22 may also include an Artificial Intelligence (AI) processor, which handles computational operations related to machine learning.

[0217] The memory 21 may include one or more computer-readable storage media, which may be non-transitory. The memory 21 may also include high-speed random access memory and non-volatile memory, such as one or more disk storage devices or flash memory devices. In this embodiment, the memory 21 is used to store at least the following computer program 211, which, after being loaded and executed by the processor 22, is capable of implementing the relevant steps of the chip-based communication method disclosed in any of the foregoing embodiments. In addition, the resources stored in the memory 21 may also include an operating system 212 and data 213, etc., and the storage method may be temporary storage or permanent storage. The operating system 212 may include Windows, Unix, Linux, etc. The data 213 may include, but is not limited to, data involved in the chip-based communication method, etc.

[0218] In some embodiments, the chip may further include a display screen 23, an input / output interface 24, a communication interface 25, a power supply 26, and a communication bus 27.

[0219] Those skilled in the field can understand, Figure 16 The structure shown does not constitute a limitation on the chip and may include more or fewer components than illustrated.

[0220] The processor 22 implements the chip-based communication method provided in any of the above embodiments by calling instructions stored in the memory 21.

[0221] For an introduction to the chip provided by this invention, please refer to the above method embodiments. This invention will not be described in detail here, but it has the same beneficial effects as the above-described communication method based on the chip's internal structure.

[0222] Furthermore, the present invention also provides a computer-readable storage medium storing a computer program, which, when executed by processor 22, implements the steps of the above-described chip-based communication method.

[0223] It is understood that if the methods in the above embodiments are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and executes all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0224] For an introduction to the computer-readable storage medium provided by the present invention, please refer to the above method embodiments. The present invention will not be described again here, but it has the same beneficial effects as the above-described chip-based communication method.

[0225] Figure 17 A schematic diagram of a queue manager provided in an embodiment of the present invention is shown below. Figure 17 As shown, the central processing unit 4 communicates with the functional modules 10 through the queue manager 9, and the functional modules 10 also communicate with each other through the queue manager 9. During the communication between the queue manager 9 and the central processing unit 4, data is retrieved from the corresponding memory 8.

[0226] The foregoing has provided a detailed description of the chip-based communication method, the chip-based communication device, the chip, and the medium provided by this invention. The various embodiments in the specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the devices disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the descriptions are relatively simple; relevant parts can be referred to in the method section. It should be noted that those skilled in the art can make various improvements and modifications to this invention without departing from the principles of the invention, and these improvements and modifications also fall within the protection scope of the claims of this invention.

[0227] It should also be noted that, in this specification, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

Claims

1. A communication method based on an internal chip, characterized in that, Applied to the sending end, including: Get the current data to be transmitted; The current data is sent to the queue manager so that the queue manager can determine the actual sending queue corresponding to the receiving end based on the current data; and the virtual queue in the queue manager is invoked to store the current data. The current data is sent to the receiving end through the actual sending queue of the receiving end so that the receiving end can process the current data to obtain the corresponding feedback data, and determine the actual receiving queue of the receiving end and the actual sending queue of the sending end in the queue manager based on the feedback data, and receive the feedback data into the corresponding virtual queue through the actual receiving queue of the receiving end. The feedback data sent by the actual sending queue corresponding to the sending end in the queue manager is received to complete the communication transmission of the current data.

2. The chip-based communication method according to claim 1, characterized in that, The current data transmission type includes transmission types between the CPU and functional modules or between the functional modules, and invoking the virtual queue within the queue manager includes: When the sending end is the CPU, the current data is parsed to determine the corresponding virtual queue; and the virtual queue is called according to the parsed and determined virtual queue. When the sending end is a first functional module, the actual receiving queue corresponding to the first functional module in the queue manager is determined according to the current data. The first functional module receives the current data through the corresponding actual queue in the queue manager, routes the current data to the first virtual queue corresponding to the first functional module, and makes a call according to the routed first virtual queue.

3. The chip-based communication method according to claim 1 or 2, characterized in that, The process of establishing the virtual queue includes: Obtain the data to be transmitted and the corresponding transmission direction, wherein the transmission direction includes the transmission direction based on the actual sending queue and the reception direction based on the actual receiving queue; Determine the prefetch command pointer or prefill pointer in the virtual queue based on the transmission direction; When the transmission direction is based on the actual transmission queue, the FW firmware read data pointer and the pointer in the actual transmission queue are determined according to the data to be transmitted; When the transmission direction is the receiving direction based on the actual receiving queue, the FW firmware write data pointer and the pointer in the actual receiving queue are determined according to the data to be transmitted; The sending status of the actual sending queue and the receiving status of the actual receiving queue are determined based on the data to be transmitted. The actual flow rate of the actual transmission queue is determined based on the data to be transmitted. The virtual queue is established by determining its empty / full state and the FW firmware's abnormal state through a first-in-first-out (FIFO) state.

4. The chip-based communication method according to claim 3, characterized in that, When the transmission direction of the data to be transmitted is the transmission direction of the actual transmission queue, determining the transmission status of the actual transmission queue based on the data to be transmitted includes: A first preset data volume and a critical data volume to be sent are preset, wherein the critical data volume is greater than the first preset data volume; Obtain the actual data volume of the data to be transmitted; When the actual data volume is less than the first preset data volume, other data to be transmitted is acquired and merged, so that when the actual data volume of the data to be transmitted and the other data to be transmitted reach the first preset data volume, the data to be transmitted and the other data to be transmitted are transmitted through the actual transmission queue to determine the transmission status of the actual transmission queue. When the actual data volume is greater than the first preset data volume and reaches the critical data volume, the data to be transmitted is sent through the actual sending queue to determine the sending status of the actual sending queue. Correspondingly, when the transmission direction is the reception direction based on the actual reception queue, determining the reception status of the actual reception queue according to the data to be transmitted includes: Obtain the current data volume and saturation data volume within the virtual queue; When the difference between the current data volume and the saturated data volume reaches a second preset data volume, a first flag bit is set in the virtual queue. Send the first flag bit to the current actual receiving queue; Obtain the data to be transmitted currently in the actual receive queue; After the data to be transmitted in the current actual receiving queue is sent to the sending end, the current actual receiving queue is reverse-pressed to determine the receiving status of the actual receiving queue.

5. The chip-based communication method according to claim 3, characterized in that, Determining the actual flow rate of the actual transmission queue based on the data to be transmitted includes: Obtain the flow control upper limit and current flow rate within the actual sending queue; If the current flow rate is less than the flow control upper limit, obtain a token bucket; Request a token from the token bucket based on the transmission rate of the data to be transmitted; If the token is obtained, then the token generation rate in the token bucket is obtained; The current traffic rate is adjusted based on the token generation speed to determine the actual traffic rate.

6. The chip-based communication method according to claim 1, characterized in that, When the actual sending queue includes multiple sub-actual sending queues, the process of establishing the actual sending queue includes: Obtain the current data; The current data is stored in the SRAM space within the actual transmission queue so that the current data can be allocated to the target sub-transmission actual queue; When the SRAM space allocated to the target sub-transmission actual queue is less than the preset space and there is some untransmitted data in other SRAM spaces, after the target sub-transmission actual queue transmits other data in the current data except for the untransmitted data, a data transmission request is requested from the set of transmission actual queues in the transmission actual queue so as to transmit the untransmitted data.

7. A communication method based on an internal chip, characterized in that, Applied to the receiving end, including: Obtain the current data sent by the sending end through the actual sending queue corresponding to the receiving end in the queue manager, wherein the actual sending queue is obtained from the current data to be transmitted in the queue manager, and the current data is stored in a virtual queue in the queue manager; The current data is processed to obtain the corresponding feedback data; Based on the feedback data, determine the actual receiving queue corresponding to the receiving end and the actual sending queue corresponding to the sending end in the queue manager; The feedback data is received by the receiving end through the actual receiving queue and then sent to the corresponding virtual queue so that the sending end can receive the feedback data sent by the sending actual sending queue corresponding to the sending end in the queue manager to complete the communication transmission of the current data.

8. A communication device based on an internal chip, characterized in that, Applied to the sending end, including: The first acquisition module is used to acquire the current data to be transmitted; The first determining module is used to send the current data to the queue manager so that the queue manager can determine the actual sending queue corresponding to the receiving end based on the current data; and call the virtual queue in the queue manager to store the current data; The first sending module is used to send the current data to the receiving end through the actual sending queue of the receiving end so that the receiving end can process the current data to obtain corresponding feedback data, and determine the actual receiving queue of the receiving end and the actual sending queue of the sending end in the queue manager according to the feedback data, and receive the feedback data into the corresponding virtual queue through the actual receiving queue of the receiving end. The first receiving module is used to receive the feedback data sent by the actual sending queue corresponding to the sending end in the queue manager to complete the communication transmission of the current data.

9. A communication device based on an internal chip, characterized in that, Applied to the receiving end, including: The second acquisition module is used to acquire the current data sent by the sending end through the actual sending queue corresponding to the receiving end in the queue manager, wherein the actual sending queue is obtained from the current data to be transmitted in the queue manager, and the current data is stored in a virtual queue in the queue manager; The first processing module is used to process the current data to obtain corresponding feedback data; The second determining module is used to determine the actual receiving queue corresponding to the receiving end and the actual sending queue corresponding to the sending end in the queue manager based on the feedback data. The second receiving module is used to receive the feedback data into a corresponding virtual queue through the receiving actual queue of the receiving end, so that the sending end can receive the feedback data sent by the sending actual queue corresponding to the sending end in the queue manager to complete the communication transmission of the current data.

10. A chip, characterized in that, include: Memory, used to store computer programs; A processor for executing the computer program to implement the steps of the chip-based communication method as described in any one of claims 1 to 7.

11. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the chip-based communication method as described in any one of claims 1 to 7.

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