An epitaxial structure for GaN power devices and a growth method thereof

CN117766570BActive Publication Date: 2026-08-21INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI
View PDF 1 Cites 0 Cited by

Patent Information

Application Number
CN202311798935.4
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-12-25
Publication Date
2026-08-21
Estimated Expiration
2043-12-25

AI Technical Summary

Technical Problem

[0005]有鉴于此,本公开提供了一种用于GaN功率器件的外延结构及其生长方法,用于至少部分解决目前用于GaN功率器件的外延结构存在的晶体质量低、阻值低、外延厚度大及生产成本高等问题

Benefits of technology

[0020] This disclosure overcomes the shortcomings of the prior art by providing an epitaxial structure and its growth method for GaN power devices. On the one hand, it employs a patterned substrate, ensuring that the crystal quality of the epitaxial layer is not reduced due to high-resistivity doping. This avoids the adverse effects of early introduction of high-resistivity impurities such as Fe and C, achieving ultra-high crystal quality, which is beneficial for improving the forward and reverse performance of the device. At the same time, it obtains high-resistivity epitaxial materials, thereby improving the breakdown voltage of the material. On the other hand, high-resistivity impurities are used for both the high-resistivity nucleation layer and the high-resistivity thickening layer, achieving high resistance across the entire epitaxial layer. This eliminates potential conductive channels at the bottom layer, thereby greatly improving the breakdown voltage of the material and the device, and effectively reducing the total thickness of the epitaxial layer, thus reducing production costs.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN117766570B_ABST
    Figure CN117766570B_ABST
Patent Text Reader

Abstract

The present disclosure provides an epitaxial structure for GaN power devices and a growth method thereof, which comprises, from bottom to top, a patterned substrate (1), a high-resistance nucleation layer (2), a high-resistance thickening layer (3), and a surface layer (4); wherein the high-resistance nucleation layer (2) and the high-resistance thickening layer (3) are both doped with high-resistance impurities. The epitaxial structure of the present disclosure can avoid the adverse effects caused by the early introduction of high-resistance impurities, and can achieve high crystal quality and high resistance from the beginning of the epitaxial stage, eliminate potential conductive channels in the bottom layer, provide a high-quality foundation for the high-voltage and excellent forward performance of subsequent GaN power devices, greatly improve the forward and reverse characteristics of the devices, and at the same time save the epitaxial thickness and greatly reduce the production cost.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor materials technology, and specifically to an epitaxial structure for GaN power devices and a method for growing the same. Background Technology

[0002] GaN, as a member of the third-generation semiconductor material system, possesses unique advantages such as a large bandgap, high critical breakdown electric field strength, high electron saturation drift velocity, strong radiation resistance, and stable chemical properties. It has significant application value in high-power, high-frequency electronic devices and has been widely researched and applied. Due to the lack of natural homogeneous substrates for GaN, and the small size and high cost of artificial substrates, GaN thin films have long been obtained through epitaxy on heterogeneous substrates. However, the limitations of heteroepitaxial growth, such as material quality constraints and the high background carrier concentration introduced by the epitaxial growth method, lead to significant leakage current in devices, limiting the further application of GaN.

[0003] Patterned substrates offer a convenient way to obtain high-quality GaN films, while Fe and C doping can yield GaN with higher resistivity. However, if applied improperly, these high-resistivity impurities can severely degrade the crystal quality of the epitaxial layer. Although using thick GaN films or thick nucleation layers as templates and performing high-resistivity doping on them can produce high-quality high-resistivity epitaxial layers, thick GaN films significantly increase costs. Furthermore, high-voltage devices operating at high voltages will preferentially experience leakage and breakdown in the lower-resistivity regions of the undoped thick GaN films or thick nucleation layers. This greatly reduces device reliability and fails to utilize the material's superior properties. Summary of the Invention

[0004] (a) Technical problems to be solved

[0005] In view of this, this disclosure provides an epitaxial structure for GaN power devices and a method for growing the same, which at least partially solves the problems of low crystal quality, low resistance, large epitaxial thickness and high production cost of current epitaxial structures for GaN power devices.

[0006] (II) Technical Solution

[0007] To achieve the above objectives, a first aspect of this disclosure provides an epitaxial structure for GaN power devices, comprising, from bottom to top: a patterned substrate, a high-resistivity nucleation layer, a high-resistivity thickening layer, and a surface layer; wherein the high-resistivity nucleation layer and the high-resistivity thickening layer are both doped with high-resistivity impurities.

[0008] According to embodiments of this disclosure, the patterned substrate is one of a patterned GaN substrate, a patterned sapphire substrate, an AlN-patterned sapphire composite substrate, a patterned Si substrate, an AlN-patterned Si composite substrate, a patterned SiC substrate, and an AlN-patterned SiC composite substrate.

[0009] According to embodiments of this disclosure, the high-resistivity impurities doped in the high-resistivity nucleation layer and the high-resistivity thickening layer are one or a combination of two or more of Mg, Fe, intentional C and unintentional C.

[0010] According to embodiments of this disclosure, the high-resistivity impurity doping concentration of the high-resistivity nucleation layer and the high-resistivity thickening layer is 1×10⁻⁶. 16 cm -3 ~1×10 20 cm -3 .

[0011] According to embodiments of this disclosure, the thickness of the high-resistivity nucleation layer is 5–1000 nm, and the material is one or a combination of two or more of GaN, AlN, AlGaN, InGaN, and AlInGaN.

[0012] According to embodiments of this disclosure, the thickness of the high-resistivity thickened layer is 100–4000 nm, and the material is one or a combination of two or more of GaN, AlN, AlGaN, InGaN, and AlInGaN.

[0013] According to embodiments of this disclosure, the thickness of the surface layer is 100–4000 nm, and the material is one or a combination of two or more of GaN, AlN, AlGaN, InGaN, and AlInGaN.

[0014] A second aspect of this disclosure provides a method for growing an epitaxial structure for a GaN power device, comprising: obtaining a patterned substrate and performing high-temperature cleaning on the patterned substrate; growing a high-resistivity nucleation layer, a high-resistivity thickening layer and a surface layer sequentially from bottom to top on the upper surface of the patterned substrate; wherein the high-resistivity nucleation layer and the high-resistivity thickening layer are both doped with high-resistivity impurities.

[0015] According to embodiments of this disclosure, the patterned substrate is cleaned at a temperature of 800–1400°C, a pressure of 25–800 mbar, and a time of 0.2–25 min.

[0016] According to embodiments of this disclosure, the growth temperature of the high-resistivity nucleation layer is 450–1200°C, and the pressure is 25–600 mbar.

[0017] According to embodiments of this disclosure, the growth temperature of the high-resistivity thickened layer is 950–1250°C, and the pressure is 100–800 mbar.

[0018] According to embodiments of this disclosure, the growth temperature of the surface layer is 1000–1300°C, and the pressure is 50–600 mbar.

[0019] (III) Beneficial Effects

[0020] This disclosure overcomes the shortcomings of the prior art by providing an epitaxial structure and its growth method for GaN power devices. On the one hand, it employs a patterned substrate, ensuring that the crystal quality of the epitaxial layer is not reduced due to high-resistivity doping. This avoids the adverse effects of early introduction of high-resistivity impurities such as Fe and C, achieving ultra-high crystal quality, which is beneficial for improving the forward and reverse performance of the device. At the same time, it obtains high-resistivity epitaxial materials, thereby improving the breakdown voltage of the material. On the other hand, high-resistivity impurities are used for both the high-resistivity nucleation layer and the high-resistivity thickening layer, achieving high resistance across the entire epitaxial layer. This eliminates potential conductive channels at the bottom layer, thereby greatly improving the breakdown voltage of the material and the device, and effectively reducing the total thickness of the epitaxial layer, thus reducing production costs. Attached Figure Description

[0021] Figure 1 A schematic diagram illustrating an epitaxial structure for a GaN power device provided in an embodiment of this disclosure is shown.

[0022] Figure 2 This schematically illustrates a method for growing epitaxial structures for GaN power devices according to an embodiment of the present disclosure.

[0023] Figure 3 A schematic diagram of the X-ray bicrystalline diffraction curve of the (0002) plane of the epitaxial GaN sample provided in the embodiments of this disclosure is shown.

[0024] Figure 4 An epitaxial GaN sample provided in an embodiment of this disclosure is illustrated schematically. A schematic diagram of the X-ray double crystal diffraction curve of the surface;

[0025] Figure 5 The schematic diagram illustrates the test results of the high-temperature contact sheet resistance of the epitaxial GaN sample provided in the embodiments of this disclosure.

[0026] Explanation of reference numerals in the attached figures:

[0027] 1- Patterned substrate;

[0028] 2-High-resistivity nucleation layer;

[0029] 3-High-resistivity thickened layer;

[0030] 4-Surface layer. Detailed Implementation

[0031] The embodiments of the present disclosure will now be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the disclosure. In the following detailed description, numerous specific details are set forth to provide a thorough understanding of the embodiments of the present disclosure for ease of explanation. However, it will be apparent that one or more embodiments may be practiced without these specific details. Furthermore, descriptions of well-known structures and techniques are omitted in the following description to avoid unnecessarily obscuring the concepts of the present disclosure.

[0032] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. The terms “comprising,” “including,” etc., as used herein indicate the presence of the stated features, steps, operations, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, or components.

[0033] All terms used herein (including technical and scientific terms) have the meanings commonly understood by those skilled in the art, unless otherwise defined. It should be noted that the terms used herein are to be interpreted in a manner consistent with the context of this specification, and not in an idealized or overly rigid way.

[0034] Figure 1 A schematic diagram of an epitaxial structure for a GaN power device provided in an embodiment of this disclosure is shown.

[0035] like Figure 1 As shown, the epitaxial structure for GaN power devices includes, from bottom to top: a patterned substrate 1, a high-resistivity nucleation layer 2, a high-resistivity thickened layer 3, and a surface layer 4.

[0036] Furthermore, both the high-resistivity nucleation layer 2 and the high-resistivity thickened layer 3 are doped with high-resistivity impurities.

[0037] In this embodiment, by using a patterned substrate, the adverse effects of introducing high-resistivity impurities in the early stages can be avoided, achieving high crystal quality. Both the high-resistivity nucleation layer 2 and the high-resistivity thickening layer 3 are doped with high-resistivity impurities, achieving high resistance from the epitaxial stage and eliminating potential conductive channels in the underlying layer. This provides a high-quality foundation for the high breakdown voltage and excellent forward performance of subsequent GaN power devices, greatly improving the forward and reverse characteristics of the devices, while saving epitaxial thickness and significantly reducing production costs.

[0038] In this embodiment of the disclosure, the patterned substrate 1 is one of a patterned GaN substrate, a patterned sapphire substrate, an AlN-patterned sapphire composite substrate, a patterned Si substrate, an AlN-patterned Si composite substrate, a patterned SiC substrate, and an AlN-patterned SiC composite substrate.

[0039] Specifically, the choice of different patterned substrate materials, such as GaN, sapphire, Si, and SiC, provides more possibilities for GaN power devices, allowing for the selection of a suitable substrate based on specific application requirements. The upper surface of the patterned substrate can be serrated, trapezoidal, hemispherical, or other shapes, and the arrangement of the patterns on the upper surface can be triangular, quadrilateral, or other periodic / aperiodic structures. Patterning the substrate allows for better control of epitaxial layer growth, reducing defects and impurities, and improving the quality of the epitaxial layer. Simultaneously, it can optimize the stress distribution of the epitaxial layer, reduce stress concentration, and improve the stability and reliability of the device.

[0040] In this embodiment, the high-resistivity nucleation layer 2 and the high-resistivity thickening layer 3 are doped with one or more of Mg, Fe, intentional C, and unintentional C. Simultaneously, the high-resistivity impurity doping concentration of the high-resistivity nucleation layer 2 and the high-resistivity thickening layer 3 is 1 × 10⁻⁶. 16 cm -3 ~1×10 20 cm -3 .

[0041] One or more combinations of Mg, Fe, intentional C, and unintentional C are used as high-resistivity impurities. In addition to the aforementioned high-resistivity impurities, other high-resistivity impurities can also be selected, providing more doping options for the epitaxial structure of GaN power devices. These different impurities introduce different energy levels into GaN, exhibiting different electrical properties. Their behavior in GaN differs depending on whether they are incorporated into the GaN lattice during epitaxy or after epitaxy, resulting in varying impacts on the device. This allows for optimization for specific application requirements, broadening the application range and fields of GaN materials. Furthermore, the high-resistivity impurity doping concentration is 1×10⁻⁶. 16 cm -3 ~1×10 20 cm -3 This concentration range provides greater flexibility for epitaxial structures. Depending on the specific requirements, an appropriate concentration can be selected to optimize specific or key device performance.

[0042] By doping with high-resistivity impurities, unintentional donor impurities in the material can be compensated, the background carrier concentration can be reduced, the material resistivity can be greatly improved, leakage current can be reduced, and the breakdown voltage and stability of the device can be enhanced. Furthermore, by selecting different high-resistivity impurities and concentrations, the stress distribution of the epitaxial layer can be further optimized, stress concentration can be reduced, and the stability and reliability of the device can be improved.

[0043] In this embodiment, the high-resistivity nucleation layer 2 has a thickness of 5–1000 nm and is made of one or more of GaN, AlN, AlGaN, InGaN, and AlInGaN. The high-resistivity thickened layer 3 has a thickness of 100–4000 nm and is made of one or more of GaN, AlN, AlGaN, InGaN, and AlInGaN. The surface layer 4 has a thickness of 100–4000 nm and is made of one or more of GaN, AlN, AlGaN, InGaN, and AlInGaN.

[0044] Specifically, layered structures are formed from the aforementioned materials, with the high-resistivity nucleation layer 2 and the high-resistivity thickening layer 3 being one or more combined layer structures. By precisely controlling the material, thickness, and doping concentration of each layer, the transport characteristics of charge carriers in the epitaxial structure can be optimized, thereby improving the switching speed and efficiency of the device. Simultaneously, leakage current and energy loss can be reduced, improving the efficiency and stability of the device.

[0045] Figure 2 The illustration shows a schematic diagram of a method for growing epitaxial structures for GaN power devices according to an embodiment of the present disclosure.

[0046] Another aspect of the embodiments of this disclosure provides a method for growing epitaxial structures for GaN power devices, the flowchart of which can be found in [reference needed]. Figure 2 As shown, it specifically includes S1-S2.

[0047] In operation S1, patterned substrate 1 is acquired and patterned substrate 1 is cleaned at high temperature.

[0048] In operation S2, a high-resistivity nucleation layer 2, a high-resistivity thickening layer 3, and a surface layer 4 are grown sequentially from bottom to top on the upper surface of the patterned substrate 1; wherein, both the high-resistivity nucleation layer 2 and the high-resistivity thickening layer 3 are doped with high-resistivity impurities.

[0049] By employing a patterned substrate 1 and performing high-temperature cleaning on it, surface impurities, contaminants, and adsorbed gases can be removed, improving the surface quality of the substrate and the growth quality of the epitaxial layer. Simultaneously, the multi-layer growth sequence not only effectively reduces the epitaxial layer thickness and cost but also yields a full-thickness, high-resistivity epitaxial layer, effectively ensuring the breakdown voltage performance of power devices. Furthermore, it avoids the adverse effects of early introduction of high-resistivity impurities such as Fe and C, achieving ultra-high crystal quality and contributing to improved forward and reverse performance of power devices.

[0050] In this embodiment of the disclosure, the temperature for high-temperature cleaning of the patterned substrate 1 is 800–1400°C, the pressure is 25–800 mbar, and the time is 0.2–25 min.

[0051] In this embodiment, the high-resistivity nucleation layer 2 is grown at a temperature of 450–1200°C and a pressure of 25–600 mbar. The high-resistivity thickened layer 3 is grown at a temperature of 950–1250°C and a pressure of 100–800 mbar. The surface layer 4 is grown at a temperature of 1000–1300°C and a pressure of 50–600 mbar.

[0052] Example 1:

[0053] Patterned substrate 1 is an AlN-patterned sapphire composite substrate. High-resistivity nucleation layer 2 has a thickness of 15 nm and is a GaN / AlGaN composite layer structure; it is also Fe-doped. High-resistivity thickening layer 3 has a thickness of 2200 nm, is made of GaN, and is doped with Fe impurities. Surface layer 4 has a thickness of 800 nm and is made of GaN.

[0054] Specifically, the above-mentioned method for growing epitaxial structures for GaN power devices includes steps S11-S15.

[0055] In operation S11, a patterned substrate 1 is prepared and placed in a high vacuum growth chamber. Under gas purging, the vacuum level is evacuated to 50 mbar and maintained for 5 minutes to achieve the purity of the chamber gas.

[0056] In operation S12, the growth temperature is raised to 1100°C, the pressure is 50 mbar, and it is held for 2 minutes to clean the patterned substrate 1 at high temperature.

[0057] In operation S13, a high-resistivity nucleation layer 2 is grown on the patterned substrate 1 at a growth temperature of 850°C and a pressure of 75 mbar.

[0058] In operation S14, a high-resistivity thickened layer 3 is grown on the high-resistivity nucleation layer 2 at a growth temperature of 1050°C and a pressure of 500 mbar.

[0059] In operation S15, a surface layer 4 is grown on the high-resistivity thickened layer 3 at a growth temperature of 1150°C and a pressure of 400 mbar.

[0060] In step S13, the doping concentration of the high-resistivity nucleation layer 2 is 1×10⁻⁶. 19 cm -3 In step S14, the doping concentration of the high-resistivity thickened layer 3 is 6 × 10⁻⁶. 18 cm -3 .

[0061] Figure 3 The diagram illustrates the X-ray bicrystalline diffraction curve of the (0002) plane of an epitaxial GaN sample provided in an embodiment of this disclosure. The horizontal axis represents the rocking curve angle in the ω direction (arcseconds), and the vertical axis represents the relative intensity (arbitrary units).

[0062] Furthermore, X-ray diffraction tests were performed on the epitaxial material in Example 1, specifically testing the rocking curve of the GaN(0002) plane in the ω direction. Figure 3 As shown, the full width at half maximum (FWHM) of the rocking curve in the ω direction of the GaN material (0002) in the embodiment is 78 arcseconds, indicating that the GaN material in the embodiment has a very low screw dislocation density.

[0063] Figure 4 An epitaxial GaN sample provided in an embodiment of this disclosure is illustrated schematically. A schematic diagram of the X-ray twin-crystal diffraction curve of the surface. The horizontal axis represents the wobbling angle of the curve in the ω direction (arcseconds), and the vertical axis represents the relative intensity (in arbitrary units).

[0064] Furthermore, X-ray diffraction tests were performed on the epitaxial material in Example 1, specifically GaN. Test of the rocking curve in the ω-direction. (From...) Figure 4 It can be seen that the GaN material in the embodiments The full width at half maximum (FWHM) of the rocking curve in the ω direction is 120 arcseconds, indicating that the GaN material in the embodiment has a very low edge dislocation density.

[0065] Figure 5 This diagram schematically illustrates the test results of the high-temperature contact sheet resistance of the epitaxial GaN sample provided in the embodiments of this disclosure. The horizontal axis represents 1000 / thermodynamic temperature (K). -1 The vertical axis represents the sheet resistance (Ω / □), the solid line represents the linear extrapolation fitting line, and the dashed line represents the room temperature (RT, 300K) position marker line.

[0066] Furthermore, a contact sheet resistance test was performed on the epitaxial material in the embodiment. The epitaxial material in the embodiment was cut into 1cm×1cm cubes, and 1mm×1mm ohmic contact metal electrodes were prepared at the four corners of the material surface. The sheet resistance of the material was tested at high temperature using the four-probe method. The test results were plotted with sheet resistance (Ω / □) on the vertical axis and 1000 / thermodynamic temperature (K) on the horizontal axis. -1 The data points were plotted in a way that allowed for linear extrapolation to room temperature (RT, 300K) to obtain the sheet resistance of the material at room temperature. Figure 5 It is known that the GaN material in the examples has a sheet resistance of approximately 1 × 10⁻⁶ at room temperature. 16 Ω / □, which translates to a resistivity of approximately 3 × 10⁻⁶. 12 The Ω·cm indicates that the GaN material in the embodiment has a very high resistivity, reaching the level of an insulator.

[0067] The epitaxial structure and growth method for GaN power devices disclosed herein can effectively reduce the thickness of the epitaxial structure and lower costs, while obtaining a full-thickness high-resistivity epitaxial structure. This effectively ensures the breakdown voltage performance of the power device and avoids the adverse effects of early introduction of high-resistivity impurities such as Fe and C, achieving ultra-high crystal quality and improving the forward and reverse performance of the power device. The epitaxial material disclosed herein can achieve both high resistance and high crystal quality in a low-cost and easily implemented manner, avoiding the trade-off between the two and making up for the shortcomings of current high-resistivity thick layer growth methods. This is crucial for obtaining power devices with excellent forward and reverse performance.

[0068] Those skilled in the art will understand that the features described in the various embodiments and / or claims of this disclosure can be combined or combined in various ways, even if such combinations or combinations are not explicitly described in this disclosure. In particular, the features described in the various embodiments and / or claims of this disclosure can be combined or combined in various ways without departing from the spirit and teachings of this disclosure. All such combinations and / or combinations fall within the scope of this disclosure.

[0069] Although this disclosure has been shown and described with reference to specific exemplary embodiments thereof, those skilled in the art will understand that various changes in form and detail may be made to this disclosure without departing from the spirit and scope of the disclosure as defined by the appended claims and their equivalents. Therefore, the scope of this disclosure should not be limited to the above embodiments, but should be defined not only by the appended claims, but also by their equivalents.

Claims

1. An epitaxial structure for GaN power devices, characterized in that, From bottom to top, they include: A patterned substrate (1), a high-resistivity nucleation layer (2), a high-resistivity thickened layer (3), and a surface layer (4); wherein, The patterned substrate (1) is an AlN-patterned sapphire composite substrate, and the high-resistivity nucleation layer (2) is a GaN / AlGaN combined layer structure; Both the high-resistivity nucleation layer (2) and the high-resistivity thickening layer (3) are doped with high-resistivity impurities; Wherein, the high-resistivity impurity is Fe, and the high-resistivity impurity doping concentration of the high-resistivity nucleation layer (2) and the high-resistivity thickening layer (3) is 1×10⁻⁶. 16 cm -3 ~1×10 20 cm -3 The iron doping concentration of the high-resistivity nucleation layer (2) is higher than that of the high-resistivity thickened layer (3).

2. The epitaxial structure according to claim 1, characterized in that, The thickness of the high-resistivity thickened layer (3) is 100~4000nm, and the material is one or more of GaN, AlN, AlGaN, InGaN and AlInGaN.

3. The epitaxial structure according to claim 1, characterized in that, The thickness of the surface layer (4) is 100~4000nm, and the material is one or more of GaN, AlN, AlGaN, InGaN and AlInGaN.

4. A method for growing epitaxial structures for GaN power devices, characterized in that, include: Obtain a patterned substrate (1) and perform high-temperature cleaning on the patterned substrate (1); A high-resistivity nucleation layer (2), a high-resistivity thickening layer (3), and a surface layer (4) are sequentially grown from bottom to top on the upper surface of the patterned substrate (1); wherein, The patterned substrate (1) is an AlN-patterned sapphire composite substrate, and the high-resistivity nucleation layer (2) is a GaN / AlGaN combined layer structure; Both the high-resistivity nucleation layer (2) and the high-resistivity thickening layer (3) are doped with high-resistivity impurities; wherein, the high-resistivity impurity is Fe, and the high-resistivity impurity doping concentration of the high-resistivity nucleation layer (2) and the high-resistivity thickening layer (3) is 1×10⁻⁶. 16 cm -3 ~1×10 20 cm -3 The iron doping concentration of the high-resistivity nucleation layer (2) is higher than that of the high-resistivity thickened layer (3).

5. The method for growing an epitaxial structure according to claim 4, characterized in that, The patterned substrate (1) is cleaned at a temperature of 800~1400℃, a pressure of 25~800mbar, and a time of 0.2~25min.

6. The method for growing an epitaxial structure according to claim 4, characterized in that, The growth temperature of the high-resistivity nucleation layer (2) is 450~1200℃ and the pressure is 25~600mbar.

7. The method for growing an epitaxial structure according to claim 4, characterized in that, The growth temperature of the high-resistivity thickened layer (3) is 950~1250℃ and the pressure is 100~800mbar.

8. The method for growing an epitaxial structure according to claim 4, characterized in that, The growth temperature of the surface layer (4) is 1000~1300℃ and the pressure is 50~600mbar.

Citation Information

Patent Citations

  • Epitaxial wafer used for triode and preparation method thereof

    CN105336769A