Methods for improving the efficiency of power electronic transformers in modular multilevel converters

Abstract

This invention pertains to the field of power electronic transformers and discloses a method for improving the efficiency of a modular multilevel converter power electronic transformer. The method includes: setting k power threshold points within the full power range from zero to rated power, and correspondingly setting k+1 DC bus voltage reference values; sampling the load power at the current moment; determining whether the current load power P(j) meets the threshold; and if it does, maintaining the DC bus voltage at the reference value V. ref i+1 If the condition remains unchanged, all switching devices connected to the half-bridge module will not operate, and the system will continue to operate normally; otherwise, determine whether P(j) satisfies the condition. <P ref i If the conditions are met, the control switches to cut-off; otherwise, it switches to on. This method can improve the converter's efficiency under medium and light loads without significantly affecting its heavy-load efficiency, and is suitable for all applications requiring medium-voltage AC to low-voltage DC conversion.

Description

Technical Field

[0001] This invention relates to the field of power electronic transformers, specifically to a method for improving the efficiency of power electronic transformers in a modular multilevel converter. Background Technology

[0002] In the automotive transportation sector, increasing the penetration rate of electric vehicles in the automotive industry is an inevitable trend. However, due to the significant increase in the number of electric vehicles, the demand for the number and power of charging stations has also increased substantially, leading to the development of centralized megawatt-level medium-voltage high-power supercharging stations. These supercharging stations will directly connect to the medium-voltage AC (MVAC) power grid and convert it to a low-voltage DC (LVDC) bus via power electronic devices. Each charging pile will then connect to the LVDC bus to charge the electric vehicles. Simultaneously, in the data center sector, the development of artificial intelligence and big data has also driven the demand for high-power power supplies. High-power data center power supply systems also require MVAC to LVDC conversion devices. Among different MVAC-LVDC system solutions, replacing traditional power frequency transformers with solid state transformers (SST) can improve efficiency and reduce size, and has been widely studied both domestically and internationally. In the SST scheme, the SST based on the Modular Multilevel Converter (MMC) has advantages such as a two-stage decoupling structure, a small number of high-frequency transformers, and modularity, making it a very promising option.

[0003] Whether in supercharging stations or high-power data center power supply systems, converter efficiency is a crucial indicator, directly impacting the long-term operating costs of the system. Existing research on SST (Signal-to-Standard Transformer) systems typically focuses only on their efficiency under rated or heavy load conditions. However, in practical applications, SSTs do not always operate under heavy load; as load demands change, SSTs may also operate under medium or light load conditions. In these situations, SST efficiency drops significantly, which is highly detrimental to system profitability. In summary, the problem of low efficiency in medium-voltage AC-to-low-voltage DC SST systems under medium or light load conditions has not yet been adequately resolved. Summary of the Invention

[0004] To address the aforementioned issues, this invention focuses on power electronic transformers based on modular multilevel converters (hereinafter referred to as MMC-SST) and proposes a method for improving the efficiency of power electronic transformers based on modular multilevel converters. This method can improve the efficiency of the converter under medium and light loads without affecting its heavy-load efficiency.

[0005] To achieve the above objectives, the present invention adopts the following technical solution:

[0006] This invention provides a method for improving the efficiency of power electronic transformers in a modular multilevel converter, comprising:

[0007] S1: Set k power threshold points within the full power range from zero to rated power, and correspondingly set k+1 DC bus voltage reference values;

[0008] S2: Sample the load power P(j) at the current moment;

[0009] S3: Determine whether the current load power P(j) satisfies P ref i <P(j)<P ref i+1 If the condition is met, proceed to S4; otherwise, proceed to S5.

[0010] S4: DC bus voltage is maintained at the reference value V. ref i+1 The system remains unchanged; all switching devices connected to the half-bridge module do not operate, and the system continues to operate normally.

[0011] S5: Determine whether P(j) satisfies P(j). <P ref i If the condition is met, proceed to S6; otherwise, proceed to S7.

[0012] S6: The DC bus voltage will be controlled by the preceding MMC and start from V. ref i+1 The slope gradually decreases to V. ref i The connection half-bridge module that is in the active state will be switched to the cut-off control.

[0013] S7: The DC bus voltage will be controlled by the preceding MMC and start from V. ref i+1 The slope gradually increases to V ref i+2 One of the connected half-bridge modules that is in the disconnected state will be switched to the control state.

[0014] As a further improvement of the present invention, the maximum reference value of the DC bus voltage is the rated value V of the DC bus voltage. Hdcn =V ref k+1 The input voltage v of it and M IDCs c1 ~v cM The following conditions must be met:

[0015]

[0016] The following conditions must be met between two adjacent DC bus voltage reference values:

[0017]

[0018] As a further improvement to the present invention, the step of sampling the load power P(j) at the current moment further includes:

[0019] Assume that the load power P(j-1) at the previous moment is between two adjacent power threshold points, satisfying P ref i <P(j-1)<P ref i+1 , i = 1, 2, ..., k-1, the system is in normal operating condition.

[0020] As a further improvement of this invention, after switching to cutoff control, one isolated DC module will be gradually disconnected, the system will reach a new operating point, and the DC bus voltage will stabilize at the new reference value V. ref i The half-bridge connection ceases operation; after switching to active control, an isolated DC module will be gradually activated, the system will reach a new operating point, and the DC bus voltage will stabilize at the new reference value V. ref i+2 The connecting half-bridge no longer operates.

[0021] As a further improvement of the present invention, the resection control includes:

[0022] S61: DC bus voltage v Hdc It will gradually change from V over time t. ref i+1 The slope decreases to V ref i ;

[0023] S62: The duty cycle D of the upper transistor of a connected half-bridge module enters the cutoff control, following the DC bus voltage v. Hdc Synchronous changes;

[0024] S63: When v Hdc Reduce to V ref i When the duty cycle D of the upper tube of the connected half-bridge module is reduced to 0, the cut-off control is completed.

[0025] As a further improvement of the present invention, the DC bus voltage v Hdc It will gradually change from V over time t. ref i+1 The slope decreases to V ref i ,satisfy:

[0026]

[0027] In the formula, T s This represents the time taken during the excision procedure.

[0028] As a further improvement of the present invention, the duty cycle D of the upper tube of the connecting half-bridge module satisfies:

[0029]

[0030] The lower tube of the connecting half-bridge module always maintains complementary conduction with the upper tube, while the duty cycle of other connecting half-bridge modules in the system remains unchanged at 1 or 0.

[0031] As a further improvement of the present invention, the input control includes:

[0032] S71: At this time, the DC bus voltage v Hdc It will gradually change from V over time t. ref i+1 The slope increases to V ref i+2 ;

[0033] S72: Simultaneously, the duty cycle D of the upper transistor of a connected half-bridge module enters the control state, following the DC bus voltage v. Hdc Synchronous changes;

[0034] S73: When v Hdc Increase to V ref i The duty cycle D of the upper tube of the connected half-bridge module is increased to 1, and the control is put into operation.

[0035] As a further improvement of the present invention, the DC bus voltage v Hdc It will gradually change from V over time t. ref i+1 The slope increases to V ref i+2 ,satisfy:

[0036]

[0037] In the formula, T s This represents the time required for the input process.

[0038] As a further improvement of the present invention, the duty cycle D of the upper tube of the connecting half-bridge module satisfies:

[0039]

[0040] The lower tube of the connecting half-bridge module always maintains complementary conduction with the upper tube, while the duty cycle of other connecting half-bridge modules in the system remains unchanged at 1 or 0.

[0041] Compared with the prior art, the method of the present invention is summarized here as follows:

[0042] This invention utilizes a variable DC bus voltage, combined with the control of switching on and off isolated DC-DC modules, to improve system efficiency under light and medium loads with minimal impact on rated and heavy-load efficiency. This method is applicable to all applications requiring medium-voltage AC to low-voltage DC conversion. The improved system efficiency across the entire power range results in fewer operating losses, reducing operating costs and generating greater revenue. Furthermore, it extends system lifespan, reduces maintenance costs, and enables long-term operation. Attached Figure Description

[0043] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will now be described in further detail with reference to the accompanying drawings, wherein:

[0044] Figure 1 This is a structural diagram of a power electronic transformer based on a modular multilevel converter;

[0045] Figure 2 This is a flowchart of the efficiency improvement method of the present invention;

[0046] Figure 3 This is a flowchart illustrating the resection control process of the method of the present invention;

[0047] Figure 4 This is a flowchart illustrating the input control process of the method of the present invention;

[0048] Figure 5 The input and output voltages and currents of the MMC-SST system;

[0049] Figure 6 To isolate the process of removing and installing the DC-DC module;

[0050] Figure 7 This is a comparison chart showing the efficiency improvement of the method of the present invention. Detailed Implementation

[0051] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0052] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0053] This invention provides a method for improving the efficiency of power electronic transformers in a modular multilevel converter, comprising the following steps:

[0054] S1: Set k power threshold points within the full power range from zero to rated power, and correspondingly set k+1 DC bus voltage reference values;

[0055] S2: Sample the load power P(j) at the current moment;

[0056] S3: Determine whether the current load power P(j) satisfies P ref i <P(j)<P ref i+1 If the condition is met, proceed to S4; otherwise, proceed to S5.

[0057] S4: DC bus voltage is maintained at the reference value V. ref i+1 The system remains unchanged; all switching devices connected to the half-bridge module do not operate, and the system continues to operate normally.

[0058] S5: Determine whether P(j) satisfies P(j). <P ref i If the condition is met, proceed to S6; otherwise, proceed to S7.

[0059] S6: The DC bus voltage will be controlled by the preceding MMC and start from V. ref i+1 The slope gradually decreases to V. ref i The connection half-bridge module that is in the active state will be switched to the cut-off control.

[0060] S7: The DC bus voltage will be controlled by the preceding MMC and start from V. ref i+1 The slope gradually increases to V ref i+2One of the connected half-bridge modules that is in the disconnected state will be switched to the control state.

[0061] The method of this invention is applicable to all applications requiring medium-voltage AC to low-voltage DC conversion.

[0062] The structure based on MMC-SST is as follows: Figure 1 The diagram shows a two-stage structure. The front stage is a three-phase MMC, with each phase consisting of two arms, and each arm composed of N submodules (SMs). The three phases share a common DC bus, and the DC bus voltage is denoted as v. Hdc The subsequent DC-DC stage consists of M isolated DC-DC (IDC) modules connected in series at the inputs and in parallel at the outputs. The input sides of h IDCs are also cascaded with additional half-bridge (HB) modules. The output v of the preceding stage... Hdc The DC-DC converter is connected to the filter inductor L. dc Connection. During normal operation, the upper switch signal of the half-bridge module remains constant at 1 or 0. A constant 1 indicates the active state, and a constant 0 indicates the deactivated state. The lower switch signal always complements the upper switch signal.

[0063] Based on the MMC-SST system, the efficiency improvement method proposed in this invention is described in detail below:

[0064] The above describes the efficiency improvement method for variable DC bus proposed in this invention for power electronic transformers based on modular multilevel converters. The flowchart is as follows. Figure 2 As shown, it includes the following:

[0065] Step 1: Set k power threshold points P across the full power range from zero to rated power. ref 1~P ref k Correspondingly, k+1 DC bus voltage reference values ​​V are set. ref 1~V ref k+1 The maximum reference value of the DC bus voltage represents the rated DC bus voltage V of the system. Hdcn =V ref k+1 The input voltage v of it and M IDCs c1 ~v cM The following conditions must be met:

[0066]

[0067] The following conditions must be met between two adjacent DC bus voltage reference values:

[0068]

[0069] Step 2: Assume that the load power P(j-1) at the previous moment is between two adjacent power threshold points, satisfying P ref i <P(j-1)<P ref i+1 Let i = 1, 2, ..., k-1, and the system be in normal operation. Sample the load power P(j) at the current moment;

[0070] Step 3: Determine whether the current load power P(j) satisfies P ref i <P(j)<P ref i+1 If the condition is met, proceed to step 4; otherwise, proceed to step 5.

[0071] Step 4: When P(j) satisfies P ref i <P(j)<P ref i+1 At this time, the DC bus voltage remains at the reference value V. ref i+1 The system remains unchanged; all switching devices connected to the half-bridge module do not operate, and the system continues to operate normally.

[0072] Step 5: When P(j) does not satisfy P ref i <P(j)<P ref i+1 Determine whether P(j) satisfies P(j). <P ref i If the condition is met, proceed to step 6; otherwise, proceed to step 7.

[0073] Step 6: When P(j) satisfies P(j) <P ref i At this point, the DC bus voltage will be controlled by the preceding MMC and start from V. ref i+1 The slope gradually decreases to V. ref i Simultaneously, a connected half-bridge module that is in operation will enter "disconnection control". Ultimately, an isolated DC module will be gradually disconnected, the system will reach a new operating point, and the DC bus voltage will stabilize at the new reference value V. ref i The connecting half-bridge no longer operates;

[0074] Step 7: When P(j) does not satisfy P(j) <P ref i Then P(j)>P ref i+1At this point, the DC bus voltage will be controlled by the preceding MMC and start from V. ref i+1 The slope gradually increases to V ref i+2 Simultaneously, a disconnected half-bridge module will be put into operation. Finally, an isolated DC module will be gradually activated, the system will reach a new operating point, and the DC bus voltage will stabilize at the new reference value V. ref i+2 The connecting half-bridge no longer operates.

[0075] As part of this method, the cut-off control and "engagement" control of the connecting half-bridge module mentioned in steps 6 and 7 above are as follows.

[0076] The flowchart of resection control is as follows Figure 3 As shown, resection control includes:

[0077] Step 61: At this time, the DC bus voltage v Hdc It will gradually change from V over time t. ref i+1 The slope decreases to V ref i ,satisfy:

[0078]

[0079] In the formula, T s This represents the time taken during the excision procedure.

[0080] Step 62: Simultaneously, the duty cycle D of the upper transistor of one of the connected half-bridge modules is switched off, following the DC bus voltage v. Hdc Synchronous changes:

[0081]

[0082] The lower tube of the connecting half-bridge module always maintains complementary conduction with the upper tube, while the duty cycle of other connecting half-bridge modules in the system remains unchanged at 1 or 0.

[0083] Step 63: When v Hdc Reduce to V ref i Meanwhile, in step 2, the duty cycle D of the upper tube of the connecting half-bridge module is reduced to 0, completing the cut-off control.

[0084] The flowchart of input control is as follows Figure 4 As shown, input control includes:

[0085] Step 71: At this time, the DC bus voltage v Hdc It will gradually change from V over time t. ref i+1 The slope increases to Vref i+2 ,satisfy:

[0086]

[0087] In the formula, T s This represents the time required for the input process.

[0088] Step 72: Simultaneously, the duty cycle D of the upper transistor of one of the connected half-bridge modules enters the "engagement" control, following the DC bus voltage v. Hdc Synchronous changes:

[0089]

[0090] The lower tube of the connecting half-bridge module always maintains complementary conduction with the upper tube, while the duty cycle of other connecting half-bridge modules in the system remains unchanged at 1 or 0.

[0091] Step 73: When v Hdc Increase to V ref i Meanwhile, in step 2, the duty cycle D of the upper tube of the connecting half-bridge module is increased to 1, completing the control input.

[0092] To verify the correctness of the method of the present invention, the method is further described herein with reference to the accompanying drawings and specific embodiments. The specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0093] based on Figure 1 The MMC-SST system, a medium-voltage AC to low-voltage DC converter, is shown in Table 1, with specific parameters of the converter provided in a concrete embodiment. The system has a rated power of 1 MVA, a three-phase medium-voltage AC input voltage of 10 kV AC, and an output low-voltage DC voltage of 1 kV DC. The rated value V of the DC bus voltage output from the preceding MMC stage is set. Hdcn The voltage is 10kV, and each phase arm of the bridge consists of N=12 full-bridge sub-modules connected in series, with each sub-module having a rated voltage of 1.1kV. The subsequent DC-DC converter consists of M=10 IDC modules connected in series with their inputs and parallel with their outputs. Each IDC has an input voltage of 1kV, a switching frequency equal to the resonant frequency of 20kHz, and a transformer ratio of 1:1. The DC filter inductor between the front and rear stages is 3mH, and the number of half-bridge modules connected is h=6.

[0094] Table 1. Specific parameters of the converter

[0095]

[0096] Based on the above parameters, this paper uses Matlab / Simulink to build a simulation of the MMC-SST system to verify the feasibility of the method of this invention in realizing variable DC bus voltage, module connection and disconnection. The simulation waveforms are as follows: Figure 5 , Figure 6 As shown

[0097] Figure 5 The diagram illustrates the input and output voltage and current waveforms during load power changes. Before 0.35s, the system operates stably at 1MW, with the medium-voltage AC input voltage and current exhibiting a sinusoidal distribution. The DC bus voltage remains stable at 10kV, and the low-voltage output DC voltage remains stable at 1kV. Starting at 0.35s, the load current gradually decreases, and the intermediate DC bus current (idc) decreases accordingly, while the output voltage remains at 1kV. When the load power drops to the first power threshold point (approximately 0.4s), the DC bus voltage begins to gradually decrease from 10kV to 9kV. During this process, an isolated DC-DC converter module is gradually disconnected, and the system eventually reaches a new steady state, with the DC bus voltage stabilizing at 9kV and the output DC voltage stabilizing at 1kV. Then, at 0.55s, the load power gradually decreases again to the second power threshold, and the above process repeats, with the DC bus voltage eventually stabilizing at 8kV and the output DC voltage remaining stable at 1kV. At 0.75s, the load power begins to gradually increase, and when it exceeds the second power threshold, the DC bus voltage gradually rises from 8kV to 9kV, while an isolated DC-DC converter module is gradually activated. Finally, the system reaches a new steady state, with the DC bus voltage stabilizing at 9kV, and the output DC voltage fluctuations are small throughout all the above processes, remaining around 1kV.

[0098] Figure 6 This corresponds to the switching signals for the disconnection and connection of the connected half-bridge submodules in the above process. When the DC bus voltage drops, the duty cycle of the upper transistor of a connected isolated DC-DC module gradually changes from 1 to 0, corresponding to the disconnection process; when the DC bus voltage rises, the duty cycle of the upper transistor of a disconnected isolated DC-DC module gradually changes from 0 to 1, corresponding to the connection process. The connected half-bridge submodules that do not need to be connected or disconnected remain inactive.

[0099] The results show that the method of the present invention can stably and smoothly realize the switching of variable DC bus voltage and DC-DC modules under different power levels, verifying its practical feasibility.

[0100] Under the embodiment parameters shown in Table 1, Figure 7The figure demonstrates the efficiency improvement achieved by the method of this invention. The horizontal axis represents load power, and the vertical axis represents efficiency. The thick black line in the figure represents the system efficiency curve under a constant DC bus voltage, the thick red line represents the efficiency curve using the method of this invention, and the other curves represent the efficiency curves under different DC bus voltages (i.e., the thick red line represents the optimal efficiency curve under different DC bus voltages and power levels). The results show that the method of this invention can achieve a significant improvement in efficiency under medium and light loads with minimal loss of heavy-load efficiency, verifying the correctness and practicality of the method.

[0101] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the specific implementation of the present invention. Any modifications or equivalent substitutions that do not depart from the spirit and scope of the present invention should be covered within the scope of protection of the claims of the present invention.

Claims

1. A method for improving the efficiency of power electronic transformers in a modular multilevel converter, characterized in that, include: S1: Set k power threshold points within the full power range from zero to rated power, and correspondingly set k+1 DC bus voltage reference values; S2: Sample the load power at the current moment. P ( j ); S3: Determine the current load power P ( j Does it satisfy? P ref i < P ( j )< P ref i+1 If the condition is met, proceed to S4; otherwise, proceed to S5. P ref i For i power threshold points, P ref i+1 There are i+1 power threshold points; S4: DC bus voltage remains at the reference value. V ref i+1 The system remains unchanged; all switching devices connected to the half-bridge module do not operate, and the system continues to operate normally. S5: Judgment P ( j Does it satisfy? P ( j )< P ref i If the condition is met, proceed to S6; otherwise, proceed to S7. S6: The DC bus voltage will be controlled by the preceding MMC from... V ref i+1 The slope gradually decreases to V ref i The process involves switching one of the connected half-bridge modules currently in the active state to a cutoff control state; the cutoff control includes: S61: DC bus voltage v Hdc Will with time t Gradually from V ref i+1 The slope decreases to V ref i ; S62: The duty cycle D of the upper transistor of a connected half-bridge module enters the cutoff control, following the DC bus voltage. v Hdc Synchronous changes; S63: When v Hdc Reduce to V ref i When the duty cycle D of the upper tube of the connected half-bridge module is reduced to 0, the cut-off control is completed. S7: The DC bus voltage will be controlled by the preceding MMC from... V ref i+1 The slope gradually increases to V ref i+2 The control process involves switching one of the connected half-bridge modules currently in a disconnected state to an active state, wherein the active control includes: S71: DC bus voltage at this time v Hdc Will with time t Gradually from V ref i+1 The slope increases to V ref i+2 ; S72: Simultaneously, the duty cycle D of the upper transistor of a connected half-bridge module enters the control state, following the DC bus voltage. v Hdc Synchronous changes; S73: When v Hdc Increase to V ref i The duty cycle D of the upper tube of the connected half-bridge module is increased to 1, and the control is put into operation.

2. The method for improving the efficiency of a power electronic transformer in a modular multilevel converter according to claim 1, characterized in that, The maximum reference value for the DC bus voltage is the rated value of the DC bus voltage. V Hdcn = V ref k+1 The input voltage of it and M IDCs v c1 ~ v cM The following conditions must be met: The following conditions must be met between two adjacent DC bus voltage reference values: 。 3. The method for improving the efficiency of a power electronic transformer in a modular multilevel converter according to claim 1, characterized in that, The load power at the current sampling time P ( j This also includes: Assuming the load power at the previous moment P ( j -1) Located between two adjacent power threshold points, satisfying... P ref i < P ( j -1)< P ref i+1 , i =1,2,…, k -1 indicates that the system is in normal operating condition.

4. The method for improving the efficiency of a power electronic transformer in a modular multilevel converter according to claim 1, characterized in that, After switching to cutoff control, one isolated DC module will be gradually disconnected, the system will reach a new operating point, and the DC bus voltage will stabilize at the new reference value. V ref i The half-bridge will cease operation; after switching to active control, an isolated DC module will be gradually activated, the system will reach a new operating point, and the DC bus voltage will stabilize at the new reference value. V ref i+2 The connecting half-bridge no longer operates.

5. The method for improving the efficiency of a power electronic transformer in a modular multilevel converter according to claim 1, characterized in that, The DC bus voltage v Hdc Will with time t Gradually from V ref i+1 The slope decreases to V ref i ,satisfy: In the formula, T s This represents the time taken during the excision procedure.

6. The method for improving the efficiency of a power electronic transformer in a modular multilevel converter according to claim 2, characterized in that, The duty cycle D of the upper tube of the connecting half-bridge module satisfies: The lower tube of the half-bridge module always maintains complementary conduction with the upper tube, while the duty cycle of other connected half-bridge modules in the system remains unchanged at 1 or 0.

7. The method for improving the efficiency of a power electronic transformer in a modular multilevel converter according to claim 1, characterized in that, The DC bus voltage v Hdc Will with time t Gradually from V ref i+1 The slope increases to V ref i+2 ,satisfy: In the formula, T s This represents the time required for the input process.

8. The method for improving the efficiency of a power electronic transformer in a modular multilevel converter according to claim 2, characterized in that, The duty cycle D of the upper transistor connecting the half-bridge module satisfies: The lower tube of the half-bridge module always maintains complementary conduction with the upper tube, while the duty cycle of other connected half-bridge modules in the system remains unchanged at 1 or 0.

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