A radar jamming feature extraction system based on pulse compression

Abstract

The application discloses a radar jamming feature extraction system based on pulse compression, and belongs to the field of electronic reconnaissance.The application solves the problem of poor jamming recognition effect obtained by only relying on limited features in a time-frequency domain under a complex jamming environment.The system can realize real-time and efficient calculation of high-identification-degree feature parameters of a pulse compression post-signal peak-to-average ratio, a matching pulse density, a matching pulse arrival time and a pulse compression post-pulse width of a radar receiving signal, and provides more reference information for subsequent jamming recognition.Combination of the feature parameters extracted by the application with time-frequency domain features can effectively improve the jamming recognition effect.The method can be applied to the field of radar jamming feature extraction.

Description

Technical Field

[0001] This invention belongs to the field of electronic reconnaissance, and specifically relates to a radar jamming feature extraction system. Background Technology

[0002] Radar jamming identification technology is one of the key technologies in the field of electronic reconnaissance. Besides echo signals containing target information, other signals received by radar can be considered jamming signals. Identifying various jamming signals allows the radar to make corresponding decisions based on their type and characteristics, ensuring that the radar's environmental situational awareness capability is not significantly affected. For example, interference caused by clutter or other signals in the radar's operating frequency band can be mitigated by changing the radar's operating frequency; while interference from jammers targeting friendly radar requires targeted anti-jamming measures. With the development of electronic equipment, radar jamming technology has greatly improved, capable of generating high-power, high-fidelity, and targeted radar jamming signals in the frequency domain, time-frequency domain, and all-space domain, significantly hindering the radar's detection and identification of real targets. To ensure the accuracy of radar detection in complex electromagnetic environments and to specifically improve radar anti-jamming capabilities, further research into radar jamming signal identification technology is essential. Currently, the mainstream research direction in interference identification is feature extraction-based interference identification algorithms. This involves combining the interference generation mechanism with transforming the interference and target signals to other domains to uncover their differences and extract the distinctive signal features, thus establishing a basis for subsequent radar interference identification. Currently, there is much research on which transformation methods to use to extract which feature parameters of the signal, with time-frequency analysis being the most widely used feature extraction method. However, with the diversification and complexity of radar interference patterns, relying solely on the limited features of the time-frequency domain is insufficient to cope with complex interference environments. It is necessary to explore effective feature parameters of the interference signal in other transformation domains.

[0003] In summary, under complex interference environments, interference identification results obtained solely from limited features in the time and frequency domains are poor, making it essential to propose a new interference feature identification method. Summary of the Invention

[0004] The purpose of this invention is to solve the problem of poor interference identification effect obtained by relying solely on limited features in the time and frequency domain under complex interference environments, and to propose a radar interference feature extraction system based on pulse compression.

[0005] The technical solution adopted by the present invention to solve the above-mentioned technical problems is as follows:

[0006] A radar jamming feature extraction system based on pulse compression, the system comprising a signal frequency conversion unit, a reference pulse extraction unit, a matched filtering unit, a CFAR detection unit, and a feature parameter extraction unit; wherein:

[0007] The signal frequency conversion unit includes a parallel rate conversion module, an orthogonal mixing module, and a multiphase decimation module;

[0008] The parallel rate conversion module is used to process the main signal acquired by the main ADC and the auxiliary signal acquired by the auxiliary ADC to obtain the main signal and auxiliary signal after parallel rate conversion.

[0009] The quadrature mixing module is used to mix the main signal after parallel rate conversion to obtain the main I signal and the main Q signal; and to mix the auxiliary signal after parallel rate conversion to obtain the auxiliary I signal and the auxiliary Q signal.

[0010] The multiphase decimation module is used to construct a filter bank, and to use the filter bank to filter and decimate the I signal of the main path, the Q signal of the main path, the I signal of the auxiliary path, and the Q signal of the auxiliary path respectively, so as to obtain the I signal of the main path, the Q signal of the main path, the I signal of the auxiliary path, and the Q signal of the auxiliary path at the same frequency.

[0011] The reference pulse extraction unit includes an auxiliary signal amplitude measurement module, an amplitude decision module, a reference pulse signal extraction module, and a matched filter construction module;

[0012] The amplitude measurement module is used to measure the amplitude of the I signal and the Q signal of the auxiliary path.

[0013] The amplitude decision module is used to make an amplitude decision on the measured amplitude and extract the signal synchronization pulse based on the amplitude decision result;

[0014] The reference pulse signal extraction module is used to extract the reference pulse signal within the range of the signal synchronization pulse, based on the range of the signal synchronization pulse.

[0015] The matched filter construction module is used to construct a matched filter based on the extracted reference pulse signal;

[0016] The matched filtering unit includes a convolution summation module and a complex modulus calculation module;

[0017] The convolution summation module is used to calculate the summation based on the I signal of the main path, the Q signal of the main path, and the real coefficients H of the matched filter. i And the imaginary part coefficients H of the matched filter q Perform convolution summation to obtain the convolution summation result;

[0018] The complex modulus module is used to calculate the amplitude of the pulse compression signal based on the convolution summation result, and then square the calculated pulse compression signal amplitude to obtain the pulse compression signal energy waveform.

[0019] The CFAR detection unit includes a CFAR threshold calculation module and a CFAR decision module;

[0020] The CFAR threshold calculation module is used to calculate the CFAR threshold.

[0021] The CFAR decision module applies the same delay to the pulse compression signal based on the clock delay caused by calculating the CFAR threshold, then performs a threshold decision on the delayed pulse compression signal based on the CFAR threshold, and outputs a synchronization pulse that passes the threshold decision.

[0022] The feature parameter extraction unit is used to calculate the peak-to-average power ratio, matched pulse density, matched pulse arrival time, and pulse width of the pulse compression signal based on the synchronization pulse that passes the threshold decision.

[0023] Furthermore, the main signal is a radar received signal acquired using a main ADC, and the auxiliary signal is a radar transmitted signal acquired using an auxiliary ADC.

[0024] Furthermore, the processing procedure of the parallel rate conversion module is as follows:

[0025] Both the main path signal acquired by the main path ADC and the auxiliary path signal acquired by the auxiliary path ADC are 8-channel data. The parallel channels of the main path ADC data are increased from 8 channels to 32 channels to obtain the main path signal after parallel rate conversion. The parallel channels of the auxiliary path ADC data are also increased from 8 channels to 32 channels to obtain the auxiliary path signal after parallel rate conversion.

[0026] Further, the main signal after parallel rate conversion is mixed to obtain the main I signal; specifically:

[0027] After parallel rate conversion, the data of the 1+n*4th channel of the main signal remains unchanged, where n = 1, 2, ..., 7, and * represents multiplication;

[0028] Take the inverse of the data of the 3+n*4th channel of the main signal after parallel rate conversion, where n = 1, 2, ..., 7;

[0029] Set the data of the remaining channels of the main signal after parallel rate conversion to 0;

[0030] The main signal after parallel rate conversion is mixed to obtain the Q signal of the main path; specifically:

[0031] After parallel rate conversion, the data of the 4+n*4th channel of the main signal remains unchanged, where n=1,2,…,7;

[0032] Take the inverse of the data of the 2+n*4th channel of the main signal after parallel rate conversion, where n = 1, 2, ..., 7;

[0033] Set the data of the remaining channels of the main signal after parallel rate conversion to 0;

[0034] Similarly, the I and Q signals of the auxiliary road are obtained by using the same method as the I signal and Q signal of the main road.

[0035] Furthermore, the operation process of the amplitude determination module is as follows:

[0036] For the I signal of the auxiliary path:

[0037] The amplitude of the I signal of the auxiliary path is compared with the detection threshold. When the signal amplitude is higher than the detection threshold for m consecutive times, the synchronization pulse output flag is set to 1. When the signal amplitude is lower than the detection threshold for m consecutive times, the synchronization pulse output flag is set to 0. That is, the rising edge of the synchronization pulse has a delay of m clock cycles relative to the rising edge of the signal pulse.

[0038] The decision method for the Q signal of the auxiliary path is the same as that for the I signal of the auxiliary path.

[0039] Furthermore, the matched filter is constructed by time-domain deconvolution and complex conjugation of the reference pulse signal.

[0040] Furthermore, the processing procedure of the convolution summation module is as follows:

[0041] The I signal of the main path is taken as the real part S of the signal. i The Q signal of the main path is used as the imaginary part S of the signal. q Perform convolution summation:

[0042] H(t)*S(t)=(H i *S i -H q *S q )+j(H i *S q +H q *S i )

[0043] Where H(t)*S(t) is the result of the convolution summation, and j is the imaginary unit.

[0044] Furthermore, the threshold decision based on the CFAR threshold for the delayed pulse compression signal specifically involves:

[0045] When the amplitude of the pulse compression signal energy waveform is greater than the threshold, the pulse output is 1; when the amplitude of the pulse compression signal energy waveform is less than the threshold, the pulse output is 0.

[0046] Furthermore, the calculation process for the peak-to-average power ratio is as follows:

[0047]

[0048] Where 2L represents the number of reference units on the left and right sides of the detection unit, and D... m To detect the waveform energy of the detection unit, D i To detect the waveform energy of the i-th reference cell on both the left and right sides of the detection cell, PAPR m Peak-to-average power ratio;

[0049] The matched pulse density is the number of pulses detected by CFAR in the pulse compression signal energy waveform during the time period from the arrival of the previous reference pulse signal to the arrival of the next reference pulse signal.

[0050] The arrival time of the matching pulse is as follows: when the rising edge of the synchronization pulse that passes the threshold decision is detected, the reception time TOA1 at this time is captured, and then TOA1 is added to the pulse compression processing delay. The result of the addition is the arrival time of the matching pulse.

[0051] The pulse width is as follows: counting begins when the rising edge of the synchronization pulse output by the CFAR detection unit is detected, and counting stops when the falling edge of the synchronization pulse output by the CFAR detection unit is detected. The obtained count value is used as the pulse width.

[0052] Furthermore, the system also includes a data framing unit, which combines the extracted feature parameters in the form of frames and then reports the data to other devices through the PCIe interface.

[0053] The beneficial effects of this invention are:

[0054] This invention designs an FPGA-based pulse compression domain radar interference feature extraction system that can be implemented in real time and efficiently calculate highly recognizable feature parameters of the radar received signal in the pulse compression domain, such as the peak-to-average power ratio, matching pulse density, arrival time of the matching pulse, and pulse width after pulse compression. This provides more reference information for subsequent interference identification. Combining the feature parameters extracted by this invention with time-frequency domain features can effectively improve the interference identification effect. Attached Figure Description

[0055] Figure 1 This is an architecture diagram of a radar interference feature extraction system based on pulse compression according to the present invention;

[0056] Figure 2 This is a structural diagram of the signal frequency conversion unit;

[0057] Figure 3 This is a structural diagram of the parameter pulse extraction module;

[0058] Figure 4 This is a structural diagram of the matched filter module;

[0059] Figure 5 This is a structural diagram of the CFAR detection module;

[0060] Figure 6 This is a structural diagram of the feature extraction module.

[0061] Figure 7 This is a schematic diagram of pulse compression waveform detection and feature extraction;

[0062] Figure 8 This is a measured graph of the noise amplitude modulation interference pulse compression result;

[0063] Figure 9 This is a measured graph of the intermittent sampling forwarding interference pulse compression results;

[0064] Figure 10 These are actual test images of feature extraction and framing.

[0065] Figure 11 This is a diagram showing the results of noise suppression and interference identification.

[0066] Figure 12 This is a diagram showing the results of intermittent sampling and forwarding interference identification. Detailed Implementation

[0067] The present application will now be described in further detail with reference to specific embodiments and accompanying drawings. Obviously, the described embodiments are merely a part of the embodiments of the present invention, and not all of them. Other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are all within the scope of protection of the present invention.

[0068] Specific Implementation Method 1: Combination Figure 1 This embodiment describes a radar interference feature extraction system based on pulse compression. The system includes a signal frequency conversion unit, a reference pulse extraction unit, a matched filtering unit, a CFAR detection unit, and a feature parameter extraction unit; wherein:

[0069] The signal frequency conversion unit includes a parallel rate conversion module, an orthogonal mixing module, and a multiphase decimation module;

[0070] The parallel rate conversion module is used to process the main signal acquired by the main ADC and the auxiliary signal acquired by the auxiliary ADC to obtain the main signal and auxiliary signal after parallel rate conversion.

[0071] The quadrature mixing module is used to mix the main signal after parallel rate conversion to obtain the main I signal and the main Q signal; and to mix the auxiliary signal after parallel rate conversion to obtain the auxiliary I signal and the auxiliary Q signal.

[0072] The mixing factor of signal I is cos[2πf0n / f s The mixing factor of the Q signal is -sin[2πf0n / f]. s ];

[0073] Where f0 is the center frequency of the received signal, n is a discrete variable, and f s This refers to the ADC sampling frequency;

[0074] The multiphase decimation module is used to construct a filter bank consisting of 32 filters, and to use the filter bank to filter and decimate the I signal of the main path, the Q signal of the main path, the I signal of the auxiliary path, and the Q signal of the auxiliary path respectively, so as to obtain the main path I signal, the main path Q signal, the auxiliary path I signal, and the auxiliary path Q signal of the same frequency.

[0075] The reference pulse extraction unit includes an auxiliary signal amplitude measurement module, an amplitude decision module, a reference pulse signal extraction module, and a matched filter construction module;

[0076] The amplitude measurement module is used to measure the amplitude of the I signal and the Q signal of the auxiliary path.

[0077] The amplitude decision module is used to make an amplitude decision on the measured amplitude and extract the signal synchronization pulse based on the amplitude decision result;

[0078] The reference pulse signal extraction module is used to extract the reference pulse signal within the range of the signal synchronization pulse, based on the range of the signal synchronization pulse.

[0079] The matched filter construction module is used to construct a matched filter based on the extracted reference pulse signal;

[0080] The matched filtering unit includes a convolution summation module and a complex modulus calculation module;

[0081] The convolution summation module is used to calculate the summation based on the I signal of the main path, the Q signal of the main path, and the real coefficients H of the matched filter. i And the imaginary part coefficients H of the matched filter q Perform convolution summation to obtain the convolution summation result;

[0082] The complex modulus module is used to calculate the amplitude of the pulse compression signal based on the convolution summation result, and then square the calculated pulse compression signal amplitude to obtain the pulse compression signal energy waveform.

[0083] The CFAR detection unit includes a CFAR threshold calculation module and a CFAR decision module;

[0084] The CFAR threshold calculation module is used to calculate the CFAR threshold.

[0085] The CFAR decision module applies the same delay to the pulse compression signal based on the clock delay caused by calculating the CFAR threshold, then performs a threshold decision on the delayed pulse compression signal based on the CFAR threshold, and outputs a synchronization pulse that passes the threshold decision.

[0086] The feature parameter extraction unit is used to calculate the peak-to-average power ratio (PAPR), matched pulse density (PD), matched pulse arrival time (TOA), and pulse width (PW) of the pulse compression signal based on the synchronization pulse that passes the threshold decision.

[0087] The application scenarios and scope of this invention are as follows:

[0088] 1) Applicable to active radar detection systems, requiring the acquisition of radar transmission signals as reference signals;

[0089] 2) Applicable to the identification of noise-suppressed and intermittent sampling type interference signals;

[0090] 3) The duration of a single signal processing session shall not exceed 100ms;

[0091] 4) The signal to be processed must be a narrowband pulse signal with a bandwidth of no more than 25MHz and a pulse width of no more than 10us.

[0092] Specific Implementation Method Two: This implementation method differs from Specific Implementation Method One in that the main signal is a radar received signal acquired using the main ADC, and the auxiliary signal is a radar transmitted signal acquired using the auxiliary ADC.

[0093] The other steps and parameters are the same as in Specific Implementation Method 1.

[0094] Specific Implementation Method Three: This implementation method differs from Specific Implementation Method Two in that the processing procedure of the parallel rate conversion module is as follows:

[0095] Both the main path signal acquired by the main path ADC and the auxiliary path signal acquired by the auxiliary path ADC are 8-channel data. The parallel channels of the main path ADC data are increased from 8 channels to 32 channels to obtain the main path signal after parallel rate conversion. The parallel channels of the auxiliary path ADC data are also increased from 8 channels to 32 channels to obtain the auxiliary path signal after parallel rate conversion.

[0096] The other steps and parameters are the same as in Specific Implementation Method Two.

[0097] Specific Implementation Method Four: This implementation method differs from Specific Implementation Method Three in that the mixing of the main signal after parallel rate conversion to obtain the main I signal is as follows:

[0098] After parallel rate conversion, the data of the 1+n*4th channel of the main signal remains unchanged, where n = 1, 2, ..., 7, and * represents multiplication;

[0099] Take the inverse of the data of the 3+n*4th channel of the main signal after parallel rate conversion, where n = 1, 2, ..., 7;

[0100] Set the data of the remaining channels of the main signal after parallel rate conversion to 0;

[0101] The main signal after parallel rate conversion is mixed to obtain the Q signal of the main path; specifically:

[0102] After parallel rate conversion, the data of the 4+n*4th channel of the main signal remains unchanged, where n=1,2,…,7;

[0103] Take the inverse of the data of the 2+n*4th channel of the main signal after parallel rate conversion, where n = 1, 2, ..., 7;

[0104] Set the data of the remaining channels of the main signal after parallel rate conversion to 0;

[0105] Similarly, the I and Q signals of the auxiliary road are obtained by using the same method as the I signal and Q signal of the main road.

[0106] The other steps and parameters are the same as in Specific Implementation Method 3.

[0107] Specific Implementation Method Five: This implementation method differs from Specific Implementation Method Four in that the working process of the amplitude determination module is as follows:

[0108] For the I signal of the auxiliary path:

[0109] The amplitude of the I signal of the auxiliary path is compared with the detection threshold. When the signal amplitude is higher than the detection threshold for m consecutive times, the synchronization pulse output flag is set to 1. When the signal amplitude is lower than the detection threshold for m consecutive times, the synchronization pulse output flag is set to 0. That is, the rising edge of the synchronization pulse has a delay of m clock cycles relative to the rising edge of the signal pulse.

[0110] The decision method for the Q signal of the auxiliary path is the same as that for the I signal of the auxiliary path.

[0111] Then, the reference pulse signal is extracted based on the range and delay of the synchronization pulse.

[0112] The other steps and parameters are the same as in Specific Implementation Method Four.

[0113] In Specific Implementation Method Six, this implementation method differs from Specific Implementation Method Five in that the matched filter is constructed by time-domain deconvolution and complex conjugation of the reference pulse signal.

[0114] The other steps and parameters are the same as in Specific Implementation Method 5.

[0115] In this implementation, the reference pulse signal I path is used as the real part filter coefficients, and the inverted reference pulse signal Q path is used as the imaginary part filter coefficients. Each time a new rising edge of the reference pulse signal is detected, this step is repeated to update the filter coefficients in the memory.

[0116] Specific Implementation Method Seven: This implementation method differs from Specific Implementation Method Six in that the processing procedure of the convolution summation module is as follows:

[0117] The I signal of the main path is taken as the real part S of the signal. i The Q signal of the main path is used as the imaginary part S of the signal. q Perform convolution summation:

[0118] H(t)*S(t)=(H i *S i -H q *S q )+j(H i *S q +H q *S i )

[0119] Where H(t)*S(t) is the result of the convolution summation, and j is the imaginary unit.

[0120] The other steps and parameters are the same as in Specific Implementation Method Six.

[0121] Specific Implementation Method Eight: This implementation method differs from Specific Implementation Method Seven in that the threshold decision based on the CFAR threshold for the delayed pulse compression signal is specifically as follows:

[0122] When the amplitude of the pulse compression signal energy waveform is greater than the threshold, the pulse output is 1; when the amplitude of the pulse compression signal energy waveform is less than the threshold, the pulse output is 0.

[0123] The other steps and parameters are the same as in Specific Implementation Method Seven.

[0124] Specific Implementation Method Nine: This implementation method differs from Specific Implementation Method Eight in that the calculation process for the peak-to-average power ratio is as follows:

[0125]

[0126] Where 2L represents the number of reference units on the left and right sides of the detection unit, and D... m To detect the waveform energy of the detection unit, Di To detect the waveform energy of the i-th reference cell on both the left and right sides of the detection cell, PAPR m Peak-to-average power ratio;

[0127] The matched pulse density is the number of pulses detected by CFAR in the pulse compression signal energy waveform during the time period from the arrival of the previous reference pulse signal to the arrival of the next reference pulse signal.

[0128] The arrival time of the matching pulse is as follows: when the rising edge of the synchronization pulse that passes the threshold decision is detected, the reception time TOA1 at this time is captured, and then TOA1 is added to the pulse compression processing delay (i.e. the delay caused by pulse compression processing of the signal). The result of the addition is the arrival time of the matching pulse.

[0129] The pulse width is as follows: counting begins when the rising edge of the synchronization pulse output by the CFAR detection unit is detected, and counting stops when the falling edge of the synchronization pulse output by the CFAR detection unit is detected. The obtained count value is used as the pulse width.

[0130] The other steps and parameters are the same as in Specific Implementation Method 8.

[0131] In Specific Implementation Method 10, this implementation method differs from Specific Implementation Method 9 in that the system further includes a data framing unit. The data framing unit is used to combine the extracted feature parameters in the form of frames and then report the data to other devices through the PCIe interface.

[0132] The other steps and parameters are the same as in Specific Implementation Method Nine.

[0133] Example

[0134] This invention proposes a radar interference feature extraction system based on pulse compression. The system specifically includes a signal frequency conversion unit, a reference pulse signal extraction unit, a matched filtering unit, a CFAR detection unit, and a feature parameter extraction unit. The specific process of radar interference feature extraction is as follows:

[0135] Signal frequency conversion unit: It has two signal inputs. The first signal is the radar received signal acquired by the main ADC, mainly including radar echo signals, various interference signals, and noise in the electromagnetic environment. The ADC chip input clock is 2.4GHz. The second signal is the radar transmitted signal acquired by the auxiliary ADC, mainly including radar pulses and noise. The ADC chip input clock is 800MHz, obtained by dividing the main clock by three. Due to their different functions, the sampling frequencies of the main ADC and the auxiliary ADC, as well as the center frequencies of the two signals, differ. To facilitate subsequent signal processing, the two input signals need to be frequency-converted to ensure that their clock frequencies are consistent with the center frequency. Specifically:

[0136] The signal in-frequency conversion unit includes a parallel rate conversion module, a quadrature mixing module, and a polyphase decimation module, with the specific structure as follows: Figure 2 As shown, the inputs of the signal frequency conversion unit are 8 main signals Signal_echo_0 to Signal_echo_7, the main ADC clock clk_echo, 8 auxiliary signals Signal_ref_0 to Signal_ref_7, the auxiliary ADC clock clk_ref, and the reset signal rst_n. The outputs are the main I and Q signals Deser_I_echo and Deser_Q_echo and the auxiliary I and Q signals Deser_I_ref and Deser_Q_ref, which are at the same frequency.

[0137] 1) Parallel Rate Conversion Module. The main ADC outputs 8 channels of 14-bit data, each with a clock frequency of 300MHz and a data rate of 2.4GHz. The auxiliary ADC outputs 8 channels of 14-bit data, each with a clock frequency of 100MHz and a data rate of 800MHz. To facilitate subsequent data processing, the number of parallel data channels is increased to 32 to reduce the data parallel rate. The specific process of parallel rate conversion is as follows:

[0138] For the main ADC, to convert 8-channel parallel processing to 32-channel parallel processing, an asynchronous FIFO is set up in the FPGA, with a write clock input of 300MHz and a read clock input of 75MHz. When writing data to the FIFO, the eight 14-bit data streams arriving within one clock cycle are first buffered, then combined into a single 112-bit data stream, and written to the FIFO at a 300MHz clock. When reading data from the FIFO, the 300MHz write clock is first divided by four to obtain a 75MHz read clock, and then 448 bits of data are read at a time at a 75MHz clock. Finally, the 448 bits of data are split into 32 14-bit data streams, completing the serial-to-parallel conversion from 8 channels to 32 channels, with each channel having a data rate of 75MHz.

[0139] For the auxiliary ADC, the write clock input of the asynchronous clock FIFO is 100MHz, and the read clock input is 25MHz. Other operations are the same as the main ADC, and it can also obtain 32 channels of data, with a data rate of 25MHz for each channel.

[0140] 2) Quadrature Mixer Module. To ensure the center frequencies of the two signals are consistent and to facilitate subsequent decimation and speed-up processing, they are uniformly mixed to a zero intermediate frequency (IF) signal. When performing I and Q mixing on the two ADC acquisition signals, the I-channel mixing factor is cos[2πf0n / f]. s The Q-path mixing factor is -sin[2πf0n / f] s ].

[0141] The sampling frequency and center frequency of the main signal are 2.4GHz and 1.8GHz, respectively. According to the calculation, the mixing factor of the I channel is a periodic cycle of [1,0,-1,0] and the mixing factor of the Q channel is a periodic cycle of [0,-1,0,1]. Based on this, the mixing operation steps can be simplified, and the complex multiplication operation can be converted into a simple inversion and zeroing operation.

[0142] Therefore, for the 32-channel main signal, simply keep the data of channels 1, 5, 9, ..., 29 unchanged, take the opposite of the data of channels 3, 7, 11, ..., 31, and set the data of the remaining channels to 0 to obtain the I-channel signal.

[0143] Based on the same principle, simply reverse the data of channels 2, 6, 10, ..., 30, keep the data of channels 4, 8, 12, ..., 32 unchanged, and set the data of the remaining channels to 0 to obtain the Q-channel signal.

[0144] 3) Multiphase decimation module. This invention processes signals with a bandwidth within 25MHz. To avoid resource waste, data is decimated to reduce the data rate. The mixed signal is low-pass filtered to remove high-frequency components while ensuring no aliasing occurs during signal decimation. To improve filtering and decimation efficiency, multiphase filtering down-conversion technology is used to simultaneously perform the filtering and decimation steps.

[0145] The filter is designed based on the sampling rate and bandwidth of the two signals:

[0146] For the main signal, a low-pass filter is designed using the equiripple method. The filter sampling rate is 2400MHz, the passband cutoff frequency is 25MHz, the stopband cutoff frequency is 50MHz, the passband ripple is 1dB, and the stopband attenuation is 60dB. This yields a low-pass filter with a minimum order of 237. For ease of FPGA implementation, its order is set to 256. Furthermore, the main signal needs to be decimated an additional time to maintain the data rate of the main signal consistent with that of the auxiliary signal.

[0147] For the auxiliary signal, the filter sampling rate is 800MHz, the passband cutoff frequency is 25MHz, the stopband cutoff frequency is 50MHz, the passband ripple is 1dB, the stopband attenuation is 60dB, and it is also set to 256th order.

[0148] The filter coefficients are then quantized and encoded as 14-bit data. After quantization, the filter coefficients are multiphase-split into 32 filters to form a filter bank, enabling all parallel data channels to simultaneously perform low-pass filtering and decimation.

[0149] The reference pulse extraction unit includes an amplitude measurement module, an amplitude decision module, a reference pulse signal extraction module, and a matched filter construction module, as shown in the following structure: Figure 3 As shown. After a series of operations including signal frequency conversion and frequency synchronization, both the main signal and the auxiliary signal are 25MHz I and Q signals with the same rate. The inputs to the reference pulse extraction unit are the auxiliary I signal Deser_I_ref, the auxiliary Q signal Deser_Q_ref, the 25MHz operating clock clk_down_ref, and the reset signal rst_n. The outputs are the real part coefficients hi and the imaginary part coefficients hq of the matched filter.

[0150] Amplitude Measurement Module: This module uses the CORDIC (Coordinate Rotation Digital Computer) algorithm to calculate the amplitudes of the auxiliary path's I and Q signals. The CORDIC input consists of the auxiliary path's I and Q signals, with an initial phase angle of 0. In the CORDIC algorithm, the angle of each vector rotation is a fixed value arctan(2π / 2). -i In this module design, the phase is quantized to a 10-bit sign value, so the quantization value for 180° is 511, and the quantization value for -180° is -512, with a quantization precision of 0.35°. When rotated 9 times, the rotation angle is 0.45°, and when rotated 10 times, the rotation angle is 0.22°, which is less than the quantization precision. Therefore, this design rotates the CORDIC vector 9 times. Since the vector amplitude becomes k times its original value with each rotation, the final measured amplitude needs to be multiplied by a certain compensation factor. The calculated compensation factor after 9 rotations is 0.61. Because decimals cannot be directly calculated in the FPGA, the compensation factor is multiplied by 256. After multiplying the horizontal coordinate after 9 rotations by 155, the lower 8 bits are removed to obtain the final signal amplitude.

[0151] Amplitude Decision Module: Based on the amplitude envelope obtained after processing the auxiliary I and Q signals using the CORDIC algorithm, this module compares it with a set detection threshold. A register-type variable is set as the pulse output. When the signal amplitude is greater than the threshold value, the pulse output is 1; when the signal amplitude is less than the threshold value, the pulse output is 0. The detection threshold is determined based on the highest noise amplitude. During hardware debugging, the detection threshold can be adjusted online based on the signal pulse extraction status.

[0152] Reference Pulse Signal Extraction Module. The reference signal synchronization pulse is extracted based on the amplitude decision result. Considering the randomness of noise, the signal amplitude may be higher than the detection threshold when there is no pulse signal, and lower than the detection threshold when there is a pulse signal. To eliminate the influence of this random noise, a two-stage extraction method is used to detect the signal. The pulse output flag is set to 1 only when the signal amplitude is higher than the detection threshold for 8 consecutive times, equivalent to the rising edge of the synchronization pulse; and the pulse output flag is set to 0 only when the signal amplitude is lower than the detection threshold for 8 consecutive times, equivalent to the falling edge of the synchronization pulse. Since the synchronization pulse rising edge is only output after 8 consecutive decision results are buffered, there will be a delay of 8 clock cycles (0.32µs) between the synchronization pulse output and the signal pulse rising edge.

[0153] Matched Filter Construction Module: After obtaining the reference pulse signal for the auxiliary path signals, the I and Q auxiliary path signals within the range of the reference pulse signal need to be exported to construct a matched filter. Two memories with a depth of 256 are configured. When the rising edge of the reference pulse signal is detected, the exported I and Q pulse signals are imported into the memories. The I pulse signal in the memories is used as the real part of the matched filter coefficients H. i The Q-path pulse signal is inverted and used as the imaginary part filter coefficient H. q This is equivalent to finding the conjugate of the auxiliary signal. At this time, the operating clock is 25MHz, and the 256 coefficients can cover the reference pulse with a pulse width of less than 10µs.

[0154] The matched filtering unit includes a convolution summation module and a complex modulus calculation module, with the specific structure as follows: Figure 4 As shown in the figure. The inputs to the matched filter unit are the main I signal Deser_I_echo, the main Q signal Deser_Q_echo, the working clock clk_down_ref, and the reset signal rst_n. The output is the pulse compression result PC_final. The measured pulse compression results for noise suppression interference and intermittent sampling and forwarding interference are shown in the figure. Figure 8 , Figure 9 As shown.

[0155] Convolution and Summation Module: The main signal undergoes pulse compression through a pre-constructed matched filter. Upon arrival of the main signal, two 256-depth memories are established, buffering the signal through a time-lapse delay. The pulse compression process of the main signal through the matched filter is a complex convolution process, where the main signal I is used as the real part S. i The main signal Q is used as the imaginary part S. q The real part of the signal S i and the imaginary part of the signal S q The real part H of the matched filter is passed through respectively i and the imaginary part H of the matched filter qFollowing the complex convolution operation method, the 256 buffered main signal I and Q data are multiplied in reverse order by the real and imaginary filter coefficients, and then summed to achieve convolution. In other words, the complex convolution process is transformed into four real number convolutions and summations. During the convolution process, both the signal and filter coefficients have a bit width of 14 bits. Multiplication requires expanding the bit width to 28 bits. Then, the 256 data are summed and expanded by 8 bits, resulting in a final data bit width of 36 bits. To reduce redundant data bit width and ensure a certain level of accuracy, bits 15-28 are truncated based on debugging results, resulting in a final output of 14 bits.

[0156] Complex Modulus Calculation Module: After convolution and summation, the real and imaginary parts of the pulse compression signal are obtained. Then, the CORDIC algorithm is used to perform modulus calculation to obtain the amplitude of the pulse compression result. The parameters of the CORDIC algorithm are configured in the same way as the amplitude decision module. Finally, the pulse compression signal energy is obtained by squaring the calculated pulse compression amplitude. During squaring, the signal bit width is expanded from 14 bits to 28 bits. The final output is a 25MHz pulse compression energy waveform with a 28-bit bit width.

[0157] Since each pulse of compressed signal data needs to be buffered with 256 signal data, there will be a 256-clock delay, and the final output will be delayed by 10.24µs.

[0158] The CFAR detection unit includes a CFAR threshold calculation module and a decision module, with the specific structure as follows: Figure 5 As shown, after pulse compression of the main signal, when the rising edge of the reference signal synchronization pulse is detected, constant false alarm rate (CFAR) detection is performed on the pulse compression waveform within the reception time of the reference signal synchronization pulse to determine whether a pulse matching the transmitted signal exists. The inputs of the CFAR detection unit are the pulse compression result PC_final, the clock clk_down_ref, and the reset signal rst_n, and the output is the CFAR detection synchronization pulse narg_cfar.

[0159] The design process of the CFAR threshold calculation module adopts unit-averaged CFAR detection. Therefore, the CFAR threshold calculation value is the product of the average waveform amplitude of the reference units on both sides of the detection unit and the threshold factor. The number of reference units is set to 16, with 8 on each side of the detection unit and 2 protection units on each side. First, 21 register variables are defined to buffer 21 data points when the waveform signal arrives. Then, the average of 16 data points (excluding those from the protection units) is calculated on both sides of the middle data point. The waveform data width is 14 bits. After summing the 16 data points, it is expanded to 18 bits. Then, the last 4 bits are truncated, and the average of the reference units is obtained by dividing by 16. Finally, the threshold factor is calculated, with the false alarm probability set to 1*10. -6 The threshold factor is calculated to be 1.37.

[0160] Finally, the reference cell mean is multiplied by the threshold factor to obtain the CFAR detection threshold. Since the calculation process buffers 21 data points, and the detection unit is at the 11th data point, there is a 10-clock delay. In addition, the summation process uses a two-stage pipelined addition, plus a 3-clock delay for multiplication with the threshold factor. Therefore, this step has a total of 13 clock delays from the pulse compression waveform to the output of the threshold at this point, approximately 0.52µs.

[0161] CFAR Decision Module: After deriving the CFAR threshold based on the reference cell mean and threshold factor, threshold decision is performed on the detection cell. Since the threshold calculation result has a 13-clock delay, the pulse compression waveform also needs to be aligned with the threshold during decision-making. When the waveform amplitude is greater than the threshold value, the pulse output is 1; when the signal amplitude is less than the threshold value, the pulse output is 0. Then, the CFAR detection synchronization pulse is output, and the presence or absence of a matching pulse signal is determined based on the synchronization pulse. Because the CFAR detection synchronization pulse width is small, secondary detection is not performed.

[0162] The specific structure of the feature parameter extraction unit is as follows: Figure 6 As shown. The inputs to the feature parameter extraction unit are the pulse compression result PC_fianl, the CFAR detection synchronization pulse narg_cfar, the clock clk_down_ref, and the reset signal rst_n. The outputs are the peak-to-average power ratio of the pulse-compressed signal, the matching pulse density, the arrival time of the matching pulse, and the pulse width of the pulse-compressed signal. The calculation basis and feature meanings are as follows. Figure 7 As shown.

[0163] PAPR calculation: The PAPR of a pulse-compressed signal describes the pulse compression of a signal containing echoes and interference. It compares the peak energy of the pulse compression result with the average pulse compression energy near the peak, mainly reflecting the degree of envelope fluctuation of the signal after pulse compression, and can be used to determine whether it is subject to suppression interference.

[0164] Each time the CFAR detection module detects a pulse waveform output of 1, it calculates the PAPR of that pulse segment. First, it calculates the average energy of the reference cells on both sides of the detection unit, following the same calculation process as the CFAR threshold calculation module. Then, it divides the waveform energy of the detection unit by the calculated average value to obtain the PAPR value of that detection unit.

[0165] PD Measurement: Matched Pulse Density (PD) is defined as the number of pulses whose amplitude, after compression, passes through the CFAR (Constant Transmission Arrangement) detection system within the reception time of a transmitted pulse. It serves as a basis for determining whether the system is subject to false target interference. Specifically, it requires counting the number of pulses detected by the CFAR during the time interval between the arrival of the previous reference pulse and the arrival of the next. A counter is set up, starting to count when the falling edge of the reference pulse is detected. The counter increments by 1 each time a rising edge of the CFAR detection module's output is detected, until the rising edge of the next reference pulse is detected. At this point, the current count value is latched as the PD output, and the counter is reset to prepare for the next round of counting.

[0166] TOA Measurement: For pulses compressed and detected by CFAR, their TOA is measured to match the corresponding pre-pulse received pulse, thus determining whether it is an interference pulse based on other pulse parameters. Therefore, when the rising edge of the pulse compression signal synchronization pulse is detected, the TOA of the received signal at this time is captured, and a pulse compression processing delay of 10.24µs is added to obtain the TOA of the pulse compression signal. When matching with the pre-pulse received pulse signal, the processing delay is subtracted to obtain the corresponding pre-pulse pulse.

[0167] PW Measurement: For pulses compressed and detected by CFAR, their PW is measured and matched with the corresponding pulse received before pulse compression based on their TOA. The difference in PW is compared to determine whether interference has occurred. Therefore, a data clock of 25MHz is selected as the counting clock, with a clock period of 40ns. The counter starts counting each time the rising edge of the CFAR output pulse is detected and stops counting when the falling edge of the CFAR output pulse is detected. After latching the current count value as the pulse width, the counter is set to 0 to prepare for the next round of counting.

[0168] Data framing unit: After the interference feature parameters are calculated, in order to facilitate the transmission of the extracted interference feature parameters to other devices, the obtained feature parameters need to be latched and framed before being output through an external interface. The auxiliary signal pulse extracted by the amplitude decision module is used as the synchronization pulse. When the rising edge of the synchronization pulse is detected, the parameters measured in the previous pulse reception time are framed. In this invention, each frame is 128 bits long, and the frame includes a frame header and interference feature parameters. Then, it is reported to other devices through the PCIE interface for further processing. The PCIE interface is a pre-packaged FIFO type memory. By controlling its read / write clock and read / write enable input, data transmission between the FPGA and AGX can be realized. The output of the data framing unit is the data combination flag wr_en_pc and the framed data din_pc. The parameter extraction and framing measurement results are as follows: Figure 10 As shown.

[0169] The frame format is shown in Table 1, where the frame header is specified as 16'aa55. Multiple matching pulses may be received within a single pulse reception time, but considering their waveform characteristics are basically similar, only the TOA, PW, and PAPR parameters of two pulses need to be reported for each pulse reception time. Data transmission is then performed via the PCIe interface, with a write clock of 150MHz and a read clock of 300MHz. When the FPGA receives a transmission command, the write enable goes high, and data writing begins. When the memory is not empty, the read enable goes high, and data reading begins. After 100ms of transmission, both the read and write enable are reset to 0.

[0170] Table 1. Interference Feature Parameter Grouping Table

[0171]

[0172] Validation of the effectiveness of the method of the present invention

[0173] Besides combining the pulse compression domain features extracted by this invention with time-frequency domain features to identify interference, using the pulse compression domain features extracted by this invention alone can also achieve good interference identification results. The following section combines this invention with subsequent interference identification algorithms, using the parameters extracted by this invention to perform interference identification simulations, and compares them with interference identification methods based on time-domain and frequency-domain features. The simulation results demonstrate the effectiveness of this invention's method.

[0174] The comparative methods of this invention all select two time-domain feature parameters (time-domain envelope fluctuation and time-domain moment skewness) and two frequency-domain feature parameters (frequency-domain envelope fluctuation and frequency-domain moment skewness), and use a decision tree classification method for interference identification. Simulation analysis is then used to compare these methods with those of this invention. Simulation results show that the pulse compression domain feature parameters in this invention are more stable than the time-domain and frequency-domain feature parameters, have less dependence on the interference-to-noise ratio (IRR) and interference-to-signal ratio (ISR), and outperform the comparative schemes when both IRR and ISR are low.

[0175] (1) Noise Suppression Interference Identification. The peak-to-mean ratio (PAPR) of the pulse-compressed signal describes the degree of envelope fluctuation of the signal after pulse compression. The magnitude of this ratio can be used to determine whether the target is subject to suppression interference. Based on the PAPR calculated according to the method of this invention, a discrimination threshold is designed according to engineering debugging experience. If the CFAR detection unit does not detect the pulse compression signal or the PAPR calculated after detecting the signal is less than the threshold, it is determined that the signal is subject to suppression interference; otherwise, it is considered that the signal is not subject to suppression interference.

[0176] Simulation verification: Assuming the target echo is subjected to noise amplitude modulation interference with a bandwidth of 20MHz, the radar signal pulse width is 10µs, the bandwidth is 10MHz, and the signal-to-noise ratio (SNR) is 10dB. Under different interference-to-signal ratios (the power ratio of the suppressed interference to the actual target signal at the receiver), the interference suppression recognition rate is obtained as follows: Figure 11As shown in the figure. Simulation results show that when the interference-to-signal ratio is low, the interference is insufficient to suppress the echo signal, resulting in significant fluctuations in the pulse compression signal waveform. The PAPR parameter is less affected, leading to a lower recognition rate. When the interference-to-signal ratio is high, excessive interference suppression causes the waveform of the compressed target after pulse compression to become smoother, thus lowering the PAPR parameter below the threshold and increasing the recognition rate. Furthermore, according to comparative results, at low interference-to-signal ratios, the recognition performance of this invention is superior to the comparative scheme.

[0177] (2) Intermittent Sampling-Forwarding Interference Identification. Intermittent sampling-forwarding interference involves intermittently sampling the radar signal within the radar pulse period and processing and forwarding the sampled signals through a jammer to generate coherent false target signals. Since intermittent sampling-forwarding generates a large number of false target signals, the number of detected targets can be used to determine whether interference has occurred. The matched pulse density feature calculated in this invention represents the number of targets detected within a certain time period, which can be used to identify intermittent sampling-forwarding interference. Furthermore, since the sampling duration of the intermittent sampling-forwarding signal is much shorter than the pulse width of the transmitted signal, the pulse width of the corresponding time-domain received signal can be detected based on the measured TOA. If it does not match the pulse width of the radar transmitted signal, it is determined that the signal is subject to intermittent sampling-forwarding interference. Based on the matched pulse density calculated according to this invention, a discrimination threshold is designed according to engineering debugging experience. If the density is greater than the threshold, it indicates that a large number of targets have been detected. Then, the pulse width of the corresponding time-domain signal is detected based on the measured TOA. If it does not match the pulse width of the radar transmitted signal, it is determined that the signal is subject to intermittent sampling-forwarding interference.

[0178] Assuming the radar is subjected to intermittent sampling-forwarding interference, with a radar signal pulse width of 10µs and a bandwidth of 25MHz, and the intermittent sampling-forwarding interference taking the form of direct forwarding interference with 5 forwarding cycles, simulations are performed under different interference-to-noise ratios to obtain the following recognition rates: Figure 12 As shown in the figure. According to the simulation results, when the noise-to-interference ratio is low, it may be difficult to detect multiple targets through pulse compression, resulting in a low recognition rate; when the noise-to-interference ratio is high, pulse compression can detect multiple spoofing pulses, resulting in a higher recognition rate; in addition, according to the comparison results, under low noise-to-interference ratio, the present invention is better than the comparison scheme in terms of intermittent sampling interference recognition.

[0179] The above examples of the present invention are merely illustrative of the computational model and process of the present invention, and are not intended to limit the implementation of the present invention. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is impossible to exhaustively list all possible implementations here. Any obvious variations or modifications derived from the technical solutions of the present invention are still within the scope of protection of the present invention.

Claims

1. A radar jamming feature extraction system based on pulse compression, characterized in that, The system includes a signal frequency conversion unit, a reference pulse extraction unit, a matched filtering unit, a CFAR detection unit, and a feature parameter extraction unit; wherein: The signal frequency conversion unit includes a parallel rate conversion module, an orthogonal mixing module, and a multiphase decimation module; The parallel rate conversion module is used to process the main signal acquired by the main ADC and the auxiliary signal acquired by the auxiliary ADC to obtain the main signal and auxiliary signal after parallel rate conversion. The quadrature mixing module is used to mix the main signal after parallel rate conversion to obtain the main I signal and the main Q signal; and to mix the auxiliary signal after parallel rate conversion to obtain the auxiliary I signal and the auxiliary Q signal. The multiphase decimation module is used to construct a filter bank, and to use the filter bank to filter and decimate the I signal of the main path, the Q signal of the main path, the I signal of the auxiliary path, and the Q signal of the auxiliary path respectively, so as to obtain the I signal of the main path, the Q signal of the main path, the I signal of the auxiliary path, and the Q signal of the auxiliary path at the same frequency. The reference pulse extraction unit includes an auxiliary signal amplitude measurement module, an amplitude decision module, a reference pulse signal extraction module, and a matched filter construction module; The amplitude measurement module is used to measure the amplitude of the I signal and the Q signal of the auxiliary path. The amplitude decision module is used to make an amplitude decision on the measured amplitude and extract the signal synchronization pulse based on the amplitude decision result; The reference pulse signal extraction module is used to extract the reference pulse signal within the range of the signal synchronization pulse, based on the range of the signal synchronization pulse. The matched filter construction module is used to construct a matched filter based on the extracted reference pulse signal; The matched filtering unit includes a convolution summation module and a complex modulus calculation module; The convolution summation module is used to calculate the summation based on the I signal of the main path, the Q signal of the main path, and the real coefficients H of the matched filter. i And the imaginary part coefficients H of the matched filter q Perform convolution summation to obtain the convolution summation result; The complex modulus module is used to calculate the amplitude of the pulse compression signal based on the convolution summation result, and then square the calculated pulse compression signal amplitude to obtain the pulse compression signal energy waveform. The CFAR detection unit includes a CFAR threshold calculation module and a CFAR decision module; The CFAR threshold calculation module is used to calculate the CFAR threshold. The CFAR decision module applies the same delay to the pulse compression signal based on the clock delay caused by calculating the CFAR threshold, then performs a threshold decision on the delayed pulse compression signal based on the CFAR threshold, and outputs a synchronization pulse that passes the threshold decision. The feature parameter extraction unit is used to calculate the peak-to-average power ratio, matched pulse density, matched pulse arrival time, and pulse width of the pulse compression signal based on the synchronization pulse that passes the threshold decision.

2. The radar jamming feature extraction system based on pulse compression according to claim 1, characterized in that, The main signal is the radar received signal acquired using the main ADC, and the auxiliary signal is the radar transmitted signal acquired using the auxiliary ADC.

3. The radar jamming feature extraction system based on pulse compression according to claim 2, characterized in that, The processing procedure of the parallel rate conversion module is as follows: Both the main path signal acquired by the main path ADC and the auxiliary path signal acquired by the auxiliary path ADC are 8-channel data. The parallel channels of the main path ADC data are increased from 8 channels to 32 channels to obtain the main path signal after parallel rate conversion. The parallel channels of the auxiliary path ADC data are also increased from 8 channels to 32 channels to obtain the auxiliary path signal after parallel rate conversion.

4. The radar jamming feature extraction system based on pulse compression according to claim 3, characterized in that, The main signal after parallel rate conversion is mixed to obtain the main I signal; specifically: After parallel rate conversion, the data of the 1+n*4th channel of the main signal remains unchanged, where n = 1, 2, ..., 7, and * represents multiplication; Take the inverse of the data of the 3+n*4th channel of the main signal after parallel rate conversion, where n = 1, 2, ..., 7; Set the data of the remaining channels of the main signal after parallel rate conversion to 0; The main signal after parallel rate conversion is mixed to obtain the Q signal of the main path; specifically: After parallel rate conversion, the data of the 4+n*4th channel of the main signal remains unchanged, where n=1,2,…,7; Take the inverse of the data of the 2+n*4th channel of the main signal after parallel rate conversion, where n = 1, 2, ..., 7; Set the data of the remaining channels of the main signal after parallel rate conversion to 0; Similarly, the I and Q signals of the auxiliary road are obtained by using the same method as the I signal and Q signal of the main road.

5. The radar jamming feature extraction system based on pulse compression according to claim 4, characterized in that, The working process of the amplitude determination module is as follows: For the I signal of the auxiliary path: The amplitude of the I signal of the auxiliary path is compared with the detection threshold. When the signal amplitude is higher than the detection threshold for m consecutive times, the synchronization pulse output flag is set to 1. When the signal amplitude is lower than the detection threshold for m consecutive times, the synchronization pulse output flag is set to 0. That is, the rising edge of the synchronization pulse has a delay of m clock cycles relative to the rising edge of the signal pulse. The decision method for the Q signal of the auxiliary path is the same as that for the I signal of the auxiliary path.

6. The radar jamming feature extraction system based on pulse compression according to claim 5, characterized in that, The matched filter is constructed by time-domain deconvolution of the reference pulse signal and taking its complex conjugate.

7. A radar jamming feature extraction system based on pulse compression according to claim 6, characterized in that, The processing procedure of the convolution summation module is as follows: The I signal of the main path is taken as the real part S of the signal. i The Q signal of the main path is used as the imaginary part S of the signal. q Perform convolution summation: H(t)*S(t)=(H i *S i -H q *S q )+j(H i *S q +H q *S i ) Where H(t)*S(t) is the result of the convolution summation, and j is the imaginary unit.

8. A radar jamming feature extraction system based on pulse compression according to claim 7, characterized in that, The threshold decision on the delayed pulse compression signal based on the CFAR threshold is as follows: When the amplitude of the pulse compression signal energy waveform is greater than the threshold, the pulse output is 1; when the amplitude of the pulse compression signal energy waveform is less than the threshold, the pulse output is 0.

9. A radar jamming feature extraction system based on pulse compression according to claim 8, characterized in that, The calculation process for the peak-to-average power ratio is as follows: Where 2L represents the number of reference units on the left and right sides of the detection unit, and D... m To detect the waveform energy of the detection unit, D i To detect the waveform energy of the i-th reference cell on both the left and right sides of the detection cell, PAPR m Peak-to-average power ratio; The matched pulse density is the number of pulses detected by CFAR in the pulse compression signal energy waveform during the time period from the arrival of the previous reference pulse signal to the arrival of the next reference pulse signal. The arrival time of the matching pulse is as follows: when the rising edge of the synchronization pulse that passes the threshold decision is detected, the reception time TOA1 at this time is captured, and then TOA1 is added to the pulse compression processing delay. The result of the addition is the arrival time of the matching pulse. The pulse width is as follows: counting begins when the rising edge of the synchronization pulse output by the CFAR detection unit is detected, and counting stops when the falling edge of the synchronization pulse output by the CFAR detection unit is detected. The obtained count value is used as the pulse width.

10. A radar jamming feature extraction system based on pulse compression according to claim 9, characterized in that, The system also includes a data framing unit, which combines the extracted feature parameters in the form of frames and then reports the data to other devices through the PCIe interface.

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