A method and apparatus for detecting the regularity of transmitted signals from a secondary radar transmitting assembly.

Abstract

This invention provides a method and apparatus for detecting the regularity of transmitted signals from a secondary radar transmitting component. The method includes: a radio frequency coupling and detection circuit coupling the transmitted radio frequency signal of the secondary radar transmitting component and detecting it to obtain a detected signal; comparing the detected signal with a reference voltage; and outputting a transmitted detected signal based on the comparison result; an FPGA performing high-level counting on the transmitted detected signal based on a baseband ASK signal, and determining whether the transmitted detection is faulty based on the counting result; and a CPU reading the fault determination result from the FPGA and reporting it to the secondary radar display and control terminal. This invention can detect the regularity of the transmitted radio frequency signal and the working status of the transmitting component in real time, improving the self-test performance of the secondary radar transmitting component, so that the secondary radar display and control terminal can monitor the status of the radio frequency transmitting component and the transmitted signal in real time, thereby improving the robustness of the secondary radar system operation.

Description

Technical Field

[0001] This invention relates to the field of secondary radar technology, and more specifically, to a method and apparatus for detecting the regularity of transmitted signals from a secondary radar transmitting component. Background Technology

[0002] The secondary radar system consists of two parts: an interrogation device and a response device. The interrogation device can generate and transmit interrogation radio frequency pulse signals. After receiving the interrogation radio frequency pulse signals, the nearby response device analyzes and calculates them. After the calculation is completed, it can encode, modulate, and amplify important information such as the identification code, location, or altitude of the platform based on the extracted interrogation information, and finally transmit it. After receiving the response signal, the interrogation device can decipher the identification code, location, or altitude of the response target, thereby realizing the secondary radar communication function.

[0003] Therefore, the transmitting components of the interrogation and response devices are crucial links in the communication link of the secondary radar system. The standardization and completeness of the transmitted signals determine the normal operation of the secondary radar system's communication function. Simultaneously, the standardization and completeness of the transmitted signals also reflect the proper functioning of the transmitting components.

[0004] Current methods for detecting the regularity of transmitted signals from RF transmitters primarily involve observing and testing the signal's regularity and completeness using testing instruments. This method is time-consuming and labor-intensive, and it cannot monitor the status of the RF transmitter and the transmitted signal in real time. Existing self-test functions for RF transmitters generally determine their operational status by detecting the presence or absence of a detector signal. However, this method lacks the ability to detect and assess the regularity of the transmitted signal and cannot accurately characterize the RF transmitter's operational status. Summary of the Invention

[0005] The present invention aims to provide a method and apparatus for detecting the regularity of transmitted signals from a secondary radar transmitting assembly, in order to solve the problem that the existing self-test function of a secondary radar transmitting assembly cannot detect the regularity of the transmitted signal and cannot accurately characterize the working status of the radio frequency transmitting assembly.

[0006] The present invention provides a method for detecting the regularity of transmitted signals from a secondary radar transmitting assembly, comprising the following steps:

[0007] S1, the radio frequency coupling and detection circuit couples the transmitted radio frequency signal of the secondary radar transmitting component and detects it to obtain the detected signal. The detected signal is compared with the reference voltage, and the transmitted and detected signal is output according to the comparison result.

[0008] S2, the FPGA counts the high-level signals of the transmit and detect signals based on the baseband ASK signal, and determines whether the transmit and detect signals are faulty based on the counting results;

[0009] S3, the CPU reads the judgment result of whether the transmission detector is faulty in the FPGA and reports it to the secondary radar display and control terminal.

[0010] Furthermore, S1 includes the following sub-steps:

[0011] S11, the secondary radar transmitting component transmits radio frequency signals;

[0012] S12, the coupling circuit couples the transmitted radio frequency signal of the secondary radar transmitting component to obtain the coupled radio frequency signal;

[0013] S13, the detection circuit detects the coupled radio frequency signal to obtain the detected signal;

[0014] S14, The detector signal is input to the comparator and compared with the set reference voltage: if the detector signal level is greater than the reference voltage, the comparator outputs a high level according to the TTL standard; otherwise, the comparator outputs a low level.

[0015] S15, the comparator output signal is isolated and driven to output a transmit detection signal to the FPGA.

[0016] Furthermore, S2 includes the following sub-steps:

[0017] S21, after the FPGA detects the rising edge of the baseband ASK signal, it starts the transmit detector counter;

[0018] S22, after detecting the rising edge of the transmit-detector signal, the transmit-detector counter is cleared to zero. Then, when the transmit-detector signal is high, the transmit-detector counter executes an accumulation program; when the transmit-detector signal is low, the transmit-detector counter remains unchanged; after waiting for a period of time, after ensuring that the complete transmit-detector signal detection has been completed, the value of the transmit-detector counter is locked and obtained; if this value is within a certain range of the baseband ASK signal width, the detection signal is determined to be normal.

[0019] S23, Detect each transmitted and detected signal using the method in step S22, and statistically analyze the detection results of the most recent A baseband ASK signals:

[0020] If the number of abnormal detectors is greater than or equal to B, then the transmission detector is determined to be faulty.

[0021] If the number of abnormal detectors is less than B, the transmission and detection are considered normal.

[0022] Furthermore, the transmit / detector fault flag register is used to indicate the result of whether the transmit / detector is faulty:

[0023] If a transmission / detection fault is detected, the transmission / detection fault flag register is set to "1";

[0024] If the transmission and detection are determined to be normal, the transmission and detection fault flag register will be set to "0".

[0025] Furthermore, step S3 includes:

[0026] The CPU periodically accesses the transmit detection fault flag register in the FPGA, or immediately accesses the transmit detection fault flag register in the FPGA according to the self-test query command issued by the display and control terminal, to read the transmit detection results:

[0027] If the value of the transmit detection fault flag register is "1", then the transmit detection fault is reported to the secondary radar display and control terminal.

[0028] If the value of the transmission detection fault flag register is "0", then the secondary radar display and control terminal will be reported that the transmission detection is normal.

[0029] The present invention also provides a device for detecting the regularity of transmitted signals from a secondary radar transmitting component, used to implement the above-mentioned method for detecting the regularity of transmitted signals from a secondary radar transmitting component. The device includes a signal processing component and a radio frequency coupling detection circuit; the signal processing component includes a CPU and an FPGA connected to each other; the CPU is used to connect to a secondary radar display and control terminal; the FPGA is used to connect to the secondary radar transmitting component.

[0030] Furthermore, the radio frequency coupling detection circuit includes a coupling circuit, a detection circuit, a comparator, and an isolation driver connected in sequence; the coupling circuit is used to couple the transmitted radio frequency signal of the secondary radar transmitting component, and the isolation driver is used to connect to the FPGA.

[0031] In summary, due to the adoption of the above technical solution, the beneficial effects of the present invention are:

[0032] This invention enables real-time detection of the regularity of the transmitted radio frequency signal from a secondary radar and the operational status of the transmitting components, improving the self-test performance of the secondary radar transmitting components. This allows the secondary radar display and control terminal to monitor the status of the radio frequency transmitting components and the transmitted signal in real time, thereby enhancing the robustness of the secondary radar system. This invention is of great significance for real-time detection of transmitted signal regularity and for troubleshooting and locating faults in secondary radar transmitting components. Attached Figure Description

[0033] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings in the embodiments will be briefly described below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0034] Figure 1This is a schematic diagram of the signal regularity detection device for the secondary radar transmitting component in an embodiment of the present invention.

[0035] Figure 2 This is a schematic diagram of the radio frequency coupling detection circuit in an embodiment of the present invention.

[0036] Figure 3 This is a flowchart of the method for detecting the regularity of the transmitted signal of the secondary radar transmitting component in an embodiment of the present invention.

[0037] Figure 4 This is a timing diagram of the baseband ASK signal and the transmit / detector signal in an embodiment of the present invention. Detailed Implementation

[0038] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0039] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0040] Example

[0041] like Figure 1 As shown, this embodiment proposes a device for detecting the regularity of transmitted signals from a secondary radar transmitting component, including a signal processing component and a radio frequency coupling detection circuit; the signal processing component includes a CPU and an FPGA connected to each other; the CPU is used to connect to a secondary radar display and control terminal; the FPGA is used to connect to the secondary radar transmitting component. In a preferred embodiment, as shown... Figure 2 As shown, the radio frequency coupling detection circuit includes a coupling circuit, a detection circuit, a comparator, and an isolation driver connected in sequence; the coupling circuit is used to couple the transmitted radio frequency signal of the secondary radar transmitting component, and the isolation driver is used to connect to the FPGA.

[0042] like Figure 3 As shown, the method for detecting the regularity of the transmitted signal of the secondary radar transmitting component based on the aforementioned device includes the following steps:

[0043] S1, the radio frequency coupling and detection circuit couples the transmitted radio frequency signal of the secondary radar transmitting component and detects it to obtain a detected signal. The detected signal is compared with a reference voltage, and the transmitted and detected signal is output based on the comparison result.

[0044] S11, the secondary radar transmitting component transmits radio frequency signals;

[0045] S12, the coupling circuit couples the transmitted radio frequency signal of the secondary radar transmitting component to obtain the coupled radio frequency signal;

[0046] S13, the detection circuit detects the coupled radio frequency signal to obtain the detected signal;

[0047] S14, The detector signal is input to the comparator and compared with the set reference voltage: if the detector signal level is greater than the reference voltage, the comparator outputs a high level according to the TTL standard; otherwise, the comparator outputs a low level.

[0048] S15, the comparator output signal is isolated and driven to output a transmit detection signal to the FPGA.

[0049] S2, the FPGA counts the high-level signals of the transmit and detect signals based on the baseband ASK signal, and determines whether the transmit and detect signals are faulty based on the counting results:

[0050] S21, after the FPGA detects the rising edge of the baseband ASK signal, it starts the transmit detector counter;

[0051] S22, upon detecting the rising edge of the transmitted / detected signal, the transmitted / detected counter is reset to zero. Subsequently, when the transmitted / detected signal is high, the transmitted / detected counter executes an accumulation program; when the transmitted / detected signal is low, the transmitted / detected counter remains unchanged. After waiting for a period of time, ensuring that the complete detection of this transmitted / detected signal has been completed, the value of the transmitted / detected counter is locked and obtained. If this value is within a certain range of the baseband ASK signal width (e.g., ±10%, this ±10% deviation can be adaptively adjusted according to specific engineering requirements), then the detected signal is considered normal. The specific values ​​of A and B can be set according to specific engineering requirements; for example, A is set to 10, and B is set to 2. Figure 4 Δt1, Δt2, Δt3, and Δt4 represent the delay time from the baseband ASK signal to the transmitted and detected signal. This time may fluctuate slightly, but it will not affect the detection result of the detected signal. Figure 4 ΔT is a constant. After waiting for ΔT time from the rising edge of the baseband ASK signal, the transmit detector counter latches and compares the data. The specific value of ΔT can be set according to the time interval of the baseband ASK signal and specific engineering requirements.

[0052] S23, Detect each transmitted and detected signal using the method in step S22, and statistically analyze the detection results of the most recent A baseband ASK signals:

[0053] If the number of abnormal detectors is greater than or equal to B, then a transmission detector fault is determined, and the transmission detector fault flag register is set to "1".

[0054] If the number of abnormal detectors is less than B, the transmission detection is determined to be normal, and the transmission detection fault flag register is set to "0".

[0055] S3, the CPU reads the judgment result of whether the transmit detector is faulty from the FPGA and reports it to the secondary radar display and control terminal:

[0056] The CPU periodically accesses the transmit detection fault flag register in the FPGA, or immediately accesses the transmit detection fault flag register in the FPGA according to the self-test query command issued by the display and control terminal, to read the transmit detection results:

[0057] If the value of the transmit detection fault flag register is "1", then the transmit detection fault is reported to the secondary radar display and control terminal.

[0058] If the value of the transmission detection fault flag register is "0", then the secondary radar display and control terminal will be reported that the transmission detection is normal.

[0059] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for detecting the regularity of transmitted signals from a secondary radar transmitting assembly, characterized in that, Includes the following steps: S1, the radio frequency coupling and detection circuit couples the transmitted radio frequency signal of the secondary radar transmitting component and detects it to obtain the detected signal. The detected signal is compared with the reference voltage, and the transmitted and detected signal is output according to the comparison result. S2, the FPGA counts the high-level signals of the transmit and detect signals based on the baseband ASK signal, and determines whether the transmit and detect signals are faulty based on the counting results; S3, the CPU reads the judgment result of whether the transmission detector is faulty in the FPGA and reports it to the secondary radar display and control terminal; S2 includes the following sub-steps: S21, after the FPGA detects the rising edge of the baseband ASK signal, it starts the transmit detector counter; S22, after detecting the rising edge of the transmit-detector signal, the transmit-detector counter is cleared to zero. Then, when the transmit-detector signal is high, the transmit-detector counter executes an accumulation program; when the transmit-detector signal is low, the transmit-detector counter remains unchanged; after waiting for a period of time, after ensuring that the complete transmit-detector signal detection has been completed, the value of the transmit-detector counter is locked and obtained; if this value is within a certain range of the baseband ASK signal width, the detection signal is determined to be normal. S23, Detect each transmitted and detected signal using the method in step S22, and statistically analyze the detection results of the most recent A baseband ASK signals: If the number of abnormal detectors is greater than or equal to B, then the transmission detector is determined to be faulty. If the number of abnormal detectors is less than B, the transmission and detection are considered normal.

2. The method for detecting the regularity of transmitted signals from a secondary radar transmitting assembly according to claim 1, characterized in that, S1 includes the following sub-steps: S11, the secondary radar transmitting component transmits radio frequency signals; S12, the coupling circuit couples the transmitted radio frequency signal of the secondary radar transmitting component to obtain the coupled radio frequency signal; S13, the detection circuit detects the coupled radio frequency signal to obtain the detected signal; S14, The detector signal is input to the comparator and compared with the set reference voltage: if the detector signal level is greater than the reference voltage, the comparator outputs a high level according to the TTL standard; otherwise, the comparator outputs a low level. S15, the comparator output signal is isolated and driven to output a transmit detection signal to the FPGA.

3. The method for detecting the regularity of transmitted signals from a secondary radar transmitting assembly according to claim 2, characterized in that, The transmit detector fault flag register is used to indicate whether the transmit detector is faulty. If a transmit / detector fault is detected, the transmit / detector fault flag register is set to "1"; If the transmission detection is determined to be normal, the transmission detection fault flag register will be set to "0".

4. The method for detecting the regularity of transmitted signals from a secondary radar transmitting assembly according to claim 3, characterized in that, Step S3 includes: The CPU periodically accesses the transmit detection fault flag register in the FPGA, or immediately accesses the transmit detection fault flag register in the FPGA according to the self-test query command issued by the display and control terminal, to read the transmit detection results: If the value of the transmit detection fault flag register is "1", then the transmit detection fault is reported to the secondary radar display and control terminal. If the value of the transmission detection fault flag register is "0", then the secondary radar display and control terminal will be reported that the transmission detection is normal.

5. A device for detecting the regularity of transmitted signals from a secondary radar transmitting assembly, used to implement the method for detecting the regularity of transmitted signals from a secondary radar transmitting assembly as described in any one of claims 1-4, characterized in that, The device includes a signal processing component and a radio frequency coupling detection circuit; the signal processing component includes a CPU and an FPGA connected to each other; the CPU is used to connect to a secondary radar display and control terminal; the FPGA is used to connect to a secondary radar transmitting component.

6. The secondary radar transmitting component signal regularity detection device according to claim 5, characterized in that, The radio frequency coupling detection circuit includes a coupling circuit, a detection circuit, a comparator, and an isolation driver connected in sequence; the coupling circuit is used to couple the transmitted radio frequency signal of the secondary radar transmitting component, and the isolation driver is used to connect to the FPGA.

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