Signal transceiving apparatus and signal transceiving method thereof

Abstract

A signal transceiving device and a signal transceiving method are provided. The signal transceiving device includes a first controller and a second controller. The first controller is configured to transmit transmission data. The second controller is coupled to the first controller through a plurality of interrupt signal lines and a data transmission bus. The second controller transmits a plurality of interrupt signals to the first controller through the plurality of interrupt signal lines, respectively, and the first controller determines a size of the transmission data according to the interrupt signals.

Description

Technical Field

[0001] This disclosure relates to a signal transceiver apparatus and a signal transceiver method thereof, and more specifically to a signal transceiver apparatus capable of adjusting the size of transmitted data. Background Technology

[0002] With the advancement of technology, electronic products have become indispensable tools in people's lives. In electronic devices, data transmission is always necessary between two separate systems. In traditional technology, the first controller transmitting data always transmits data of a certain size. In some cases, the second controller receiving the data may not need the full-size data. If the second controller only needs to transmit a portion of the data, the bandwidth intended for transmitting the full-size data is wasted. That is, because the data is transmitted in its full size, the load on both the first and second controllers is inefficiently increased. Summary of the Invention

[0003] This disclosure provides a signal transceiver device and a signal transceiver method that can adjust the size of transmitted data.

[0004] The signal transceiver includes a first controller and a second controller. The first controller is configured to transmit data. The second controller is coupled to the first controller via multiple interrupt signal lines and a data transmission bus. The second controller transmits multiple interrupt signals to the first controller via the multiple interrupt signal lines, and the first controller determines the size of the transmitted data based on the interrupt signals.

[0005] The signal transmission and reception method includes: providing multiple interrupt signal lines coupled between a first controller and a second controller; the second controller transmitting multiple interrupt signals to the first controller through the multiple interrupt signal lines; and the first controller determining the size of the transmitted data based on the interrupt signals.

[0006] Based on the above, in the signal transceiver device, the second controller can send interrupt signals to the first controller via the plurality of interrupt signal lines during the signal transmission sequence. To control the size of the transmitted data, the second controller can cause at least one of the interrupt signals to transition. The first controller can determine the size of the transmitted data and transmit the data with the expected size to the second controller.

[0007] To make the above features and advantages of this disclosure readily understandable, embodiments will now be described in detail with reference to the accompanying drawings. Attached Figure Description

[0008] Figure 1 A schematic diagram of a signal transceiver apparatus according to an embodiment of the present disclosure is shown.

[0009] Figures 2A to 2C This is a waveform diagram of the interrupt signal according to an embodiment of the present disclosure.

[0010] Figure 3 A schematic diagram of a signal transceiver apparatus according to another embodiment of the present disclosure is shown.

[0011] Figure 4 A flowchart illustrating a data transmission and reception method according to an embodiment of the present disclosure is shown. Detailed Implementation

[0012] Please refer to Figure 1 , Figure 1 A schematic diagram of a signal transceiver apparatus according to an embodiment of the present disclosure is shown. The signal transceiver apparatus 100 includes a first controller 110 and a second controller 120. The first controller 110 has a first interrupt pin INTP1 and a second interrupt pin INTP2. The first interrupt pin INTP1 of the first controller 110 is coupled to one end of a first interrupt signal line W1, and the second interrupt pin INTP2 of the first controller 110 is coupled to one end of a second interrupt signal line W2. The second controller 120 has a first interrupt pin INTP3 and a second interrupt pin INTP4. The first interrupt pin INTP3 of the second controller 120 is coupled to the other end of the first interrupt signal line W1, and the second interrupt pin INTP4 of the second controller 120 is coupled to the other end of the second interrupt signal line W2. That is, the first controller 110 can be coupled to the second controller 120 through the first interrupt signal line W1 and the second interrupt signal line W2.

[0013] The first interrupt signal line W1 and the second interrupt signal line W2 are configured to transmit interrupt signals CS1 and CS2, respectively. In this embodiment, the second controller 120 can transmit the interrupt signal CS1 to the first controller 110 through the first interrupt signal line W1, and the second controller 120 can transmit the interrupt signal CS2 to the first controller 110 through the second interrupt signal line W2.

[0014] On the other hand, the first controller 110 is also coupled to the second controller 120 via a data transmission bus DTB. The data transmission bus DTB is used to transmit data between the first controller 110 and the second controller 120.

[0015] In this embodiment, during data transmission, if the second controller 120 needs to read data from the first controller 110, the second controller 120 can send interrupt signals CS1 and CS2 to the first controller 110 via the first interrupt signal line W1 and the second interrupt signal line W2, respectively. In this embodiment, the second controller 120 can generate interrupt signals CS1 and CS2 according to the size of the data to be transmitted. Correspondingly, the first controller 110 can receive interrupt signals CS1 and CS2 via the first interrupt signal line W1 and the second interrupt signal line W2, respectively. The first controller 110 can determine the size of the transmitted data and send the transmitted data of the expected size to the second controller 120 via the data transmission bus DTB.

[0016] In detail, the second controller 120 can determine whether to generate a transition edge on each of the interrupt signals CS1 to CS2 based on the size of the data to be transmitted. For example, if the size of the data to be transmitted is a first size, the second controller 120 can select to transition only on the interrupt signal CS1; if the size of the data to be transmitted is a second size, the second controller 120 can select to transition only on the interrupt signal CS2; if the size of the data to be transmitted is a third size, the second controller 120 can select to transition on both interrupt signals CS1 and CS2.

[0017] Furthermore, the first controller 110 can detect the transition edges of each of the interrupt signals CS1 and CS2 to determine the size of the transmitted data. For example, if only one transition edge is detected on the interrupt signal CS1, the first controller 110 can determine that the size of the transmitted data is a first size. If the first controller 110 detects only one transition edge on the interrupt signal CS2, the first controller 110 can determine that the size of the transmitted data is a second size. If the first controller 110 detects transition edges on both interrupt signals CS1 and CS2, the first controller 110 can determine that the size of the transmitted data is a third size. Here, the first size may be smaller than the second size, and the second size may be smaller than the third size. In some embodiments, the first size may be 16 bytes, the second size may be 32 bytes, and the third size may be 64 bytes.

[0018] If the size of the transmitted data is detected to be a first size, the first controller 110 can transmit the data of the first size to the second controller 120 via the data transmission bus DTB. If the size of the transmitted data is detected to be a second size, the first controller 110 can transmit the data of the second size to the second controller 120 via the data transmission bus DTB. Similarly, if the size of the transmitted data is detected to be a third size, the first controller 110 can transmit the data of the third size to the second controller 120 via the data transmission bus DTB. In this way, the first controller 110 only needs to transmit the data of the required size to the second controller 120, and the load on the first controller 110 can be reduced.

[0019] On the other hand, the data transmission bus (DTB) can be a serial interface data bus, such as a serial peripheral interface (SPI) data bus or a universal asynchronous receiver / transmitter (UART) data bus.

[0020] In this embodiment, the first controller 110 and the second controller 120 are processors with computing capabilities. Alternatively, each of the first controller 110 and the second controller 120 may be a hardware circuit designed using a hardware description language (HDL) or any digital circuit design method well known to those skilled in the art, and implemented using a field-programmable gate array (FPGA), a complex programmable logic device (CPLD), or an application-specific integrated circuit (ASIC).

[0021] Please refer to this together. Figure 1 and Figures 2A to 2C ,in Figures 2A to 2C This is a waveform diagram of an interrupt signal according to an embodiment of the present disclosure. Figures 2A to 2B In this process, interrupt signals CS1 and CS2 are generated by the second controller 120 and detected by the first controller 110. Figure 2A In this process, the first controller 110 can detect a transition edge 210 on the interrupt signal CS1, but cannot detect a transition edge on the interrupt signal CS2. That is, the first controller 110 can determine that the size of the transmitted data is a first size. Figure 2BIn this case, the first controller 110 cannot detect a transition edge on the interrupt signal CS1, but it can detect a transition edge 220 on the interrupt signal CS2. That is, the first controller 110 can determine that the size of the transmitted data is the second size. Figure 2C In this process, the first controller 110 can detect a transition edge 210 on the interrupt signal CS1 and a transition edge 220 on the interrupt signal CS2. That is, the first controller 110 can determine that the size of the transmitted data is the third size.

[0022] In detail, the first controller 110 can detect interrupt signals CS1 and CS2 by continuously monitoring their logic levels. Taking interrupt signal CS1 as an example, if the first controller 110 detects that interrupt signal CS1 is at a low logic level at time point t1, and then detects that interrupt signal CS1 becomes at a high logic level at time point t2 immediately following time point t1, then a rising edge transition 210 can be detected.

[0023] It should be noted that in this embodiment, the second controller 120 may generate interrupt signals CS1 and CS2 with rising edges 210 and 220 to notify the first controller 110 of the required size of the transmitted data. In other embodiments, the second controller 120 may also generate interrupt signals CS1 and CS2 with falling edges to notify the first controller 110 of the required size of the transmitted data.

[0024] Please refer to Figure 3 , Figure 3 A schematic diagram of a signal transceiver apparatus according to another embodiment of the present disclosure is shown. The signal transceiver apparatus 300 includes a first controller 310 and a second controller 320. The first controller 310 has a plurality of interrupt pins INTP11 to INTP1N. The interrupt pins INTP11 to INTP1N of the first controller 310 can be coupled to one end of interrupt signal lines W1 to WN, respectively. The second controller 320 has a plurality of interrupt pins INTP21 to INTP2N. The interrupt pins INTP21 to INTP2N of the second controller 320 can be coupled to the other end of interrupt signal lines W1 to WN, respectively. That is, the first controller 310 can be coupled to the second controller 320 through interrupt signal lines W1 to WN. In this embodiment, the number of interrupt signal lines W1 to WN can be greater than 2.

[0025] Interrupt signal lines W1 to WN are configured to transmit interrupt signals CS1 to CSN, respectively. In this embodiment, the second controller 320 can transmit interrupt signals CS1 to CSN to the first controller 310 via the first interrupt signal lines W1 to WN, respectively.

[0026] On the other hand, the first controller 310 is also coupled to the second controller 120 via a data transmission bus DTB. The data transmission bus DTB is used to transmit data between the first controller 310 and the second controller 320.

[0027] In this embodiment, during data transmission operations, if the second controller 320 needs to read data from the first controller 310, the second controller 320 can send interrupt signals CS1 to CSN to the first controller 110 via interrupt signal lines W1 to WN, respectively. Interrupt signals CS1 to CSN are used to notify the first controller 310 of the size of the data to be transmitted. The second controller 320 can generate interrupt signals CS1 to CSN based on the size of the data to be transmitted. The first controller 310 can determine the size of the transmitted data based on the interrupt signals CS1 to CSN and send the transmitted data of the expected size to the second controller 120 via the data transmission bus DTB.

[0028] In detail, the second controller 320 can determine whether to generate a transition edge on each of the interrupt signals CS1 to CSN based on the size of the data to be transmitted. For example, if the size of the data to be transmitted is a first size, the second controller 320 can select to transition only on the interrupt signal CS1; if the size of the data to be transmitted is a second size, the second controller 320 can select to transition only on the interrupt signal CS2; if the size of the data to be transmitted is a third size, the second controller 320 can select to transition both interrupt signals CS1 and CS2; and if the size of the data to be transmitted is a fourth size, the second controller 320 can select to transition only on the interrupt signal CSN. The first, second, third, and fourth sizes are different.

[0029] It should be noted that the relationship between the size of the data to be transmitted and the transition state from interrupt signal CS1 to CSN can be arbitrarily determined by those skilled in the art, and the examples mentioned above are merely exemplary examples and are not intended to limit the scope of this disclosure.

[0030] Furthermore, the first controller 310 can detect the transition edges of each of the interrupt signals CS1 to CSN to determine the size of the transmitted data. For example, if only one transition edge is detected on the interrupt signal CS1, the first controller 310 can determine that the size of the transmitted data is a first size. If the first controller 310 detects only one transition edge on the interrupt signal CS2, the first controller 310 can determine that the size of the transmitted data is a second size. If the first controller 310 detects transition edges on both interrupt signals CS1 and CS2, the first controller 310 can determine that the size of the transmitted data is a third size. If the first controller 310 detects only one transition edge on the interrupt signal CSN, the first controller 310 can determine that the size of the transmitted data is a fourth size.

[0031] Please refer to Figure 4 , Figure 4 A flowchart illustrating a data transmission and reception method according to an embodiment of the present disclosure is shown. In step S410, multiple interrupt signal lines are provided to be coupled between a first controller and a second controller. In step S420, the second controller transmits multiple interrupt signals to the first controller via the multiple interrupt signal lines. In step S430, the first controller determines the size of the transmitted data based on the interrupt signals.

[0032] The details of steps S410 to S430 have been described in the embodiments mentioned above, and will not be repeated here.

[0033] Although this disclosure has been described in detail with reference to the foregoing embodiments, it is not intended to limit this disclosure. Those skilled in the art will understand that changes and modifications can be made without departing from the spirit and scope of this disclosure. Therefore, the scope of protection of this disclosure is defined by the foregoing claims.

[0034] [Explanation of Symbols]

[0035] 100, 300: Signal transceiver devices;

[0036] 110, 310: First controller;

[0037] 120, 320: Second controller;

[0038] 210, 220: Transition edge / rising edge;

[0039] CS1, CS2~CSN: Interrupt signals;

[0040] DTB: Data Transmission Bus;

[0041] INTP1, INTP3: First interrupt pins;

[0042] INTP2, INTP4: Second interrupt pins;

[0043] INTP11, INTP12~INTP1N, INTP21, INTP22~INTP2N: Interrupt pins;

[0044] S410, S420, S430: Steps;

[0045] W1: Interrupt signal line;

[0046] W2: Interrupt signal line;

[0047] W3~WN: Interrupt signal lines

Claims

1. A signal transceiver, comprising: The first controller is configured to transmit data. The second controller is coupled to the first controller via multiple interrupt signal lines and a data transmission bus. The second controller transmits multiple interrupt signals to the first controller via the multiple interrupt signal lines, and the first controller determines the size of the transmitted data based on the interrupt signals. The first controller is configured to: If only the transition edge of the first interrupt signal in the interrupt signals is detected, then the size of the transmitted data is determined to be the first size; If only the transition edge of the second interrupt signal in the interrupt signals is detected, then the size of the transmitted data is determined to be the second size; as well as If the transition edges of both the first and second interrupt signals in the interrupt signals are detected, then the size of the transmitted data is determined to be a third size.

2. The signal transceiver apparatus of claim 1, wherein the first controller detects the transition edge of each of the interrupt signals to determine the size of the transmitted data.

3. The signal transceiver according to claim 2, wherein the transition edge is a rising edge or a falling edge.

4. The signal transceiver according to claim 1, wherein the first dimension is smaller than the second dimension and the second dimension is smaller than the third dimension.

5. The signal transceiver apparatus according to claim 1, wherein the first controller is further configured to: If only the transition edge of the third interrupt signal in the interrupt signals is detected, then the size of the transmitted data is determined to be the fourth size. The fourth dimension is different from any of the first dimension, the second dimension, and the third dimension.

6. The signal transceiver device according to claim 1, wherein the data transmission bus is a serial interface data bus.

7. The signal transceiver device according to claim 6, wherein the data transmission bus is a serial peripheral interface data bus or a universal asynchronous receiver / transmitter data bus.

8. The signal transceiver device according to claim 1, wherein the first controller has a plurality of first interrupt pins respectively coupled to the plurality of interrupt signal lines, and the second controller has a plurality of second interrupt pins respectively coupled to the plurality of interrupt signal lines.

9. A signal transmission and reception method, comprising: Provide multiple interrupt signal lines that will be coupled between the first controller and the second controller; The second controller transmits multiple interrupt signals to the first controller via the multiple interrupt signal lines; and The first controller determines the size of the transmitted data based on the interrupt signal. The step of the first controller determining the size of the transmitted data based on the interrupt signal further includes: If only the transition edge of the first interrupt signal in the interrupt signals is detected, then the size of the transmitted data is determined to be the first size; If only the transition edge of the second interrupt signal in the interrupt signals is detected, then the size of the transmitted data is determined to be the second size; and If the transition edges of both the first and second interrupt signals in the interrupt signals are detected, then the size of the transmitted data is determined to be a third size.

10. The signal transceiver method according to claim 9, wherein the step of the first controller determining the size of the transmitted data based on the interrupt signal includes: The transition edge of each of the interrupt signals is detected to determine the size of the transmitted data.

11. The signal transmission and reception method according to claim 10, wherein the transition edge is a rising edge or a falling edge.

12. The signal transceiver method according to claim 9, wherein the first dimension is smaller than the second dimension and the second dimension is smaller than the third dimension.

13. The signal transceiver method according to claim 9, further comprising: If only the transition edge of the third interrupt signal in the interrupt signals is detected, then the size of the transmitted data is determined to be the fourth size. The fourth dimension is different from any of the first dimension, the second dimension, and the third dimension.

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