A slope compensation circuit and a dc-dc converter

Abstract

The application provides a slope compensation circuit and a DC-DC converter, and relates to the technical field of electronic circuits.The slope compensation circuit comprises a current mirror unit, a slope compensation current unit, a buffer, a first switch unit, a second switch unit, a third switch unit, a fourth switch unit, a first resistor and a voltage holding unit, wherein the second current end of the current mirror unit is used for outputting a slope compensation current.The slope compensation circuit of the application has the advantages that the compensation slope is fixed, the slope compensation current is adaptively adjusted along with the change of the duty cycle, and the slope compensation current output is zero at the end of the conduction period of the switching power supply, thereby not affecting the load capacity of the switching power supply.

Description

Technical Field

[0001] This application relates to the field of electronic circuit technology, and more specifically, to a slope compensation circuit and a DC-DC converter. Background Technology

[0002] Subharmonic oscillation refers to the phenomenon in a switching mode power supply (SMPS) where, due to the inner current loop control mode, the duty cycle of the power supply is greater than 50% and the inductor current experiences a small step change, the inductor current error signal will oscillate. Subharmonic oscillation can damage the circuit and must be suppressed by effective measures.

[0003] Typically, in order to suppress subharmonic oscillations, an additional slope compensation circuit is required. The slope compensation current output by the slope compensation circuit suppresses the inductor current in the switching power supply, thereby suppressing subharmonic oscillations. However, as the duty cycle of the switching power supply system increases, the slope compensation current required by the switching power supply loop also increases, affecting the load-carrying capacity of the switching power supply. Summary of the Invention

[0004] This application addresses the shortcomings of the prior art by providing a slope compensation circuit and a DC-DC converter to solve the problems existing in the prior art.

[0005] The technical solution adopted in the embodiments of this application is as follows:

[0006] In a first aspect, embodiments of this application provide a slope compensation circuit, including: a current mirror unit, a slope compensation current unit, a buffer, a first switching unit, a second switching unit, a third switching unit, a fourth switching unit, a first resistor, and a voltage holding unit;

[0007] The voltage terminal of the current mirror unit is connected to a preset power supply. The first current terminal of the current mirror unit is grounded through the first switching unit and the first resistor in sequence. The second current terminal of the current mirror unit is the output terminal of the slope compensation circuit, which is used to output the slope compensation current. The second current terminal of the current mirror unit is grounded through the slope compensation current unit. The control terminal of the slope compensation current unit is used to connect to the preset power supply.

[0008] The output terminal of the buffer is connected to the control terminal of the first switching unit, and the control terminal of the first switching unit is also grounded through the second switching unit. The positive input terminal of the buffer is connected to the first input terminal of the voltage holding unit through the third switching unit, and the positive input terminal of the buffer is also connected to the second input terminal of the voltage holding unit. The output terminal of the voltage holding unit is grounded, and the negative input terminal of the buffer is connected to the output terminal of the first switching unit.

[0009] The first input terminal of the voltage holding unit is also connected to the voltage sampling point in the slope compensation current unit through the fourth switching unit;

[0010] The control terminals of the second and third switching units are used to receive the first clock signal, and the control terminal of the fourth switching unit is used to receive the second clock signal. The first clock signal and the second clock signal are inverse clock signals to each other.

[0011] In one embodiment, the slope compensation current unit includes: a second resistor, a first capacitor, a fifth switching unit, a sixth switching unit, and a seventh switching unit;

[0012] The control terminal of the fifth switching unit is the control terminal of the slope compensation current unit, one end of the fifth switching unit is the input terminal of the slope compensation current unit, and the other end of the fifth switching unit is the voltage sampling point;

[0013] The control terminal of the fifth switch unit is grounded through the first capacitor. The control terminal of the fifth switch unit is also grounded through the sixth switch unit and the seventh switch unit in sequence. The other end of the fifth switch unit is also grounded through the second resistor. The control terminal of the sixth switch unit is used to receive the first clock signal.

[0014] In one embodiment, the current mirror unit includes: a first PMOS transistor and a second PMOS transistor;

[0015] The gates of the first PMOS transistor and the second PMOS transistor are connected, and the sources of the first PMOS transistor and the second PMOS transistor are connected as the voltage terminals of the current mirror unit for connecting to the preset power supply. The drain of the first PMOS transistor is the first current terminal of the current mirror unit, and the drain of the second PMOS transistor is the second current terminal of the current mirror unit.

[0016] In one embodiment, the voltage holding unit includes: a second capacitor and a third capacitor;

[0017] The first input terminal of the voltage holding unit is the upper plate of the second capacitor, the second input terminal of the voltage holding unit is the upper plate of the third capacitor, and the lower plates of the second capacitor and the third capacitor are connected as the output terminal of the voltage holding unit.

[0018] In one embodiment, the slope compensation circuit further includes: a current source;

[0019] The input terminal of the current source is used to connect to the preset power supply, and the output terminal of the current source is connected to the control terminal of the slope compensation current unit.

[0020] Secondly, this application also provides a DC-DC converter, including: the slope compensation circuit, voltage input terminal, voltage output terminal, feedback module, logic control circuit, conduction time control circuit, high voltage signal control unit, and low voltage signal control unit as described in any of the above embodiments;

[0021] The voltage input terminal is connected to the first input terminal of the slope compensation circuit, the second input terminal of the slope compensation circuit is connected to the first output terminal of the logic control circuit, and the third input terminal of the slope compensation circuit is connected to the second output terminal of the logic control circuit.

[0022] The output terminal of the slope compensation circuit is connected to the input terminal of the feedback module, and the output terminal of the feedback module is connected to the input terminal of the logic control circuit through the conduction time control circuit.

[0023] The high-voltage signal control terminal of the logic control circuit is connected to the voltage output terminal through the high-voltage signal control unit, and the low-voltage signal control terminal of the logic control circuit is grounded through the low-voltage signal control unit. The voltage input terminal is also grounded through the high-voltage signal control unit and the low-voltage signal control unit.

[0024] In one embodiment, the feedback module includes: an error amplifier, a comparator, a high-side current sampling circuit, and a voltage divider circuit;

[0025] One end of the voltage divider circuit is connected to the voltage output terminal, and the other end of the voltage divider circuit is grounded.

[0026] The first input terminal of the error amplifier is connected to the preset sampling point of the voltage divider circuit and is used to receive the voltage sampling signal fed back by the voltage divider circuit. The second input terminal of the error amplifier is used to receive the reference voltage. The output terminal of the error amplifier is connected to the first input terminal of the comparator. The second input terminal of the comparator is connected to the output terminal of the ramp compensation circuit. The output terminal of the comparator is connected to the input terminal of the conduction time control circuit.

[0027] The input terminal of the high-side current sampling circuit is connected to one end of the high-voltage signal control unit, and the output terminal of the high-side current sampling circuit is connected to the third input terminal of the comparator.

[0028] In one embodiment, the DC-DC converter further includes an oscillator clock circuit;

[0029] The output of the oscillator clock circuit is connected to the clock signal input of the logic control circuit.

[0030] In one embodiment, the DC-DC converter further includes: a resonant unit;

[0031] The high-voltage signal control terminal of the logic control circuit is connected to the voltage output terminal in sequence through the high-voltage signal control unit and the resonant unit.

[0032] In one embodiment, the DC-DC converter further includes: a voltage regulator;

[0033] The input terminal of the voltage regulator is connected to the voltage input terminal, and the output terminal of the voltage regulator is connected to the first input terminal of the slope compensation circuit.

[0034] The beneficial effects of this application are as follows: This application provides a slope compensation circuit and a DC-DC converter. The slope compensation circuit includes a current mirror unit, a slope compensation current unit, a buffer, a first switching unit, a second switching unit, a third switching unit, a fourth switching unit, a first resistor, and a voltage holding unit. The second current terminal of the current mirror unit is used to output the slope compensation current. This slope compensation circuit can achieve functions such as fixed compensation slope and adaptive adjustment of the slope compensation current according to the duty cycle. Furthermore, at the end of the switching power supply's conduction cycle, the slope compensation current provided by this circuit is zero, thus not affecting the switching power supply's load-carrying capacity. Attached Figure Description

[0035] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0036] Figure 1 This is one of the structural schematic diagrams of a slope compensation circuit provided in an embodiment of this application;

[0037] Figure 2 This is a second schematic diagram of the slope compensation circuit provided in an embodiment of this application;

[0038] Figure 3 This is the third schematic diagram of the slope compensation circuit provided in one embodiment of this application;

[0039] Figure 4 This is one of the structural schematic diagrams of a DC-DC converter provided in an embodiment of this application;

[0040] Figure 5 This is a second schematic diagram of the structure of a DC-DC converter provided in an embodiment of this application. Detailed Implementation

[0041] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are some embodiments of this application, but not all embodiments.

[0042] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0043] In the description of this application, it should be noted that if the terms "upper", "lower", etc. appear to indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship that the product of this application is usually placed in, it is only for the convenience of describing this application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0044] Furthermore, the terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Additionally, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0045] In the description of this application, it should also be noted that, unless otherwise expressly specified and limited, the terms "set" and "connection" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can be a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal communication between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0046] It should be noted that, where there is no conflict, the features in the embodiments of this application can be combined with each other.

[0047] A switching mode power supply, also known as a switching power supply or switching converter, is a high-frequency power conversion device that converts a standard voltage into the voltage or current required by the user through different architectures. For example, a DC-DC converter is a type of DC switching power supply that can convert a DC source from one voltage level to another.

[0048] Typically, in order to suppress subharmonic oscillations in a switching power supply, an additional slope compensation circuit needs to be added to the switching power supply. The slope compensation current output by the slope compensation circuit suppresses the inductor current, thereby suppressing the subharmonic oscillations. However, as the duty cycle of the switching power supply system increases, the slope compensation current required by the switching power supply loop will also increase, which will affect the load-carrying capacity of the switching power supply.

[0049] Therefore, this application provides a slope compensation circuit that can reduce the output slope compensation current to zero at the end of the switching power supply's conduction cycle without affecting the switching power supply's load-carrying capacity.

[0050] The following examples, in conjunction with the accompanying drawings, provide specific illustrations of the slope compensation circuit provided in this application.

[0051] Figure 1 This is one of the structural schematic diagrams of a slope compensation circuit provided in an embodiment of this application, such as... Figure 1 As shown, the slope compensation circuit includes a current mirror unit, a slope compensation current unit, a buffer, a first switch unit M1, a second switch unit M2, a third switch unit M3, a fourth switch unit M4, a first resistor R1, and a voltage holding unit.

[0052] The voltage terminal of the current mirror unit is connected to a preset power supply VDD. The first current terminal of the current mirror unit is grounded through the first switching unit M1 and the first resistor R1 in sequence. The second current terminal of the current mirror unit is the output terminal of the slope compensation circuit provided in this application. The output terminal of the slope compensation circuit is used to output the slope compensation current I. slope The second current terminal of the current mirror unit is grounded through the slope compensation current unit, and the control terminal of the slope compensation current unit is used to connect to the preset power supply VDD.

[0053] The output terminal of the buffer is connected to the control terminal of the first switching unit M1. The control terminal of the first switching unit M1 is also grounded through the second switching unit M2. The positive input terminal of the buffer is connected to the first input terminal of the voltage holding unit through the third switching unit M3. The positive input terminal of the buffer is also connected to the second input terminal of the voltage holding unit. The output terminal of the voltage holding unit is grounded. The negative input terminal of the buffer is connected to the output terminal of the first switching unit M1. The function of the buffer is to make the potential at point Vc equal to the potential at point Vd.

[0054] The first input terminal of the voltage holding unit is also connected to the voltage sampling point in the slope compensation current unit via the fourth switching unit M4. For example... Figure 1 As shown, the potential of the first input terminal Vb of the voltage holding unit is equal to the voltage of the voltage sampling point in the slope compensation current unit. The first input terminal of the voltage holding unit is connected to one end of M3, and its function is to keep the voltage of the Vb point constant. The second input terminal of the voltage holding unit is connected to the positive input terminal of the buffer, and its function is to keep the voltage of the Vc point constant.

[0055] The control terminals of the second switch unit M2 and the third switch unit M3 are used to receive the first clock signal CLK, and the control terminal of the fourth switch unit M4 is used to receive the second clock signal C-L-K. The first clock signal CLK and the second clock signal C-L-K are inverse clock signals. The first clock signal and the second clock signal are used to control the on / off state of each switch unit to realize the function of the slope compensation circuit provided in this embodiment.

[0056] In the slope compensation circuit provided in this embodiment, the function of the slope compensation current unit is to generate current I. N The function of the current mirror unit is to make the current flowing through the first resistor R1 equal to the current I flowing into the slope compensation current unit. M Proportional, according to Kirchhoff's current law, the slope compensation current I slope =I M -I N , among which, I M It is a parameter related to the duty cycle. Therefore, by using the slope compensation circuit provided in this application, the compensation slope can be fixed and the slope compensation current I can be controlled. slope It adaptively adjusts with changes in duty cycle, and can achieve zero output ramp compensation current at the end of the switching power supply's conduction cycle, without affecting the switching power supply's load capacity.

[0057] Figure 2 This is a second schematic diagram of the slope compensation circuit provided in an embodiment of this application, which is described below in conjunction with... Figure 2 Specific examples are given for the slope compensation current unit, current mirror unit, and voltage holding unit in the slope compensation circuit.

[0058] like Figure 2 As shown, the slope compensation current unit includes a second resistor R2, a first capacitor C1, a fifth switch unit M5, a sixth switch unit M6, and a seventh switch unit M7.

[0059] In this embodiment, the control terminal of the fifth switching unit M5 is the control terminal of the slope compensation current unit described above. One end of the fifth switching unit M5 is the input terminal of the slope compensation current unit, and the other end of the fifth switching unit M5 is the voltage sampling point in the slope compensation current unit, i.e., Va. The control terminal of the fifth switching unit M5 is grounded through the first capacitor C1. The control terminal of the fifth switching unit M5 is also grounded through the sixth switching unit M6 and the seventh switching unit M7 in sequence. The other end of the fifth switching unit M5 is also grounded through the second resistor R2. The control terminal of the sixth switching unit M6 is used to receive the first clock signal CLK.

[0060] The current mirror unit includes a first PMOS transistor M8 and a second PMOS transistor M9. The function of the current mirror unit is to make the total voltage on the branch where M8 and M9 are located equal. That is, in the current mirror unit, if the current relationship between M8 and M9 is 1:N, then the resistance relationship between the first resistor R1 and the second resistor R2 is: R1=N×R2.

[0061] The gates of the first PMOS transistor M8 and the second PMOS transistor M9 are connected, and the sources of the first PMOS transistor M8 and the second PMOS transistor M9 are connected, serving as the voltage terminals of the current mirror unit for connecting to the preset power supply VDD. The drain of the first PMOS transistor M8 is the first current terminal of the current mirror unit, and the drain of the second PMOS transistor M9 is the second current terminal of the current mirror unit.

[0062] The voltage holding unit includes a second capacitor C2 and a third capacitor C3. The first input terminal of the voltage holding unit is the upper plate of the second capacitor C2, and the second input terminal of the voltage holding unit is the upper plate of the third capacitor C3. The lower plates of the second capacitor C2 and the third capacitor C3 are connected and serve as the output terminal of the voltage holding unit.

[0063] That is, the positive input terminal of the buffer is grounded in sequence through the third switching unit M3 and the second capacitor C2. The positive input terminal of the buffer is also grounded through the third capacitor C3. The first input terminal of the voltage holding unit in the above embodiment is connected to the voltage sampling point in the slope compensation current unit through the fourth switching unit M4, which means that the upper plate Vb of C2 is connected to the voltage sampling point Va in the slope compensation current unit.

[0064] It should also be noted that in the slope compensation circuit provided in this embodiment, the first switch unit M1, the second switch unit M2, the third switch unit M3, the fourth switch unit M4, the fifth switch unit M5, the sixth switch unit M6, and the seventh switch unit M7 are all N-type MOS transistors, while only the first PMOS transistor M8 and the second PMOS transistor M9 are P-type MOS transistors.

[0065] The following combination Figure 2The connections between the various components and the functional implementation of the slope compensation circuit provided in this embodiment are described in detail below:

[0066] In the slope compensation circuit provided in this embodiment, the first current terminal of the current mirror unit, that is, the drain of the first PMOS transistor M8, is grounded through the first switching unit M1 and the first resistor R1 in sequence; the second current terminal of the current mirror unit, that is, the drain of the second PMOS transistor M9, is the output terminal of the slope compensation circuit, used to output the slope compensation current I. slope The second current terminal of the current mirror unit is grounded through the slope compensation current unit, which means that the drain of the second PMOS transistor M9 is grounded through the fifth switch unit M5 and the second resistor R2 in sequence; the control terminal of the slope compensation current unit is used to connect to the preset power supply VDD, which means that the control terminal of the fifth switch unit M5 is used to connect to the preset power supply VDD.

[0067] The control terminals of the second switch unit M2, the third switch unit M3, and the sixth switch unit M6 are used to receive the first clock signal CLK, and the control terminal of the fourth switch unit M4 is used to receive the second clock signal C-L-K. The first clock signal CLK and the second clock signal C-L-K are inverse clock signals. That is, when the first clock signal CLK is high, the second clock signal C-L-K is low. The switch receiving the first clock signal CLK is turned on, and the switch receiving the second clock signal C-L-K is turned off. When the first clock signal CLK is low, the second clock signal C-L-K is high. The switch receiving the first clock signal CLK is turned off, and the switch receiving the second clock signal C-L-K is turned on. The first clock signal CLK and the second clock signal C-L-K are both provided by the logic control circuit in the switching power supply.

[0068] Since the switching power supply has a continuously cyclical conduction cycle, correspondingly, during the operation of the switching power supply containing the slope compensation circuit, the working principle of the slope compensation circuit in this embodiment is a continuous cycle of the following two states:

[0069] 1. When the first clock signal CLK is high and the second clock signal C-L-K is low, switch M4 is open, cutting off the path between Va and Vb. The voltage of Vb is equal to the voltage V at node Va before switch M4 is open. slope.max -V GS5 With switches M2 and M3 on, the charges on capacitors C2 and C3 are equal, and Vc equals Vb, which is equal to the voltage V at node Va before switch M4 is off. slope.max -V GS5Furthermore, since M2 is on, the output of the buffer is pulled low to ground, so the control terminal of M1 receives a low level. When M1 is off, Vd is zero, so the current in the branch containing M8 is zero, resulting in a decrease in current I. M It is also zero.

[0070] When switch M6 is turned on, current I B By connecting switches M6 and M7 to the ground terminal, at this time, I N =(V GS7 -V GS5 ) / R2,I N Approximately equal to zero, therefore, I M and I N If both are zero, then in the first state, when the first clock signal CLK is high and the second clock signal C-L-K is low, the slope compensation current I... slope When the current is zero, the peak current of the switching power supply is entirely determined by the switching power supply loop and is not affected by the slope compensation current I. slope The effect, namely, the slope compensation current I slope The injection will not affect the load capacity of the switching power supply chip.

[0071] 2. Then, the first clock signal CLK switches to low level, and the second clock signal C-L-K switches to high level. At this time, switches M2 and M3 are open, and Vc maintains its voltage value in the first state through capacitor C3. The buffer starts working, and Vd = Vc = V slope.max -V GS5 I M =N(V) slope.max -V GS5 ) / R1; Switch M4 is on, Va = Vb, switch M6 is off, current I B The water no longer flows into M7, but instead flows into capacitor C1, V slope Initially, I increases with the increase of the switching power supply's on-time. N =(V slope -V GS5 ) / R2=(V GS7 +I B ×t / C1-V GS5 ) / R2, at this time the slope compensation current I slope =I M -I N =N(V) slope.max -V GS5 ) / R1-(V GS7 +I B ×t / C1-V GS5 ) / R2, the compensation slope is dI sople / dt=I B / R2×C1.

[0072] It should be noted that the current I B The current is a fixed value provided by the preset power supply VDD. When the slope compensation circuit is working, it continuously cycles through the two states mentioned above. Under a certain operating condition of the switching power supply, when the slope compensation circuit reaches a steady state through the two states mentioned above, the compensation slope dI described in the above embodiment is achieved. sople / dt=I B / R2×C1, slope compensation current I slope =I M -I N =N(V) slope.max -V GS5 ) / R1-(V GS7 +I B ×t / C1-V GS5 ) / R2.

[0073] As can be seen from the above working principle, the compensation slope dI of the slope compensation circuit provided in this application is... sople / dt is only related to the current I B The magnitude of the compensation slope dI is related to the resistance of R2 and the capacitance of C1. sople / dt is a fixed value, and because V slope.max Related to the duty cycle, the slope compensation current provided by this slope compensation circuit can be adaptively adjusted as the duty cycle changes.

[0074] Based on the above explanation of the working principle, an example is given with R1 = R2 and N = 1. It is assumed that the switching power supply chip operates stably and the conduction time is T. on .

[0075] When the first clock signal CLK is high and the second clock signal C-L-K is low, Vb = Vc = V slope.max -V GS5 =V GS7 +I B ×T on / C1-V GS5 .

[0076] When the first clock signal CLK is low and the second clock signal C-L-K is high, I M =(V GS7 +I B ×T on / C1-V GS5 If ) / R2, then the slope compensation current I injected into the loop is... slope =I M -I N =(V GS7 +I B×T on / C1-V GS5 ) / R2-(V slope -V GS5 ) / R2=(I B / R2×C1)(T on -t), the compensation slope is dI sople / dt=I B / R2×C1, throughout the entire conduction cycle of the switching power supply, the slope compensation circuit continuously performs slope compensation on the switching power supply loop. At the end of the switching power supply's conduction cycle, the slope compensation current I... slope =0, therefore, at this time the peak current of the switching power supply is completely determined by the switching power supply loop and will not be affected by the slope compensation current. That is, the injection of the slope compensation current will not affect the chip load capacity of the switching power supply.

[0077] Through the above component setup and the connection between the components, the slope compensation circuit provided in this embodiment can achieve a fixed compensation slope and adaptive adjustment of the slope compensation current as the duty cycle changes. Furthermore, at the end of the switching power supply's conduction cycle, the slope compensation current provided by the slope compensation circuit is zero, which does not affect the load-carrying capacity of the switching power supply.

[0078] Figure 3 This is the third schematic diagram of the slope compensation circuit provided in one embodiment of this application, as shown below. Figure 3 As shown, the slope compensation circuit may also include a current source. The input terminal of the current source is connected to a preset power supply VDD, and the output terminal of the current source is connected to the control terminal of the slope compensation current unit, i.e., the control terminal of M5. The current source is used to output current I. B It can control the current I in the branch it is located on. B The value is adjusted to make it more stable. In actual operation, adjusting the output current of the current source to be equal to the current provided by VDD will enable the current source to stabilize the current in its branch.

[0079] In summary, in the slope compensation circuit of this application, the first PMOS transistor M8, the second PMOS transistor M9, the first switching unit M1, and the first resistor R1 constitute a voltage-to-current unit; current source I B The fifth switch unit M5, the sixth switch unit M6, the seventh switch unit M7, the first capacitor C1, and the second resistor R2 constitute the slope compensation current unit; the second switch unit M2, the third switch unit M3, the fourth switch unit M4, the second capacitor C2, and the third capacitor C3 constitute the sample and hold circuit.

[0080] Based on the slope compensation circuit provided in the above embodiments, this application also provides a DC-DC converter.

[0081] Figure 4 This is one of the structural schematic diagrams of a DC-DC converter provided in an embodiment of this application, such as... Figure 4 As shown, this application also provides a DC-DC converter, including the slope compensation circuit, voltage input terminal VIN, voltage output terminal VOUT, feedback module, logic control circuit, conduction time control circuit, high voltage signal control unit K1, and low voltage signal control unit K2 described in any of the above embodiments.

[0082] The voltage input terminal VIN is connected to the first input terminal of the slope compensation circuit, providing voltage VDD and current I to the slope compensation circuit described in the above embodiment. B The second input terminal of the slope compensation circuit is connected to the first output terminal of the logic control circuit. The slope compensation circuit receives the first clock signal CLK through the second input terminal. The third input terminal of the slope compensation circuit is connected to the second output terminal of the logic control circuit. The slope compensation circuit receives the second clock signal C-L-K through the third input terminal. The output terminal of the slope compensation circuit is connected to the input terminal of the feedback module, and outputs the slope compensation current to the DC-DC converter loop. The conduction time control circuit is used to control the conduction time of the DC-DC converter. The output terminal of the feedback module is connected to the input terminal of the logic control circuit through the conduction time control circuit.

[0083] The high-voltage signal control terminal of the logic control circuit is connected to the voltage output terminal VOUT through the high-voltage signal control unit K1, and the low-voltage signal control terminal of the logic control circuit is grounded through the low-voltage signal control unit K2. The voltage input terminal VIN is also grounded through the high-voltage signal control unit K1 and the low-voltage signal control unit K2.

[0084] Both the high-voltage signal control unit K1 and the low-voltage signal control unit K2 are high-voltage devices. When the logic control circuit outputs the DH signal, the high-voltage signal control unit K1 is turned on, and when the logic control circuit outputs the DL signal, the low-voltage signal control unit K2 is turned on.

[0085] Specifically, such as Figure 4 As shown, the feedback module includes an error amplifier, a PWM comparator, a high-side current sampling circuit, and a voltage divider circuit.

[0086] The voltage divider circuit includes resistors R3 and R4, which are the upper and lower voltage divider resistors at the output of the DC-DC converter, respectively. One end of the voltage divider circuit is connected to the voltage output terminal (meaning one end of R3 is used for the voltage output terminal), and the other end is grounded (meaning one end of R4 is used for grounding). The first input terminal of the error amplifier is connected to the preset sampling point of the voltage divider circuit to receive the voltage sampling signal FB fed back from the voltage divider circuit. The second input terminal of the error amplifier is used to receive the reference voltage V. REFThe output of the error amplifier is connected to the first input of the comparator, the second input of the comparator is connected to the output of the ramp compensation circuit, and the output of the comparator is connected to the input of the conduction time control circuit. The input of the high-side current sampling circuit is connected to one end of the high-voltage signal control unit K1, and the output of the high-side current sampling circuit is connected to the third input of the comparator.

[0087] The high-side current sampling circuit samples the inductor current flowing through K1 when switch K1 is turned on, and outputs the sampling result I. SEN Output to the PWM comparator.

[0088] The CLK signal output by the logic control circuit represents the switching frequency and duty cycle information of the DC-DC converter at this time. The CLK signal is input to the slope compensation circuit to control the output of the slope compensation current I. slope .

[0089] The inductor current information I obtained by the high-side current sampling circuit SEN The output EAO of the error amplifier and the slope compensation current I output by the slope compensation circuit. slope The signals are input together to the PWM comparator, which outputs a control signal to the on-time control circuit. The on-time control circuit controls the on-time of the high-voltage signal control unit K1.

[0090] In the DC-DC converter provided in this application, the voltage sampling signal FB fed back by the voltage divider circuit is compared with the reference voltage V. REF The input is amplified by an error amplifier and outputs a voltage EAO. When the feedback module of the DC-DC converter is stable, the voltage sampling signal FB is equal to the reference voltage V. REF Then the VOUT voltage is a fixed value, which realizes the function of controlling the DC-DC converter to output a constant voltage value.

[0091] Continue to refer to Figure 4 The DC-DC converter also includes an oscillator clock circuit. The output of the oscillator clock circuit is connected to the clock signal input of the logic control circuit to provide a clock signal for the logic control circuit.

[0092] The oscillator clock circuit generates the operating frequency clock for controlling the DC-DC converter, which, together with the output signal of the conduction time control circuit, is input to the logic control circuit to control the conduction and turn-off times of switches K1 and K2.

[0093] The DC-DC converter also includes a resonant unit, which includes an inductor L1 and a capacitor C4. The capacitor C4 is the output capacitor of the DC-DC converter. The high-voltage signal control terminal of the logic control circuit is connected to the voltage output terminal VOUT through the high-voltage signal control unit K1 and the resonant unit in sequence. In the DC-DC converter provided in this application, the resonant unit plays a filtering role.

[0094] Figure 5 This is a second schematic diagram of the structure of a DC-DC converter provided in an embodiment of this application, as shown below. Figure 5 As shown, the DC-DC converter may also include a voltage regulator. The input terminal of the voltage regulator is connected to the voltage input terminal, and the output terminal of the voltage regulator is connected to the first input terminal of the slope compensation circuit. The function of the voltage regulator is to generate a low-voltage power supply VDD from the high voltage VIN to power the internal circuit of the DC-DC converter.

[0095] In summary, the DC-DC converter provided in this application, with its slope compensation circuit, can achieve a fixed compensation slope and adaptive adjustment of the slope compensation current as the duty cycle changes. Furthermore, at the end of the DC-DC converter's conduction cycle, the slope compensation current provided by the slope compensation circuit is zero, which does not affect the DC-DC converter's load-carrying capacity. This enables the DC-DC converter to drive larger loads and effectively expands the application range of the DC-DC converter.

[0096] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A slope compensation circuit, characterized in that, include: Current mirror unit, slope compensation current unit, buffer, first switch unit, second switch unit, third switch unit, fourth switch unit, first resistor, voltage holding unit; The voltage terminal of the current mirror unit is connected to a preset power supply. The first current terminal of the current mirror unit is grounded through the first switching unit and the first resistor in sequence. The second current terminal of the current mirror unit is the output terminal of the slope compensation circuit, which is used to output the slope compensation current. The second current terminal of the current mirror unit is grounded through the slope compensation current unit. The control terminal of the slope compensation current unit is used to connect to the preset power supply. The output terminal of the buffer is connected to the control terminal of the first switching unit, and the control terminal of the first switching unit is also grounded through the second switching unit. The positive input terminal of the buffer is connected to the first input terminal of the voltage holding unit through the third switching unit, and the positive input terminal of the buffer is also connected to the second input terminal of the voltage holding unit. The output terminal of the voltage holding unit is grounded, and the negative input terminal of the buffer is connected to the output terminal of the first switching unit. The first input terminal of the voltage holding unit is also connected to the voltage sampling point in the slope compensation current unit through the fourth switching unit; The control terminals of the second and third switching units are used to receive the first clock signal, and the control terminal of the fourth switching unit is used to receive the second clock signal. The first clock signal and the second clock signal are inverse clock signals to each other.

2. The slope compensation circuit according to claim 1, characterized in that, The slope compensation current unit includes: a second resistor, a first capacitor, a fifth switching unit, a sixth switching unit, and a seventh switching unit; The control terminal of the fifth switching unit is the control terminal of the slope compensation current unit, one end of the fifth switching unit is the input terminal of the slope compensation current unit, and the other end of the fifth switching unit is the voltage sampling point; The control terminal of the fifth switch unit is grounded through the first capacitor. The control terminal of the fifth switch unit is also grounded through the sixth switch unit and the seventh switch unit in sequence. The other end of the fifth switch unit is also grounded through the second resistor. The control terminal of the sixth switch unit is used to receive the first clock signal.

3. The slope compensation circuit according to claim 1, characterized in that, The current mirror unit includes: a first PMOS transistor and a second PMOS transistor; The gates of the first PMOS transistor and the second PMOS transistor are connected, and the sources of the first PMOS transistor and the second PMOS transistor are connected as the voltage terminals of the current mirror unit for connecting to the preset power supply. The drain of the first PMOS transistor is the first current terminal of the current mirror unit, and the drain of the second PMOS transistor is the second current terminal of the current mirror unit.

4. The slope compensation circuit according to claim 1, characterized in that, The voltage holding unit includes: a second capacitor and a third capacitor; The first input terminal of the voltage holding unit is the upper plate of the second capacitor, the second input terminal of the voltage holding unit is the upper plate of the third capacitor, and the lower plates of the second capacitor and the third capacitor are connected as the output terminal of the voltage holding unit.

5. The slope compensation circuit according to claim 1, characterized in that, The slope compensation circuit also includes: a current source; The input terminal of the current source is used to connect to the preset power supply, and the output terminal of the current source is connected to the control terminal of the slope compensation current unit.

6. A DC-DC converter, characterized in that, include: The slope compensation circuit, voltage input terminal, voltage output terminal, feedback module, logic control circuit, conduction time control circuit, high voltage signal control unit, and low voltage signal control unit described in any one of claims 1-5 above; The voltage input terminal is connected to the first input terminal of the slope compensation circuit, the second input terminal of the slope compensation circuit is connected to the first output terminal of the logic control circuit, and the third input terminal of the slope compensation circuit is connected to the second output terminal of the logic control circuit. The output terminal of the slope compensation circuit is connected to the input terminal of the feedback module, and the output terminal of the feedback module is connected to the input terminal of the logic control circuit through the conduction time control circuit. The high-voltage signal control terminal of the logic control circuit is connected to the voltage output terminal through the high-voltage signal control unit, and the low-voltage signal control terminal of the logic control circuit is grounded through the low-voltage signal control unit. The voltage input terminal is also grounded through the high-voltage signal control unit and the low-voltage signal control unit.

7. The DC-DC converter according to claim 6, characterized in that, The feedback module includes: an error amplifier, a comparator, a high-side current sampling circuit, and a voltage divider circuit; One end of the voltage divider circuit is connected to the voltage output terminal, and the other end of the voltage divider circuit is grounded. The first input terminal of the error amplifier is connected to the preset sampling point of the voltage divider circuit and is used to receive the voltage sampling signal fed back by the voltage divider circuit. The second input terminal of the error amplifier is used to receive the reference voltage. The output terminal of the error amplifier is connected to the first input terminal of the comparator. The second input terminal of the comparator is connected to the output terminal of the ramp compensation circuit. The output terminal of the comparator is connected to the input terminal of the conduction time control circuit. The input terminal of the high-side current sampling circuit is connected to one end of the high-voltage signal control unit, and the output terminal of the high-side current sampling circuit is connected to the third input terminal of the comparator.

8. The DC-DC converter according to claim 6, characterized in that, The DC-DC converter also includes an oscillator clock circuit; The output of the oscillator clock circuit is connected to the clock signal input of the logic control circuit.

9. The DC-DC converter according to claim 6, characterized in that, The DC-DC converter further includes: a resonant unit; The high-voltage signal control terminal of the logic control circuit is connected to the voltage output terminal in sequence through the high-voltage signal control unit and the resonant unit.

10. The DC-DC converter according to claim 6, characterized in that, The DC-DC converter also includes: a voltage regulator; The input terminal of the voltage regulator is connected to the voltage input terminal, and the output terminal of the voltage regulator is connected to the first input terminal of the slope compensation circuit.

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