A modulation strategy for six-switch buck rectifier circuit arrangement

CN117792127BActive Publication Date: 2026-10-09HANGZHOU DIANZI UNIV
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Patent Information

Application Number
CN202311820506.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-12-27
Publication Date
2026-10-09
Estimated Expiration
2043-12-27

AI Technical Summary

Technical Problem

[0003]上述两种传统的调制策略往往在硬件上需要DSP芯片与CPLD芯片结合使用,另外在软件上也需要繁杂的计算才能实现电路正常工作所需的控制要求

Benefits of technology

[0026] 1. The new modulation strategy can eliminate complex binary-to-ternary conversion logic by accurately dividing the power frequency period 2π into sectors, thereby reducing the complexity of the modulation strategy and eliminating the need for a CPLD chip, thus reducing the control cost of the system.

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Abstract

The application discloses a modulation strategy for a six-switch BUCK rectifier circuit device. A new 60° DPWM dual-carrier modulation strategy based on the device comprises three-phase coordinate transformation, 60° sector division, dual-carrier configuration with a phase difference of 180°, and a PWM modulation strategy of injecting a modulation wave amplitude limiting value into a modulation wave. Compared with a traditional modulation strategy, the strategy does not need a redundant calculation process in an SVPWM modulation strategy, and can eliminate a two-three logic conversion circuit, thereby reducing system control cost; the initial modulation wave signal superimposes the modulation wave amplitude limiting value, so that when the line voltage is at a wave crest or a wave trough, the switch shared by the simplified dual-BUCK rectifier circuit in the corresponding sector is in a constant on state, thereby reducing system switching loss; and the strategy can also improve input voltage utilization of the dual-BUCK simplified circuit in each mode of the six-switch BUCK rectifier circuit, so as to maximize the output DC voltage range.
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Description

Technical Field

[0001] This invention relates to the field of power electronics technology, specifically to a modulation strategy for a six-switch BUCK rectifier circuit device. Background Technology

[0002] In aviation systems, the six-switch buck rectifier is a key component serving as the interface circuit between the AC power supply and the load. Currently, the modulation strategies for six-switch buck rectifiers are mainly divided into two categories. The first type of modulation strategy requires a combination of two- and three-stage logic conversion stages and SPWM modulation technology to generate a pulse width modulation waveform. The second type utilizes a complex SVPWM algorithm to generate a suitable modulation waveform to control the switching action of each high-frequency switch in the three-phase buck rectifier.

[0003] The two traditional modulation strategies mentioned above often require the combined use of DSP and CPLD chips in hardware, and also necessitate complex calculations in software to achieve the control requirements for normal circuit operation. This, to some extent, limits the widespread adoption of three-phase Buck rectifiers. Therefore, researching new modulation strategies and methods to address the high hardware and software costs of traditional modulation strategies is highly meaningful and has significant commercial value. Summary of the Invention

[0004] This invention addresses the shortcomings of existing technologies by proposing a modulation strategy for a six-switch BUCK rectifier circuit device. This strategy can reduce high-frequency switching losses, improve system operating efficiency, eliminate the complex two-to-three logic conversion steps under traditional modulation strategies, save the CPLD chip, and greatly reduce system control costs.

[0005] To solve the above-mentioned technical problems, the technical solution of the present invention is as follows:

[0006] This invention provides a modulation strategy for a six-switch BUCK rectifier circuit device, comprising the following steps:

[0007] Step 1: Construct a six-switch BUCK rectifier circuit device;

[0008] Step 2: Collect the grid-side phase voltages Va, Vb, and Vc; the currents ILa, ILb, and ILc flowing through the filter inductors La, Lb, and Lc of the input filter unit; the current Idc flowing through the energy storage inductor Lo of the output filter unit; and the load resistance R. o The voltage Vo across the two ends;

[0009] Step 3: Convert the grid-side phase voltages Va, Vb, and Vc into two components, i_d and i_q, through ABC / dq coordinate transformation. The i_d is used to generate a correction signal through a PI regulator. The correction signal of i_d is used to generate the phase change information theta of the grid-side phase voltage through an integrator and then connected to each ABC / dq module.

[0010] Step 4: Convert the inductor currents ILa, ILb, and ILc into two components, id and iq, through ABC / dq coordinate transformation;

[0011] Step 5: Compare the output voltage value Vo with the reference voltage V. ref Subtract the two, then pass the calculation result through a PI controller to form a reference signal for iq, subtract it from iq, and pass the result through a PI controller to obtain the iq correction signal iqout. Subtract id from 0, and pass the result through a PI controller to obtain the id correction signal idout.

[0012] Step 6: Obtain the three-phase initial modulation signals Vma, Vmb, and Vmc in the three-phase ABC stationary coordinate system by performing the ABC / dq inverse transformation on the obtained modified signals idout and iqout.

[0013] Step 7: Using the peak or trough of one phase of the initial three-phase modulation wave signals Vma, Vmb, and Vmc as the center position, the bridge arm corresponding to the peak or trough at the center position is the common bridge arm. Extending each peak and trough forward and backward by 30° respectively, six sectors are formed, each with a complete unit of the power frequency cycle and an angle of 60°. The modulation wave signal corresponding to the common bridge arm is superimposed with the modulation wave limiting value, i.e., the peak-to-peak value of the triangular carrier Vpm, thereby outputting the adjusted modulation wave signal Vmx_out (x = a, b, c) corresponding to the common bridge arm. The modulation wave signals corresponding to the other two phase bridge arms remain the initial modulation wave signals. For the other two phase bridge arms, triangular carriers with a phase of 0° and a phase of 180° are configured respectively. The switch of the common bridge arm is in the normally on state at this time, and there is no phase requirement for the triangular carrier configured for the switch of the common bridge arm. The carriers generated by the above configuration are the first, second, and third triangular carriers Vpu (u = 1, 2, 3).

[0014] Step 8: After processing the three-phase modulation signals Vma, Vmb, and Vmc with the six specific modulation wave amplitude limiting values, the corrected three-phase modulation signal Vmx_out (x = a, b, c) is obtained. This is then compared with the first, second, and third carrier waves to obtain the switching control signal S for each bridge arm. y (y = 1, 2, 3, 4, 5, 6).

[0015] Preferably, the first, second, and third carrier waves are triangular waves with equal peak values ​​and peak-to-peak values.

[0016] Preferably, the six-switch BUCK rectifier circuit includes one first-order RC filter, one second-order RLC filter, a bridge arm consisting of six switching transistors Si and diodes Di connected in series, one energy storage inductor Lo, one diode Do, one capacitor Co, one load resistor Ro, and three filter inductors La, Lb, and Lc.

[0017] Each of the bridge arms is composed of a switching transistor Si and a diode Di connected in series. The drain of the switching transistor Si and the anode of the diode Di are connected in series to form bridge arm i, where i = 1, 2, 3...6.

[0018] Specifically, the drain of switch S1 and the anode of diode D1 are connected in series to form bridge arm 1; the source of switch S2 and the cathode of diode D2 are connected in series to form bridge arm 2; the drain of switch S3 and the anode of diode D3 are connected in series to form bridge arm 3; the source of switch S4 and the cathode of diode D4 are connected in series to form bridge arm 4; the drain of switch S5 and the anode of diode D5 are connected in series to form bridge arm 5; and the source of switch S6 and the cathode of diode D6 are connected in series to form bridge arm 6.

[0019] Bridge arm 1 and bridge arm 2 are connected in series to form a series bridge arm a, bridge arm 3 and bridge arm 4 are connected in series to form a series bridge arm b, and bridge arm 5 and bridge arm 6 are connected in series to form a series bridge arm c. The cathodes of diodes D1, D3, and D5 are connected to one end of three filter inductors La, Lb, and Lc, and the other ends of the three filter inductors La, Lb, and Lc are respectively connected to the grid-side phase voltages Va, Vb, and Vc. The cathodes of diodes D2, D4, and D6 are connected to the negative terminal of the DC bus.

[0020] The three terminals of the first-order RC filter are connected to the grid-side phase voltages Va, Vb, and Vc, respectively, and the three terminals of the second-order RLC filter are connected to the bridge arms a, b, and c, respectively.

[0021] The diode Do is connected in parallel on both sides of the series bridge arm, the energy storage inductor Lo is connected in series in the positive DC bus, and the load resistor Ro and the filter capacitor Co are connected in parallel and then connected to the positive and negative terminals of the DC bus.

[0022] Preferably, the diode Di is a fast recovery diode, the inductor Lo is an energy storage inductor, the diode Do is a freewheeling diode, and the capacitor Co is a filter capacitor.

[0023] Preferably, the switching transistor Si is either a SiC MOSFET or a GaN transistor.

[0024] Preferably, all diodes are Schottky diodes.

[0025] This invention has the following characteristics and beneficial effects:

[0026] 1. The new modulation strategy can eliminate complex binary-to-ternary conversion logic by accurately dividing the power frequency period 2π into sectors, thereby reducing the complexity of the modulation strategy and eliminating the need for a CPLD chip, thus reducing the control cost of the system.

[0027] 2. A specific modulation wave limiting value is added to the three-phase modulation wave, so that the generated PWM wave is a discontinuous PWM wave. That is, the switching transistor remains on during the 60° range when the input voltage and current amplitude of each phase is the largest, thereby reducing switching losses.

[0028] 3. In the new modulation strategy, by configuring triangular carriers with different phases for the first, second, and third carriers, the input voltage utilization rate of the dual-buck simplified circuit under each mode of the six-switch BUCK rectifier circuit can be improved, thereby maximizing the output DC voltage range. Attached Figure Description

[0029] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0030] Figure 1 This is a schematic diagram of a six-switch BUCK rectifier circuit device according to an embodiment of the present invention.

[0031] Figure 2 This is a schematic diagram of the modulation and control strategy of a six-switch BUCK rectifier circuit device according to an embodiment of the present invention.

[0032] Figure 3 This invention relates to the specific judgment method for sector division within the C language program block of the control strategy for the six-switch BUCK rectifier circuit device in this embodiment, and the hysteresis phases corresponding to the first, second, and third triangular carriers in different sectors.

[0033] Figure 4 The corrected waveform Vmx_out(x=a,b,c) is calculated by the three-phase modulation wave and the amplitude limiting values ​​of the six specific modulation waves in the control strategy of the six-switch BUCK rectifier circuit device in this embodiment of the invention.

[0034] Figure 5 The waveform of the filter inductor current in the input filter unit of the six-switch BUCK rectifier circuit device in this embodiment of the invention is shown.

[0035] Figure 6 The waveform of the energy storage inductor current in the output filter unit of the six-switch BUCK rectifier circuit device in this embodiment of the invention is shown.

[0036] Figure 7 The load resistor R of the six-switch BUCK rectifier circuit device in this embodiment of the invention is... o DC voltage waveforms at both ends.

[0037] Figure 8 This is the driving waveform of the high-frequency switching transistors on the six bridge arms of the power conversion unit in this embodiment of the invention.

[0038] Figure 9 The driving waveforms are for the high-frequency operating switching transistor and the normally-on switching transistor in the second sector of this embodiment. Detailed Implementation

[0039] It should be noted that, unless otherwise specified, the embodiments and features described in the present invention can be combined with each other.

[0040] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicating orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention. Furthermore, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined with "first," "second," etc., may explicitly or implicitly include one or more of that feature. In the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0041] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art will understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0042] This invention provides a modulation strategy for a six-switch BUCK rectifier circuit device, such as... Figure 2 As shown, it includes the following steps:

[0043] Step 1: Six-switch type BUCK rectifier circuit device;

[0044] In this embodiment, the six-switch type BUCK rectifier circuit device, such as Figure 1 As shown, the topology consists of three parts: an input filtering unit, a power conversion unit, and an output filtering unit.

[0045] In the input filtering unit, resistors R1a, R1b, and R1c, along with capacitors C1a, C1b, and C1c, form a first-order RC filter, which is connected in series with one end of inductors La, Lb, and Lc. Resistors R2a, R2b, and R2c, along with capacitors C2a, C2b, and C2c, are connected in series in a star configuration to form a first-order RC filter, which is then connected to the other end of inductors La, Lb, and Lc to form a second-order RLC filter.

[0046] In the power conversion unit, each bridge arm is composed of a switching transistor Si and a diode Di connected in series. The drain of the switching transistor Si and the anode of the diode Di are connected in series to form bridge arm i, where i = 1, 2, 3...6.

[0047] Specifically, the drain of switch S1 and the anode of diode D1 are connected in series to form bridge arm 1; the source of switch S2 and the cathode of diode D2 are connected in series to form bridge arm 2; the drain of switch S3 and the anode of diode D3 are connected in series to form bridge arm 3; the source of switch S4 and the cathode of diode D4 are connected in series to form bridge arm 4; the drain of switch S5 and the anode of diode D5 are connected in series to form bridge arm 5; and the source of switch S6 and the cathode of diode D6 are connected in series to form bridge arm 6.

[0048] Bridge arm 1 and bridge arm 2 are connected in series to form series bridge arm a, bridge arm 3 and bridge arm 4 are connected in series to form series bridge arm b, and bridge arm 5 and bridge arm 6 are connected in series to form series bridge arm c. The cathodes of diodes D1, D3, and D5 are connected to one end of three filter inductors La, Lb, and Lc, and the other ends of the three filter inductors La, Lb, and Lc are respectively connected to the grid-side phase voltages Va, Vb, and Vc. The cathodes of diodes D2, D4, and D6 are connected to the negative terminal of the DC bus.

[0049] The three terminals of the first-order RC filter are connected to the grid-side phase voltages Va, Vb, and Vc, respectively, and the three terminals of the second-order RLC filter are connected to the bridge arms a, b, and c, respectively.

[0050] The diode Do is connected in parallel on both sides of the series bridge arm.

[0051] In the output filtering unit, the energy storage inductor Lo is connected in series in the positive DC bus, and the load resistor Ro and the filter capacitor Co are connected in parallel and then connected to the positive and negative terminals of the DC bus.

[0052] Wherein, diode Di is a fast recovery diode, inductor Lo is an energy storage inductor, diode Do is a freewheeling diode, and capacitor Co is a filter capacitor. The switching transistor Si is either a SiC MOSFET or a GaN transistor. All diodes are Schottky diodes.

[0053] Step 2: Collect the grid-side phase voltages Va, Vb, and Vc; the currents ILa, ILb, and ILc flowing through the filter inductors La, Lb, and Lc of the input filter unit; the current Idc flowing through the energy storage inductor Lo of the output filter unit; and the load resistance R. o The voltage Vo across the two ends;

[0054] In this embodiment, the expressions for the grid-side phase voltages Va, Vb, and Vc are as follows:

[0055] Va = V m sinα

[0056]

[0057]

[0058] Step 3: Convert the grid-side phase voltages Va, Vb, and Vc into two components, i_d and i_q, through ABC / dq coordinate transformation. The i_d is used to generate a correction signal through a PI regulator. The correction signal of i_d is used to generate the phase change information theta of the grid-side phase voltage through an integrator and then connected to each ABC / dq module.

[0059] In this embodiment, the specific method for converting ABC / dq coordinates to i_d and i_q through coordinate transformation is as follows:

[0060] i_d=0.66667*(Va*cc+Vb*cc1+Vc*cc2)

[0061] i_q=0.66667*(Va*ss+Vb*ss1+Vc*ss2)

[0062] Step 4: Convert the inductor currents ILa, ILb, and ILc into two components, id and iq, through ABC / dq coordinate transformation;

[0063] In this embodiment, the ABC / dq coordinate transformation method is as follows:

[0064] cc = cos(theta)

[0065] ss = sin(theta)

[0066] cc1 = cos(theta - 2.0944)

[0067] ss1 = sin(theta - 2.0944)

[0068] cc1 = cos(theta + 2.0944)

[0069] ss1 = sin(theta + 2.0944)

[0070] id=0.66667*(ILa*cc+ILb*cc1+ILc*cc2)

[0071] iq=0.66667*(ILa*ss+ILb*ss1+ILc*ss2)

[0072] Step 5: Compare the output voltage value Vo with the reference voltage V. ref Subtract the two, then pass the calculation result through a PI controller to form a reference signal for iq, subtract it from iq, and pass the result through a PI controller to obtain the iq correction signal iqout. Subtract id from 0, and pass the result through a PI controller to obtain the id correction signal idout.

[0073] Step 6: Obtain the three-phase initial modulation signals Vma, Vmb, and Vmc in the three-phase ABC stationary coordinate system by performing the ABC / dq inverse transformation on the obtained modified signals idout and iqout.

[0074] The expressions for the initial three-phase modulation signals Vma, Vmb, and Vmc are as follows:

[0075] Vma = idout * cc + iqout * ss

[0076] Vmb = idout * cc1 + iqout * ss1

[0077] Vmc = idout * cc² + iqout * ss²

[0078] Step 7: Using the peak or trough of one phase of the initial three-phase modulation wave signals Vma, Vmb, and Vmc as the center position, the bridge arm corresponding to the peak or trough at the center position is the common bridge arm. Extending each peak and trough forward and backward by 30° respectively, six sectors are formed, each with a complete unit of the power frequency cycle and an angle of 60°. The modulation wave signal corresponding to the common bridge arm is superimposed with the modulation wave limiting value, i.e., the peak-to-peak value of the triangular carrier Vpm, thereby outputting the adjusted modulation wave signal Vmx_out (x = a, b, c) corresponding to the common bridge arm. The modulation wave signals corresponding to the other two phase bridge arms remain the initial modulation wave signals. For the other two phase bridge arms, triangular carriers with a phase of 0° and a phase of 180° are configured respectively. The switch of the common bridge arm is in the normally on state at this time, and there is no phase requirement for the triangular carrier configured for the switch of the common bridge arm. The carriers generated by the above configuration are the first, second, and third carriers Vpu (u = 1, 2, 3).

[0079] Step 8: After processing the three-phase modulation signals Vma, Vmb, and Vmc with the six specific modulation wave amplitude limiting values, the corrected three-phase modulation signal Vmx_out (x = a, b, c) is obtained. This is then compared with the first, second, and third carrier waves to obtain the switching control signal S for each bridge arm. y (y = 1, 2, 3, 4, 5, 6).

[0080] In this embodiment, the three-phase modulation signals Vma, Vmb, and Vmc are calculated with six specific modulation wave limiting values, as shown in the following expression:

[0081] Vmx_out = Vmx + Vpm(x = a, b, c)

[0082]

[0083] Among them, the first, second and third carriers are triangular waves with equal peak values ​​and peak-to-peak values.

[0084] Compared to traditional modulation strategies, the novel 60° DPWM dual-carrier modulation strategy eliminates the need for two-to-three logic conversion circuits, reducing system control costs. The injection of six specific modulation wave amplitude-limiting values ​​into the modulation wave ensures that when the line voltage is at its peak or trough, the shared switching transistor in the simplified dual-buck rectifier circuit under the corresponding sector remains in a normally-on state, reducing system switching losses. The dual-carrier configuration with a 180° phase difference also improves the input voltage utilization rate of the simplified dual-buck circuit under various modes of the six-switch buck rectifier circuit, thereby maximizing the output DC voltage range.

[0085] According to the six-switch BUCK rectifier circuit device given in this embodiment, see [link to relevant documentation]. Figure 5This is the current waveform of the filter inductor in the input filter unit when the effective value of the three-phase input line voltage is 220V and the load resistance is 180Ω. Figure 6 Under the same conditions, the current waveform of the energy storage inductor in the output filter unit is shown. Figure 8 Under the same conditions, using a new modulation strategy, the driving waveform of two high-frequency switching transistors in the six bridge arms; Figure 9 Under the same conditions, using a new modulation strategy, the driving waveforms of the two high-frequency operating switches and the normally-on switch in the second sector are obtained. Figure 3 It is the internal program logic of the C language program block in the new 60° DPWM dual-carrier modulation strategy of the three-phase six-switch BUCK rectifier, namely the judgment condition for accurate sector division, and the triangular carriers with different hysteresis phases configured for the first, second, and third carriers in different sectors. Figure 4 It is a corrected waveform obtained by calculating the amplitude limiting values ​​of the three-phase modulated wave output by the voltage and current dual closed-loop output of the new 60° DPWM dual-carrier modulation strategy of the three-phase six-switch BUCK rectifier and the six specific modulated waves output by the C language program block.

[0086] The embodiments of the present invention have been described in detail above with reference to the accompanying drawings, but the present invention is not limited to the described embodiments. For those skilled in the art, various changes, modifications, substitutions, and variations can be made to these embodiments, including components, without departing from the principles and spirit of the present invention, and these variations still fall within the protection scope of the present invention.

Claims

1. A modulation strategy for a six-switch type BUCK rectifier circuit device, characterized in that, Includes the following steps: Step 1: Construct a six-switch BUCK rectifier circuit device; Step 2: Collect the following data from the six-switch BUCK rectifier circuit: grid-side phase voltages Va, Vb, Vc; currents ILa, ILb, ILc flowing through the filter inductors La, Lb, Lc of the input filter unit; current Idc flowing through the energy storage inductor Lo of the output filter unit; and load resistance R. o The voltage Vo across the two ends; Step 3: Generate the phase change information theta of the grid-side phase voltage through the grid-side phase voltages Va, Vb, and Vc, and connect it to each ABC / dq module; Step 4: Convert the inductor currents ILa, ILb, and ILc into two components, id and iq, through ABC / dq coordinate transformation; Step 5: Based on the output voltage value Vo and the reference voltage V ref Obtain the corrected signals idout and iqout for id and iq respectively; Step 6: Obtain the three-phase initial modulation signals Vma, Vmb, and Vmc in the three-phase ABC stationary coordinate system by performing the ABC / dq inverse transformation on the obtained modified signals idout and iqout. Step 7: Using the peak or trough of one phase of the three-phase initial modulation wave signals Vma, Vmb, and Vmc as the center position, the bridge arm corresponding to the peak or trough at the center position is the common bridge arm. Extending each peak and trough forward and backward by 30° respectively, six sectors are formed with the power frequency cycle as a complete unit. The angle of each sector is 60°. The modulation wave signal corresponding to the common bridge arm is superimposed with the modulation wave limiting value, i.e., the peak-to-peak value of the triangular carrier Vpm, thereby outputting the adjusted modulation wave signal Vmx_out (x = a, b, c) corresponding to the common bridge arm. The modulation wave signals corresponding to the other two phase bridge arms maintain the initial modulation wave signal. For the other two phase bridge arms, triangular carriers with a phase of 0° and a phase of 180° are configured respectively. The switch of the common bridge arm is in the normally on state at this time. The triangular carrier configured by the switch of the common bridge arm has no phase requirement. The carriers generated by the above configuration are the first, second, and third carriers Vpu (u = 1, 2, 3). Step 8: After processing the three-phase modulation signals Vma, Vmb, and Vmc with the six specific modulation wave amplitude limiting values, the corrected three-phase modulation signal Vmx_out (x = a, b, c) is obtained. This is then compared with the first, second, and third carrier waves to obtain the switching control signal S for each bridge arm. y (y = 1, 2, 3, 4, 5, 6).

2. The modulation strategy for a six-switch BUCK rectifier circuit device according to claim 1, characterized in that, In step 3, the method for generating the phase change information theta is as follows: the grid-side phase voltages Va, Vb, and Vc are converted into two components, i_d and i_q, through ABC / dq coordinate transformation. The i_d is used to form a correction signal of i_d through a PI regulator. The correction signal of i_d is used to generate the phase change information theta of the grid-side phase voltage through an integrator.

3. The modulation strategy for a six-switch BUCK rectifier circuit device according to claim 1, characterized in that, The specific method for step 5 is as follows: compare the output voltage value Vo with the reference voltage V ref Subtract the two, then pass the calculation result through a PI controller to form a reference signal for iq, subtract it from iq, and pass the result through a PI controller to obtain the iq correction signal iqout. Subtract id from 0, and pass the result through a PI controller to obtain the id correction signal idout.

4. The modulation strategy for a six-switch BUCK rectifier circuit device according to claim 1, characterized in that, The first, second, and third carrier waves are triangular waves with equal peak values ​​and peak-to-peak values.

Citation Information

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