Etching apparatus and control method
Patent Information
- Application Number
- CN202211164475.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-09-23
- Publication Date
- 2026-10-27
- Estimated Expiration
- 2042-09-23
AI Technical Summary
[0003]鉴于上述现有技术的不足,本申请的目的在于提供一种蚀刻装置及控制方法,旨在解决现有的蚀刻装置的晶圆载盘在未放满晶圆时蚀刻速率会增快,导致对晶圆的蚀刻造成影响的问题
[0003]鉴于上述现有技术的不足,本申请的目的在于提供一种蚀刻装置及控制方法,旨在解决现有的蚀刻装置的晶圆载盘在未放满晶圆时蚀刻速率会增快,导致对晶圆的蚀刻造成影响的问题。
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Figure CN117810073B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to etching apparatus and control methods. Background Technology
[0002] With the widespread application of electronic devices, semiconductor manufacturing processes have developed rapidly. In semiconductor manufacturing, wafers need to be etched using etching equipment. During etching, dissociative gases react with the etch film layer on the wafer, thereby removing the etch film layer from the wafer surface. When the wafer carrier of the etching equipment is full of wafers, the etching of the plasma within the reaction chamber is relatively uniform. However, in existing etching equipment, when the wafer carrier is not full, the area of the etch film layer is relatively small, and at this time, there is a relatively large amount of dissociative gas, leading to a faster etching rate, which may affect the normal etching of the wafer. Summary of the Invention
[0003] In view of the shortcomings of the prior art, the purpose of this application is to provide an etching apparatus and control method, which aims to solve the problem that the etching rate of the existing etching apparatus increases when the wafer carrier is not full of wafers, thus affecting the etching of the wafers.
[0004] An etching apparatus that uses an ion source to bombard a wafer, the etching apparatus comprising:
[0005] The shell has a reaction chamber inside;
[0006] A mounting base is disposed within the reaction chamber. A wafer carrier is provided on the top of the mounting base, and a plurality of wafer slots for accommodating the wafer are provided on the top of the wafer carrier.
[0007] A circuit device is disposed on the mounting base, the circuit device including an adjustable power supply and an adjustment circuit, the adjustable power supply being electrically connected to the adjustment circuit; the adjustment circuit is configured to repel or attract an ion source applied to the wafer;
[0008] A sensing device, mounted on the mounting base, is used to sense the number of wafers mounted on the wafer carrier; and,
[0009] The controller is electrically connected to the adjustable power supply and the sensing device, respectively. The controller is used to adjust the output voltage of the adjustable power supply according to the number of wafers mounted on the wafer carrier disk as sensed by the sensing device.
[0010] In the aforementioned etching apparatus, the circuitry includes an adjustment circuit on the mounting base, which generates an electric field when connected. This electric field causes positive ions in the plasma to be subjected to an electric force, thereby repelling them towards the wafer carrier on the mounting base and reducing the reaction rate between the plasma and the etched film.
[0011] When the number of wafers is smaller, the volume of the etched film on the wafer is smaller, and the relatively more plasma is present. Therefore, the reaction rate between the plasma and the etched film on the wafer is faster. Consequently, with a smaller number of wafers, the circuitry needs to increase its repulsion of positive ions. In practical applications, the controller senses the number of wafers on the wafer carrier using a sensing device, and then adjusts the output voltage of the adjustable power supply based on the number of wafers. This adjusts the circuitry's repulsion or attraction of positive ions in the plasma, ensuring a normal etching rate.
[0012] In practice, when the wafer carrier is full of wafers or when the etching apparatus needs to speed up the etching rate, the controller can also output a negative voltage from the adjustable power supply. This changes the electric field generated by the adjustment circuit, thereby attracting positive ions from the plasma through the opposite electric field force. This accelerates the bombardment speed of positive ions toward the mounting base, thus also accelerating the reaction rate between the plasma and the etched film. By controlling the etching time, the production rate can be increased.
[0013] Optionally, the adjustment circuit includes a main circuit and multiple electric field circuits connected in parallel to the main circuit, and the adjustable power supply is located on the main circuit;
[0014] The electric field circuits are arranged one-to-one with the wafer slots. Each electric field circuit is located at the bottom of the corresponding wafer slot, and each electric field circuit is provided with a connection switch. Each connection switch is used to be in a closed state when the wafer is installed in the corresponding wafer slot.
[0015] Optionally, each of the electric field circuits includes a first circuit and a second circuit. One end of the first circuit and the second circuit are electrically isolated from each other and are respectively provided with an electrical contact. The other ends of the first circuit and the second circuit are respectively connected to the main circuit so as to electrically connect to the positive and negative terminals of the adjustable power supply.
[0016] Each of the wafers has an electrical conductivity layer at its bottom, which is configured to connect to the electrical contacts on the first circuit and the second circuit respectively when the wafer is mounted in the wafer trench, so as to close the connection switch.
[0017] Optionally, the sensing device includes a counter for calculating the number of wafers mounted on the wafer carrier based on the closed state information of the connection switch.
[0018] Optionally, the sensing device includes at least one pressure sensor disposed on the wafer carrier, the pressure sensor being used to sense the pressure on the wafer carrier;
[0019] The controller is electrically connected to the pressure sensor to determine the number of wafers mounted on the wafer carrier based on the pressure sensed by the pressure sensor on the wafer carrier.
[0020] Optionally, the adjustable power supply can output a positive or negative voltage to the adjustment circuit, such that the adjustment circuit repels the ion source when the adjustable power supply outputs a positive voltage and attracts the ion source when the adjustable power supply outputs a negative voltage.
[0021] Based on the same inventive concept, this application also provides a control method applied to the etching apparatus described above, the control method comprising:
[0022] Obtain the number of wafers placed on the wafer carrier;
[0023] The output voltage of the adjustable power supply is set according to the number of wafers placed on the wafer carrier.
[0024] In the above control method, the controller obtains the number of wafers on the wafer carrier through a sensing device, and then adjusts the output voltage of the adjustable power supply according to the number of wafers, thereby adjusting the degree of repulsion of positive ions in the plasma by the adjustment circuit, so as to ensure the normal etching rate and the stability of the etching device.
[0025] Optionally, the sensing device includes a pressure sensor disposed on the wafer carrier, the pressure sensor being used to sense the pressure on the wafer carrier;
[0026] The step of obtaining the number of wafers placed on the wafer carrier specifically includes:
[0027] Obtain the pressure value sensed by the pressure sensor;
[0028] The number of wafers placed on the wafer carrier is determined based on the pressure value.
[0029] Optionally, the adjustment circuit includes a main circuit and a plurality of electric field circuits respectively connected to the main circuit; each electric field circuit is provided with a connection switch, which is in a closed state when the wafer is installed in the corresponding wafer slot; the sensing device includes a counter, which is used to calculate the number of wafers installed on the wafer carrier based on the closed state information of the connection switch;
[0030] The step of obtaining the number of wafers placed on the wafer carrier further includes:
[0031] If any of the aforementioned switches is in the closed state, the counter will accumulate one count;
[0032] The number of wafers mounted on the wafer carrier is determined based on the final cumulative count value of the counter.
[0033] Optionally, the adjustable power supply can output a positive voltage or a negative voltage to the adjustment circuit;
[0034] The step of setting the output voltage of the adjustable power supply according to the number of wafers placed on the wafer carrier includes:
[0035] When all the wafer slots contain the wafer, the adjustable power supply outputs a negative voltage into the adjustment circuit. Attached Figure Description
[0036] Figure 1 This is a cross-sectional schematic diagram of an embodiment of the etching apparatus provided in this application;
[0037] Figure 2 for Figure 1 A top view of the wafer carrier disk;
[0038] Figure 3 A schematic flowchart of an embodiment of the control method provided in this application;
[0039] Figure 4 for Figure 3 A flowchart illustrating another embodiment of the control method.
[0040] Figure label:
[0041] 100-Etching apparatus; 110-Ion source; 1-Housing; 11-Reaction chamber; 2-Mounting base; 21-Wafer carrier; 211-Wafer tank; 3-Circuit device; 31-Adjustable power supply; 32-Adjustment circuit; 321-Main circuit; 322-Electrical field circuit; 3221-Connecting switch; 3221a-Electrical contact; 4-Sensing device; 5-Controller; 200-Wafer; 210-Electrically conductive layer. Detailed Implementation
[0042] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings. Preferred embodiments of this application are shown in the drawings. However, this application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of the disclosure of this application.
[0043] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the specification of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application.
[0044] With the widespread application of electronic devices, semiconductor manufacturing processes have developed rapidly. In semiconductor manufacturing, wafers need to be etched using etching equipment. During etching, dissociative gases react with the etch film layer on the wafer, thereby removing the etch film layer from the wafer surface. When the wafer carrier of the etching equipment is full of wafers, the etching of the plasma within the reaction chamber is relatively uniform. However, in existing etching equipment, when the wafer carrier is not full, the area of the etch film layer is relatively small, and at this time, there is a relatively large amount of dissociative gas, leading to a faster etching rate, which may affect the normal etching of the wafer.
[0045] The inventors of this application discovered through research that the reaction rate between plasma and the etching film can be reduced when the wafer carrier is not full of wafers, and the force of repulsion can be different when the number of wafers is different. This ensures that the etching rate of the etching device is approximately the same when different numbers of wafers are placed on the wafer carrier, thus guaranteeing the etching stability of the etching device.
[0046] In view of this, this application aims to provide a solution that can solve the above-mentioned technical problems, the details of which will be described in subsequent embodiments.
[0047] This application proposes an etching apparatus 100, which aims to solve the problem that the etching rate of the wafer carrier 21 of the existing etching apparatus 100 increases when the wafer 200 is not fully loaded, thus affecting the etching of the wafer 200. Figures 1 to 2 This is a schematic diagram of one embodiment of the etching apparatus 100.
[0048] The etching apparatus 100 proposed in this application uses an ion source 110 to bombard a wafer 200. The etching apparatus 100 includes a housing 1, a mounting base 2, a circuit device 3, a sensing device 4, and a controller 5. A reaction chamber 11 is disposed inside the housing 1. The mounting base 2 is disposed inside the reaction chamber 11, and a wafer carrier 21 is provided on the top of the mounting base 2. The top of the wafer carrier 21 is provided with a plurality of wafer slots 211 for accommodating the wafer 200.
[0049] A circuit device 3 is disposed on the mounting base 2. The circuit device 3 includes an adjustable power supply 31 and an adjustment circuit 32, which are electrically connected. The adjustment circuit 32 is configured to repel or attract the ion source 110 applied to the wafer 200. A sensing device 4 is mounted on the mounting base 2 and is used to sense the number of wafers 200 mounted on the wafer carrier 21. A controller 5 is electrically connected to both the adjustable power supply 31 and the sensing device 4. The controller 5 is used to adjust the output voltage of the adjustable power supply 31 according to the number of wafers 200 mounted on the wafer carrier 21 sensed by the sensing device 4.
[0050] In the technical solution of this application, the circuit device 3 is provided with an adjustment circuit 32 on the mounting base 2, and the adjustment circuit 32 generates an electric field when connected. The electric field causes the positive ions in the plasma to be subjected to electric field force, thereby repelling the positive ions to bombard the wafer carrier 21 on the mounting base 2, thereby reducing the reaction rate between the plasma and the etched film layer.
[0051] When the number of wafers 200 is smaller, the volume of the etched film on the wafer 200 is smaller, and the plasma is relatively more abundant. Therefore, the reaction rate between the plasma and the etched film on the wafer 200 is faster. Thus, when the number of wafers 200 is smaller, the circuit device 3 needs to increase the repulsion of positive ions. In practical applications, the controller 5 senses the number of wafers 200 on the wafer carrier 21 through the sensing device 4, and then adjusts the output voltage of the adjustable power supply 31 according to the number of wafers 200, thereby adjusting the repulsion or attraction of positive ions in the plasma by the adjustment circuit 32 to ensure the etching rate is normal.
[0052] In practice, when the wafer carrier 21 is full of wafers 200 or when the etching apparatus 100 needs to accelerate the etching rate, the controller 5 can also cause the adjustable power supply 31 to output a negative voltage. This causes a change in the electric field generated by the adjustment circuit 32, thereby attracting positive ions in the plasma through the opposite electric field force. This accelerates the bombardment speed of positive ions toward the mounting base 2, and thus also accelerates the reaction rate between the plasma and the etched film. By controlling the etching time, the production rate can be increased.
[0053] In some embodiments, the adjustment circuit 32 includes a main circuit 321 and a plurality of electric field circuits 322 connected in parallel to the main circuit 321, and an adjustable power supply 31 is disposed on the main circuit 321. The plurality of electric field circuits 322 are disposed in a one-to-one correspondence with a plurality of wafer slots 211, each electric field circuit 322 is disposed at the bottom of the corresponding wafer slot 211, and each electric field circuit 322 is provided with a connection switch 3221, each connection switch 3221 being used to be in a closed state when a wafer 200 is installed in the corresponding wafer slot 211.
[0054] In this embodiment, the adjustment circuit 32 is divided into a main circuit 321 and multiple electric field circuits 322, thereby generating electric fields at different locations through the multiple electric field circuits 322. Each electric field circuit 322 is located at the bottom of the corresponding wafer trench 211, so the electric field of the electric field circuit 322 is very close to the corresponding wafer 200, thereby repelling the activity of positive ions bombarding the wafer 200, thus slowing down the etching rate.
[0055] When wafer 200 is mounted in wafer trench 211, the corresponding electric field circuit 322's on-state switch 3221 closes, thereby forming an electric field near wafer 200 and repelling positive ions through electric field force. The number of connected electric field circuits 322 is the same as the number of wafers 200, and multiple electric field circuits 322 are connected in parallel to the main circuit 321. Therefore, the controller 5 can adjust the voltage of each electric field circuit 322 synchronously by adjusting the output voltage of the adjustable power supply 31, that is, synchronously adjust the electric field force generated by each electric field circuit 322. In this way, the repulsion strength against positive ions is adjusted according to the number of wafers 200. By adjusting the output voltage of the adjustable power supply 31, the controller 5 adjusts the repulsion strength of positive ions, thus ensuring that the etching rate of any number of wafers 200 is approximately the same, guaranteeing the etching stability of the etching apparatus 100.
[0056] In some embodiments, each electric field circuit 322 includes a first circuit and a second circuit. One end of the first circuit and the second circuit are electrically isolated from each other and are each provided with an electrical contact 3221a. The other ends of the first circuit and the second circuit are respectively connected to the main circuit 321 to electrically connect to the positive and negative terminals of the adjustable power supply 31. A conductive layer 210 is provided at the bottom of each wafer 200. The conductive layer 210 is configured to connect to the electrical contacts 3221a on the first circuit and the second circuit respectively when the wafer 200 is mounted in the wafer trench 211 to close the connection switch 3221.
[0057] In this embodiment, the conductive layer 210 is a conductive film layer disposed on the back side of the wafer 200. It can actually be a metal layer deposited on the bottom of the wafer 200, or a conductive sheet attached to the bottom of the wafer 200. The conductive layer 210 on the bottom of the wafer 200 allows the two electrical contacts 3221a at the bottom of the wafer trench 211 to be connected through the conductive layer 210 when the wafer 200 is mounted in the wafer trench 211, thereby generating an electric field near the wafer 200.
[0058] The connection switch 3221 is implemented through the interaction of the conductive layer 210 and two electrical contacts 3221a, but in practice, there are many ways to implement the connection switch 3221. For example, the connection switch 3221 can be set as a pressure switch located at the bottom of the wafer slot 211. When the wafer 200 is placed in, the pressure switch is triggered, connecting the corresponding electric field circuit 322.
[0059] In some embodiments, the sensing device 4 includes a counter for calculating the number of wafers 200 mounted on the wafer carrier 21 based on the closed state information of the connection switch 3221.
[0060] Each time a wafer 200 is mounted on the wafer carrier 21, a switch 3221 of an electric field circuit 322 is closed. Therefore, the number of closed switches 3221 equals the number of wafers 200 mounted on the wafer carrier 21. When a switch 3221 is closed, it sends a closing status message. A counter receives this closing status message and calculates the number of closed switches 3221, thus obtaining the number of wafers 200 mounted on the wafer carrier 21. The counter transmits the number of wafers 200 mounted on the wafer carrier 21 to the controller 5 for subsequent control adjustments.
[0061] In some embodiments, the sensing device 4 includes at least one pressure sensor disposed on the wafer carrier 21, the pressure sensor being used to sense the pressure on the wafer carrier 21. The controller 5 is electrically connected to the pressure sensor to determine the number of wafers 200 mounted on the wafer carrier 21 based on the pressure sensed by the pressure sensor on the wafer carrier 21.
[0062] In this embodiment, the sensing device 4 uses a pressure sensor to sense the number of wafers 200 mounted on the wafer carrier 21. Specifically, the pressure sensor is located on the wafer carrier 21. By sensing the pressure on the wafer carrier 21, the pressure sensor determines the weight of the wafers 200 mounted on the wafer carrier 21. The controller 5 calculates the corresponding number of wafers 200 based on the weight of the wafers 200 mounted on the wafer carrier 21. Furthermore, one or more pressure sensors can be used, depending on the specific requirements.
[0063] In some embodiments, the adjustable power supply 31 can output a positive or negative voltage to the adjustment circuit 32, so that the adjustment circuit 32 repels the ion source 110 when the adjustable power supply 31 outputs a positive voltage, and attracts the ion source 110 when the adjustable power supply 31 outputs a negative voltage. The adjustable power supply 31 can adjust the magnitude of its output voltage within a certain range, thereby adjusting the voltage magnitude within the adjustment circuit 32. This changes the magnitude of the electric field force on the positive ions, and the repulsion strength against the positive ion bombardment also changes accordingly. When the adjustable power supply 31 outputs a positive voltage, the electric field generated by the adjustment circuit 32 causes the positive ions to experience a repulsive electric field force. The controller 5 can also adjust the output voltage of the adjustable power supply 31 from a positive voltage to a negative voltage. At this time, the electric field generated by the adjustment circuit 32 changes, and the direction of the electric field force reverses. This causes the positive ions in the plasma to be attracted and accelerated into the wafer trench 211, thereby accelerating etching.
[0064] This application also proposes a control method for use in the etching apparatus 100 described in any of the above embodiments. Figures 3 to 4 For a flowchart illustrating an embodiment of the control method proposed in this application, please refer to [link / reference]. Figure 3 The control method includes the following steps:
[0065] S10: Obtain the number of wafers 200 placed on wafer carrier 21.
[0066] S20: Set the output voltage of the adjustable power supply 31 according to the number of wafers 200 placed on the wafer carrier 21.
[0067] When the number of wafers 200 is smaller, the volume of the etched film on the wafer 200 is smaller, and the plasma is relatively more abundant. Therefore, the reaction rate between the plasma and the etched film on the wafer 200 is faster. Thus, when the number of wafers 200 is small, the circuit device 3 needs to increase the repulsion of positive ions; when the number of wafers 200 is large, the repulsion of positive ions needs to be reduced to avoid an excessively slow etching rate. In practical applications, the controller 5 senses the number of wafers 200 on the wafer carrier 21 through the sensing device 4, and then adjusts the output voltage of the adjustable power supply 31 according to the number of wafers 200, thereby adjusting the degree of repulsion of positive ions in the plasma by the adjustment circuit 32 to ensure a normal etching rate.
[0068] In addition, when the wafer carrier 21 is full of wafers 200 or when it is necessary to increase the etching rate, the controller 5 can cause the adjustable power supply 31 to output a negative voltage. This changes the electric field generated by the adjustment circuit 32, and the positive ions in the plasma are subjected to the opposite electric field force. At this time, the positive ions are attracted by the electric field force and accelerate towards the wafer carrier 21, thereby increasing the etching rate.
[0069] In some embodiments, the sensing device 4 includes a pressure sensor disposed on the wafer carrier 21, the pressure sensor being used to sense the pressure on the wafer carrier 21.
[0070] Step S10 specifically includes:
[0071] S11: Obtain the pressure value sensed by the pressure sensor.
[0072] S12: Determine the number of wafers 200 placed on wafer carrier 21 based on the pressure value.
[0073] In this embodiment, the sensing device 4 senses the pressure value of the wafer carrier 21 through a pressure sensor and transmits the pressure value to the controller 5. The controller 5 calculates the number of wafers 200 based on the pressure value. When each wafer 200 is installed in the wafer tray 211, the wafer carrier 21 will be subjected to a certain pressure. Therefore, the controller 5 can calculate the corresponding number of wafers 200 based on the pressure value of the wafer carrier 21 for subsequent adjustment and control.
[0074] In some embodiments, the adjustment circuit 32 includes a main circuit 321 and a plurality of electric field circuits 322 respectively connected to the main circuit 321. Each electric field circuit 322 is provided with a switch 3221, which is closed when a wafer 200 is mounted in the corresponding wafer slot 211. The sensing device 4 includes a counter, which is used to calculate the number of wafers 200 mounted on the wafer carrier 21 based on the closed state information of the switch 3221. Please refer to [link to relevant documentation]. Figure 4 Step S10 further includes:
[0075] S13: If any of the connecting switches 3221 is in the closed state, the counter will accumulate one count.
[0076] S14: Based on the final accumulated count value of the counter, determine the number of wafers 200 mounted on the wafer carrier 21.
[0077] In this embodiment, the adjustment circuit 32 is divided into a main circuit 321 and multiple electric field circuits 322, thereby generating electric fields at different locations through the multiple electric field circuits 322. When the wafer 200 is mounted on the wafer trench 211, the connection switch 3221 on the corresponding electric field circuit 322 will be closed, thereby forming an electric field near the wafer 200 and repelling the activity of positive ions through electric field force.
[0078] Each time a wafer 200 is mounted on the wafer carrier 21, it causes a switch 3221 of an electric field circuit 322 to close. Therefore, the number of closed switches 3221 is equal to the number of wafers 200 mounted on the wafer carrier 21. Each closed switch 3221 sends a closing status message, and a counter accumulates one count for each closed status message received. The final accumulated count value is the number of closed switches 3221, which is the number of wafers 200 mounted on the wafer carrier 21.
[0079] In some embodiments, the adjustable power supply 31 can output a positive voltage or a negative voltage to the adjustment circuit 32. Step S20 includes:
[0080] S21: When all wafer slots 211 contain wafers 200, the adjustable power supply 31 outputs a negative voltage to the adjustment circuit 32.
[0081] When the wafer carrier 21 is filled with wafers 200, the etching rate of the etching apparatus 100 is relatively stable and the etching is relatively uniform. If it is necessary to increase the etching rate, the controller 5 can make the adjustable power supply 31 output a negative voltage, which changes the electric field generated by the adjustment circuit 32. The positive ions in the plasma are subjected to the opposite electric field force. At this time, the positive ions are attracted by the electric field force and accelerate towards the wafer carrier 21, thereby increasing the etching rate.
[0082] It should be understood that the application of the present invention is not limited to the examples above. Those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims.
Claims
1. An etching apparatus that uses an ion source to bombard a wafer, characterized in that, The etching apparatus includes: a housing with a reaction chamber inside; A mounting base is disposed within the reaction chamber. A wafer carrier is provided on the top of the mounting base, and a plurality of wafer slots for accommodating the wafer are provided on the top of the wafer carrier. A circuit device is disposed on the mounting base, the circuit device including an adjustable power supply and an adjustment circuit, the adjustable power supply being electrically connected to the adjustment circuit; the adjustment circuit is configured to repel or attract an ion source applied to the wafer; A sensing device, mounted on the mounting base, is used to sense the number of wafers mounted on the wafer carrier; and, The controller is electrically connected to the adjustable power supply and the sensing device, respectively. The controller is used to adjust the output voltage of the adjustable power supply according to the number of wafers mounted on the wafer carrier detected by the sensing device. The adjustment circuit includes a main circuit and multiple electric field circuits connected in parallel to the main circuit. The adjustable power supply is located on the main circuit. Each of the multiple electric field circuits corresponds one-to-one with a multiple wafer slot. Each electric field circuit is located at the bottom of its corresponding wafer slot, and each electric field circuit is equipped with a connection switch. Each connection switch is closed when a wafer is installed in its corresponding wafer slot. The voltage and electric field force of each electric field circuit are synchronously adjusted by regulating the output voltage of the adjustable power supply. The adjustable power supply can output a positive or negative voltage to the adjustment circuit, so that the adjustment circuit repels the ion source when the adjustable power supply outputs a positive voltage and attracts the ion source when the adjustable power supply outputs a negative voltage; the controller is configured such that the fewer the number of wafers mounted on the wafer carrier, the higher the output voltage of the adjustable power supply, so as to increase the repulsion of positive ions.
2. The etching apparatus as described in claim 1, characterized in that, Each of the electric field circuits includes a first circuit and a second circuit. One end of the first circuit and the second circuit are electrically isolated from each other and are respectively provided with an electrical contact. The other ends of the first circuit and the second circuit are respectively connected to the main circuit so as to electrically connect to the positive and negative terminals of the adjustable power supply. Each of the wafers has an electrical conductivity layer at its bottom, which is configured to connect to the electrical contacts on the first circuit and the second circuit respectively when the wafer is mounted in the wafer slot, so as to close the connection switch.
3. The etching apparatus as described in claim 1, characterized in that, The sensing device includes a counter, which is used to calculate the number of wafers mounted on the wafer carrier based on the closed state information of the connection switch.
4. The etching apparatus as claimed in claim 1, characterized in that, The sensing device includes at least one pressure sensor disposed on the wafer carrier, the pressure sensor being used to sense the pressure on the wafer carrier; The controller is electrically connected to the pressure sensor to determine the number of wafers mounted on the wafer carrier based on the pressure sensed by the pressure sensor on the wafer carrier.
5. A control method, characterized in that, The control method, applied to the etching apparatus as described in any one of claims 1 to 4, comprises: Obtain the number of wafers placed on the wafer carrier; The output voltage of the adjustable power supply is set according to the number of wafers placed on the wafer carrier.
6. The control method as described in claim 5, characterized in that, The sensing device includes a pressure sensor disposed on the wafer carrier, the pressure sensor being used to sense the pressure on the wafer carrier; The step of obtaining the number of wafers placed on the wafer carrier specifically includes: Obtain the pressure value sensed by the pressure sensor; The number of wafers placed on the wafer carrier is determined based on the pressure value.
7. The control method as described in claim 5, characterized in that, The adjustment circuit includes a main circuit and a plurality of electric field circuits respectively connected to the main circuit; each electric field circuit is provided with a connection switch, which is in a closed state when the wafer is installed in the corresponding wafer slot; the sensing device includes a counter, which is used to calculate the number of wafers installed on the wafer carrier based on the closed state information of the connection switch; The step of obtaining the number of wafers placed on the wafer carrier further includes: If any of the aforementioned switches is in the closed state, the counter will accumulate one count; The number of wafers mounted on the wafer carrier is determined based on the final cumulative count value of the counter.
8. The control method as described in claim 5, characterized in that, The adjustable power supply can output a positive or negative voltage to the adjustment circuit; The step of setting the output voltage of the adjustable power supply according to the number of wafers placed on the wafer carrier includes: When all the wafer slots contain the wafer, the adjustable power supply outputs a negative voltage into the adjustment circuit.
Citation Information
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