Method for resistance measurement of an asymmetric superconducting quantum bit circuit and applications thereof

CN117825799BActive Publication Date: 2026-10-23ORIGIN QUANTUM COMPUTING TECH (HEFEI) CO LTD
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
CN202311803587.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-12-25
Publication Date
2026-10-23
Estimated Expiration
2043-12-25

AI Technical Summary

Technical Problem

[0004]本发明的目的是提供一种非对称超导量子比特电路的电阻测量方法及其应用,以解决现有技术无法准确测量约瑟夫森结电阻的问题,能够准确测量约瑟夫森结电阻

Benefits of technology

[0037]区别于现有技术的情况,本发明提供的非对称超导量子比特电路的电阻测量方法按照非对称超导量子比特电路中至少一个约瑟夫森结的形状在衬底上形成测试结,对测试结进行测量得到测量电阻以及对测试结两端之间的衬底进行单独测量得到补偿电阻,利用补偿电阻对测量电阻进行修正得到修正电阻,最后根据修正电阻确定所述第一约瑟夫森结的真实电阻,本发明通过测试结的电阻测量间接实现约瑟夫森结的电阻测量,而且考虑了衬底对电阻测量的影响,从而能够准确测量约瑟夫森结电阻。

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN117825799B_ABST
    Figure CN117825799B_ABST
Patent Text Reader

Abstract

The application discloses a resistance measurement method of an asymmetric superconducting quantum bit circuit and application thereof. The asymmetric superconducting quantum bit circuit comprises two Josephson junctions with different areas in parallel on a substrate. The resistance measurement method comprises the following steps: selecting at least one Josephson junction from the two Josephson junctions as a first Josephson junction; forming an independent first test junction on the substrate according to the shape of the first Josephson junction; measuring both ends of the first test junction to obtain a first measurement resistance, and separately measuring the substrate with the distance between both ends of the first test junction as a measurement distance to obtain a compensation resistance; correcting the first measurement resistance by using the compensation resistance to obtain a corrected resistance of the first test junction; and determining the real resistance of the first Josephson junction according to the corrected resistance. The resistance of the Josephson junction is indirectly measured through the resistance of the test junction, and the influence of the substrate on the resistance measurement is considered, so that the resistance of the Josephson junction can be accurately measured.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention relates to the field of measurement technology, and in particular to a method for measuring the resistance of an asymmetric superconducting quantum bit circuit and its application. Background Technology

[0002] The key structure on a quantum chip is the qubit, and the key structure of a superconducting qubit is the Josephson junction. Currently, the structure of a superconducting qubit circuit consists of two Josephson junctions connected in parallel to form a superconducting quantum interference device (SQUID), which is then connected in parallel with a capacitor. As the core component of the superconducting qubit circuit, the Josephson junction's resistance can be measured to characterize the frequency of the qubit at low temperatures. When the Josephson junction resistances of the superconducting qubit circuits are identical, the resistance of the Josephson junctions can be directly obtained by measuring the loop resistance of the superconducting qubit circuit.

[0003] However, in order to increase the flexibility of quantum bit operation, more and more superconducting quantum bit circuits use two Josephson junctions with asymmetric resistance, that is, design two Josephson junctions with different areas. In this case, loop measurement of superconducting quantum bit circuits will not be able to accurately obtain the resistance of the Josephson junctions. Summary of the Invention

[0004] The purpose of this invention is to provide a method for measuring the resistance of asymmetric superconducting quantum bit circuits and its application, so as to solve the problem that the existing technology cannot accurately measure the resistance of Josephson junctions, and to accurately measure the resistance of Josephson junctions.

[0005] To address the aforementioned technical problems, this invention provides a method for measuring the resistance of an asymmetric superconducting quantum bit circuit. The asymmetric superconducting quantum bit circuit includes two Josephson junctions of different areas connected in parallel on a substrate, comprising:

[0006] Select at least one Josephson knot from the two Josephson knots as the first Josephson knot;

[0007] A separate first test junction is formed on the substrate according to the shape of the first Josephson junction;

[0008] The first measurement resistance is obtained by measuring the two ends of the first test junction, and the compensation resistance is obtained by measuring the substrate separately with the distance between the two ends of the first test junction as the measurement distance.

[0009] Based on the parallel connection between the first test junction and the substrate, the first measured resistance is corrected using the compensation resistor to obtain the corrected resistance of the first test junction;

[0010] The true resistance of the first Josephson junction is determined based on the corrected resistor.

[0011] Preferably, the step of determining the true resistance of the first Josephson junction based on the corrected resistance includes:

[0012] Obtain the first area ratio between the first Josephson knot and the first test knot;

[0013] The true resistance of the first Josephson junction is calculated based on the corrected resistance and the first area ratio.

[0014] Preferably, the step of obtaining the first area ratio of the first Josephson knot to the first test knot includes:

[0015] Obtain electron micrographs of the first Josephson junction and the first test junction at the same magnification;

[0016] The first area of ​​the first Josephson knot and the second area of ​​the first test knot are obtained by measuring the size of the electron microscope image.

[0017] The ratio of the first area to the second area is taken as the first area ratio.

[0018] Preferably, the step of obtaining the first area ratio of the first Josephson knot to the first test knot includes:

[0019] Obtain electron micrographs of the first Josephson junction and the first test junction at the same magnification;

[0020] Convert the electron microscope image into a grayscale image;

[0021] Count the first number of pixels in the region corresponding to the first Josephson knot and the second number of pixels in the region corresponding to the first test knot in the grayscale image;

[0022] The ratio of the first quantity to the second quantity is used as the first area ratio.

[0023] Preferably, the actual resistance of the first Josephson junction is calculated according to the following formula:

[0024] R J1 =1 / S1*R 1C

[0025] Among them, R J1 S1 represents the actual resistance of the first Josephson junction, and R represents the first area ratio. 1C This refers to the corrected resistor.

[0026] Preferably, the number of the first Josephson knots is one, and the first Josephson knot is the Josephson knot with the smaller area of ​​the two Josephson knots.

[0027] Preferably, the resistance measurement method further includes:

[0028] The Josephson knot with the larger area of ​​the two Josephson knots was selected as the second Josephson knot;

[0029] A second test junction, electrically isolated from the first test junction, is formed on the substrate according to the shape of the second Josephson junction.

[0030] The second measured resistance is obtained by measuring the two ends of the second test junction;

[0031] The true resistance of the second Josephson junction is determined based on the second measured resistance.

[0032] Preferably, the step of determining the true resistance of the second Josephson junction based on the second measured resistance includes:

[0033] Obtain the second area ratio between the second Josephson knot and the second test knot;

[0034] The true resistance of the second Josephson junction is calculated based on the second measured resistance and the second area ratio.

[0035] Preferably, the first measuring resistor, the compensation resistor, and the second measuring resistor are all obtained by measuring probes. Measurement pads are formed at both ends of the first test junction and the second test junction. Two measurement pads with a spacing equal to the measurement spacing and electrically isolated from the first test junction and the second test junction are formed on the substrate. The measurement pads are used to contact the measuring probes.

[0036] To address the aforementioned technical problems, the present invention also provides an application of the resistance measurement method of any of the aforementioned asymmetric superconducting quantum bit circuits in the manufacture or measurement of quantum chips, wherein the quantum chip includes superconducting quantum bits, and the superconducting quantum bits include an asymmetric superconducting quantum bit circuit.

[0037] Unlike existing technologies, the resistance measurement method for asymmetric superconducting qubit circuits provided by this invention forms a test junction on a substrate according to the shape of at least one Josephson junction in the asymmetric superconducting qubit circuit. The test junction is measured to obtain the measured resistance, and the substrate between the two ends of the test junction is measured separately to obtain the compensation resistance. The measured resistance is corrected using the compensation resistance to obtain the correction resistance. Finally, the true resistance of the first Josephson junction is determined based on the correction resistance. This invention indirectly achieves the resistance measurement of the Josephson junction through the resistance measurement of the test junction, and also considers the influence of the substrate on the resistance measurement, thereby enabling accurate measurement of the Josephson junction resistance. Attached Figure Description

[0038] Figure 1 This is a top view of a superconducting quantum interference device fabricated on a substrate.

[0039] Figure 2 This is a schematic flowchart of the resistance measurement method for an asymmetric superconducting quantum bit circuit provided in the first embodiment of the present invention.

[0040] Figure 3 This is a top view of the substrate after the first test junction has been formed.

[0041] Figure 4 for Figure 2 The flowchart shown illustrates the specific process of step S40 in the process.

[0042] Figure 5 This is a schematic flowchart of the resistance measurement method for an asymmetric superconducting quantum bit circuit provided in the second embodiment of the present invention.

[0043] Figure 6 for Figure 5 The flowchart shown illustrates the specific process of step S70 in the process.

[0044] Figure 7 A top view of another substrate after the first test junction has been formed. Detailed Implementation

[0045] The specific embodiments of the present invention will now be described in more detail with reference to the accompanying drawings. The advantages and features of the present invention will become clearer from the following description and claims. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present invention.

[0046] In the description of this invention, it should be understood that the terms "center", "upper", "lower", "left", "right", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0047] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0048] The first embodiment of this invention provides a method for measuring the resistance of an asymmetric superconducting quantum bit circuit. The asymmetric superconducting quantum bit circuit includes two Josephson junctions of different areas connected in parallel on a substrate. The larger the area of ​​the Josephson junction, the smaller the resistance, and vice versa. Since the two Josephson junctions have different areas, their resistances are also different.

[0049] In quantum chip manufacturing, to determine whether the performance parameters of an asymmetric superconducting qubit circuit meet design requirements, electrical measurements of parameters such as resistance are necessary. However, due to the extremely fine physical structure of Josephson junctions, to minimize structural damage during electrical testing, measurements are typically performed at both ends of the junction. Since the ends of two Josephson junctions overlap, measuring the resistance of either junction yields the resistance of a parallel loop. Therefore, when the areas of the two Josephson junctions are asymmetric—that is, when their designed resistances differ—accurate resistance measurements are impossible.

[0050] Please refer to Figure 1 This is a top-view schematic diagram of a superconducting quantum interference device (QFID) fabricated on a substrate. The asymmetric superconducting quantum bit circuit includes a superconducting QFID 20 formed on substrate 10. D1 and D2 represent the two ends of the superconducting QFID 20, and JJ represents a Josephson junction (shown by the dashed box in the figure). The remaining portion between the two ends D1 and D2 is the wire circuit. Both Josephson junctions JJ are formed by the overlapping of two perpendicular superconducting strips, and the overlapping area is the area of ​​the Josephson junction. One Josephson junction JJ has two superconducting strips with smaller widths, so its area is smaller; the other Josephson junction JJ has two superconducting strips with larger widths, so its area is larger.

[0051] Please refer to the reference. Figure 2The resistance measurement method for asymmetric superconducting quantum bit circuits includes the following steps:

[0052] S10: Select at least one Josephson knot from the two Josephson knots as the first Josephson knot.

[0053] In this embodiment, one Josephson node can be selected as the first Josephson node according to a preset strategy, or both Josephson nodes can be selected as the first Josephson node. In this embodiment, there is one first Josephson node, which is the Josephson node with the smaller area among the two Josephson nodes.

[0054] S20: Form an independent first test junction on the substrate according to the shape of the first Josephson junction.

[0055] The first test junction can be formed on the substrate using the same process as the first Josephson junction. This allows for the simultaneous fabrication of the superconducting quantum interference device (SQU) and the first test junction in the same process, enabling the first test junction to more accurately reflect the resistance of the first Josephson junction. The first test junction is independent on the substrate, electrically isolated, and not electrically connected to external circuitry or devices. If both Josephson junctions are first Josephson junctions, then the two first test junctions formed are also independent of each other. Figure 3 The diagram shown is a top view of the substrate after the formation of the first test junction. A superconducting quantum interference device (SQI) 20 is formed on the substrate 10, and a first test junction JC1 is formed in a specific region of the substrate 10. The first test junction JC1 is formed in the shape of a smaller Josephson junction JJ. Typically, it is impossible to use all areas of the substrate 10 for fabricating superconducting quantum devices such as the SQI 20 and wiring; some areas will always remain unused—either corner areas, silkscreen areas, or test areas. Specific areas can be selected from these areas so that the formation of the first test junction JC1 will not affect the SQI 20.

[0056] S30: Measure the two ends of the first test junction to obtain the first measurement resistance, and measure the substrate separately using the distance between the two ends of the first test junction as the measurement distance to obtain the compensation resistance.

[0057] The measurement spacing refers to the distance between two access points connected to the measurement circuit.

[0058] S40: Based on the parallel relationship between the first test junction and the substrate, the first measurement resistance is corrected using a compensation resistor to obtain the corrected resistance of the first test junction.

[0059] In this case, the measured resistance of the first test junction includes a parallel substrate resistance. Since substrates are mostly made of high-resistivity materials, their resistance is typically high. When the resistance of the first test junction is sufficiently small, the influence of the substrate resistance on the measurement result is negligible; however, when the resistance of the first test junction is sufficiently large, its influence cannot be ignored. For example, when the substrate material is silicon, silicon carbide, or sapphire, the substrate resistance is above 200KΩ. When the resistance of the first test junction is less than 10KΩ, the influence of the substrate resistance on the measurement result is less than 5% and can be ignored. However, when the resistance of the first test junction is greater than 10KΩ, the influence of the substrate resistance on the measurement result increases and cannot be ignored. In a practical application, when the resistances of the two Josephson junctions are between 1-10KΩ and 50KΩ-150KΩ respectively, the influence of the substrate must be considered for the Josephson junction with a resistance between 50KΩ-150KΩ. Assume the first measured resistance is R1, the compensation resistance is R0, and the correction resistance is R... 1C According to the parallel relationship of resistors:

[0060] 1 / R1 = 1 / R0 + 1 / R 1C

[0061] Therefore, the corrected resistance is:

[0062] R 1C =(R 1* R0) / (R0-R1)

[0063] This achieves the correction of the first measuring resistor R1.

[0064] S50: Determine the true resistance of the first Josephson junction based on the correction resistor.

[0065] The correction resistor can be used as the actual resistance of the first test junction. Since the physical structure of the first test junction is the same as that of the first Josephson junction, the actual resistance of the first Josephson junction can be directly reflected by the correction resistor. For example, the actual resistance of the first Josephson junction can be directly taken from the correction resistor.

[0066] Please refer to some embodiments of this application. Figure 4 The step of determining the true resistance of the first Josephson junction based on the correction resistor, i.e., step S50, includes:

[0067] S51: Obtain the first area ratio between the first Josephson knot and the first test knot;

[0068] S52: The actual resistance of the first Josephson junction is calculated based on the corrected resistance and the first area ratio.

[0069] Even if the first test junction and the first Josephson junction are formed on the same substrate using the same process, the dimensions of the first test junction may not be exactly the same as those of the first Josephson junction due to process uniformity, and some differences may exist. In this case, the true resistance of the first Josephson junction cannot be simply equal to the corrected resistance. By combining the corrected resistance and the first area ratio to calculate the true resistance of the first Josephson junction, the resistance error caused by the size inconsistency can be eliminated.

[0070] Specifically, the first true resistance is calculated according to the following formula:

[0071] R J1 =1 / S1*R 1C

[0072] Among them, R J1 Represents the first actual resistance, S1 represents the first area ratio, and R 1C This indicates a correction resistor.

[0073] The first area ratio can be obtained in various ways, either by direct measurement or by indirect calculation.

[0074] When using direct measurement, as an optional method, the step of obtaining the first area ratio of the first Josephson junction to the first test junction, i.e., step S51, includes:

[0075] S511a: Obtain electron micrographs of the first Josephson junction and the first test junction at the same magnification.

[0076] S512a: Obtain the first area of ​​the first Josephson junction and the second area of ​​the first test junction by measuring the size of the electron microscope image.

[0077] When the two superconducting strips of the first Josephson junction overlap perpendicularly, only the widths of the two superconducting strips need to be measured; the product of the widths of the two superconducting strips is the first area of ​​the first Josephson junction. Similarly, the product of the widths of the two superconducting strips of the first test junction is the second area of ​​the first test junction.

[0078] S513a: The ratio of the first area to the second area is used as the first area ratio.

[0079] When using indirect calculation, as an optional method, the step of obtaining the first area ratio of the first Josephson junction to the first test junction, i.e., step S51, includes:

[0080] S511b: Obtain electron micrographs of the first Josephson junction and the first test junction at the same magnification.

[0081] S512b: Convert electron microscope images to grayscale images.

[0082] S513b: Count the first number of pixels in the region corresponding to the first Josephson junction and the second number of pixels in the region corresponding to the first test junction in the grayscale image.

[0083] In grayscale images, the number of pixels in a certain region indirectly reflects the area of ​​that region; the more pixels there are, the larger the area is.

[0084] S514b: The ratio of the first quantity to the second quantity is used as the first area ratio.

[0085] The ratio of the first quantity to the second quantity indirectly reflects the area ratio of the first Josephson knot to the first test knot. Therefore, the ratio of the first quantity to the second quantity can be used as the first area ratio.

[0086] In the above manner, the resistance measurement method of the asymmetric superconducting quantum bit circuit provided in the first embodiment of the present invention forms a test junction on a substrate according to the shape of at least one Josephson junction in the asymmetric superconducting quantum bit circuit, measures the test junction to obtain the measured resistance, and separately measures the substrate between the two ends of the test junction to obtain the compensation resistance. The measured resistance is corrected using the compensation resistance to obtain the correction resistance. Finally, the true resistance of the first Josephson junction is determined based on the correction resistance. The present invention indirectly realizes the resistance measurement of the Josephson junction through the resistance measurement of the test junction, and takes into account the influence of the substrate on the resistance measurement, thereby enabling accurate measurement of the Josephson junction resistance.

[0087] Please refer to Figure 5 The second embodiment of the present invention also provides a resistance measurement method for an asymmetric superconducting quantum bit circuit. The resistance measurement method for the asymmetric superconducting quantum bit circuit in this embodiment includes all the technical features of the first embodiment. Furthermore, based on the first embodiment, the resistance measurement method for the asymmetric superconducting quantum bit circuit in this embodiment further includes the following steps:

[0088] S60: Select the Josephson knot with the larger area of ​​the two Josephson knots as the second Josephson knot.

[0089] S70: A second test junction, electrically isolated from the first test junction, is formed on the substrate according to the shape of the second Josephson junction.

[0090] The second test junction can be formed on the substrate using the same process as the second Josephson junction. This allows for the simultaneous fabrication of the superconducting quantum interference device, the first test junction, and the second test junction in the same process, enabling the second test junction to more accurately reflect the resistance of the second Josephson junction. For example... Figure 3 As shown, a second test junction JC2 is also formed in a specific region on the substrate 10.

[0091] S80: Measure the two ends of the second test junction to obtain the second measurement resistance.

[0092] S90: Determine the true resistance of the second Josephson junction based on the second measured resistance.

[0093] Since the resistance of the second Josephson junction is small, there is no need to consider the influence of the substrate on the resistance. Therefore, the second measured resistor can be directly used as the true resistance of the second test junction. Since the physical structure of the second test junction and the second Josephson junction is the same, the true resistance of the second Josephson junction can be directly reflected by the second measured resistor. For example, the true resistance of the second Josephson junction can be directly used by the second measured resistor.

[0094] Please refer to some embodiments of this application. Figure 6 The step of determining the true resistance of the second Josephson junction based on the second measured resistance, i.e., step S90, includes:

[0095] S91: Obtain the second area ratio of the second Josephson knot to the second test knot.

[0096] S92: The true resistance of the second Josephson junction is calculated based on the ratio of the second measured resistance to the second area.

[0097] Even if the second test junction and the second Josephson junction are formed on the same substrate using the same process, the dimensions of the second test junction may not be exactly the same as those of the second Josephson junction due to process uniformity. In this case, the true resistance of the second Josephson junction cannot be simply assumed to be equal to the second measured resistance. By combining the second measured resistance with the second area ratio to calculate the true resistance of the second Josephson junction, the resistance error caused by dimensional inconsistencies can be eliminated.

[0098] Specifically, the actual resistance of the second Josephson junction is calculated according to the following formula:

[0099] R J2 =1 / S2*R2

[0100] Among them, R J2 S1 represents the actual resistance of the second Josephson junction, S2 represents the second area ratio, and R2 represents the second measured resistance.

[0101] The second area ratio can be obtained in various ways, including direct measurement and indirect calculation. The process of obtaining the second area ratio is the same as that of obtaining the first area ratio, and will not be repeated here.

[0102] It should be emphasized that in the resistance measurement method of this embodiment, there is no necessary order between the steps. For example, step S10 can be performed simultaneously with step S60, step S20 can be performed simultaneously with step S70, and step S30 can be performed simultaneously with step S80.

[0103] In some practical applications, asymmetric superconducting qubit circuits also require the measurement of asymmetry, which is the ratio of the resistances of the two parallel Josephson junctions. Existing resistance measurement methods can only measure the total resistance of the asymmetric superconducting qubit circuit, while the resistance measurement method in this embodiment can measure the resistance of the two Josephson junctions separately, thereby enabling the measurement of asymmetry.

[0104] As long as the second test junction and the first test junction are electrically isolated, their respective resistance measurements will not be affected by the other. To reduce structural complexity, in some other embodiments of this application, one end of the second test junction is electrically connected to one end of the first test junction, while the other end of the second test junction is electrically isolated from the other end of the first test junction. For example... Figure 3 As shown, the first terminal of the first test junction JC1 is the same as the first terminal of the second test junction JC2, while the second terminals of the first test junction JC1 and the second test junction JC2 are not connected. When measuring resistance, one input terminal of the measuring circuit only needs to be connected to the first terminal of the first test junction JC1 and kept stationary. The other input terminal of the measuring circuit is then connected to the second terminals of both the first and second test junctions JC1 and JC2, respectively. This allows for resistance measurement of both test junctions JC1 and JC2, reducing the number of connection steps.

[0105] Furthermore, the first measuring resistor, the compensation resistor, and the second measuring resistor are all obtained by measuring probes. Measurement pads are formed at both ends of the first test junction and the second test junction. Two measurement pads with a spacing equal to the measurement spacing and electrically isolated from the first test junction and the second test junction are formed on the substrate. The measurement pads are used to contact the measuring probes.

[0106] In this method, since the first and second test junctions are made of superconductors, and superconductors are prone to forming oxide layers, to accurately measure the resistance, a measurement probe needs to pierce the oxide layer on the superconductor surface to make contact with the superconductor and connect the first and second test junctions to the measurement circuit. Considering the relatively small structural dimensions of the first and second test junctions on the substrate, relatively large measurement pads are formed at both ends of the first and second test junctions to facilitate probe positioning and contact. The compensation resistor is measured separately on the substrate, and two relatively large but mutually insulated measurement pads are also formed on the substrate. The distance between the two measurement pads is the measurement distance, so the distance between the two measurement probes is the distance between the two ends of the first test junction, allowing for a more accurate measurement of the resistance of the substrate connected in parallel with the first test junction. For example... Figure 3 As shown, measurement pads A1 and A2 are formed at both ends of the first test junction JC1. Measurement probes can be inserted into measurement pads A1 and A2 to measure the resistance of the first test junction JC1. Two separate measurement pads B1 and B2 are also formed on the substrate 10, with the spacing between them being the same as the spacing between measurement pads A1 and A2. Measurement probes can be inserted into measurement pads B1 and B2 to measure the resistance of the substrate 10. Measurement pads C1 and C2 are formed at both ends of the second test junction JC2. Measurement probes can be inserted into measurement pads C1 and C2 to measure the resistance of the second test junction JC2. If the first end of the first test junction JC1 and the first end of the second test junction JC2 are the same end, they can share a single measurement pad, as shown in the structure below. Figure 7 As shown.

[0107] Based on the same inventive concept, the present invention also provides an application of the resistance measurement method of the asymmetric superconducting quantum bit circuit of any of the foregoing embodiments in the manufacture or measurement of quantum chips, wherein the quantum chip includes superconducting quantum bits, and the superconducting quantum bits include an asymmetric superconducting quantum bit circuit.

[0108] In the manufacturing or measurement of quantum chips, it is crucial to test the performance of superconducting qubits. As a key component of superconducting qubits, the resistance and other parameters of the superconducting quantum interference device directly affect the performance of the superconducting qubits. The resistance measurement method of the asymmetric superconducting qubit circuit in any of the aforementioned embodiments can accurately measure the resistance of the Josephson junction, which helps to accurately characterize the performance of the qubits.

[0109] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," or "specific example," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.

[0110] The above are merely preferred embodiments of the present invention and do not constitute any limitation on the present invention. Any equivalent substitutions or modifications made by those skilled in the art to the technical solutions and content disclosed in the present invention without departing from the scope of the present invention shall be deemed to have remained within the protection scope of the present invention.

Claims

1. A method for measuring the resistance of an asymmetric superconducting quantum bit circuit, wherein the asymmetric superconducting quantum bit circuit comprises two Josephson junctions of different areas connected in parallel on a substrate, characterized in that... include: Select at least one Josephson knot from the two Josephson knots as the first Josephson knot; A separate first test junction is formed on the substrate according to the shape of the first Josephson junction; The first measurement resistance is obtained by measuring the two ends of the first test junction, and the compensation resistance is obtained by measuring the substrate separately with the distance between the two ends of the first test junction as the measurement distance. Based on the parallel connection between the first test junction and the substrate, the first measured resistance is corrected using the compensation resistor to obtain the corrected resistance of the first test junction; The true resistance of the first Josephson junction is determined based on the corrected resistor; The step of determining the true resistance of the first Josephson junction based on the corrected resistance includes: Obtain the first area ratio between the first Josephson knot and the first test knot; The actual resistance of the first Josephson junction is calculated based on the corrected resistance and the first area ratio. The step of obtaining the first area ratio of the first Josephson knot to the first test knot includes: Obtain electron micrographs of the first Josephson junction and the first test junction at the same magnification; Convert the electron microscope image into a grayscale image; Count the first number of pixels in the region corresponding to the first Josephson knot and the second number of pixels in the region corresponding to the first test knot in the grayscale image; The ratio of the first quantity to the second quantity is used as the first area ratio.

2. The resistance measurement method according to claim 1, characterized in that, The actual resistance of the first Josephson junction is calculated according to the following formula: R J1 =1 / S1 R 1C Among them, R J1 S1 represents the actual resistance of the first Josephson junction, and R represents the first area ratio. 1C This refers to the corrected resistor.

3. The resistance measurement method according to claim 1 or 2, characterized in that, The number of first Josephson knots is one, and the first Josephson knot is the Josephson knot with the smaller area of ​​the two Josephson knots.

4. The resistance measurement method according to claim 3, characterized in that, The resistance measurement method further includes: The Josephson knot with the larger area of ​​the two Josephson knots was selected as the second Josephson knot; A second test junction, electrically isolated from the first test junction, is formed on the substrate according to the shape of the second Josephson junction. The second measured resistance is obtained by measuring the two ends of the second test junction; The true resistance of the second Josephson junction is determined based on the second measured resistance.

5. The resistance measurement method according to claim 4, characterized in that, The step of determining the true resistance of the second Josephson junction based on the second measured resistance includes: Obtain the second area ratio between the second Josephson knot and the second test knot; The true resistance of the second Josephson junction is calculated based on the second measured resistance and the second area ratio.

6. The resistance measurement method according to claim 4, characterized in that, The first measuring resistor, the compensation resistor, and the second measuring resistor are all measured by a measuring probe. Measuring pads are formed at both ends of the first test junction and the second test junction. Two measuring pads with a spacing equal to the measuring spacing and electrically isolated from the first test junction and the second test junction are formed on the substrate. The measuring pads are used to contact the measuring probe.

7. The application of a resistance measurement method for an asymmetric superconducting quantum bit circuit according to any one of claims 1 to 6 in the manufacture or measurement of a quantum chip, wherein the quantum chip comprises superconducting quantum bits, and the superconducting quantum bits comprise an asymmetric superconducting quantum bit circuit.

Citation Information

Patent Citations

  • Measurement method for Josephson junction parasitic inductance

    CN110133379A

  • Test device, and test method using test device for testing

    WO2023155689A1