Data processing method, device and readable storage medium

Abstract

The application discloses a data processing method and device and a readable storage medium, and belongs to the technical field of data processing. The application receives a write instruction of simulation data, determines a logical address of the simulation data in a virtual flash memory particle, compresses the simulation data into standard format to-be-stored data according to a preset processing rule, the to-be-stored data comprising the logical address and a data identifier, acquires an address mapping relationship table associated with the to-be-stored data, and executes a write action of the to-be-stored data in the memory according to the address mapping relationship table. The simulation data is processed into a standard format convenient for organization and management and written into the memory, and a file system is not needed to manage the written data to write into a hard disk. This reduces the complexity of a data write path and greatly improves the read-write speed of the simulation data, thereby effectively improving the performance of a hard disk simulation system.

Description

Technical Field

[0001] This application relates to the field of data processing technology, and in particular to data processing methods, apparatus and readable storage media. Background Technology

[0002] A hard disk emulation system is software that simulates the functionality of a physical hard disk drive and provides the same interface. The sim-host is a crucial component of this system, responsible for managing the creation, mounting, and unmounting of virtual hard disk drives. When a user needs to read or write files on the virtual hard disk drive, the sim-host mounts the virtual hard disk drive to the operating system's file system. The read / write request then passes through the file system's management, caching mechanisms, and file indexing, before being passed to the Device Based Flash Translation Layer (FTL) via the driver. The FTL is a logical layer that manages flash memory, translating logical block addresses into physical block addresses based on file system requests and executing the corresponding read / write operations.

[0003] The complexity of hard disk read / write paths limits the running speed of hard disk emulation systems.

[0004] The above content is only used to help understand the technical solution of this application and does not represent an admission that the above content is prior art. Summary of the Invention

[0005] The main purpose of this application is to provide a data processing method, device and readable storage medium, which aims to solve the technical problem that the complexity of hard disk read and write paths limits the running speed of hard disk emulation systems.

[0006] To achieve the above objectives, this application provides a data processing method, which includes the following steps:

[0007] Receive a write command for simulation data and determine the logical address of the simulation data in the virtual flash memory chip;

[0008] According to preset processing rules, the simulation data is compressed into standard format data to be stored, and the data to be stored includes the logical address and data identifier;

[0009] Obtain the address mapping table associated with the data to be stored, and perform the write operation of the data to be stored in memory according to the address mapping table.

[0010] Optionally, after receiving the write instruction for the simulation data and determining the logical address of the simulation data in the virtual flash memory chip, the process includes:

[0011] According to the preset mapping rules, the physical address to be written to the logical address is determined, and the address mapping table is updated according to the logical address and the physical address to be written. The preset mapping rules include the mapping relationship between the logical address of the virtual flash memory particle and the physical address of the physical flash memory device.

[0012] The step of performing the write operation of the data to be stored in memory according to the address mapping table includes:

[0013] Based on the address mapping table, determine the physical address to be written to the data to be stored;

[0014] Obtain the original disk allocation information of the memory, and determine the write address of the original disk based on the physical address to be written and the original disk allocation information;

[0015] The write operation of the data to be stored is performed according to the write address of the original disk.

[0016] Optionally, before the step of receiving the write instruction for the simulation data and determining the logical address of the simulation data in the virtual flash memory chip, the following steps are included:

[0017] The available storage area of ​​the virtual flash memory is determined by detecting the logical address space of the virtual flash memory particle.

[0018] According to the preset mapping rules, the available physical address of the physical flash memory device that the logical address of the available storage area is mapped to is determined;

[0019] Based on the available physical address of the physical flash memory device, a raw disk is created on the memory.

[0020] Optionally, before the step of determining the available storage area of ​​the virtual flash memory particle by detecting its logical address space, the method further includes:

[0021] Obtain the prediction error curve of the virtual flash memory chip;

[0022] Based on the predicted error curve, the faulty cells in the virtual flash memory chip are determined;

[0023] The logical address of the faulty unit is masked to make the faulty unit an unusable area.

[0024] Optionally, before the step of determining the available storage area of ​​the virtual flash memory particle by detecting its logical address space, the method further includes:

[0025] Obtain the preset metadata storage area of ​​the virtual flash memory chip;

[0026] The logical address of the metadata storage area is masked to make the metadata storage area unavailable.

[0027] Optionally, the step of compressing the simulation data into standard format data to be stored according to preset processing rules, wherein the data to be stored includes the logical address and data identifier, further includes:

[0028] If the size of the simulation data does not conform to the preset processing rules, the simulation data is split and / or padded to meet the preset processing rules.

[0029] According to the preset processing rules, the split and / or completed simulation data is compressed into several standard format data to be stored, the data to be stored including the logical address and data identifier.

[0030] Optionally, the data processing method further includes:

[0031] If the write index of the original disk is detected to exceed a preset threshold, the write area of ​​the original disk will be detected.

[0032] If a blank partition is detected on the original disk, then the storage area of ​​the virtual storage particle mapped by the blank partition is determined to be an unusable area;

[0033] On the memory, free up the blank partition of the original disk.

[0034] In addition, to achieve the above objectives, this application also provides a data processing apparatus, the apparatus comprising: a memory, a processor, and a data processing program stored in the memory and executable on the processor, the data processing program being configured to implement the steps of the above-described data processing method.

[0035] In addition, to achieve the above objectives, this application also provides a readable storage medium storing a data processing program, which, when executed by a processor, implements the steps of the above-described data processing method.

[0036] In this application, to address the technical problem that the complexity of hard disk read / write paths limits the operating speed of hard disk emulation systems, this application receives write instructions for simulation data, determines the logical address of the simulation data in the virtual flash memory chip, compresses the simulation data into a standard format of data to be stored according to preset processing rules, the data to be stored including the logical address and data identifier, obtains an address mapping table associated with the data to be stored, and performs the write operation of the data to be stored in memory according to the address mapping table. This achieves the processing of simulation data into a standard format that is easy to organize and manage, without the need for a file system to manage the written data. This not only reduces the complexity of the data write path but also improves the efficiency of the hard disk emulation system. The processed simulation data only contains the logical address and data identifier, greatly reducing the volume of data that needs to be actually written. Therefore, this application can store the processed simulation data in memory instead of on the hard disk. Compared to the traditional method of writing simulation data to the hard disk, this storage method greatly improves the read / write speed of simulation data, thereby effectively improving the performance of the hard disk emulation system. Attached Figure Description

[0037] Figure 1 This is a flowchart illustrating the first embodiment of the data processing method of this application;

[0038] Figure 2 This is a schematic diagram of the secondary mapping in the first embodiment of the data processing method of this application;

[0039] Figure 3 This is a flowchart illustrating the second embodiment of the data processing method of this application;

[0040] Figure 4 This is a flowchart illustrating an optional implementation method in the second embodiment of the data processing method of this application;

[0041] Figure 5 This is a flowchart illustrating the third embodiment of the data processing method of this application;

[0042] Figure 6 This is a schematic diagram of the structure of the data processing device in the hardware operating environment involved in the embodiments of this application.

[0043] The realization of the purpose, functional features and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0044] It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the scope of this application.

[0045] A hard disk emulation system is software that simulates the functionality of a physical hard disk drive and provides the same interface. The sim-host (emulation platform / host) is a crucial component of this system, responsible for managing the creation, mounting, and unmounting of the virtual hard disk drive. When a user needs to read or write files on the virtual hard disk drive, the sim-host mounts the virtual hard disk drive to the operating system's file system. The read / write request then passes through the file system management, caching mechanisms, and file indexing, before being passed to the Device Based Flash Translation Layer (FTL) via the driver. The FTL is a logical layer that manages flash memory, translating logical block addresses into physical block addresses based on file system requests and executing the corresponding read / write operations. Therefore, the complexity of the hard disk read / write path in existing technologies limits the operating speed of hard disk emulation systems.

[0046] To address the aforementioned issues, this application receives a write instruction for simulation data, determines the logical address of the simulation data in the virtual flash memory chip, compresses the simulation data into a standard format of data to be stored according to preset processing rules, the data to be stored including the logical address and a data identifier, obtains an address mapping table associated with the data to be stored, and executes the write operation of the data to be stored in memory according to the address mapping table. This process transforms the simulation data into a standard format that is easy to organize and manage, eliminating the need for a file system to manage the written data. This not only reduces the complexity of the data write path but also improves the efficiency of the hard disk simulation system. The processed simulation data consists only of the logical address and data identifier, significantly reducing the volume of data that needs to be actually written. Therefore, this application can store the processed simulation data in memory instead of on the hard disk. Compared to the traditional method of writing simulation data to the hard disk, this storage method greatly improves the read and write speed of the simulation data, thereby effectively improving the performance of the hard disk simulation system.

[0047] To better understand the above technical solutions, exemplary embodiments of this application will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of this application are shown in the drawings, it should be understood that this application can be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided to enable a more thorough understanding of this application and to fully convey the scope of this application to those skilled in the art.

[0048] This application provides a data processing method, which is described in the embodiments below. Figure 1 , Figure 1 This is a flowchart illustrating the first embodiment of the data processing method of this application.

[0049] In this embodiment, the data processing method is applied to a hard disk emulation system and includes:

[0050] Step S10: Receive the write instruction for simulation data and determine the logical address of the simulation data in the virtual flash memory chip;

[0051] This application relates to a hard disk emulation system, which includes a SIM-HOST (emulation host), a V-MCU (virtual microcontroller unit), and a V-Flash (virtual flash memory). The SIM-HOST is responsible for simulating the behavior of an actual host system, including issuing read and write requests, and interacting with the virtual storage device. The V-MCU refers to the virtual microcontroller unit within the virtual flash memory; it simulates the functions of an actual flash memory controller, including processing read and write requests, managing the memory, and executing various functions of the hard disk emulation system, thereby controlling the behavior of the virtual flash memory.

[0052] In this embodiment, the simulation host issues a write command for simulation data, the write command including the logical address of the simulation data and the data content of the simulation data; the virtual microcontroller unit receives the write command and calls a preset virtual driver to send the logical address and the data content to the virtual flash memory, wherein the virtual flash memory includes a virtual flash memory controller and virtual flash memory chips; the virtual flash memory controller writes the data content into the corresponding position in the virtual flash memory chip according to the logical address.

[0053] In virtual flash memory, the data writing process is actually simulated through the FTL (Flash Translation Layer). The FTL is a logical layer located between the virtual microcontroller unit and the virtual flash memory chip, responsible for managing physical blocks, pages, erase operations, etc., within the virtual flash memory chip. It determines the physical address to be written based on a preset mapping rule, and updates the address mapping table based on the logical address and the physical address to be written. The preset mapping rule includes the mapping relationship between the logical address of the virtual flash memory chip and the physical address of the physical flash memory device.

[0054] For example, the preset mapping rule can be a fixed mapping relationship between the logical address of the virtual flash memory chip and the physical address of the physical flash memory device.

[0055] For example, the preset mapping rule can be a mapping rule randomly generated when data is written to virtual flash memory, that is, the logical address and the physical address are not a fixed correspondence.

[0056] Step S20: According to preset processing rules, compress the simulation data into standard format data to be stored, wherein the data to be stored includes the logical address and data identifier;

[0057] After the simulation data is written to the virtual flash memory chip, but before it is written to the actual memory, the simulation data is compressed into a standard format to be stored using a virtual microcontroller unit or FTL according to preset processing rules, so that it contains only logical addresses and data identifiers. The preset processing rules include compressing every 16 kilobyte of data into 6 bytes, i.e., 4 bytes of logical address + 2 bytes of data identifier.

[0058] For example, if the size of the simulation data to be compressed is 32kByte, then the simulation data is compressed into two 6-byte data blocks to be stored.

[0059] As an implementation method where the simulation data does not meet the preset processing rules, the virtual microcontroller unit or FTL detects that the size of the simulation data does not meet the preset processing rules, that is, the size of the simulation data is not a multiple of 16kByte; the simulation data is split into several 16kBytes, and the remaining data is padded to 16kByte to meet the preset processing rules.

[0060] For example, if the size of the simulation data is 40kByte, and the virtual microcontroller unit or FTL knows that the data processing standard is 16kByte according to the preset processing rules, then it will split the simulation data into 16kByte, split another 16kByte, and then pad the remaining 8KB to make 16KB. Then, according to the preset processing rules, the above three 16kBytes will be compressed to obtain three 6Bytes of data to be stored.

[0061] Step S30: Obtain the address mapping table associated with the data to be stored, and perform the write operation of the data to be stored in memory according to the address mapping table.

[0062] After the virtual microcontroller unit or FTL compresses the simulation data into data to be stored, it notifies the memory controller to write the data to be stored into memory.

[0063] For example, the notification method can be command passing. After receiving the write command for the data to be stored, the memory controller obtains the address mapping table associated with the data to be stored in order to execute the write operation of the data to be stored.

[0064] For example, the notification method can be an interrupt or an event. When the virtual microcontroller unit detects a specific trigger interrupt or trigger event, it obtains the data to be stored and sends the write instruction for the data to be stored to the memory controller.

[0065] For example, the notification method could be an update of the address mapping table's status. If the virtual microcontroller unit detects an update of the address mapping table's status, it will obtain the data to be stored and send the write instruction for the data to be stored to the memory controller.

[0066] After obtaining the address mapping table, the memory controller can determine the physical address to be written to the data to be stored. However, this physical address is not a physical address in memory, but rather the physical address of the flash memory chip that the virtual flash memory should be associated with. In this embodiment, the original disk allocation information includes the mapping relationship between the physical address of the flash memory chip and the physical address of the original disk in memory. (Refer to...) Figure 2 , Figure 2 This is a schematic diagram of the secondary mapping in the first embodiment of the data processing method of this application. The memory controller determines the write address of the original disk based on the physical address to be written and the original disk allocation information, and executes the write operation of the data to be stored based on the write address of the original disk.

[0067] In this embodiment, by receiving a write instruction for simulation data, the logical address of the simulation data in the virtual flash memory chip is determined; according to preset processing rules, the simulation data is compressed into standard format data to be stored, the data to be stored including the logical address and data identifier; an address mapping table associated with the data to be stored is obtained, and the write operation of the data to be stored is performed in memory according to the address mapping table. This process transforms the simulation data into a standard format that is easy to organize and manage, without requiring a file system to manage the written data. This not only reduces the complexity of the data write path but also improves the efficiency of the hard disk simulation system. The processed simulation data only contains the logical address and data identifier, greatly reducing the volume of data that needs to be actually written. Therefore, this application can store the processed simulation data in memory instead of on the hard disk. Compared to the traditional method of writing simulation data to the hard disk, this storage method greatly improves the read and write speed of the simulation data, thereby effectively improving the performance of the hard disk simulation system.

[0068] Furthermore, referring to Figure 3 , Figure 3 This is a flowchart illustrating a second embodiment of the data processing method of this application. The second embodiment of this application includes the following steps prior to step S10:

[0069] Step S00: Determine the available storage area of ​​the virtual flash memory by detecting the logical address space of the virtual flash memory.

[0070] Step S01: Determine the available physical address of the physical flash memory device that the logical address of the available storage area is mapped to according to the preset mapping rules;

[0071] Virtual flash memory is a software-implemented virtualization storage technology that abstracts physical flash memory devices into logical flash memory, managing and accessing the storage space through a logical address space. In virtual flash memory, logical addresses are typically mapped to specific locations on the physical storage device, enabling the management and access of the storage space. Logical addresses are used to determine the areas that can be read from and written to, i.e., available storage areas. Available storage areas include allocated areas and unallocated areas. Allocated areas refer to the regions consisting of storage units that have already been allocated to data, while unallocated areas refer to the regions consisting of free storage units that can be allocated.

[0072] In this application, a user-space application or system component sends a raw disk allocation request to the operating system kernel. When the operating system receives the raw disk allocation request, it obtains the available physical address of the physical flash device mapped to the available storage space of the virtual flash memory from the hard disk emulation system through the device driver. Upon receiving the request, the hard disk emulation system detects the logical address space of the virtual flash memory particle through FTL, determines the available storage area of ​​the virtual flash memory particle, and determines the available physical address of the physical flash device mapped to the logical address of the available storage area of ​​the virtual flash memory according to a preset mapping rule, i.e., the mapping relationship between the logical address of the virtual flash memory particle and the physical address of the physical flash device.

[0073] Step S02: Based on the available physical address of the physical flash memory device, create a raw disk on the memory.

[0074] Optionally, the operating system kernel determines the size of the raw disk to be allocated based on the available physical address of the physical flash memory device and preset processing rules; according to the determined size, it allocates a space of appropriate size in memory to store the simulation data of the virtual flash memory; and establishes the data structure and mapping relationship of the physical flash memory device to map the available physical address of the physical flash memory device to the raw disk space allocated in memory.

[0075] Optional, refer to Figure 4 Before step S00, the following are also included:

[0076] Step S03: Obtain the prediction error curve of the virtual flash memory chip;

[0077] In practical applications, due to factors such as manufacturing processes and external environmental interference, flash memory chips may exhibit inconsistent performance among individual chips, and may even contain bad blocks.

[0078] As one method for identifying faulty units, the initial state of a virtual flash memory chip is determined by the initial parameters of the finished flash memory chip before it leaves the factory and is not yet actually used. To enable the virtual flash memory chip to realistically simulate the state of the finished flash memory chip in actual application, the chip manufacturer can output the predicted error curve of the virtual flash memory chip using a pre-trained error prediction model.

[0079] As an alternative method for identifying error-prone units, the virtual flash memory is not in its initial state. The virtual microcontroller unit can predict the error curve by monitoring the usage and performance of the virtual flash memory chips. That is, the probability of bad blocks or errors occurring with the number of write and erase operations over the lifespan of the flash memory chips. This data can be obtained through built-in algorithms and used to form the error curve.

[0080] Step S04: Determine the faulty cells in the virtual flash memory chip based on the predicted error curve;

[0081] Based on the predicted error curve, the virtual microcontroller unit can identify the faulty cells in the virtual flash memory chips, that is, the memory cells that have failed or may fail.

[0082] Step S05: Mask the logical address of the faulty unit to make the faulty unit an unusable area.

[0083] Once a faulty cell is identified, the virtual microcontroller unit marks the logical address of this faulty cell as an unavailable region, thereby shielding these cells and preventing their use in subsequent read and write operations.

[0084] Optionally, the unavailable area also includes a metadata storage area. Metadata is information used to manage the logical address mapping, bad block management, erase count, etc. of flash memory. In order to make the virtual flash memory completely simulate finished flash memory chips, some measures are also taken in the virtual flash memory to protect the metadata from being written to or overwritten by other data.

[0085] As a method of protecting the metadata storage area, at the hardware design level, some storage particles or blocks of (virtual) flash memory are pre-defined as metadata storage areas, allowing only read and write operations on metadata.

[0086] As another way to protect the metadata storage area, permissions or tags are set at the firmware level of the flash controller so that the metadata storage area can only be accessed by specific operations or instructions, while ordinary data write operations cannot overwrite or modify the metadata storage area.

[0087] In this embodiment, the logical address of the determined metadata storage area is masked so that the metadata storage area becomes an unavailable area and will not be detected by FTL.

[0088] In this embodiment, unusable areas are masked based on metadata storage areas and error curves. Only the usable storage areas of the virtual flash memory are allocated on the corresponding raw disk in memory. Because the simulated data written to the virtual flash memory is compressed compared to the data actually stored in memory, the storage space of the raw disk allocated in memory can be much smaller than the storage space of the virtual flash memory chips. This is significant for saving memory resources, improving performance, and reducing costs and energy consumption.

[0089] Furthermore, referring to Figure 5 , Figure 5 This is a flowchart illustrating a third embodiment of the data processing method of this application. The third embodiment of this application further includes:

[0090] Step S40: If the data write index of the virtual flash memory particle exceeds a preset threshold, then the write area of ​​the original disk is detected;

[0091] Step S41: If a blank partition is detected in the original disk, then the storage area of ​​the virtual storage particle mapped by the blank partition is determined to be an unusable area;

[0092] Step S42: On the memory, release the blank partition of the original disk.

[0093] As the hard disk emulation system runs, the available area of ​​the virtual flash memory may not be the same as when the original disk was created. New bad blocks may appear, and new areas may be set as unusable. In this case, reserving storage space on the original disk for these newly appearing unusable areas is a waste of memory resources.

[0094] Therefore, in this embodiment, a triggering mechanism is preset on the memory side. Based on the fact that the original disk is only used to write simulation data to the virtual flash memory, the memory controller monitors the write index of the original disk. If the write index exceeds the preset threshold, the write area of ​​the original disk is detected.

[0095] If, despite the write rate exceeding a preset threshold, there are still blank partitions with no data written, this situation deviates from normal operating practices. Therefore, the storage area of ​​the virtual storage particle mapped to the blank partition can be determined as an unusable area. To avoid wasting memory resources, the blank partitions of the original disk are released from the memory.

[0096] For example, the write metric includes the amount of data written. A preset threshold can be 80% of the amount of data that the original disk can support writing. If the amount of data written to the original disk exceeds this preset threshold, a blank partition detection mechanism is triggered.

[0097] For example, the write metric includes the write operation frequency, i.e., the number of memory write operations within a certain period of time. The preset threshold can be hundreds of times per second. If the write operation frequency of the raw disk is detected to exceed the preset threshold, a blank partition detection mechanism is triggered.

[0098] In this embodiment, the memory controller can promptly detect and process blank partitions on the original disk based on a triggering mechanism to ensure system stability and reliability. Releasing blank partitions allows the system to reuse this space, avoiding waste of storage resources.

[0099] In addition, this application also proposes a data processing device.

[0100] Reference Figure 6 , Figure 6 This is a schematic diagram of the data processing device structure of the hardware operating environment involved in the embodiments of this application.

[0101] like Figure 6 As shown, the data processing device may include: a processor 1001, such as a central processing unit (CPU), a communication bus 1002, a user interface 1003, a network interface 1004, and a memory 1005. The communication bus 1002 is used to enable communication between these components. The user interface 1003 may include a display screen or an input unit such as a keyboard; optionally, the user interface 1003 may also include a standard wired interface or a wireless interface. The network interface 1004 may optionally include a standard wired interface or a wireless interface (such as a Wi-Fi interface). The memory 1005 may be a high-speed random access memory (RAM) or a stable non-volatile memory (NVM), such as a disk drive. The memory 1005 may also optionally be a storage device independent of the aforementioned processor 1001.

[0102] Those skilled in the art will understand that Figure 6 The structure shown does not constitute a limitation on the data processing device and may include more or fewer components than shown, or combine certain components, or have different component arrangements.

[0103] like Figure 6As shown, the memory 1005, which serves as a readable storage medium, may include an operating system, a data storage module, a network communication module, a user interface module, and a data processing program.

[0104] exist Figure 6 In the data processing device shown, the network interface 1004 is mainly used for data communication with other devices; the user interface 1003 is mainly used for data interaction with the user; the processor 1001 and the memory 1005 in the data processing device of this application can be set in the data processing device, and the data processing device calls the data processing program stored in the memory 1005 through the processor 1001 and executes the data processing method provided in the embodiment of this application.

[0105] Furthermore, embodiments of this application also propose a readable storage medium.

[0106] This application has a data processing program stored on a readable storage medium, which, when executed by a processor, implements the steps of the data processing method described above.

[0107] The specific embodiments in which the data processing program stored in the readable storage medium of this application is executed by the processor are basically the same as the embodiments of the data processing method described above, and will not be repeated here.

[0108] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or system. Unless otherwise specified, an element defined by the phrase "comprising a data processing" does not exclude the presence of other identical elements in the process, method, article, or system that includes that element.

[0109] The sequence numbers of the embodiments in this application are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0110] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a readable storage medium (such as ROM / RAM, magnetic disk, optical disk) as described above, and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of this application.

[0111] The above are merely preferred embodiments of this application and do not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

Claims

1. A data processing method, characterized in that, The data processing method is applied to a hard disk emulation system and includes the following steps: Receive a write command for simulation data and determine the logical address of the simulation data in the virtual flash memory chip; According to preset processing rules, the simulation data is compressed into standard format data to be stored, and the data to be stored includes the logical address and data identifier; Obtain the address mapping table associated with the data to be stored, and perform the write operation of the data to be stored in memory according to the address mapping table; The step of receiving the write instruction for the simulation data and determining the logical address of the simulation data in the virtual flash memory chip includes: According to the preset mapping rules, the physical address to be written to the logical address is determined, and the address mapping table is updated according to the logical address and the physical address to be written. The preset mapping rules include the mapping relationship between the logical address of the virtual flash memory particle and the physical address of the physical flash memory device. The step of performing the write operation of the data to be stored in memory according to the address mapping table includes: Based on the address mapping table, determine the physical address to be written to the data to be stored; Obtain the original disk allocation information of the memory, and determine the write address of the original disk based on the physical address to be written and the original disk allocation information; wherein, the original disk allocation information includes the mapping relationship between the physical address of the flash memory chip of the physical flash memory device and the physical address of the original disk on the memory; The write operation of the data to be stored is performed according to the write address of the original disk.

2. The data processing method as described in claim 1, characterized in that, Before the step of receiving the write instruction for the simulation data and determining the logical address of the simulation data in the virtual flash memory chip, the following steps are included: The available storage area of ​​the virtual flash memory is determined by detecting the logical address space of the virtual flash memory particle. According to the preset mapping rules, the available physical address of the physical flash memory device that the logical address of the available storage area is mapped to is determined; Based on the available physical address of the physical flash memory device, a raw disk is created on the memory.

3. The data processing method as described in claim 2, characterized in that, Before the step of determining the available storage area of ​​the virtual flash memory particle by detecting its logical address space, the method further includes: Obtain the prediction error curve of the virtual flash memory chip; Based on the predicted error curve, the faulty cells in the virtual flash memory chip are determined; The logical address of the faulty unit is masked to make the faulty unit an unusable area.

4. The data processing method as described in claim 2, characterized in that, Before the step of determining the available storage area of ​​the virtual flash memory particle by detecting its logical address space, the method further includes: Obtain the preset metadata storage area of ​​the virtual flash memory chip; The logical address of the metadata storage area is masked to make the metadata storage area unavailable.

5. The data processing method as described in claim 2, characterized in that, The step of compressing the simulation data into standard format data to be stored according to preset processing rules, wherein the data to be stored includes the logical address and data identifier, further includes: If the size of the simulation data does not conform to the preset processing rules, the simulation data is split and / or padded to meet the preset processing rules. According to the preset processing rules, the split and / or completed simulation data is compressed into several standard format data to be stored, the data to be stored including the logical address and data identifier.

6. The data processing method as described in claim 2, characterized in that, The data processing method further includes: If the write index of the original disk is detected to exceed a preset threshold, the write area of ​​the original disk will be detected. If a blank partition is detected on the original disk, then the storage area of ​​the virtual flash memory particle mapped by the blank partition is determined to be an unusable area; On the memory, free up the blank partition of the original disk.

7. A data processing device, characterized in that, The device includes: a memory, a processor, and a data processing program stored in the memory and executable on the processor, the data processing program being configured to implement the steps of the data processing method as described in any one of claims 1 to 6.

8. A readable storage medium, characterized in that, The readable storage medium stores a data processing program, which, when executed by a processor, implements the steps of the data processing method as described in any one of claims 1 to 6.

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