A voltage source circuit

Abstract

The application relates to the technical field of power management, in particular to a voltage source circuit which can meet power supply requirements and comprises a current generator composed of a PMOS tube 101, a PMOS tube 102, an NMOS tube 106, an NMOS tube 107 and a resistor 114; the gate ends of the PMOS tube 101 and the PMOS tube 102 are connected and connected to the gate ends of a PMOS tube 103, a PMOS tube 104 and a PMOS tube 105; the drain end of the PMOS tube 103 is connected to the gate end and the drain end of an NMOS tube 115, the gate end of an NMOS tube 116; the drain end of the NMOS tube 116 is connected to the source end of an NMOS tube 108, the source end of an NMOS tube 112 and one end of a resistor 113; the gate end of the NMOS tube 108 is a voltage input end; the other end of the resistor R113 is connected to one end of a resistor R109 and the gate end of the NMOS tube 112; the other end of the resistor R109 is connected to the source end of a PMOS tube 110 and the drain end of the PMOS tube 104; the gate end and the drain end of the PMOS tube 110 are connected and connected to the gate end of a PMOS tube 111 and the drain end of the NMOS tube 112; the source end of the PMOS tube 111 is connected to the drain end of the PMOS tube 105 and is a voltage output end.

Description

Technical Field

[0001] This invention relates to the field of power management technology, specifically to a voltage source circuit. Background Technology

[0002] As the most basic functional module of a circuit system, voltage source circuits are widely used in various circuit systems. With the continuous expansion of circuit system applications, the requirements for the types of voltage source circuits are also increasing, which has led to the diversification of voltage source circuits to adapt to different system requirements.

[0003] Switching power products, such as DC-DC converters, motor driver chips, and LED drivers, are becoming increasingly widely used in increasingly complex environments. In order to meet the simplicity of system applications, it is required to provide an additional low-voltage power supply to power the low-voltage part of the chip in such system applications. This requires such chips to have an internal voltage source circuit to generate a special voltage signal to power the circuit. Existing voltage source circuits cannot meet the above requirements. Summary of the Invention

[0004] To address the aforementioned technical problems, this invention provides a voltage source circuit that can meet power supply requirements.

[0005] The technical solution is as follows: A voltage source circuit, characterized in that it includes a current generator composed of PMOS transistors 101, 102, 106, 107, and resistor 114. The gate terminals of PMOS transistors 101 and 102 are connected to the gate terminals of PMOS transistors 103, 104, and 105. The drain terminal of PMOS transistor 103 is connected to the gate and drain terminals of NMOS transistors 115 and 116. The drain terminal of NMOS transistor 116 is connected to the source terminals of NMOS transistors 108 and 112 and one end of resistor 113. The gate terminal of NMOS transistor 108 is the voltage input terminal. The other end of resistor 113 is connected to... One end of resistor R109 is connected to the gate of NMOS transistor 112, and the other end of resistor R109 is connected to the source of PMOS transistor 110 and the drain of PMOS transistor 104. The gate and drain of PMOS transistor 110 are connected and connected to the gate of PMOS transistor 111 and the drain of NMOS transistor 112. The source of PMOS transistor 111 is connected to the drain of PMOS transistor 105 and serves as the voltage output terminal. The sources of PMOS transistors 101, 102, 103, 104, 105, and NMOS transistor 108 are all connected to VCC. The drain of PMOS transistor 111, the source of NMOS transistor 115, and the source of NMOS transistor 116 are all grounded.

[0006] A further feature is that the drain of the PMOS transistor 101 is connected to the gate and drain of the NMOS transistor 106 and the gate of the NMOS transistor 107, the drain of the NMOS transistor 107 is connected to the gate and drain of the PMOS transistor 102, the source of the NMOS transistor 107 is connected to one end of the resistor R114, and the source of the NMOS transistor 106 and the other end of the resistor R114 are both grounded.

[0007] With this invention, a voltage input terminal is set in the circuit. The input voltage is output through NMOS transistors 108, 112, and 111. The output voltage and the input voltage are controlled by NMOS transistor 108. When the input voltage increases, the difference between the output voltage and the input voltage will gradually decrease until the output voltage is less than the input voltage. This circuit with a certain input-output following relationship can be used in some switching model products to meet power supply requirements. Attached Figure Description

[0008] Figure 1 This is the circuit schematic diagram of the present invention; Figure 2 This is a graph showing the relationship between input voltage and output voltage. Detailed Implementation

[0009] See Figure 1 As shown, a voltage source circuit includes a current generator composed of PMOS transistors 101, 102, 106, 107, and resistor 114. The drain of PMOS transistor 101 is connected to the gate and drain of NMOS transistor 106 and the gate of NMOS transistor 107. The drain of NMOS transistor 107 is connected to the gate and drain of PMOS transistor 102. The source of NMOS transistor 107 is connected to one end of resistor R114. The source of NMOS transistor 106 and the other end of resistor R114 are both grounded. The gates of PMOS transistors 101 and 102 are connected and also connected to the gates of PMOS transistors 103, 104, and 105. The drain of PMOS transistor 103 is connected to the gate and drain of NMOS transistor 105 and the gate of NMOS transistor 106. The drain of NMOS transistor 106 is connected to NMOS transistor 107. The circuit consists of the source terminal of transistor 8, the source terminal of NMOS transistor 112, and one end of resistor 113. The gate terminal of NMOS transistor 108 is the voltage input terminal. The other end of resistor R113 is connected to one end of resistor R109 and the gate terminal of NMOS transistor 112. The other end of resistor R109 is connected to the source terminal of PMOS transistor 110 and the drain terminal of PMOS transistor 104. The gate and drain terminals of PMOS transistor 110 are connected together and then connected to the gate terminal of PMOS transistor 111 and the drain terminal of NMOS transistor 112. The source terminal of PMOS transistor 111 is connected to the drain terminal of PMOS transistor 105 and serves as the voltage output terminal. The source terminals of PMOS transistors 101, 102, 103, 104, 105, and 108 are all connected to VCC. The drain terminal of PMOS transistor 111, the source terminal of NMOS transistor 115, and the source terminal of NMOS transistor 116 are all grounded.

[0010] Let the voltage between the gate and source of NMOS transistor 106 be VGS. 106 The voltage between the gate and source of NMOS transistor 107 is VGS. 107 If the resistance of resistor 114 is R, then the value of the generated current I is: I=(VGS106- VGS107) / R--------------------------------(1) The voltage generated by the circuit of this invention is VOUT, and the gate voltage of the NMOS transistor 108 is the input voltage VIN. The voltage between the gate and source of the NMOS transistor 108 is VGS. 108 The voltage VDS between the drain and source of NMOS transistor 112 112 The voltage between the gate and source of PMOS transistor 111 is VGS.111 The gate voltage and source voltage of PMOS transistor 110 are VGS. 110 The current mirrored by PMOS transistor 104 provides current to resistors 109 and 113, as well as to PMOS transistors 110 and 112. In addition to the two paths mentioned above, NMOS transistor 116 also provides current to NMOS transistor 108.

[0011] The output voltage path in the circuit consists of NMOS transistor 108, NMOS transistor 112, and PMOS transistor 111. The input current VIN serves as the gate voltage of NMOS transistor 108, turning it on. The resistor path primarily provides the gate voltage for NMOS transistor 112, turning it on. Therefore, the output voltage VOUT is: VOUT=VIN- VGS108+VDS 112 -VGS 111 ------------------------------(2) Thus, the relationship between the output voltage VOUT and the input voltage VIN can be obtained: VOUT - VIN = VDS 112 -VGS 111 -VGS 108 ------------------------------(3) In this circuit, when the input voltage increases, the body effect of the NMOS transistor 108 is enhanced, and VTH... 108 As the value increases, VGS 108 The value increases, and VGS... 110 =VGS 111 =V PN The VOUT-VIN value remains essentially unchanged, therefore, as the VIN value increases, the VOUT-VIN value will gradually decrease.

[0012] Output voltage and input voltage are as follows Figure 2 As shown, when the input voltage increases, the difference between the output voltage and the input voltage will gradually decrease until the output voltage is less than the input voltage. The specific relationship between the output voltage and the input voltage is shown in formula (3).

[0013] When the voltage is low, the output voltage will be higher than the input voltage. As the voltage increases, the output voltage will gradually approach the input voltage until it falls below the input voltage. This type of circuit, with a certain input-output following relationship, can be used in some switching-model products.

Claims

1. A voltage source circuit, characterized in that, It includes a current generator composed of PMOS transistors 101, 102, 106, 107, and resistor 114. The gates of PMOS transistors 101 and 102 are connected to the gates of PMOS transistors 103, 104, and 105. The drain of PMOS transistor 103 is connected to the gate and drain of NMOS transistor 115 and the gate of NMOS transistor 116. The drain of NMOS transistor 116 is connected to the source of NMOS transistor 108, the source of NMOS transistor 112, and one end of resistor 113. The gate of NMOS transistor 108 is the voltage input terminal. The other end of resistor R113 is connected to one end of resistor R109 and the NMOS transistor 107. The gate terminal of OS transistor 112 is connected to the gate terminal of PMOS transistor 110. The other end of resistor R109 is connected to the source terminal of PMOS transistor 110 and the drain terminal of PMOS transistor 104. The gate terminal and drain terminal of PMOS transistor 110 are connected to the gate terminal of PMOS transistor 111 and the drain terminal of NMOS transistor 112. The source terminal of PMOS transistor 111 is connected to the drain terminal of PMOS transistor 105 and serves as a voltage output terminal. The source terminals of PMOS transistors 101, 102, 103, 104, 105, and 108 are all connected to VCC. The drain terminal of PMOS transistor 111, the source terminal of NMOS transistor 115, and the source terminal of NMOS transistor 116 are all grounded.

2. The voltage source circuit according to claim 1, characterized in that, The drain of the PMOS transistor 101 is connected to the gate and drain of the NMOS transistor 106 and the gate of the NMOS transistor 107. The drain of the NMOS transistor 107 is connected to the gate and drain of the PMOS transistor 102. The source of the NMOS transistor 107 is connected to one end of the resistor R114. The source of the NMOS transistor 106 and the other end of the resistor R114 are both grounded.

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