Combination sensor and method of manufacturing the same

Abstract

The embodiment of the present application provides a combined sensor and a preparation method thereof. The combined sensor comprises: a first wafer and a second wafer, the first wafer and the second wafer are bonded, and an insulating layer is arranged between the first wafer and the second wafer; a first sensor and a second sensor are formed on the first wafer, a spacing part is formed between the first sensor and the second sensor, and the spacing part electrically isolates the first sensor and the second sensor.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and more specifically, to a combined sensor and its fabrication method. Background Technology

[0002] Testing multiple environmental characteristics in a single device is one of the current trends in sensor development. Currently, most multi-sensor combination solutions on the market are based on packaging, meaning that the functions of multiple sensors are combined through packaging. Such solutions are costly, have lower performance, are large in size, and have complex packaging, which does not meet the increasingly stringent requirements of integrated circuit development.

[0003] Taking accelerometers and temperature sensors as examples, the traditional solution is to integrate the accelerometer and temperature sensor together through packaging. This solution has a large overall package size, high cost, and the temperature collected by the temperature sensor has a certain deviation. Another solution is to integrate the temperature sensor on the inertial signal processing chip (ASIC chip). Although this optimizes the package size and cost, the collected temperature is still not the actual temperature when the inertial signal processing chip is working.

[0004] In view of this, a new technical solution is needed to solve the above-mentioned technical problems. Summary of the Invention

[0005] The purpose of this application is to provide a new technical solution for a combined sensor and its fabrication method.

[0006] In a first aspect, embodiments of this application provide a combined sensor. The combined sensor includes: a first wafer and a second wafer, wherein the first wafer and the second wafer are bonded together and an insulating layer is disposed between the first wafer and the second wafer;

[0007] A first sensor and a second sensor are formed on the first wafer, and a spacer is formed between the first sensor and the second sensor to electrically isolate the first sensor and the second sensor.

[0008] Optionally, an accelerometer mass is formed on the first wafer, and a cavity is formed on the second wafer, with the accelerometer mass and the cavity being disposed correspondingly.

[0009] Optionally, the first sensor is an acceleration sensor, and a release groove is formed on one side of the acceleration sensor.

[0010] Optionally, the first wafer has a first surface adjacent to the second wafer, and the second wafer has a second surface adjacent to the first wafer;

[0011] The insulating layer is formed on the first surface and / or the second surface.

[0012] Optionally, the first wafer has a third surface facing away from the second wafer, on which a mask layer is formed.

[0013] Optionally, the first sensor includes a first electrical contact portion, a first contact hole is formed on the mask layer, a first electrical connection portion is formed in the first contact hole, and the first electrical connection portion is connected to the first electrical contact portion.

[0014] Optionally, the second sensor includes a second electrical contact portion, a second contact hole is formed on the mask layer, a second electrical connection portion is formed in the second contact hole, and the second electrical connection portion is connected to the second electrical contact portion.

[0015] Optionally, a protective layer is formed on the side of the mask layer opposite to the second wafer, and the protective layer has a first through hole and a second through hole, the first through hole being used to expose the first electrical connection portion and the second through hole being used to expose the second electrical connection portion.

[0016] Optionally, the protective layer, mask layer, portion of the first wafer, and insulating layer between the first sensor and the second sensor are disconnected to form the spacer.

[0017] Optionally, a protective cover is bonded to the accelerometer.

[0018] Secondly, embodiments of this application also provide a method for fabricating a combined sensor. The method for fabricating a combined sensor includes the following steps:

[0019] Provide the first wafer and the second wafer;

[0020] An insulating layer is formed on the first wafer and / or the second wafer;

[0021] The first wafer and the second wafer are bonded together, and the first wafer and the second wafer are isolated by the insulating layer;

[0022] A first sensor and a second sensor are formed on the first wafer;

[0023] A gap is formed between the first sensor and the second sensor to electrically isolate the first sensor and the second sensor.

[0024] Optionally, before forming an insulating layer on the first wafer and / or the second wafer, the method further includes:

[0025] An acceleration mass block is formed on the first wafer;

[0026] A cavity is formed on the second wafer.

[0027] Optionally, bonding the first wafer and the second wafer specifically includes:

[0028] The acceleration mass block formed on the first wafer and the cavity formed on the second wafer are set up accordingly.

[0029] Optionally, forming the first sensor and the second sensor on the first wafer specifically includes:

[0030] A mask layer is formed on the surface of the first wafer opposite to the second wafer;

[0031] A first electrical contact and a second electrical contact are formed on the first wafer;

[0032] A first contact hole and a second contact hole are formed on the mask layer;

[0033] A first electrical connection portion is formed in the first contact hole, and a second electrical connection portion is formed in the second contact hole. The first electrical connection portion is connected to the first electrical contact portion, and the second electrical connection portion is connected to the second electrical contact portion.

[0034] A protective layer is formed on the mask layer;

[0035] A first through hole and a second through hole are formed on the protective layer, the first through hole being to expose the first electrical connection portion and the second through hole being to expose the second electrical connection portion.

[0036] Optionally, forming a gap between the first sensor and the second sensor specifically includes:

[0037] The protective layer, mask layer, part of the first wafer, and insulating layer between the first sensor and the second sensor are disconnected to form a gap between the first sensor and the second sensor.

[0038] Optionally, after forming a gap between the first sensor and the second sensor, the method further includes etching a release groove on one side of the first sensor.

[0039] Optionally, etching a release groove on one side of the first sensor specifically includes:

[0040] The protective layer, mask layer, portion of the first wafer, and insulating layer are sequentially etched through to form the release groove.

[0041] According to an embodiment of this application, a combined sensor is provided. By providing an insulating layer between a first wafer and a second wafer, and providing a spacer between a first sensor and a second sensor, electrical isolation between the first sensor and the second sensor is achieved through the insulating layer and the spacer, ensuring that the two sensors can work simultaneously without affecting each other.

[0042] Other features and advantages of this specification will become clear from the following detailed description of exemplary embodiments with reference to the accompanying drawings. Attached Figure Description

[0043] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments of this specification and, together with their description, serve to explain the principles of this specification.

[0044] Figure 1 The diagram shows the structure of the combined sensor provided in an embodiment of this application. Figure 1 .

[0045] Figure 2 The diagram shows a structural schematic of an acceleration mass block formed on the first wafer.

[0046] Figure 3 The diagram shows a cavity formed on the second wafer.

[0047] Figure 4 The diagram shows the structure of the first and second wafers bonded together.

[0048] Figures 5-10 The diagram shows a schematic of the fabrication of a first sensor and a second sensor on a first wafer.

[0049] Figure 11 The diagram shown is a structural schematic of the spacer and release groove provided in an embodiment of this application.

[0050] Figure 12 The diagram shows the structure of the combined sensor provided in an embodiment of this application. Figure 2 .

[0051] Figure 13 The diagram shows the structure of the combined sensor provided in an embodiment of this application. Figure 3 .

[0052] Explanation of reference numerals in the attached figures:

[0053] 1. First wafer; 10. Acceleration mass block; 01. Insulating layer;

[0054] 2. Second wafer; 20. Cavity;

[0055] 11. Mask layer; 12a. First lightly doped P-type region; 12b. Second lightly doped P-type region;

[0056] 13a, First heavily P-type doped region; 13b, Second heavily P-type doped region; 14a, Heavy N-type doped region;

[0057] 15a, First electrical contact; 15b, Second electrical contact; 16a, First contact hole; 16b, Second contact hole; 17a, First electrical connection; 17b, Second electrical connection; 18a, First through hole; 18b, Second through hole; 19, Protective layer;

[0058] 3. Spacing section;

[0059] 4. Release groove;

[0060] 5. Protective cover. Detailed Implementation

[0061] Various exemplary embodiments of this application will now be described in detail with reference to the accompanying drawings. It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps set forth in these embodiments do not limit the scope of this application.

[0062] The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit the scope of this application and its application or use.

[0063] Technologies and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, such technologies and equipment should be considered part of the specification.

[0064] In all the examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not as limitations. Therefore, other examples of exemplary embodiments may have different values.

[0065] It should be noted that similar labels and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be discussed further in subsequent figures.

[0066] This application provides a combined sensor. (Refer to...) Figures 1-13 The combined sensor includes: a first wafer 1 and a second wafer 2, wherein the first wafer 1 and the second wafer 2 are bonded together and an insulating layer 01 is disposed between the first wafer 1 and the second wafer 2.

[0067] A first sensor and a second sensor are formed on the first wafer 1, and a spacer 3 is formed between the first sensor and the second sensor to electrically isolate the first sensor and the second sensor.

[0068] In this embodiment, the combined sensor includes a first wafer 1 and a second wafer 2, which are bonded together. The first wafer 1 is used to form multiple sensors, for example, the first wafer 1 is used to form a first sensor and a second sensor. The second wafer 2 can serve as a substrate.

[0069] Reference Figures 2-4 When the first wafer 1 and the second wafer 2 are bonded together, an insulating layer 01 is disposed between the first wafer 1 and the second wafer 2. This can also be understood as follows: although the first wafer 1 and the second wafer 2 are bonded together, they are isolated and insulated from each other by the insulating layer 01, thus preventing electrical conduction between them. The insulating layer 01 can be an oxide layer, such as silicon oxide. Furthermore, the insulating layer 01 can be formed on the first wafer 1, the second wafer 2, or both.

[0070] A first sensor and a second sensor are formed on the first wafer 1, meaning that the first sensor and the second sensor are integrated on the same wafer. In other words, various environmental characteristics can be measured by integrating two sensing elements, the first sensor and the second sensor, on a single wafer. For example, the first sensor can be an accelerometer, specifically a resistive accelerometer, and the second sensor can be a temperature sensor, specifically a resistive temperature sensor. Alternatively, the first sensor can be an accelerometer, and the second sensor can be a pressure sensor; or the first sensor can be a temperature sensor, and the second sensor can be a pressure sensor; or the first sensor can be a thermistor, and the second sensor can be a humidity sensor.

[0071] Since an insulating layer 01 is provided between the first wafer 1 and the second wafer 2, after the first sensor and the second sensor are formed on the first wafer 1, the signal detected by the first sensor will not be transmitted to the second wafer 2, and the second wafer 2 will not transmit the signal detected by the first sensor to the second sensor; similarly, the signal detected by the second sensor will not be transmitted to the second wafer 2, and the second wafer 2 will not transmit the signal detected by the second sensor to the first sensor.

[0072] It should be noted that the embodiments of this application do not particularly limit the type of the first sensor and the type of the second sensor, as long as the types of the first sensor and the second sensor are different.

[0073] Reference Figure 1 , Figures 11-13A first sensor and a second sensor are formed on the first wafer 1, and a spacer 3 is formed between the first sensor and the second sensor to electrically isolate the first sensor and the second sensor. That is, the first sensor and the second sensor are formed on the first wafer 1 at the same time. Since there is a spacer 3 between them, the signal detected by the first sensor will not be transmitted to the second sensor through the first wafer 1. Similarly, the signal detected by the second sensor will not be transmitted to the first sensor through the first wafer 1.

[0074] Therefore, in this embodiment of the application, by providing an insulating layer 01 between the first wafer 1 and the second wafer 2, and by providing a spacer 3 between the first sensor and the second sensor, electrical isolation between the first sensor and the second sensor is achieved through the insulating layer 01 and the spacer 3, ensuring that the two sensors can work simultaneously without affecting each other.

[0075] In an optional embodiment, if the second sensor is a temperature sensor, the second sensor can accurately obtain the temperature at which the first sensor operates. For example, if the first sensor is an accelerometer and the second sensor is a temperature sensor, considering the temperature drift characteristics of the accelerometer and application scenarios requiring real-time temperature compensation for the accelerometer, the temperature sensor can accurately obtain the operating temperature of the accelerometer.

[0076] Optionally, the width of the gap 3 is on the order of micrometers or nanometers. This further ensures that the first sensor and the second sensor can work simultaneously without interfering with each other. For example, if the first sensor is an accelerometer and the second sensor is a temperature sensor, considering the temperature drift characteristics of the accelerometer and the application scenarios that require real-time temperature compensation for the accelerometer, the temperature sensor can more accurately obtain the operating temperature of the accelerometer.

[0077] In one embodiment, refer to Figure 1 and Figure 2 When the first sensor is an accelerometer, an accelerometer mass block 10 is formed on the first wafer 1 and a cavity 20 is formed on the second wafer 2, with the accelerometer mass block 10 and the cavity 20 being configured accordingly.

[0078] In this embodiment, an accelerometer mass 10 is formed on the first wafer 1. For example, the accelerometer mass 10 can be formed on the first wafer 1 by deposition or etching processes.

[0079] A cavity 20 is formed on the second wafer 2, for example, by an etching process.

[0080] When the first wafer 1 and the second wafer 2 are bonded together, the accelerometer mass 10 and the cavity 20 are correspondingly arranged, with the cavity 20 serving as a limiting cavity for the accelerometer sensor. For example, when the first wafer 1 and the second wafer 2 are bonded together, the accelerometer mass 10 can be located inside the cavity 20, or the accelerometer mass 10 can be located away from the cavity 20. When the accelerometer mass 10 is located inside the cavity 20, the accommodating space of the cavity 20 needs to be larger than the volume of the accelerometer mass 10, so that when the accelerometer sensor is working, the accelerometer mass 10 can generate a vibration amplitude within the cavity 20 to ensure the normal operation of the accelerometer sensor.

[0081] In one embodiment, refer to Figures 11-13 and reference Figure 1 A release groove 4 is formed on one side of the first sensor.

[0082] In this embodiment, when the first sensor is an acceleration sensor, a release groove 4 is formed on one side of the first sensor to release the movable structure of the acceleration sensor.

[0083] It should be noted that when the first sensor is an accelerometer, a gap 3 is formed between the first and second sensors simultaneously with the formation of the release groove 4. The formation of the release groove 4 on one side of the accelerometer creates an acceleration suspension structure on the accelerometer. The formation of the gap 3 between the accelerometer and the second sensor further facilitates the vibration of the accelerometer and provides electrical isolation between the two sensors, ensuring that they can operate simultaneously without interfering with each other.

[0084] In one embodiment, refer to Figures 1-13 The first wafer 1 has a first surface close to the second wafer 2, and the second wafer 2 has a second surface close to the first wafer 1;

[0085] The insulating layer 01 is formed on the first surface and / or the second surface.

[0086] In this embodiment, the location of the insulating layer 01 is defined to ensure that the first wafer 1 and the second wafer 2 are electrically isolated from each other.

[0087] Furthermore, if the accelerometer mass 10 is formed on the first wafer 1, an insulating layer 01 can be formed on both the surface of the accelerometer mass and the surface of the first wafer 1. (Refer to...) Figure 2 An accelerometer mass block 10 is formed by etching the first wafer 1. An insulating layer 01 is formed on the surface of the accelerometer mass block 10 and on the surface of the first wafer 1 exposed after etching.

[0088] When a cavity 20 is formed on the second wafer 2, for example, the cavity 20 can be formed by etching the second surface of the second wafer 2, and an insulating layer 01 can be formed in the unetched area of ​​the second surface of the second wafer 2.

[0089] In this embodiment, regardless of whether the insulating layer 01 is formed on the first wafer 1 or the second wafer 2, as long as the first wafer 1 and the second wafer 2 can be bonded together, the first wafer 1 and the second wafer 2 can be insulated by the insulating layer 01.

[0090] In one embodiment, refer to Figure 5 The first wafer 1 has a third surface facing away from the second wafer 2, and a mask layer 11 is formed on the third surface.

[0091] In this embodiment, a mask layer 11 is formed on the first wafer 1, for example, the mask layer 11 can be grown on the third surface of the first wafer 1.

[0092] In one embodiment, refer to Figures 5-9 The first sensor includes a first electrical contact portion 15a, a first contact hole 16a is formed on the mask layer 11, a first electrical connection portion 17a is formed in the first contact hole 16a, and the first electrical connection portion 17a is connected to the first electrical contact portion 15a.

[0093] In one embodiment, refer to Figures 5-9 The second sensor includes a second electrical contact portion 15b, a second contact hole 16b is formed on the mask layer 11, a second electrical connection portion 17b is formed in the second contact hole 16b, and the second electrical connection portion 17b is connected to the second electrical contact portion 15b.

[0094] In this embodiment, reference is made to Figure 5 and Figure 6 After growing a mask layer 11 on the third surface of the first wafer 1, the first wafer 1 is patterned by photolithography and lightly doped with P-type material through processes such as ion implantation or diffusion to form a first lightly doped P-type region 12a of the first sensor and a second lightly doped P-type region 12b of the second sensor. After forming the first lightly doped P-type region 12a and the second lightly doped P-type region 12b of the first sensor, after photolithography, a first heavily doped P-type region 13a of the first sensor and a second heavily doped P-type region 13b of the second sensor are formed through processes such as ion implantation or diffusion.

[0095] When the first sensor is an accelerometer, after forming a first heavily doped P-type region 13a on the first lightly doped P-type region 12a, a first electrical contact 15a of the first sensor is formed. For example, for the first sensor, a first heavily doped P-type region 13a is formed on the first lightly doped P-type region 12a, thus forming a first electrical contact 15a in the first sensor.

[0096] Reference Figures 5-7 When the second sensor is a temperature sensor, after forming a second heavily doped P-type region 13b on the second lightly doped P-type region 12b, photolithography is performed. After photolithography, an N-type heavily doped region 14a is formed on the second lightly doped P-type region 12b through processes such as ion implantation or diffusion, thus forming the second electrical contact 15b of the second sensor. For example, for the second sensor, two heavily doped P-type regions 13b and one heavily doped N-type region 14a are formed on the second lightly doped P-type region 12b, thus forming three second electrical contacts 15b in the second sensor.

[0097] Reference Figure 8 After the first electrical contact 15a and the second electrical contact 15b are formed, a first contact hole 16a is formed on the mask layer 11 by reactive ion etching (RIE). The opening position of the first contact hole 16a corresponds to the setting position of the first electrical contact 15a. For example, the opening position of the first contact hole 16a is opposite to the setting position of the first electrical contact 15a, and the first contact hole 16a can expose the first electrical contact 15a.

[0098] Reference Figure 8 After the first electrical contact 15a and the second electrical contact 15b are formed, a second contact hole 16b is formed on the reactive ion etching (RIE) mask layer 11. The location of the second contact hole 16b corresponds to the location of the second electrical contact 15b. For example, the location of the second contact hole 16b is opposite to the location of the second electrical contact 15b, and the second contact hole 16b can expose the second electrical contact 15b. When multiple second electrical contacts 15b are formed, multiple second contact holes 16b need to be formed on the mask layer 11 accordingly. For example, three second contact holes 16b are formed on the mask layer 11.

[0099] Reference Figures 7-9After the first contact hole 16a and the second contact hole 16b are formed on the mask layer 11, metal interconnects (not shown in the figure) and electrical connections are formed by metal deposition or etching processes. For example, a first electrical connection 17a is formed in the first contact hole 16a, and the first electrical connection 17a and the first electrical contact 15a are connected together. For example, a second electrical connection 17b is formed in the second contact hole 16b, and the second electrical connection 17b and the second electrical contact 15b are connected together. When multiple second contact holes 16b are formed on the mask layer 11, a second electrical connection 17b is formed in each second contact hole 16b.

[0100] In one embodiment, refer to Figure 10 The mask layer 11 has a protective layer 19 formed on the side opposite to the second wafer 2. The protective layer 19 has a first through hole 18a and a second through hole 18b. The first through hole 18a exposes the first electrical connection portion 17a, and the second through hole 18b exposes the second electrical connection portion 17b.

[0101] In this embodiment, a protective layer 19 is formed on the side of the mask layer 11 facing away from the second wafer 2, i.e., the protective layer 19 is grown on the mask layer 11. For example, the material of the protective layer 19 can be silicon nitride. The regions of the protective layer 19 corresponding to the first electrical connection portion 17a and the second electrical connection portion 17b need to be etched away to form through holes, exposing the electrical connections. For example, a portion of the protective layer 19 is etched to form a first through hole 18a, exposing the first electrical connection portion 17a. Similarly, a portion of the protective layer 19 is etched to form a second through hole 18b, exposing the second electrical connection portion 17b.

[0102] In one embodiment, refer to Figure 11 The protective layer 19, mask layer 11, part of the first wafer 1 and the insulating layer 01 between the first sensor and the second sensor are disconnected to form the spacer 3.

[0103] In this embodiment, the spacer 3 can be formed by patterning and etching the protective layer 19, the mask layer 11, a portion of the first wafer 1, and the insulating layer 01. For example, the spacer 3 is a through-slot structure. The spacer 3 can electrically isolate the first sensor and the second sensor, ensuring that the two sensors can work simultaneously without interfering with each other.

[0104] Optionally, if the first sensor is an accelerometer, the release groove 4 and the spacer 3 can be formed simultaneously by patterning and etching the protective layer 19, the mask layer 11, a portion of the first wafer 1 and the insulating layer 01.

[0105] In one embodiment, refer to Figure 1 , Figure 12 and Figure 3 A protective cover 5 is bonded to the accelerometer.

[0106] In this embodiment, when the first sensor is an accelerometer, a protective cover 5 is bonded to the accelerometer to protect the internal structure of the accelerometer.

[0107] Optionally, the second sensor can be a temperature sensor, such as a reference sensor. Figure 1 The temperature sensor shown is a diode temperature sensor, see reference. Figure 12 The temperature sensor shown is a transistor temperature sensor.

[0108] This application also provides a method for fabricating a combined sensor. (Refer to...) Figures 1-13 The method for fabricating the combined sensor includes the following steps:

[0109] S101: Provides the first wafer 1 and the second wafer 2;

[0110] S102: An insulating layer O1 is formed on the first wafer 1 and / or the second wafer 2;

[0111] S103: Bond the first wafer 1 and the second wafer 2 together, wherein the first wafer 1 and the second wafer 2 are isolated by the insulating layer 01;

[0112] S104: Form a first sensor and a second sensor on the first wafer 1;

[0113] S105: A gap 3 is formed between the first sensor and the second sensor to electrically isolate the first sensor and the second sensor.

[0114] In this embodiment, a method for fabricating a combined sensor is provided. By providing an insulating layer 01 between a first wafer 1 and a second wafer 2, and by providing a spacer 3 between a first sensor and a second sensor, electrical isolation between the first sensor and the second sensor is achieved through the insulating layer 01 and the spacer 3, ensuring that the two sensors can work simultaneously without affecting each other.

[0115] Specifically, refer to Figure 2 and Figure 3 In step S101, a first wafer 1 and a second wafer 2 are provided. For example, the first wafer 1 is used to form the first sensor and the second sensor. The second wafer 2 can serve as a substrate. For example, the first wafer 1 can be N-type silicon.

[0116] In step S102, refer to Figure 2 and Figure 3An insulating layer 01 can be formed on the first wafer 1 and / or the second wafer 2 by deposition. For example, the material of the insulating layer 01 can be silicon oxide.

[0117] In step S103, after the first wafer 1 and the second wafer 2 are bonded, the first wafer 1 and the second wafer 2 are mutually insulated and isolated through the insulating layer 01.

[0118] In step S104, refer to Figures 4-11 and reference Figure 1 A first sensor and a second sensor are formed on the first wafer 1, meaning that the first sensor and the second sensor are integrated on the same wafer. In other words, various environmental characteristics can be measured by integrating two sensing elements, the first sensor and the second sensor, on a single wafer. For example, the first sensor can be an accelerometer, specifically a resistive accelerometer, and the second sensor can be a temperature sensor, specifically a resistive temperature sensor. Alternatively, the first sensor can be an accelerometer, and the second sensor can be a pressure sensor; or the first sensor can be a temperature sensor, and the second sensor can be a pressure sensor; or the first sensor can be a thermistor, and the second sensor can be a humidity sensor.

[0119] Since an insulating layer 01 is provided between the first wafer 1 and the second wafer 2, after the first sensor and the second sensor are formed on the first wafer 1, the signal detected by the first sensor will not be transmitted to the second wafer 2, and the second wafer 2 will not transmit the signal detected by the first sensor to the second sensor; similarly, the signal detected by the second sensor will not be transmitted to the second wafer 2, and the second wafer 2 will not transmit the signal detected by the second sensor to the first sensor.

[0120] It should be noted that the embodiments of this application do not particularly limit the type of the first sensor and the type of the second sensor, as long as the types of the first sensor and the second sensor are different.

[0121] In step S105, refer to Figure 11 A spacer 3 is formed between the first sensor and the second sensor to electrically isolate the first sensor and the second sensor. That is, the first sensor and the second sensor are formed on the first wafer 1 at the same time. Since the spacer 3 is provided between them, the signal detected by the first sensor will not be transmitted to the second sensor through the first wafer 1. Similarly, the signal detected by the second sensor will not be transmitted to the first sensor through the first wafer 1.

[0122] Therefore, in this embodiment of the application, by providing an insulating layer 01 between the first wafer 1 and the second wafer 2, and by providing a spacer 3 between the first sensor and the second sensor, electrical isolation between the first sensor and the second sensor is achieved through the insulating layer 01 and the spacer 3, ensuring that the two sensors can work simultaneously without affecting each other.

[0123] In one embodiment, refer to Figure 2 and Figure 3 Before forming the insulating layer 01 on the first wafer 1 and / or the second wafer 2, the method further includes:

[0124] An acceleration mass block 10 is formed on the first wafer 1;

[0125] A cavity 20 is formed on the second wafer 2.

[0126] In this embodiment, the first sensor is an accelerometer and the second sensor is a temperature sensor, as an example. When the first sensor is an accelerometer, an accelerometer mass block 10 needs to be formed on the first wafer 1, and a cavity 20 (equivalent to the limiting cavity 20 of the accelerometer) needs to be formed on the second wafer 2 to ensure that the accelerometer can work normally.

[0127] For example, an acceleration mass block 10 can be formed on the first wafer 1 by etching or deposition processes. For example, a cavity 20 can be formed on the second wafer 2 by etching processes.

[0128] In one embodiment, refer to Figure 4 The bonding of the first wafer 1 and the second wafer 2 specifically includes:

[0129] The acceleration mass block 10 formed on the first wafer 1 and the cavity 20 formed on the second wafer 2 are set accordingly.

[0130] In this embodiment, when an accelerometer mass 10 is formed on the first wafer 1 and a cavity 20 is formed on the second wafer 2, the accelerometer mass 10 and the cavity 20 need to be aligned during bonding of the first wafer 1 and the second wafer 2. For example, referring to the figure, the accelerometer mass 10 is located within the cavity 20. Or referring to... Figure 13 The acceleration mass 10 is located inside the protective cover 5, that is, the acceleration mass 10 is away from the cavity 20.

[0131] It should be noted that when the first sensor is an accelerometer, and the first wafer 1 and the second wafer 2 are bonded together, the thickness of the unetched first wafer 1 (etching to form the accelerometer mass) or the thickness of the first wafer 1 (depositing to form the accelerometer mass block 10) can be controlled to a reasonable height through CMP or etching processes. That is, the cantilever beam of the accelerometer needs to be controlled to a reasonable thickness. For example, the thickness of the cantilever beam of the accelerometer can be controlled to the micrometer level.

[0132] In one embodiment, refer to Figures 5-10 Forming the first sensor and the second sensor on the first wafer 1 specifically includes:

[0133] A mask layer 11 is formed on the surface of the first wafer 1 that is opposite to the second wafer 2;

[0134] A first electrical contact 15a and a second electrical contact 15b are formed on the first wafer 1;

[0135] A first contact hole 16a and a second contact hole 16b are formed on the mask layer 11;

[0136] A first electrical connection portion 17a is formed in the first contact hole 16a, and a second electrical connection portion 17b is formed in the second contact hole 16b. The first electrical connection portion 17a is connected to the first electrical contact portion 15a, and the second electrical connection portion 17b is connected to the second electrical contact portion 15b.

[0137] A protective layer 19 is formed on the mask layer 11;

[0138] A first through hole 18a and a second through hole 18b are formed on the protective layer 19. The first through hole 18a exposes the first electrical connection portion 17a, and the second through hole 18b exposes the second electrical connection portion 17b.

[0139] In this embodiment, a mask layer 11 is formed on the surface of the first wafer 1 that is opposite to the second wafer 2, that is, a mask layer 11 is grown on the first wafer 1.

[0140] After the mask layer 11 is fabricated, the first wafer 1 is patterned by photolithography and lightly doped with P-type material through processes such as ion implantation or diffusion to form a first lightly doped P-type region 12a of the first sensor and a second lightly doped P-type region 12b of the second sensor. After the first lightly doped P-type region 12a and the second lightly doped P-type region 12b of the first sensor are formed, after photolithography, a first heavily doped P-type region 13a of the first sensor and a second heavily doped P-type region 13b of the second sensor are formed through processes such as ion implantation or diffusion.

[0141] When the first sensor is an accelerometer, after forming a first heavily doped P-type region 13a on the first lightly doped P-type region 12a, a first electrical contact 15a of the first sensor is formed. For example, for the first sensor, a first heavily doped P-type region 13a is formed on the first lightly doped P-type region 12a, thus forming a first electrical contact 15a in the first sensor.

[0142] When the second sensor is a temperature sensor, after forming a second heavily doped P-type region 13b on the second lightly doped P-type region 12b, photolithography is performed. After photolithography, an N-type heavily doped region 14a is formed on the second lightly doped P-type region 12b through processes such as ion implantation or diffusion, thus forming the second electrical contact 15b of the second sensor. For example, for the second sensor, two heavily doped P-type regions 13b and one heavily doped N-type region 14a are formed on the second lightly doped P-type region 12b, thus forming three second electrical contacts 15b in the second sensor.

[0143] After the first electrical contact 15a and the second electrical contact 15b are formed, a first contact hole 16a is formed on the mask layer 11 by reactive ion etching (RIE). The opening position of the first contact hole 16a corresponds to the setting position of the first electrical contact 15a. For example, the opening position of the first contact hole 16a is opposite to the setting position of the first electrical contact 15a, and the first contact hole 16a can expose the first electrical contact 15a.

[0144] After the first electrical contact 15a and the second electrical contact 15b are formed, a second contact hole 16b is formed on the reactive ion etching (RIE) mask layer 11. The location of the second contact hole 16b corresponds to the location of the second electrical contact 15b. For example, the location of the second contact hole 16b is opposite to the location of the second electrical contact 15b, and the second contact hole 16b can expose the second electrical contact 15b. When multiple second electrical contacts 15b are formed, multiple second contact holes 16b need to be formed on the mask layer 11 accordingly. For example, three second contact holes 16b are formed on the mask layer 11.

[0145] After the first contact hole 16a and the second contact hole 16b are formed on the mask layer 11, metal interconnects (not shown in the figure) and electrical connections are formed by metal deposition or etching processes. For example, a first electrical connection 17a is formed in the first contact hole 16a, and the first electrical connection 17a and the first electrical contact 15a are connected together. For example, a second electrical connection 17b is formed in the second contact hole 16b, and the second electrical connection 17b and the second electrical contact 15b are connected together. When multiple second contact holes 16b are formed on the mask layer 11, a second electrical connection 17b is formed in each second contact hole 16b.

[0146] A protective layer 19 is formed on the side of the mask layer 11 facing away from the second wafer 2, i.e., the protective layer 19 is grown on the mask layer 11. For example, the material of the protective layer 19 can be silicon nitride. In the region of the protective layer 19 corresponding to the first electrical connection 17a and the second electrical connection 17b, it needs to be etched away to form through holes, exposing the electrical connections. For example, a portion of the protective layer 19 is etched to form a first through hole 18a, exposing the first electrical connection 17a. Alternatively, a portion of the protective layer 19 is etched to form a second through hole 18b, exposing the second electrical connection 17b.

[0147] In one embodiment, refer to Figure 11 The interval 3 formed between the first sensor and the second sensor specifically includes:

[0148] The protective layer 19, mask layer 11, part of the first wafer 1 and the insulating layer 01 between the first sensor and the second sensor are disconnected to form a spacer 3 between the first sensor and the second sensor.

[0149] In this embodiment, the spacer 3 is formed by patterning and etching the protective layer 19, the mask layer 11, a portion of the first wafer 1, and the insulating layer 01. For example, the spacer 3 is a through-slot structure. The spacer 3 can electrically isolate the first sensor and the second sensor, ensuring that the two sensors can work simultaneously without interfering with each other.

[0150] In one embodiment, refer to Figure 11 In addition to forming a gap 3 between the first sensor and the second sensor, the method also includes etching a release groove 4 on one side of the first sensor.

[0151] In this embodiment, when the first sensor is an acceleration sensor, a release groove 4 needs to be formed to release the movable structure of the acceleration sensor, such as the cantilever beam of the acceleration sensor.

[0152] It should be noted that in this embodiment, while forming the gap 3 between the first sensor and the second sensor, a release groove 4 can also be etched on one side of the first sensor. Specifically, forming the gap 3 and the release groove 4 can be processed using the same process. For example, both can be formed by patterning and etching the protective layer 19, the mask layer 11, a portion of the first wafer 1, and the insulating layer 01. Although the gap 3 and the release groove 4 are formed using the same process for the same part, the gap 3 needs to separate the first sensor and the second sensor. That is, the protective layer 19, the mask layer 11, the portion of the first wafer 1, and the insulating layer 01 between them are not connected in any way. The release groove 4 can be a hole structure, which only needs to release the cantilever beam of the accelerometer. The protective layer 19, the mask layer 11, the portion of the first wafer 1, and the insulating layer 01 on the first sensor side do not need to be completely disconnected.

[0153] In one embodiment, refer to Figure 11 The release groove 4 is specifically formed by etching on one side of the first sensor, including:

[0154] The protective layer 19, the mask layer 11, a portion of the first wafer 1, and the insulating layer 01 are sequentially etched through to form the release groove 4.

[0155] In this embodiment, when the first sensor is an accelerometer, the release groove 4 and the spacer 3 can be simultaneously formed by patterning and etching the protective layer 19, the mask layer 11, part of the first wafer 1 and the insulating layer 01, so as to simultaneously release the movable structure of the accelerometer and form the spacer 3 to ensure that the accelerometer and the second sensor are electrically isolated.

[0156] The above embodiments mainly describe the differences between the various embodiments. As long as the different optimization features between the various embodiments are not contradictory, they can be combined to form a better embodiment. For the sake of brevity, they will not be elaborated here.

[0157] While specific embodiments of this application have been described in detail by way of examples, those skilled in the art should understand that the above examples are for illustrative purposes only and are not intended to limit the scope of this application. Those skilled in the art should understand that modifications can be made to the above embodiments without departing from the scope and spirit of this application. The scope of this application is defined by the appended claims.

Claims

1. A method for fabricating a combined sensor, characterized in that, Includes the following steps: Provide a first wafer (1) and a second wafer (2); An insulating layer (01) is formed on the first wafer (1) and / or the second wafer (2); The first wafer (1) and the second wafer (2) are bonded together, and the first wafer (1) and the second wafer (2) are isolated by the insulating layer (01); A first sensor and a second sensor are formed on the first wafer (1); An interval (3) is formed between the first sensor and the second sensor to electrically isolate the first sensor and the second sensor; the protective layer (19), the mask layer (11), a portion of the first wafer (1) and the insulating layer (01) between the first sensor and the second sensor are disconnected to form the interval (3), and in the case that the first sensor is an acceleration sensor, a release groove (4) is formed on one side of the first sensor. The release groove (4) and the interval (3) are formed simultaneously by patterning and etching the protective layer (19), the mask layer (11), a portion of the first wafer (1) and the insulating layer (01).

2. The method for fabricating a combined sensor according to claim 1, characterized in that, Before forming the insulating layer (01) on the first wafer (1) and / or the second wafer (2), the following steps are also included: An acceleration mass block (10) is formed on the first wafer (1); A cavity (20) is formed on the second wafer (2).

3. The method for fabricating a combined sensor according to claim 2, characterized in that, Bonding the first wafer (1) and the second wafer (2) specifically includes: The acceleration mass block (10) formed on the first wafer (1) and the cavity (20) formed on the second wafer (2) are set accordingly.

4. The method for preparing the combined sensor according to any one of claims 1-3, characterized in that, Forming the first sensor and the second sensor on the first wafer (1) specifically includes: A mask layer (11) is formed on the surface of the first wafer (1) opposite to the second wafer (2). A first electrical contact (15a) and a second electrical contact (15b) are formed on the first wafer (1); A first contact hole (16a) and a second contact hole (16b) are formed on the mask layer (11); A first electrical connection portion (17a) is formed in the first contact hole (16a), and a second electrical connection portion (17b) is formed in the second contact hole (16b). The first electrical connection portion (17a) is connected to the first electrical contact portion (15a), and the second electrical connection portion (17b) is connected to the second electrical contact portion (15b). A protective layer (19) is formed on the mask layer (11). A first through hole (18a) and a second through hole (18b) are formed on the protective layer (19), the first through hole (18a) to expose the first electrical connection portion (17a) and the second through hole (18b) to expose the second electrical connection portion (17b).

5. The method for fabricating a combined sensor according to claim 4, characterized in that, A protective cover (5) is bonded to the accelerometer.

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