Fine polishing method, mask blank, and method for manufacturing semiconductor device
Patent Information
- Application Number
- CN202410071252.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-01-17
- Publication Date
- 2026-10-13
- Estimated Expiration
- 2044-01-17
AI Technical Summary
[0005]本发明的目的在于提供一种精抛光方法、掩模基版及半导体器件的制备方法,以解决如何提高衬底的平坦度的问题
[0029]综上所述,本发明提供一种精抛光方法、掩模基版及半导体器件的制备方法。相较于现有技术,本发明对所述衬底施加预设电压,以使所述衬底表面呈正电势;或,在所述衬底的表面形成导电膜层,并向所述导电膜层施加预设电压,以使所述导电膜层表面呈正电势。其中,本发明利用所述衬底或所述导电膜层材料的导电性,使正电荷汇集于所述衬底或所述导电膜层的表面。且基于所述衬底表面的凸起形貌,所述导电膜层的表面也具有凸起形貌,则大量的正电荷会密集地汇聚于所述衬底或所述导电膜层表面上的凸起结构上,从而能够在电子束抛光过程中精准捕捉电子束,以利用电子束进行靶向轰击。且在所述电子束的轰击过程中,高能电子的动能转换为热能和机械能,并作用于所述凸出结构上,以实现对所述衬底或所述导电膜层的原子级精准抛光。且相较于现有工艺中的其他精抛设备,电子束抛光设备的成本较低,利于降低制备成本。
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Figure CN117894679B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of integrated circuit manufacturing technology, and in particular to a fine polishing method, a mask substrate, and a method for fabricating semiconductor devices. Background Technology
[0002] With the continuous development of semiconductor technology, photolithography has undergone iterations from ultraviolet (UV) lithography to deep ultraviolet (DUV) lithography and extreme ultraviolet (EUV) lithography. EUV lithography uses extreme ultraviolet light with wavelengths of 10nm to 14nm as the light source, extending the lithography technology to feature sizes below 32nm. Furthermore, because most materials have a high absorption rate for EUV at a wavelength of 13.5nm, EUV lithography employs a reflective lithography system, and the EUV mask substrate is also a reflective mask substrate.
[0003] Please see Figure 1 To improve reflectivity, existing EUV mask substrates stack multiple Mo / Si Bragg reflector layers 101 (e.g., more than 50 layers) on the mask substrate 100 to enhance reflection through destructive interference. A capping layer 102 and several absorption layers 103 are also stacked on the Mo / Si Bragg reflector layers 101. The capping layer 102 is typically made of ruthenium (Ru) to protect and prevent oxidation of the Mo / Si Bragg reflector layer 101. The absorption layers 103 are typically made of Ta-based materials (e.g., TaBO, TaN, TaBN) or Cr-based materials (e.g., CrN, CrON) to absorb EUV. Furthermore, in other EUV mask substrates, a hard mask layer is deposited on the absorption layer 103 to improve the lithography patterning effect. Therefore, EUV mask substrates require very high flatness of the mask substrate 100. Figure 1 and Figure 2 As shown, if the surface of the mask substrate 100 has defects such as protruding structures P and / or pits T, these defects will not only become increasingly prominent on the surfaces of each film layer on the mask substrate 100, but will also increase in size with the increase in the number of film layers, and may even cause problems such as defect position shift, seriously affecting EUV lithography performance. However, existing fine polishing processes are not only expensive in terms of equipment cost, but also difficult to meet the flatness requirements of EUV mask substrates.
[0004] Therefore, a new fine polishing method is urgently needed to improve the flatness of the substrate. Summary of the Invention
[0005] The purpose of this invention is to provide a fine polishing method, a mask substrate, and a method for fabricating semiconductor devices, so as to solve the problem of how to improve the flatness of the substrate.
[0006] To solve the above-mentioned technical problems, the present invention provides a fine polishing method, comprising:
[0007] Provide a substrate;
[0008] A preset voltage is applied to the substrate to make the surface of the substrate have a positive potential; or, a conductive film layer is formed on the surface of the substrate, and a preset voltage is applied to the conductive film layer to make the surface of the conductive film layer have a positive potential.
[0009] At least the surface of the conductive film layer is polished using an electron beam polishing process.
[0010] Optionally, in the fine polishing method, before applying a preset voltage to the substrate to make the substrate surface positively potentialed; or before forming a conductive film layer on the substrate surface and applying a preset voltage to the conductive film layer to make the conductive film layer surface positively potentialed, the fine polishing method further includes:
[0011] A carbon spin-coating process is performed on the substrate surface to fill the pits on the substrate surface.
[0012] Optionally, in the fine polishing method, when the substrate is a conductor, a preset voltage is applied to the substrate to make the surface of the substrate have a positive potential; when the substrate is an insulator or a semiconductor, a conductive film layer is formed on the surface of the substrate, and a preset voltage is applied to the conductive film layer to make the surface of the conductive film layer have a positive potential.
[0013] The process of forming a conductive film layer on the surface of the substrate includes:
[0014] The conductive film layer is formed on the substrate surface using a metal ion implantation process to make the substrate surface conductive; or, the conductive film layer is formed on the substrate surface using a thin film deposition process.
[0015] Optionally, in the fine polishing method, during the process of polishing at least the surface of the conductive film layer using an electron beam polishing process, the protruding structures on the surface of the conductive film layer are removed by electron beam targeting.
[0016] Optionally, in the fine polishing method, the electron beam polishing process is performed using a scanning electron microscope.
[0017] Based on the same inventive concept, the present invention also provides a method for preparing a mask substrate, comprising:
[0018] Step 1: Provide a substrate;
[0019] Step 2: Form at least one Bragg reflective layer on the surface of the substrate;
[0020] Step 3: Apply a preset voltage to the Bragg reflector layer, and ensure that at least the surface of the top Bragg reflector layer is at a positive potential;
[0021] Step 4: Polish the surface of the Bragg reflector layer located at the top layer using an electron beam polishing process;
[0022] Step 5: Form several Bragg reflective layers on the top Bragg reflective layer, and repeat steps 3 to 4 until the flatness of the surface of the top Bragg reflective layer meets the preset requirements.
[0023] Optionally, in the method for preparing the mask substrate, before performing step two, a carbon spin-coating process is performed on the substrate surface to fill the pits on the substrate surface.
[0024] Optionally, in the method for preparing the mask substrate, during step four, an electron beam is used to target and remove the protruding structures on the surface of the Bragg reflector layer located at the top layer.
[0025] Optionally, in the method for preparing the mask substrate, after performing step five and after the number of Bragg reflective layers formed meets the preset requirements, the method for preparing the mask substrate further includes:
[0026] A capping layer, several absorption layers, and a hard mask layer are sequentially formed on the Bragg reflective layer located at the top layer; and a back conductive layer is formed on the bottom surface of the substrate.
[0027] At least one patterning process is performed on the Bragg reflective layer, the capping layer, the absorption layer, and the hard mask layer on the surface of the substrate to form a mask substrate.
[0028] Based on the same inventive concept, the present invention also provides a method for fabricating a semiconductor device, including the aforementioned fine polishing method.
[0029] In summary, this invention provides a fine polishing method, a mask substrate, and a method for fabricating semiconductor devices. Compared to existing technologies, this invention applies a preset voltage to the substrate to make the substrate surface positively charged; or, a conductive film layer is formed on the surface of the substrate, and a preset voltage is applied to the conductive film layer to make the conductive film layer surface positively charged. This invention utilizes the conductivity of the substrate or the conductive film layer material to allow positive charges to accumulate on the surface of the substrate or the conductive film layer. Furthermore, based on the raised morphology of the substrate surface, the surface of the conductive film layer also has a raised morphology, so a large number of positive charges will densely accumulate on the raised structures on the surface of the substrate or the conductive film layer, thereby enabling precise capture of the electron beam during electron beam polishing for targeted bombardment. During the electron beam bombardment process, the kinetic energy of high-energy electrons is converted into thermal and mechanical energy, which acts on the raised structures to achieve atomic-level precision polishing of the substrate or the conductive film layer. Moreover, compared to other fine polishing equipment in existing processes, electron beam polishing equipment has lower costs, which helps reduce manufacturing costs. Attached Figure Description
[0030] Those skilled in the art will understand that the accompanying drawings are provided to better understand the invention and do not constitute any limitation on the scope of the invention.
[0031] Figure 1 It is a protruding defect that exists in the mask substrate in the existing technology.
[0032] Figure 2 These are pit defects present in existing mask substrates.
[0033] Figure 3 This is a flowchart of the fine polishing method in an embodiment of the present invention.
[0034] Figure 4 This is a schematic diagram of the substrate structure in an embodiment of the present invention.
[0035] Figure 5 This is a schematic diagram of the structure forming the repair layer in an embodiment of the present invention.
[0036] Figure 6 This is a schematic diagram of applying a preset voltage to a conductive substrate in an embodiment of the present invention.
[0037] Figure 7 This is a schematic diagram of the structure in which a conductive film layer is formed on the surface of a substrate in an embodiment of the present invention.
[0038] Figure 8 This is a schematic diagram of a structure in which a conductive film layer is formed on the surface of a substrate according to an embodiment of the present invention.
[0039] Figure 9This is a schematic diagram of another structure in which a conductive film layer is formed on the substrate surface in an embodiment of the present invention.
[0040] Figure 10 This is a schematic diagram of the structure of an electron beam polished conductive substrate in an embodiment of the present invention.
[0041] Figure 11 This is a schematic diagram of the conductive substrate after electron beam polishing in an embodiment of the present invention.
[0042] Figure 12 This is a schematic diagram of the structure of the conductive film layer polished by electron beam in an embodiment of the present invention.
[0043] Figure 13 This is a schematic diagram of the structure of the conductive film layer after electron beam polishing in an embodiment of the present invention.
[0044] Figure 14 This is a flowchart of the mask substrate preparation method in an embodiment of the present invention.
[0045] Figure 15 This is a schematic diagram of the Bragg reflector layer after electron beam polishing in an embodiment of the present invention.
[0046] Figure 16 This is a schematic diagram of the structure of the electron beam polished Bragg reflector layer in an embodiment of the present invention.
[0047] Figure 17 This is a schematic diagram of the Bragg reflector layer that meets the flatness requirements in an embodiment of the present invention.
[0048] Figure 18 This is a schematic diagram of the mask base plate in an embodiment of the present invention.
[0049] And, in the attached image:
[0050] 100 - Mask substrate; 101 - Mo / Si Bragg reflector layer; 102 - Capping layer; 103 - Absorbing layer;
[0051] 200-Substrate; 201-Repair layer; 202-Conductive film layer; 203-Bragg reflector layer; 204-Cover layer; 205-Absorbing layer; 206-Hard mask layer; 207-Back conductive layer;
[0052] T - pit; P - protrusion on substrate surface; W - protrusion of conductive film layer. Detailed Implementation
[0053] To make the objectives, advantages, and features of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale, and are only used to facilitate and clarify the explanation of the embodiments of this invention. Furthermore, the structures shown in the drawings are often part of the actual structures. In particular, different figures may emphasize different aspects and may sometimes use different scales.
[0054] As used in this invention, the singular forms “a,” “an,” and “the” include plural objects; the term “or” is generally used to mean “and / or”; the term “a number” is generally used to mean “at least one”; and the term “at least two” is generally used to mean “two or more”. Furthermore, the terms “first,” “second,” and “third” are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as “first,” “second,” or “third” may explicitly or implicitly include one or at least two of that feature. The terms “installed,” “connected,” and “linked” should be interpreted broadly; for example, they may refer to a fixed connection, a detachable connection, or an integral part; they may refer to a mechanical connection or an electrical connection; they may refer to a direct connection or an indirect connection through an intermediate medium; they may refer to the internal communication of two elements or the interaction between two elements. Furthermore, as used in this invention, the phrase "one element is disposed on another element" generally only indicates that there is a connection, coupling, cooperation, or transmission relationship between the two elements, and the connection, coupling, cooperation, or transmission between the two elements can be direct or indirect through an intermediate element. It should not be construed as indicating or implying a spatial positional relationship between the two elements, i.e., one element can be located arbitrarily inside, outside, above, below, or to one side of the other element, unless otherwise explicitly stated. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.
[0055] Please see Figure 3 This embodiment provides a fine polishing method, including:
[0056] Step 1 S10: Provide a substrate;
[0057] Step 2 S11: Apply a preset voltage to the substrate to make the surface of the substrate have a positive potential; or, form a conductive film layer on the surface of the substrate and apply a preset voltage to the conductive film layer to make the surface of the conductive film layer have a positive potential.
[0058] Step 3 S12: Polish at least the surface of the substrate or the conductive film layer using an electron beam polishing process.
[0059] It is understood that the fine polishing method involves applying a preset voltage to the substrate to make the substrate surface positively charged; or, forming a conductive film layer on the surface of the substrate and applying a preset voltage to the conductive film layer to make the conductive film layer surface positively charged. The fine polishing method utilizes the conductivity of the material to cause positive charges to accumulate on the surface of the substrate or the conductive film layer. Furthermore, based on the raised morphology of the substrate surface, the surface of the conductive film layer also has a raised morphology, so a large number of positive charges will densely accumulate on the raised structures on the surface of the substrate or the conductive film layer. This allows for precise capture of the electron beam during electron beam polishing, enabling targeted bombardment. During the electron beam bombardment process, the kinetic energy of high-energy electrons is converted into thermal and mechanical energy, which acts on the raised structures to achieve atomic-level precision polishing of the substrate or the conductive film layer. Compared to other fine polishing equipment in existing processes, electron beam polishing equipment has a lower cost, which helps reduce manufacturing costs.
[0060] The following is in conjunction with the appendix Figures 3 to 13 The fine polishing method provided in this embodiment will be explained in detail.
[0061] Specifically, the fine polishing method includes:
[0062] Step 1 S10: Please refer to Figure 4 and Figure 5 Provide a substrate 200.
[0063] In this embodiment, the substrate 200 refers to a semiconductor structure, mask substrate, or other plate to be finely polished. This embodiment does not limit the specific material of the substrate 200; it can be a quartz glass substrate, soda lime substrate, borosilicate substrate, aluminum silicate substrate, silicon substrate, or silicon carbide substrate, etc., used as a mask substrate base; or any substrate known to those skilled in the art for supporting semiconductor integrated circuit components. It can be a bare die, a wafer processed by epitaxial growth, or a circuit layer or other semiconductor thin film with devices already formed. Examples include gallium nitride thin films, silicon-on-insulator (SOI) substrates, bulk silicon substrates, germanium substrates, germanium-silicon substrates, indium phosphide (InP) substrates, gallium arsenide (GaAs) substrates, or germanium-on-insulator substrates, etc.
[0064] Furthermore, in actual manufacturing processes, the surface of the substrate 200 typically accumulates defects such as contaminant particles, pits (T), and protrusions (P), severely affecting the surface flatness and roughness of the substrate 200. Preferably, when the surface roughness of the substrate 200 is severe, it can be coarsely polished using processes such as chemical mechanical polishing, followed by the fine polishing method provided in this embodiment. Alternatively, the fine polishing method can be directly applied to the substrate 200. Preferably, before fine polishing, the surface of the substrate 200 can be cleaned using processes such as wet cleaning to at least remove contaminant particles. However, even after cleaning, the surface of the substrate 200 still contains pits (T) and protrusions (P). It should be noted that the pits (T) referred to in this embodiment include, but are not limited to, deep grooves, minor scratches, and cracks; the protrusions (P) are not limited to tiny particles protruding above the surface of the substrate 200, but can also be areas with a large inclination.
[0065] Step 2 S11: Please refer to Figures 5 to 9 A preset voltage is applied to the substrate 200 to make the surface of the substrate 200 have a positive potential; or, a conductive film layer 202 is formed on the surface of the substrate 200, and a preset voltage is applied to the conductive film layer 202 to make the surface of the conductive film layer 202 have a positive potential.
[0066] For preferred options, please refer to [link / reference]. Figure 5 After cleaning and drying the surface of the substrate 200, and before performing step two S11, the fine polishing method further includes performing a carbon spin-on-carbon (SOC) coating process on the surface of the substrate 200 to fill the pits T on the surface of the substrate 200. Specifically, the carbon spin-on-carbon coating process uses a high-carbon content polymer solution as a coating material under high temperature conditions to coat a repair layer 201 on the surface of the substrate 200, and uses the spin-coated repair layer 201 to fill deep gaps on the surface of the substrate 200 to repair the pits T, improve the flatness of the surface of the substrate 200, and reduce its roughness. This embodiment does not limit the specific process parameters of the carbon spin-on-carbon coating process, nor does it limit the specific material and thickness of the repair layer 201. For example, the thickness of the repair layer 201 ranges from 10 nm to 100 nm, and it undergoes soft baking at 170°C and hard baking at temperatures greater than 350°C.
[0067] Furthermore, the substrate 200 provided in this embodiment can be a conductor, semiconductor, or insulator. Please refer to [link / reference]. Figure 6When the substrate 200 is a conductor, for example, if the substrate 200 is made of metal, a preset voltage can be directly applied to the substrate 200 to attract positive charges to its surface, making the surface of the substrate 200 have a positive potential. Furthermore, according to the principle of tip discharge, charges tend to accumulate at the tip. Therefore, a large number of positive charges will densely accumulate on the surface of the protruding structure P of the substrate 200, forming a strong potential. This makes it easier to capture electron beams at the protruding structure P on the surface of the substrate 200, facilitating targeted electron beam bombardment and achieving precise polishing.
[0068] Please see Figures 7 to 9 In practical processes, the substrate 200 used as the base plate for semiconductor devices or mask substrates is generally a semiconductor or insulator with poor conductivity. Since the surface of the substrate 200 is uncharged, direct electron beam polishing makes it difficult for the electron beam to achieve targeted bombardment, thus failing to specifically remove the protruding structures P on the substrate 200 surface, resulting in limited overall polishing effect. If a voltage is directly applied to the surface of the substrate 200 to achieve targeted electron beam bombardment, due to the poor conductivity of the substrate 200, even a sufficiently large bias voltage is insufficient to accumulate enough positive charge on the protruding structures P, and a large bias voltage can easily damage the substrate 200, inducing new defects. Therefore, to balance polishing effect and avoid the formation of new defects, the fine polishing method provided in this embodiment performs a conductive treatment on the surface of the substrate 200. That is, the conductive film layer 202 is formed in the surface of the substrate 200 by a metal ion implantation process, so that the surface of the substrate 200 is conductive; or, the conductive film layer 202 is formed on the surface of the substrate 200 by a thin film deposition process.
[0069] Specifically, such as Figure 7 As shown, a metal ion implantation process is used to implant metal ions toward the surface of the substrate 200, so that the metal ions are implanted and diffused into a certain depth region within the repair layer 201 and on the surface of the substrate 200. Based on this, the portion of the substrate 200 and the repair layer 201 doped with the metal ions has better conductivity, serving as the conductive film layer 202, which can be used in conjunction with an electron beam in subsequent polishing processes to achieve high-precision, rapid polishing. Alternatively, as... Figure 8 As shown, a conductive film layer 202 is deposited separately on the surface of the substrate 200 using a thin-film deposition process. For example, a silicon layer and a molybdenum layer are sequentially deposited on the surface of the substrate 200 using processes such as chemical vapor deposition, atomic layer deposition, or plasma sputtering deposition to form a Bragg reflective layer as the conductive film layer 202. It should be noted that the silicon layer in the Bragg reflective layer can replace... Figure 5The repair layer 201, formed by carbon spin coating, also serves to fill and repair the pits T on the surface of the substrate 200, thereby optimizing the flatness of the substrate 200 surface. Furthermore, the Bragg reflective layer formed by the combination of the silicon layer and the molybdenum layer has excellent conductivity. Using it as the conductive film layer 202 not only improves the effect of electron beam polishing and achieves high-precision polishing, but also simplifies the process flow. That is, the Bragg reflective layer serves as both the conductive film layer 202 and the reflective film layer in the EUV mask substrate. Of course, to ensure sufficient repair of the substrate 200 surface, it can be done as follows... Figure 9 As shown, a repair layer 201 is first spin-coated onto the surface of the substrate 200, and then a Bragg reflective layer is formed on the repair layer 201 to serve as the conductive film layer 202. It should be noted that this embodiment does not limit the formed conductive film layer 202 to be a film structure to be formed on the surface of the substrate 200, or a film structure that does not affect the function of the substrate 200, so as to be integrated with the substrate 200 into a whole as the base plate of the device.
[0070] Furthermore, since the conductive film layer 202 formed on the surface of the substrate 200 has good conductivity, applying the preset voltage to the conductive film layer 202 through an external circuit can attract positive charges to the surface of the conductive film layer 202, making the surface of the conductive film layer 202 have a positive potential. Because the surface of the substrate 200 has a protruding structure P, the top surface of the conductive film layer 202 formed on the surface of the substrate 200 also has a protruding morphology. According to the principle of tip discharge, when the surface of the conductive film layer 202 has a positive potential, a large number of positive charges will densely converge on the protruding structure W on the surface of the conductive film layer 202. In other words, compared with other flat surfaces of the conductive film layer 202, the number of positive charges on the protruding structure W on the surface of the conductive film layer 202 is relatively large, therefore the potential of the protruding structure W on the surface of the conductive film layer 202 is stronger, making it easier to capture electron beams.
[0071] Furthermore, this embodiment does not limit the specific value of the preset voltage, and it can be set according to factors such as the conductivity of the substrate 200 or the conductive film layer 202. For example, a preset voltage of 100V to 1KV is applied to the substrate 200 or the conductive film layer 202, which has better conductivity.
[0072] Step 3 S12: Please refer to Figures 10 to 13 The surface of the substrate 200 or the conductive film layer 202 is polished at least using an electron beam polishing process.
[0073] Preferably, a scanning electron microscope (SEM) is used to perform the electron beam polishing process. During polishing, the SEM provides several electron beams. A portion of the electron beams is used for high-resolution observation to monitor the polishing effect; the remaining electron beams are used to target and remove protruding structures P on the surface of the substrate 200, or protruding structures W on the surface of the conductive film layer 202, thus achieving the polishing function. Figure 10 and Figure 12 As shown, given the abundance of positive charges accumulated on the protruding structure P on the surface of the substrate 200 or the protruding structure W on the surface of the conductive film layer 202, which have better conductivity, when the high-energy electron beam bombards the protruding structure, a large number of electrons are attracted to the surface of the protruding structure to collide with it. Since high-speed electrons have wave properties, when high-energy electrons propagate into the protruding structure, they undergo elastic collisions with the atoms within the protruding structure, triggering a series of multi-level collisions. During these collisions, some atoms are knocked out of the protruding structure, achieving atomic-level removal of the protruding structure using mechanical force. Furthermore, the electron collisions also transfer heat energy, i.e., the kinetic energy of the electrons is converted into heat energy. When a large number of electrons accumulate, the resulting heat is high enough to melt and / or vaporize the protruding structure, thereby using the heat energy to polish the surface of the substrate 200 or the conductive film layer 202 with better conductivity.
[0074] Please see Figure 11 and Figure 13 The substrate 200 or the conductive film layer 202, after being polished by the electron beam polishing process, exhibits better flatness and roughness. It should be noted that when the conductive film layer 202 is formed on the surface of the substrate 200, and based on the varying degrees of protrusion of the protruding structure P on the surface of the substrate 200, the thickness of the conductive film layer 202 removed by the electron beam differs. Therefore, to ensure the overall flatness of the polished structure's surface, only a portion of the conductive film layer 202 thickness is removed in some areas during the polishing process, while other areas may be polished and expose the substrate 200. However, polishing the conductive film layer 202 and polishing the substrate 200 are based on the same principle: utilizing the mechanical and thermal energy converted from high-energy electrons to remove the corresponding material.
[0075] Furthermore, during the polishing process, the SEM can adaptively and automatically adjust process parameters such as the energy, power, irradiation angle, and polishing time of the electron beam according to the different degrees of protrusion of the protruding structure. This embodiment does not specifically limit this. Preferably, the electron beam polishing process is performed in a vacuum environment to avoid elements in the external environment from causing contamination or oxidation to the surface of the substrate 200 and the conductive film layer 202. For example, an electron source with a negative pressure range of -10KV to 500KV is used, and the vacuum pressure is less than or equal to 10 kV. -6 Torr. It should be noted that in other embodiments, other devices such as an electron gun may be used to provide the electron beam for polishing.
[0076] In summary, the fine polishing method provided in this embodiment utilizes carbon spin coating or other deposition processes to form a repair layer 201 on the surface of the substrate 200 to fill and repair the pit T defects on the surface of the substrate 200. Furthermore, a preset voltage is applied to the conductive substrate 200 to make its surface positively charged; or, the surface of the substrate 200 with poor conductivity is first conductiveized by forming the conductive film layer 202 within or on the surface of the substrate 200, thereby optimizing the conductivity of the substrate 200 surface. Then, a preset voltage provided by an external circuit makes the surface of the conductive film layer 202 positively charged. Because the protruding structures of the substrate 200 or the conductive film layer 202, which have better conductivity, will have a large amount of positive charge densely concentrated on their surfaces, they are easily captured by electron beams. Therefore, during electron beam polishing, a large number of high-energy electrons can target and bombard the protruding structures, achieving atomic-level high-precision polishing of the substrate 200 or the conductive film layer 202.
[0077] Based on the same inventive concept, this embodiment also provides a method for fabricating a semiconductor device. The method for fabricating the semiconductor device includes the aforementioned fine polishing method. That is, during the integrated circuit fabrication process, the fine polishing method can be used to polish the semiconductor device entirely or partially. Furthermore, during the fabrication of the semiconductor device, the substrate 200 can be polished on one side or both sides; this embodiment does not specifically limit this. Further, the fine polishing method provided in this embodiment can be applied to the manufacturing fields of other devices; this embodiment does not specifically limit this application.
[0078] Based on the same inventive concept, this embodiment also provides a method for preparing a mask substrate. The method for preparing the mask substrate employs the aforementioned fine polishing method to optimize the flatness and roughness of the structure, thereby improving the performance of the mask substrate. For details, please refer to... Figures 4-5 , Figures 8-9 , Figures 12-18 The method for preparing the mask substrate includes:
[0079] Step 1 S20: Please refer to Figure 4 and Figure 5 Provide a substrate 200.
[0080] Based on the application requirements of the mask substrate, the substrate 200 is made of a material with a low coefficient of thermal expansion, preferably quartz. Furthermore, because the photolithography precision of the mask substrate is as high as tens of nanometers or even several nanometers, the requirements for the flatness and roughness of the substrate 200 are extremely high. Preferably, before performing step two S21, the substrate 200 is first rough-polished using processes such as chemical mechanical polishing, and then the surface of the substrate 200 is cleaned using a wet cleaning process to at least remove contaminant particles from the surface of the substrate 200. After cleaning and drying the substrate 200, a repair layer 201 is formed on the surface of the substrate 200 using a carbon spin-coating process to fill the pits T on the surface of the substrate 200, thereby repairing the deep gaps in the substrate 200.
[0081] Step 2 S21: Please refer to Figure 8 and Figure 9 At least one Bragg reflective layer is formed on the surface of the substrate 200.
[0082] It should be noted that this embodiment does not limit the specific type of the mask substrate. For example, the mask substrate is an EUV mask substrate. Since the EUV mask substrate is a reflective mask substrate, to enhance the reflectivity of the EUV mask substrate, dozens of Bragg reflective layers need to be formed on the surface of the substrate 200, and each Bragg reflective layer includes a stacked silicon layer and a molybdenum layer. Because the wavelength of EUV is extremely short, only about 13.5 nm, to utilize the principle of destructive interference to enhance the reflectivity, the thickness of each Bragg reflective layer is preferably one-quarter of the light wavelength, i.e., the thickness range is 3 nm to 4 nm. This embodiment does not limit the specific process used to form the Bragg reflective layer; options include chemical vapor deposition, atomic layer deposition, or plasma sputtering deposition, etc.
[0083] Furthermore, the Bragg reflector layer has a certain degree of conductivity; therefore, the at least one Bragg reflector layer formed on the surface of the substrate 200 is equivalent to the conductive film layer 202 formed in the above-described fine polishing method. It can be seen that the mask substrate fabrication method provided in this embodiment cleverly utilizes the required film structure in conjunction with subsequent electron beam polishing, simplifying the process flow and improving fabrication efficiency.
[0084] Step 3 S22: Please refer to Figure 8 and Figure 9 A preset voltage is applied to the Bragg reflector, and at least the surface of the top Bragg reflector is at a positive potential.
[0085] Specifically, a preset voltage is applied to the Bragg reflector layer formed on the surface of the substrate 200 via an external circuit, causing a large amount of positive charge to accumulate on the surface of the top layer of the Bragg reflector layer. Since the surface of the substrate 200 has a protruding structure P, the top surface of the Bragg reflector layer deposited on the substrate 200 also has a protruding morphology. Based on the principle of tip discharge, the positive charge on the surface of the Bragg reflector layer will densely converge at the protruding morphology location on the top surface of the Bragg reflector layer. Therefore, the potential at the protruding morphology location on the top surface of the Bragg reflector layer is higher than that in other flat areas of the top surface of the Bragg reflector layer, making it easier to capture electron beams. Furthermore, this embodiment does not limit the specific value of the preset voltage and can be set according to factors such as the conductivity of the Bragg reflector layer.
[0086] Step 4 S23: Please refer to Figure 12 , Figure 13 , Figure 15 and Figure 16 The surface of the Bragg reflector layer located at the top layer is polished using an electron beam polishing process.
[0087] Based on the polishing principle of the above-described fine polishing method, a high-energy electron beam targets and bombards the protruding morphological positions on the surface of the Bragg reflector layer. This utilizes the mechanical and thermal energy converted from the beam's kinetic energy to polish the surface of the Bragg reflector layer, achieving atomic-level polishing precision and high efficiency. In this embodiment, the process parameters for electron beam polishing are not limited and can be dynamically adjusted adaptively according to the degree of protrusion on the surface of the Bragg reflector layer during the polishing process. Preferably, SEM is used to monitor and polish the Bragg reflector layer 203.
[0088] It should be noted that the surface of the Bragg reflective layer 203 after polishing may be as follows: Figure 13 The flatness requirement shown may also be achieved as indicated by the following: Figure 15 The required flatness of the mask substrate was not achieved, meaning the surface of the Bragg reflector layer still exhibited a certain degree of protrusion. Continuing with high-energy electron beam polishing might cause further damage to the Bragg reflector layer. To address this, the mask substrate fabrication method provided in this embodiment utilizes the multi-layered Bragg reflector layer structure on the substrate 200 surface to perform progressive electron beam polishing on different layers. This ensures the quality of the layered structure while meeting the high flatness requirement of the mask substrate (see the description of step five, S24 below for details).
[0089] Step 5 S24: Please refer to Figure 12 , Figure 15 , Figure 16 and Figure 17 Several layers of the Bragg reflective layer 203 are formed on the top layer of the Bragg reflective layer 203, and steps three S22 to four S23 are repeated until the flatness of the surface of the top layer of the Bragg reflective layer 203 meets the preset requirements.
[0090] For example, if 50 layers of the Bragg reflector layer 203 need to be deposited on the substrate 200, after depositing one layer of the Bragg reflector layer 203 in step two S21, the protruding structures on the surface of the first layer of the Bragg reflector layer 203 are targeted and bombarded to polish the first layer of the Bragg reflector layer 203. Due to the high flatness requirement of the mask substrate, it is difficult to achieve the required flatness of the mask substrate by only performing electron beam polishing on the first layer of the Bragg reflector layer 203. Therefore, after polishing the first layer of the Bragg reflector layer 203, several more layers of the Bragg reflector layer 203 are deposited, for example, 5 layers of the Bragg reflector layer 203. Then, the preset voltage is applied to the sixth layer of the Bragg reflector layer 203 located on the top surface to make the top surface of the sixth layer of the Bragg reflector layer 203 have a positive potential, and then an electron beam is used to perform another polishing process on the top surface of the sixth layer of the Bragg reflector layer 203. This process is repeated, with electron beam polishing performed once every 5 Bragg reflector layers 203 formed, until the flatness of the surface of the top Bragg reflector layer 203 meets the preset requirements.
[0091] like Figure 17As shown, assuming that the surface of the twenty-sixth Bragg reflector layer 203 meets the flatness requirements of the mask substrate when deposited to the twenty-sixth layer, the remaining Bragg reflector layers 203 continue to be deposited on the surface of the twenty-sixth layer. If the surface of the fiftieth Bragg reflector layer 203 meets the flatness requirements of the mask substrate when deposited to the fiftieth layer, the deposition of all Bragg reflector layers 203 is completed, and other film structures are prepared. Furthermore, if the top surface of the Bragg reflector layer 203 has a high degree of protrusion, the energy of the electron beam can be adaptively increased, and / or the number of electron beam polishing operations can be increased, reducing the number of Bragg reflector layers 203 between two polishing processes. This improves the polishing effect and efficiency, avoiding a situation where the flatness of the surface of the top Bragg reflector layer 203 still does not meet the preset requirements when all layers of Bragg reflector layers 203 are completed. In this embodiment, the number of Bragg reflective layers 203 deposited between two adjacent polishing processes is not limited. Polishing can be performed once every three layers or once every ten layers, and can be adaptively adjusted according to the degree of protrusion of the surface of the Bragg reflective layer 203.
[0092] Please see Figure 18 Based on the repeated electron beam polishing process, the surface of the top Bragg reflective layer 203 has better flatness. After the predetermined number of Bragg reflective layers 203 are fabricated, the method for fabricating the mask substrate further includes: sequentially forming a capping layer 204, several absorption layers 205, and a hard mask layer 206 on the top Bragg reflective layer 203; and forming a back conductive layer 207 on the bottom surface of the substrate 200. The capping layer 204 protects the Bragg reflective layer 203 from oxidation affecting its reflectivity; the absorption layers 205 absorb the lithography beam; the hard mask layer 206 enhances the lithography patterning effect; and the back conductive layer 207 provides conductivity, preventing electrostatic or electromagnetic interference from affecting the lithography effect. Subsequently, at least one patterning process is performed on the Bragg reflective layer 203, the capping layer 204, the absorption layer 205, and the hard mask layer 206 on the surface of the substrate 200 to form the mask substrate. It should be noted that this embodiment does not specifically limit the material, thickness, formation process, or patterning process of the capping layer 204, the absorption layer 205, the hard mask layer 206, and the back conductive layer 207.
[0093] In summary, the fine polishing method, mask substrate, and semiconductor device fabrication method provided in this embodiment utilizes carbon spin coating or other deposition processes to form a repair layer 201 on the surface of the substrate 200 to fill and repair pit T defects on the surface of the substrate 200. Furthermore, a preset voltage is directly applied to the surface of the substrate 200 with good conductivity to make the surface of the substrate 200 positively charged; or, for a substrate 200 with poor conductivity, a conductive film layer 202 is first formed on the surface of the repair layer 201, and then a preset voltage is applied to the conductive film layer 202 to utilize its conductivity to allow positive charges to accumulate on the surface of the conductive film layer 202. Moreover, because the protrusions on the surface of the substrate 200 or the conductive film layer 202 with good conductivity can densely accumulate a large amount of positive charge, and the accumulated large amount of positive charge easily captures an electron beam, the large amount of positive charge helps the high-energy electron beam to target and bombard the protrusions, achieving rapid and precise polishing of the protrusions. In the process of preparing the mask substrate, the method provided in this embodiment optimizes the flatness of the mask substrate by repeatedly depositing and polishing the Bragg reflective layer 203. Preferably, the process of repeatedly depositing and polishing the conductive film layer 202 can also be applied to the preparation of other mask substrates or semiconductor devices.
[0094] Furthermore, it should be understood that although the present invention has been disclosed above with reference to preferred embodiments, these embodiments are not intended to limit the present invention. For any person skilled in the art, many possible variations and modifications can be made to the technical solutions of the present invention based on the disclosed technical content, or equivalent embodiments can be modified accordingly, without departing from the scope of the present invention. Therefore, any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of the present invention, without departing from the content of the present invention, shall still fall within the scope of protection of the present invention.
Claims
1. A method for preparing a mask substrate, characterized in that, include: Step 1: Provide a substrate; Step 2: Form at least one Bragg reflective layer on the surface of the substrate; Step 3: Apply a preset voltage to the Bragg reflector layer, and ensure that at least the surface of the top Bragg reflector layer is at a positive potential; Step 4: Polish the surface of the Bragg reflector layer located at the top layer using an electron beam polishing process; Step 5: Form several Bragg reflective layers on the top Bragg reflective layer, and repeat steps 3 to 4 until the flatness of the surface of the top Bragg reflective layer meets the preset requirements.
2. The method for preparing a mask substrate according to claim 1, characterized in that, Before performing step two, a carbon spin-coating process is performed on the substrate surface to fill the pits on the substrate surface.
3. The method for preparing a mask substrate according to claim 1 or 2, characterized in that, During step four, an electron beam is used to target and remove the protruding structures on the surface of the top Bragg reflector layer.
4. The method for preparing a mask substrate according to claim 1 or 2, characterized in that, After performing step five, and after the number of Bragg reflective layers formed meets the preset requirements, the method for preparing the mask substrate further includes: A capping layer, several absorption layers, and a hard mask layer are sequentially formed on the Bragg reflective layer located at the top layer; and a back conductive layer is formed on the bottom surface of the substrate. At least one patterning process is performed on the Bragg reflective layer, the capping layer, the absorption layer, and the hard mask layer on the surface of the substrate to form a mask substrate.
Citation Information
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