Device-level leadless heterogeneous integration structure and process of piezoresistive accelerometer

Abstract

The invention relates to electronic product packaging, and discloses a device-level leadless heterogeneous integrated structure and process of piezoresistive accelerometer, which can reduce the packaging size while ensuring reliability. The structure comprises: a ceramic tube shell bottom surface forms a metallized pattern connected with the external welding points of the tube shell side wall; a silicon substrate is provided with a straight cylindrical metal through hole for transmitting the output signal of the ASIC circuit on three sides; a sensitive structure is provided with a PAD point on the side in alignment with the silicon substrate without the metal through hole, which transmits the output signal to the ASIC circuit in a positive direction and directly transmits the signal to the ASIC circuit in an anode bonding mode; the ASIC circuit is used for converting the analog signal output by the sensitive structure on one side into a digital signal for processing and outputting through the metal through hole penetrating the silicon substrate, the sensitive structure and the ASIC circuit on the other three sides; and a metallized ceramic cover plate is used for forming a sealing structure with the ceramic tube shell to cover the silicon substrate, the sensitive structure and the ASIC circuit.

Description

Technical Field

[0001] This invention relates to the field of electronic product packaging technology, and in particular to a device-level leadless heterogeneous integrated structure and process for a piezoresistive accelerometer. Background Technology

[0002] Piezoresistive accelerometers work by changing their resistance according to the acceleration experienced. They can measure changes in acceleration to understand the rate of acceleration experienced by the sensor. They are widely used at high amplitudes, for example, in vehicle crash testing and weapons testing; however, this also places more stringent requirements on their package size and reliability.

[0003] In piezoresistive accelerometers, the sensor in the sensing structure outputs an analog signal, while the ASIC circuit outputs a digital signal. Furthermore, the sensing structure typically uses bulk silicon technology, while the ASIC circuit uses planar silicon technology. Even though both are made of silicon and have the potential for anodic bonding, the industry generally only uses adhesive bonding, not anodic bonding. This makes finding a suitable fit with the casing to significantly reduce package size and improve overall structural reliability a major technical challenge.

[0004] Meanwhile, due to their miniaturization, MEMS (Micro-Electro-Mechanical System) devices often require gold wire bonding to connect the sensing structure to the adapter board after wafer-level packaging, and then external output is achieved through wires. Traditional methods are not only time-consuming but also susceptible to variations in installation and bonding strength due to the skill level of the process engineers. Currently, the integration of ASIC circuits and sensors is mostly planar integration, which not only increases the overall package size of the sensor but also reduces the device's intrinsic frequency. Planar integration requires bonding for electrical interconnection, and the added leads increase the device's uncertainty. Summary of the Invention

[0005] The purpose of this invention is to disclose a device-level leadless heterogeneous integrated structure and process based on a piezoresistive accelerometer, so as to realize the vertical interconnection between MEMS sensitive structure, ASIC circuit and ceramic package, and ensure reliability while reducing package size.

[0006] To achieve the above objectives, this invention discloses a device-level leadless heterogeneous integrated structure for a piezoresistive accelerometer, comprising:

[0007] The ceramic tube shell has internal reinforcement welding points and a metallized pattern for signal transmission formed on its bottom surface. The metallized pattern is connected to external welding points located on the side wall of the tube shell.

[0008] The silicon substrate has a solder pad on its bottom surface that is aligned with the size and position of the solder points for internal reinforcement of the ceramic tube shell, and has cylindrical metal through holes on three sides for transmitting output signals of the ASIC circuit.

[0009] The sensitive structure includes a sensor die with mechanical properties; and a PAD point for transmitting output signals to the ASIC circuit in the positive direction is provided on one side of the silicon substrate that is not aligned with a metal via, and the remaining three sides are provided by the ASIC circuit to transmit signals in the reverse direction through the silicon substrate to the external soldering points of the ceramic tube shell via metal vias.

[0010] An ASIC circuit is used to convert the analog signal received from the sensitive structure on one side into a digital signal, process it, and then output it through metal vias on the other three sides, passing through the silicon substrate, the sensitive structure, and the ASIC circuit. The sensitive structure and the ASIC circuit transmit signals directly through anodized bonding.

[0011] Metallized ceramic cover plates are used to form a sealed structure with ceramic housings that encapsulates silicon substrates, sensitive structures, and ASIC circuits.

[0012] To achieve the above objectives, the present invention also discloses a process for realizing the device-level leadless heterogeneous integrated structure of the above-mentioned piezoresistive accelerometer, comprising:

[0013] Step S1: Fabrication and release of the sensitive structure using bulk silicon technology;

[0014] Step S2: Metal vias are fabricated on the silicon substrate using the TSV process;

[0015] Step S3: Magnetron sputtering is used to form solder joints on the bottom surface of the silicon substrate through-holes;

[0016] Step S4: Achieve bonding between the silicon substrate and the single-crystal silicon wafer through anodic bonding;

[0017] Step S5: Bond the sensitive structure to the ASIC circuit through anodic bonding;

[0018] Step S6: Obtain a single sensor die by dicing;

[0019] Step S7: Apply solder to the welding position on the ceramic tube shell by ball bonding;

[0020] Step S8: Place the single sensor die at the alignment position of the ceramic tube shell;

[0021] Step S9: The interconnection between the individual sensor die and the housing is achieved by heating with a heating table;

[0022] Step S10: Use parallel seam welding to seal the entire metallized ceramic cover plate.

[0023] The present invention has the following beneficial effects:

[0024] Vertical interconnection of the ceramic housing, silicon substrate, sensing structure, and ASIC circuitry is achieved through methods such as silicon-silicon bonding. This method reduces the overall package size of the sensor, thereby increasing its overall intrinsic frequency. Leadless bonding and other methods reduce manual operation, laying the foundation for fully mechanized mass production and improving the consistency and stability of sensors within the same batch.

[0025] The present invention will now be described in further detail with reference to the accompanying drawings. Attached Figure Description

[0026] The accompanying drawings, which form part of this application, are used to provide a further understanding of the invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an undue limitation of the invention. In the drawings:

[0027] Figure 1 This is a quarter-section view of the overall device-level leadless heterogeneous integrated structure of the piezoresistive accelerometer disclosed in the embodiments of the present invention.

[0028] Figure 2 This is an exploded schematic diagram of the device-level leadless heterogeneous integrated structure of the piezoresistive accelerometer disclosed in the embodiments of the present invention.

[0029] Figure 3 This is a schematic diagram of the ceramic tube shell disclosed in an embodiment of the present invention.

[0030] Figure 4 This is a schematic diagram of the bottom surface of the silicon substrate disclosed in an embodiment of the present invention.

[0031] [Marker Explanation]

[0032] 1. Ceramic housing; 2. Metal via; 3. Silicon substrate; 4. Sensitive structure; 5. ASIC circuit; 6. Metallized ceramic cover plate; 7. External solder joint; 8. Metallized pattern; 9. Metallized pattern connecting the silicon substrate and the sensitive structure end via metal via; 10. Brazing joint. Detailed Implementation

[0033] The embodiments of the present invention will be described in detail below with reference to the accompanying drawings, but the present invention can be implemented in many different ways as defined and covered by the claims.

[0034] Example 1

[0035] Reference Figures 1 to 4 This embodiment discloses a device-level leadless heterogeneous integrated structure for a piezoresistive accelerometer, including: a ceramic housing 1, a silicon substrate 3, a sensing structure 4, an ASIC circuit 5, and a metallized ceramic cover plate 6.

[0036] During the manufacturing process, a metallized pattern is formed on the bottom surface of the ceramic tube shell using methods such as screen printing or sputtering. The pattern consists of two parts: one part is the solder point 10, whose size and position are consistent with the solder pads on the bottom surface of the silicon substrate, and the connection between the silicon substrate and the ceramic tube shell is achieved through brazing or other methods; the other part is the metallized pattern 8 of the signal point conductive wire, the end 9 of which is connected to the metal through hole 2 to enable signal transmission, realizing the connection between the signal point and the external solder point 7 of the tube shell.

[0037] The silicon substrate is a sensitive structure substrate with metal vias to transmit ASIC circuit output signals. Multiple solder points are formed near the center of the bottom surface of the silicon substrate by sputtering, corresponding to the solder points used for reinforcement inside the ceramic tube shell. These are not signal points, but are used to improve the overall solder strength.

[0038] The output signal of the sensitive structure is transmitted to the ASIC circuit through the PAD point. Three sides of the sensitive structure have metal vias to transmit the ASIC circuit signal to the silicon substrate. Preferably, the sensitive structure has a resistor formed on the beam by heavy ion doping, and metal wires formed by magnetron sputtering.

[0039] The ASIC circuit has metal vias around it. One part of the vias transmits the input signal to the sensitive structure, while the other part of the vias transmits the signal processed by the ASIC circuit to the sensitive structure, then to the silicon substrate, and finally to the ceramic housing.

[0040] The overall signal transmission is as follows: The sensitive structure generates an electrical signal upon acceleration. This signal is transmitted to the ASIC circuit via a metal via. The ASIC circuit processes the signal and outputs it through the metal vias in the sensitive structure and the silicon substrate to the signal point on the silicon substrate. Through soldering and metallization patterning, the signal is finally transmitted to the outside of the ceramic casing. After soldering testing, the metallized ceramic cover plate is welded to the ceramic casing using parallel seam welding to achieve a sealed encapsulation.

[0041] Furthermore, the processing technology based on the above structure can be specifically described as follows:

[0042] Step S1: Use bulk silicon technology to process and release the sensitive structure.

[0043] Step S2: Metal vias are fabricated on the silicon substrate using the TSV process.

[0044] Step S3: Magnetron sputtering is used to form solder joints on the bottom surface of the silicon substrate through-hole.

[0045] Step S4: Achieve bonding between the silicon substrate and the single-crystal silicon wafer through anodic bonding.

[0046] Step S5: Bond the sensitive structure to the ASIC circuit through anodic bonding.

[0047] Step S6: Obtain a single sensor die by dicing.

[0048] Step S7: Apply solder to the welding position on the ceramic tube shell by attaching balls.

[0049] Step S8: Place the single sensor die at the alignment position of the ceramic tube shell.

[0050] Step S9: The interconnection between the individual sensor die and the housing is achieved by heating with a heating table.

[0051] Step S10: Use parallel seam welding to seal the entire metallized ceramic cover plate.

[0052] Therefore, the device-level leadless heterogeneous integrated structure and process based on a piezoresistive accelerometer disclosed in this embodiment achieves vertical interconnection of the ceramic housing, silicon substrate, sensing structure, and ASIC circuit through methods such as silicon-silicon bonding. This method reduces the overall package size of the sensor, thereby increasing the overall natural frequency of the sensor. Leadless bonding and other methods reduce manual operation, laying the foundation for fully mechanized mass production and improving the consistency and stability of sensors in the same batch.

[0053] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A device-level leadless heterogeneous integrated structure for a piezoresistive accelerometer, characterized in that, include: The ceramic tube shell has internal reinforcement welding points and a metallized pattern for signal transmission formed on its bottom surface. The metallized pattern is connected to external welding points located on the side wall of the tube shell. The silicon substrate has a solder pad on its bottom surface that is aligned with the size and position of the solder points for internal reinforcement of the ceramic tube shell, and has cylindrical metal through holes on three sides for transmitting output signals of the ASIC circuit. The sensitive structure includes a sensor die with mechanical properties; and a PAD point for transmitting output signals to the ASIC circuit in the positive direction is provided on one side of the silicon substrate that is not aligned with a metal via, and the remaining three sides are provided by the ASIC circuit to transmit signals in the reverse direction through the silicon substrate to the external soldering points of the ceramic tube shell via metal vias. An ASIC circuit is used to convert the analog signal received from the sensitive structure on one side into a digital signal, process it, and then output it through metal vias on the other three sides, passing through the silicon substrate, the sensitive structure, and the ASIC circuit. The sensitive structure and the ASIC circuit transmit signals directly through anodized bonding. Metallized ceramic cover plates are used to form a sealed structure with ceramic housings that encapsulates silicon substrates, sensitive structures, and ASIC circuits.

2. The structure according to claim 1, characterized in that, The sensitive structure is formed on the beam by heavy ion doping to create a resistor, and the metal wire is formed by magnetron sputtering.

3. A process for realizing the device-level leadless heterogeneous integrated structure of the piezoresistive accelerometer of claim 1 or 2, characterized in that, include: Step S1: Fabrication and release of the sensitive structure using bulk silicon technology; Step S2: Metal vias are fabricated on the silicon substrate using the TSV process; Step S3: Magnetron sputtering is used to form solder joints on the bottom surface of the silicon substrate through-holes; Step S4: Achieve bonding between the silicon substrate and the single-crystal silicon wafer through anodic bonding; Step S5: Bond the sensitive structure to the ASIC circuit through anodic bonding; Step S6: Obtain a single sensor die by dicing; Step S7: Apply solder to the welding position on the ceramic tube shell by ball bonding; Step S8: Place the single sensor die at the alignment position of the ceramic tube shell; Step S9: The interconnection between the individual sensor die and the housing is achieved by heating with a heating table; Step S10: Use parallel seam welding to seal the entire metallized ceramic cover plate.

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