A method, system and device for detecting faults in a ring-shaped linear motor module driving circuit

Abstract

The application relates to a ring-shaped linear motor module driving circuit fault detection method, system and equipment. The method comprises the following steps: acquiring reference voltage values of multiple groups of motor coils. By comparing the average value of the reference voltage values with the size of a preset limit value, a sampling circuit detection result is obtained, and a zero offset calibration program is started according to the sampling circuit detection result. The zero offset calibration program performs direct current bias calculation according to a pulse width modulation signal output by an FPGA module and the limit value, obtains a reference voltage detection result, estimates an inductance value according to the pulse width modulation signal, and obtains inductance identification values of the multiple groups of motor coils. The current average value of the motor is obtained according to the sampling circuit detection result, the reference voltage detection result and the inductance identification values. By comparing the current average value with the limit value, the fault detection result of the circuit is obtained. By adopting the method, welding defects, continuous welding, chip damage, coil short circuit, coil turn number defects and the like of the driving circuit can be effectively and comprehensively detected.

Description

Technical Field

[0001] This application relates to the field of toroidal motor drive circuit detection technology, and in particular to a method, system and equipment for detecting faults in toroidal motor module drive circuits. Background Technology

[0002] The toroidal motor drive module integrates the motor coils, motor drive, and encoder into a single potting module. After potting, any hardware failure in the module becomes irreparable. Therefore, it is crucial to perform a self-test on the drive circuit of the module's 15 motor coils before potting. Current technology requires aging of the module after assembly before potting, followed by testing using a drive circuit fault detection program.

[0003] This leads to the following problems: 1) Hardware faults in the module cannot be recovered through repair after potting; 2) Common faults in the driver hardware circuit include poor soldering, open circuit, short circuit, etc., and insufficient or excessive number of coil winding turns. Summary of the Invention

[0004] Therefore, it is necessary to provide a method, system, and device for detecting faults in the drive circuit of a toroidal motor module, which can comprehensively detect faults in the drive circuit, in response to the above-mentioned technical problems.

[0005] A fault detection method for a toroidal motor module drive circuit is disclosed, applied to a toroidal motor module drive circuit, wherein the toroidal motor module drive circuit includes: a DSP module, an FPGA module, a PWM drive module, an ADC module, and multiple sets of motor coils. The method includes:

[0006] After the DSP module is powered on, the current output of the PWM drive module is turned off, and the ADC module is started to obtain the reference voltage values ​​of the sampling circuits of multiple motor coils.

[0007] The average value of the reference voltage is compared with the preset limit to obtain the detection result of the sampling circuit. The zero bias calibration procedure is then started based on the detection result of the sampling circuit.

[0008] The zero-bias calibration procedure calculates the DC bias based on the pulse width modulation signal output from the FPGA module and the limit, obtaining the reference voltage detection result. Additionally, it estimates the inductance value based on the pre-sampled current signal and the pulse width modulation signal, obtaining the inductance identification values ​​for multiple sets of motor coils.

[0009] The duty cycle of the current output by the DSP module is adjusted based on the sampling circuit detection results, the reference voltage detection results, and the inductance identification value, and the average current value corresponding to the duty cycle is calculated.

[0010] The fault detection results of the drive circuit of the toroidal motor module are obtained by comparing the average current value with the limit value.

[0011] In one embodiment, the DSP module includes a DSP main core and a DSP sub-core. The DSP module and FPGA module interact with each other via an EMIF bus. Multiple sets of motor coils are connected to the PWM drive module via an H-bridge using bipolar control.

[0012] In one embodiment, the method further includes sampling voltage signals at the period register value and half-cycle register value of the PWM generator increment / decrement counter, respectively, to complete the configuration of the ADC module.

[0013] In one embodiment, the method further includes: if the increment / decrement counter value of the PWM generator is equal to the half-cycle register value, then the ADC module samples a value near the average value of the triangular wave to obtain the zero bias of the sampling current. If the increment / decrement counter value of the PWM generator is equal to the comparator register value, then the ADC module samples a value near the peak value of the triangular wave, and takes the average of the absolute values ​​of the near values ​​of the peak values ​​of multiple sets of triangular waves to obtain the maximum value of the sampling current.

[0014] In one embodiment, the method further includes: comparing the average value of the reference voltage with a preset limit to obtain the sampling circuit detection result; if the average value of the reference voltage is greater than the preset limit, the sampling circuit detection result indicates a sampling circuit reference voltage fault. Otherwise, the sampling circuit detection result indicates a normal sampling circuit reference voltage, and the DSP module is invoked to start the zero-bias calibration procedure based on the sampling circuit detection result.

[0015] In one embodiment, the method further includes: a zero-bias calibration procedure calculates an average current value based on a 50% duty cycle pulse-width modulation signal output by the FPGA module; the average current value is then used to calculate a current bias value using a DC bias. If the current bias value is greater than the stated limit, the reference voltage detection result indicates a reference voltage fault. Otherwise, the reference voltage detection result indicates a normal reference voltage.

[0016] In one embodiment, the method further includes: the DSP module estimating the inductance identification values ​​of the multiple sets of motor coils based on the maximum value of the current triangular wave of the pre-sampled current signals generated by the multiple sets of motor coils and the period of the pulse width modulation signal.

[0017]

[0018] Where L is the inductance identification value, U is the DC model voltage value, ΔT is the time taken for the current to rise from 0 to its maximum value, and ΔI is the maximum value of the triangular wave current.

[0019] In one embodiment, the method further includes: a DSP module interleaving two small duty cycle current signals in opposite directions in a first stage and a second stage, respectively, to obtain multiple sets of first current signals output in the first stage and multiple sets of second current signals output in the second stage, and taking the first average value of the multiple sets of first current signals and the second average value of the multiple sets of second current signals, respectively. If either the first average value or the second average value exceeds a preset normal range, the fault detection result of the toroidal motor module drive circuit is a fault in the PWM drive module. Otherwise, if both the first average value and the second average value exceed the normal range, the fault detection result of the toroidal motor module drive circuit is a fault in the sampling circuit.

[0020] A fault detection system for a toroidal motor module drive circuit, the system comprising:

[0021] The reference voltage acquisition module is used to turn off the current output of the PWM drive module and start the ADC module to acquire the reference voltage values ​​of multiple sets of motor coil sampling points after the DSP module is powered on.

[0022] The zero bias calibration program initiation module is used to compare the average value of the reference voltage with the preset limit value to obtain the sampling circuit detection result, and to start the zero bias calibration program based on the sampling circuit detection result.

[0023] The coil inductance identification value acquisition module is used by the zero-bias calibration program to calculate the DC bias based on the pulse width modulation signal output by the FPGA module and the limit, and obtain the reference voltage detection result. Additionally, it estimates the inductance value based on the pre-sampled current signal and the pulse width modulation signal to obtain the inductance identification values ​​of multiple sets of motor coils.

[0024] The current average value acquisition module is used to adjust the duty cycle of the current output by the DSP module based on the sampling circuit detection results, the reference voltage detection results, and the inductance identification value, and to calculate the current average value corresponding to the duty cycle.

[0025] The fault detection module is used to obtain the fault detection results of the toroidal motor module drive circuit by comparing the average current value with the limit value.

[0026] A computer device includes a memory and a processor, the memory storing a computer program, and the processor executing the computer program performing the following steps:

[0027] After the DSP module is powered on, the current output of the PWM drive module is turned off, and the ADC module is started to obtain the reference voltage values ​​of the sampling circuits of multiple motor coils.

[0028] The average value of the reference voltage is compared with the preset limit to obtain the detection result of the sampling circuit. The zero bias calibration procedure is then started based on the detection result of the sampling circuit.

[0029] The zero-bias calibration procedure calculates the DC bias based on the pulse width modulation signal output from the FPGA module and the limit, obtaining the reference voltage detection result. Additionally, it estimates the inductance value based on the pre-sampled current signal and the pulse width modulation signal, obtaining the inductance identification values ​​for multiple sets of motor coils.

[0030] The duty cycle of the current output by the DSP module is adjusted based on the sampling circuit detection results, the reference voltage detection results, and the inductor identification value, and the average current value corresponding to the duty cycle is calculated.

[0031] The fault detection results of the drive circuit of the toroidal motor module are obtained by comparing the average current value with the limit value.

[0032] The aforementioned method, system, and equipment for fault detection in a toroidal motor module drive circuit involve shutting off the current output of the PWM drive module after the DSP module is powered on. This helps ensure the system is in a safe state before fault detection. The ADC module is activated to acquire reference voltage values ​​from multiple sets of motor coils to collect baseline data. The average value of the reference voltage values ​​is compared with a preset limit to check if the sampling circuit is functioning correctly. Based on the sampling circuit's detection results, a zero-bias calibration program is initiated. This program calculates the DC bias to obtain the reference voltage detection results, ensuring the system's reference voltage is accurate. Finally, the inductance value is estimated using a pulse-width modulation signal to obtain the inductance identification values ​​of multiple sets of motor coils. This allows the system to better understand the characteristics of the motor coils. Based on the sampling circuit's detection results, the reference voltage detection results, and the inductance identification values, the duty cycle of the current output by the DSP module is adjusted. This allows for real-time adjustment of the motor drive based on the detection results, improving system stability and performance. Furthermore, the average current value corresponding to the adjusted current duty cycle is calculated to provide a reference for subsequent fault detection, enabling comprehensive monitoring and adjustment of the toroidal motor module drive circuit and ensuring the stability and reliability of the system under various operating conditions. Through complete testing of the module current acquisition circuit, H-bridge drive circuit, and motor coil parameters, this testing method effectively detected faults such as poor soldering, solder joints, chip damage, coil short circuits, and incorrect coil turns. Moreover, by testing the coil reference voltage, inductance, and cross-checking, faulty modules can be effectively prevented from being potted, reducing unnecessary losses. Attached Figure Description

[0033] Figure 1 This is an application scenario diagram of a fault detection method for a toroidal motor module drive circuit in one embodiment.

[0034] Figure 2 This is a flowchart illustrating a fault detection method for a toroidal motor module drive circuit in one embodiment.

[0035] Figure 3 This is a waveform diagram of the line current when the duty cycle is 50% in one embodiment;

[0036] Figure 4 This is a structural block diagram of a fault detection system for a toroidal motor module drive circuit in one embodiment.

[0037] Figure 5 This is an internal structural diagram of a computer device in one embodiment. Detailed Implementation

[0038] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0039] This application provides a fault detection method for the drive circuit of a toroidal motor module, which can be applied to, for example... Figure 1 The illustrated toroidal motor module drive circuit uses a dual-core DSP module that interacts with the FPGA module via an EMIF bus. The FPGA module is responsible for PWM drive generation and ADC sampling. Multiple motor coil currents are sampled using Hall effect sensors, and the converted voltage signals are fed into the 16-bit ADC module. Each motor module has 15 motor coils, numbered 1 to 15.

[0040] In one embodiment, such as Figure 2 As shown, a fault detection method for the drive circuit of a toroidal motor module is provided, which is applied to... Figure 1 Taking the driving circuit in the example, the following steps are included:

[0041] Step 202: After the DSP module is powered on, the current output of the PWM drive module is turned off, and the ADC module is started to obtain the reference voltage values ​​of the sampling circuits of multiple motor coils.

[0042] Specifically, after the module is powered on, the FPGA module first communicates with the ADC module chip. If the communication fails, an ADC chip fault is reported.

[0043] Step 204: Compare the average value of the reference voltage with the preset limit to obtain the sampling circuit detection result, and start the zero bias calibration program based on the sampling circuit detection result.

[0044] Specifically, after the dual-core DSP module is powered on, the PWM output is first turned off, and the ADC module is started to sample. The sampled value is the ADC reference voltage value. If the average value of a certain number of sampled values ​​is greater than a set limit, it indicates that the ADC sampling circuit reference voltage is faulty.

[0045] Step 206: The zero-bias calibration procedure calculates the DC bias based on the pulse width modulation signal output by the FPGA module and the limit, obtaining the reference voltage detection result. Additionally, it estimates the inductance value based on the pre-sampled current signal and the pulse width modulation signal, obtaining the inductance identification values ​​for multiple sets of motor coils.

[0046] Specifically, after completing the reference test, the DSP module starts the zero bias calibration program. At this time, the dual-core DSP module outputs a PWM current with a 50% duty cycle through the FPGA module. The dual-core DSP module calculates the average current and then performs DC bias calculation. If the DC bias is greater than the set limit, a reference voltage fault is reported.

[0047] Furthermore, the dual-core DSP module simultaneously calculates the average value of the maximum value of the triangular current wave and estimates the inductance value based on the period and maximum value of the PWM current, using this as the coil inductance identification value. When the average value of the maximum triangular current wave exceeds or falls below a certain limit, a coil inductance abnormality fault is reported. The identified inductance value can be used as a parameter to set the current regulator.

[0048] Inductance is estimated using the following formula:

[0049]

[0050] Where L is the inductance identification value, U is the DC model voltage value, ΔT is the time taken for the current to rise from 0 to its maximum value, and ΔI is the maximum value of the triangular wave current.

[0051] Step 208: Adjust the duty cycle of the current output by the DSP module based on the sampling circuit detection results, the reference voltage detection results, and the inductance identification value, and calculate the average current value corresponding to the duty cycle.

[0052] Specifically, after completing DC bias and inductor identification, the dual-core DSP module outputs two small duty cycles in opposite directions, such as 51% and 49%, and the output is interleaved in two stages:

[0053] Phase 1: Odd-numbered coils output 51% and even-numbered coils output 49%. Calculate the average current for each phase.

[0054] Second stage: Odd-numbered coils output 49%, even-numbered coils output 51%, and the average current is calculated for each.

[0055] Step 210: Obtain the fault detection results of the toroidal motor module drive circuit by comparing the average current value with the limit value.

[0056] Specifically, the average value of each group of coils is compared in the two stages to see if it is within the normal range. If it exceeds the normal range, a drive circuit fault is reported.

[0057] In the aforementioned fault detection method for a toroidal motor module drive circuit, after the DSP module is powered on, the current output of the PWM drive module is turned off. This helps ensure that the system is in a safe state before fault detection. The ADC module is activated to acquire reference voltage values ​​of multiple sets of motor coils to collect baseline data of the motor coils. The average value of the reference voltage values ​​is compared with a preset limit to check whether the sampling circuit is working properly. Then, based on the detection results of the sampling circuit, a zero-bias calibration program is initiated. The zero-bias calibration program calculates the DC bias to obtain the reference voltage detection result. This helps ensure that the system's reference voltage is accurate. Finally, the inductance value is estimated through a pulse width modulation signal to obtain the inductance identification values ​​of multiple sets of motor coils, allowing the system to better understand the characteristics of the motor coils. Based on the detection results of the sampling circuit, the reference voltage detection results, and the inductance identification values, the duty cycle of the current output by the DSP module is adjusted. This allows for real-time adjustment of the motor drive based on the detection results, thereby improving the stability and performance of the system. Furthermore, the average current value corresponding to the adjusted current duty cycle is calculated to provide a reference for subsequent fault detection, enabling comprehensive monitoring and adjustment of the toroidal motor module drive circuit and ensuring the stability and reliability of the system under various operating conditions. Through complete testing of the module current acquisition circuit, H-bridge drive circuit, and motor coil parameters, this testing method effectively detected faults such as poor soldering, solder joints, chip damage, coil short circuits, and incorrect coil turns. Moreover, by testing the coil reference voltage, inductance, and cross-checking, faulty modules can be effectively prevented from being potted, reducing unnecessary losses.

[0058] In one embodiment, the DSP module includes a DSP main core and a DSP sub-core. The DSP module and FPGA module interact with each other via an EMIF bus. Multiple sets of motor coils are connected to the PWM drive module and the ADC module respectively via an H-bridge using a bipolar control method.

[0059] In one embodiment, voltage signals are sampled from the period register value and half-cycle register value of the PWM generator increment / decrement counter, respectively, to complete the configuration of the ADC module.

[0060] In one embodiment, if the increment / decrement counter value of the PWM generator is equal to the half-cycle register value, the ADC module samples a value near the average value of the triangular wave, thus obtaining zero bias of the sampled current. If the increment / decrement counter value of the PWM generator is equal to the comparator register value, the ADC module samples a value near the peak value of the triangular wave, and takes the average of the absolute values ​​of the near values ​​of the peak values ​​of multiple sets of triangular waves to obtain the maximum value of the sampled current.

[0061] In one embodiment, the average value of the reference voltage is compared with a preset limit to obtain the sampling circuit detection result. If the average value of the reference voltage is greater than the preset limit, the sampling circuit detection result indicates a sampling circuit reference voltage fault. Otherwise, the sampling circuit detection result indicates that the sampling circuit reference voltage is normal, and the DSP module is invoked to start the zero-bias calibration procedure based on the sampling circuit detection result.

[0062] In one embodiment, the zero-bias calibration procedure calculates the average current based on the 50% duty cycle pulse-width modulated signal output by the FPGA module. This average current is then used to calculate the current bias value using a DC bias. If the current bias value exceeds the specified limit, the reference voltage detection result indicates a reference voltage fault. Otherwise, the reference voltage detection result indicates a normal reference voltage.

[0063] In one embodiment, the DSP module estimates the inductance identification values ​​of the multiple sets of motor coils based on the maximum value of the current triangular wave of the current signals generated by the pre-sampled multiple sets of motor coils and the period of the pulse width modulation signal.

[0064]

[0065] Where L is the inductance identification value, U is the DC model voltage value, ΔT is the time taken for the current to rise from 0 to its maximum value, and ΔI is the maximum value of the triangular wave current.

[0066] It is worth noting that multiple detection methods were utilized, including reference voltage and inductance value, thereby improving the accuracy and comprehensiveness of fault detection. Furthermore, the method of real-time adjustment of the current duty cycle also helps the system dynamically respond to different operating states, improving the system's adaptability.

[0067] In one embodiment, the DSP module outputs two small duty cycle current signals in opposite directions alternately in the first and second stages, respectively, to obtain multiple sets of first current signals output in the first stage and multiple sets of second current signals output in the second stage. The first average value of the multiple sets of first current signals and the second average value of the multiple sets of second current signals are then calculated. If either the first average value or the second average value exceeds a preset normal range, the fault detection result of the toroidal motor module drive circuit is a fault in the PWM drive module. Otherwise, if both the first average value and the second average value exceed the normal range, the fault detection result of the toroidal motor module drive circuit is a fault in the sampling circuit.

[0068] It is worth noting that this method can detect faults such as solder joints in the coils and ADC module, open circuits in any related circuits, and chip failures in the relevant circuits. If the first average current or the second average current of two adjacent coils are in the same direction, the detection result is a solder joint fault.

[0069] In one embodiment, such as Figure 3 As shown, the H-bridge uses a bipolar control method. After the module is powered on, the DSP software detects the following:

[0070] Initialize the PWM module, configure the ADC, and sample the voltage signal using the period register value and half-cycle register value of the PWM generator's up / down counter. When the PWM module outputs a PWM wave with a 50% duty cycle in its open loop, the coil current waveform should be a symmetrical triangular wave. When the PWM generator's up / down counter value equals the period register value, the ADC sampled data will be points near the average value of the triangular wave. When the PWM generator's up / down counter value equals the comparator register value, the ADC sampled data will be points near the peak value of the triangular wave. When using these data, take the absolute value and then average it.

[0071] When the PWM module outputs a very small duty cycle, such as 51% or 49%, the coil current waveform is still a symmetrical triangular wave, but the average current value or the average line of the triangular wave is biased upward or downward.

[0072] During the 50% duty cycle output phase, when the PWM counter equals the period register value, the average value of the ADC samples is used as the zero bias of the sampling current. When the up / down counter of the PWM generator equals the comparator register value, the average value of the ADC samples is used as the maximum value of the sampling current.

[0073] It should be understood that, although Figure 2The steps in the flowchart are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order in which these steps are executed, and they can be performed in other orders. Figure 2 At least some of the steps in the process may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least some of the sub-steps or stages of other steps.

[0074] In one embodiment, such as Figure 4 As shown, a fault detection system for a toroidal motor module drive circuit is provided, including: a reference voltage value acquisition module 402, a zero-bias calibration program start module 404, a coil inductance identification value acquisition module 406, a current average value acquisition module 408, and a fault detection module 410, wherein:

[0075] The reference voltage value acquisition module 402 is used to turn off the current output of the PWM drive module and start the ADC module to acquire the reference voltage values ​​of the sampling circuits of multiple motor coils after the DSP module is powered on.

[0076] The zero bias calibration program initiation module 404 is used to compare the average value of the reference voltage with the preset limit value to obtain the sampling circuit detection result, and to start the zero bias calibration program based on the sampling circuit detection result.

[0077] The coil inductance identification value acquisition module 406 is used by the zero-bias calibration program to calculate the DC bias based on the pulse width modulation signal and limit value output by the FPGA module, and obtain the reference voltage detection result. Additionally, it estimates the inductance value based on the pre-sampled current signal and pulse width modulation signal to obtain the inductance identification values ​​of multiple sets of motor coils.

[0078] The current average value acquisition module 408 is used to adjust the duty cycle of the current output by the DSP module based on the sampling circuit detection result, the reference voltage detection result and the inductance identification value, and to calculate the current average value corresponding to the duty cycle.

[0079] The fault detection module 410 is used to obtain the fault detection results of the drive circuit of the toroidal motor module by comparing the average current value with the limit value.

[0080] For specific limitations regarding the fault detection system for a toroidal motor module drive circuit, please refer to the limitations of the fault detection method for a toroidal motor module drive circuit described above, which will not be repeated here. Each module in the aforementioned fault detection system for a toroidal motor module drive circuit can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in hardware or independently of the processor in a computer device, or stored in software in the memory of a computer device, so that the processor can call and execute the corresponding operations of each module.

[0081] In one embodiment, a computer device is provided, which may be a terminal, and its internal structure diagram may be as follows: Figure 5 As shown, the computer device includes a processor, memory, network interface, display screen, and input devices connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The network interface is used to communicate with external terminals via a network connection. When the computer program is executed by the processor, it implements a method for fault detection of a toroidal motor module drive circuit. The display screen can be an LCD screen or an e-ink screen. The input devices can be a touch layer covering the display screen, buttons, a trackball, or a touchpad mounted on the computer device casing, or an external keyboard, touchpad, or mouse.

[0082] Those skilled in the art will understand that Figure 4-5 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0083] In one embodiment, a computer device is provided, including a memory and a processor, the memory storing a computer program, the processor executing the computer program to perform the following steps:

[0084] After the DSP module is powered on, the current output of the PWM drive module is turned off, and the ADC module is started to obtain the reference voltage values ​​of the sampling circuits of multiple motor coils.

[0085] The average value of the reference voltage is compared with the preset limit to obtain the detection result of the sampling circuit. The zero bias calibration procedure is then started based on the detection result of the sampling circuit.

[0086] The zero-bias calibration procedure calculates the DC bias based on the pulse width modulation signal output from the FPGA module and the limit, obtaining the reference voltage detection result. Additionally, it estimates the inductance value based on the pre-sampled current signal and the pulse width modulation signal, obtaining the inductance identification values ​​for multiple sets of motor coils.

[0087] The duty cycle of the current output by the DSP module is adjusted based on the sampling circuit detection results, the reference voltage detection results, and the inductor identification value, and the average current value corresponding to the duty cycle is calculated.

[0088] The fault detection results of the drive circuit of the toroidal motor module are obtained by comparing the average current value with the limit value.

[0089] In one embodiment, when the processor executes the computer program, it further implements the following steps: if the increment / decrement counter value of the PWM generator is equal to the half-cycle register value, the ADC module samples a value near the average value of the triangular wave to obtain the zero bias of the sampled current. If the increment / decrement counter value of the PWM generator is equal to the comparator register value, the ADC module samples a value near the peak value of the triangular wave, and takes the average of the absolute values ​​of the near values ​​of the peak values ​​of multiple sets of triangular waves to obtain the maximum value of the sampled current.

[0090] In one embodiment, when the processor executes the computer program, it further performs the following steps: the DSP module estimates the inductance identification values ​​of the multiple sets of motor coils based on the maximum value of the current triangular wave of the current signal generated by the pre-sampled multiple sets of motor coils and the period of the pulse width modulation signal.

[0091]

[0092] Where L is the inductance identification value, U is the DC model voltage value, ΔT is the time taken for the current to rise from 0 to its maximum value, and ΔI is the maximum value of the triangular wave current.

[0093] In one embodiment, when the processor executes the computer program, it further performs the following steps: the DSP module outputs two current signals with opposite directions and small duty cycles alternately in the first and second stages, respectively, to obtain multiple sets of first current signals output in the first stage and multiple sets of second current signals output in the second stage, and respectively takes the first average value of the multiple sets of first current signals and the second average value of the multiple sets of second current signals. If either the first average value or the second average value exceeds a preset normal range, the fault detection result of the toroidal motor module drive circuit is a fault in the PWM drive module. Otherwise, if both the first average value and the second average value exceed the normal range, the fault detection result of the toroidal motor module drive circuit is a fault in the sampling circuit.

[0094] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), Rambus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

[0095] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0096] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A method for fault detection in the drive circuit of a toroidal motor module, characterized in that, This is applied to the drive circuit of a toroidal motor module, which includes: a DSP module, an FPGA module, a PWM drive module, an ADC module, and multiple sets of motor coils. The method includes: After the DSP module is powered on, the current output of the PWM drive module is turned off, and the ADC module is started to obtain the reference voltage value of the sampling circuit of the multiple sets of motor coils. The average value of the reference voltage is compared with the preset limit to obtain the sampling circuit detection result, and the zero bias calibration procedure is started based on the sampling circuit detection result; The zero-bias calibration procedure calculates the DC bias based on the pulse width modulation signal output by the FPGA module and the limit value to obtain the reference voltage detection result; and estimates the inductance value based on the pre-sampled current signal and the pulse width modulation signal to obtain the inductance identification value of the multiple sets of motor coils. The DSP module outputs two current signals with opposite directions and small duty cycles in the first and second stages respectively. The coil current waveforms of the current signals with the two small duty cycles are symmetrical triangular waves. The average current value or the average line of the triangular wave is biased upward or downward to obtain multiple sets of first current signals output in the first stage and multiple sets of second current signals output in the second stage. The first average current value of the multiple sets of first current signals and the second average current value of the multiple sets of second current signals are respectively taken. If either the first average current value or the second average current value exceeds the preset normal range, the fault detection result of the toroidal motor module drive circuit is that the PWM drive module is faulty; otherwise, if both the first average current value and the second average current value exceed the normal range, the fault detection result of the toroidal motor module drive circuit is that the sampling circuit is faulty. The duty cycle of the current output by the DSP module is adjusted based on the detection results of the sampling circuit, the detection results of the reference voltage, and the inductor identification value, and the average current value corresponding to the duty cycle is calculated. The fault detection results of the drive circuit of the circular motor module are obtained by comparing the average current value with the limit value. The limits include: a first limit for comparison with the average value of the reference voltage, a second limit for comparison with the DC bias calculation, and a third limit for comparison with the average current, wherein the first limit, the second limit, and the third limit are set independently of each other.

2. The method according to claim 1, characterized in that, The DSP module includes: a DSP main core and a DSP sub-core; The DSP module and the FPGA module interact with each other via the EMIF bus. The multiple sets of motor coils are respectively connected to the PWM drive module via an H-bridge using a bipolar control method.

3. The method according to claim 1, characterized in that, Before the steps of turning off the current output of the PWM drive module and starting the ADC module to obtain the reference voltage values ​​of the sampling points of the multiple sets of motor coils after the DSP module is powered on, the method further includes: Voltage signals are sampled at the values ​​of the equal period register, half period register, and comparison register of the increment / decrement counter in the PWM generator to complete the configuration of the ADC module.

4. The method according to claim 3, characterized in that, Voltage signals are sampled at the values ​​of the equal-period register, half-period register, and comparator register of the PWM generator increment / decrement counter, respectively, to complete the configuration of the ADC module, including: If the increment / decrement counter value of the PWM generator is equal to the half-cycle register value, the ADC module sample value is a value near the average value of the triangular wave, thus obtaining the zero bias of the sampled current; if the increment / decrement counter value of the PWM generator is equal to the comparison register value, the ADC module sample value is a point near the peak value of the triangular wave, and the average of the absolute values ​​of multiple sets of near-peak values ​​of the triangular wave is taken to obtain the maximum value of the sampled current.

5. The method according to claim 1, characterized in that, The average value of the reference voltage is compared with a preset limit to obtain the sampling circuit detection result. Based on the sampling circuit detection result, a zero-bias calibration procedure is initiated, including: The average value of the reference voltage is compared with a preset limit to obtain the sampling circuit detection result. If the average value of the reference voltage is greater than the preset limit, the sampling circuit detection result indicates a sampling circuit reference voltage fault; otherwise, the sampling circuit detection result indicates a normal sampling circuit reference voltage. Based on the sampling circuit detection result, the DSP module is called to start the zero bias calibration program.

6. The method according to claim 5, characterized in that, The zero-bias calibration procedure calculates the DC bias based on the pulse width modulation signal output by the FPGA module and the limit value to obtain the reference voltage detection result, including: The zero-bias calibration program calculates the average current based on the 50% duty cycle pulse width modulation signal output by the FPGA module. The average current is then used to calculate the current bias value through DC bias. If the current bias value is greater than the limit value, the reference voltage detection result is a reference voltage fault; otherwise, the reference voltage detection result is a normal reference voltage.

7. The method according to claim 6, characterized in that, The inductance value is estimated based on the pre-sampled current signal and the pulse width modulation signal to obtain the inductance identification values ​​of the multiple sets of motor coils, including: The DSP module estimates the inductance identification value of the multiple sets of motor coils based on the maximum value of the current triangular wave of the pre-sampled current signals generated by the multiple sets of motor coils and the period of the pulse width modulation signal. in, For inductance identification value, This represents the DC model voltage value. The time it takes for the current to rise from 0 to its maximum value. This represents the maximum value of the triangular wave current.

8. A fault detection system for a toroidal linear motor module drive circuit, characterized in that, The system for implementing the method according to any one of claims 1 to 7, the system comprising: The reference voltage value acquisition module is used to turn off the current output of the PWM drive module and start the ADC module to acquire the reference voltage values ​​of the sampling circuits of multiple motor coils after the DSP module is powered on. The zero bias calibration program initiation module is used to compare the average value of the reference voltage with the preset limit value to obtain the sampling circuit detection result, and to initiate the zero bias calibration program based on the sampling circuit detection result; The coil inductance identification value acquisition module is used for the zero bias calibration program to perform DC bias calculation based on the pulse width modulation signal output by the FPGA module and the limit value to obtain the reference voltage detection result; and to estimate the inductance value based on the pre-sampled current signal and the pulse width modulation signal to obtain the inductance identification value of the multiple sets of motor coils. The average current acquisition module is used to adjust the duty cycle of the current output by the DSP module based on the detection results of the sampling circuit, the detection results of the reference voltage, and the inductor identification value, and to calculate the average current value corresponding to the duty cycle. The fault detection module is used to obtain the fault detection result of the drive circuit of the toroidal motor module by comparing the average current value with the limit value.

9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 7.

Images