一种片上网络系统拓扑生成方法
By generating irregular single-path and multi-path topologies and optimizing transmission delay and area using multi-objective functions, the problem of complex design and low resource utilization in existing on-chip network topology generation methods is solved, achieving high-efficiency communication and low-power multi-core processor performance improvement.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- FUDAN UNIVERSITY
- Filing Date
- 2024-01-17
- Publication Date
- 2026-07-17
AI Technical Summary
Existing on-chip network topology generation methods rely on expert experience, resulting in complex and time-consuming designs. They cannot adapt to the increasing scale of multi-core processors and the diversification of application requirements, leading to high communication latency, low bandwidth utilization, and traditional regular topology structures that cannot fully utilize the parallel computing capabilities of multi-core processors.
The range of router numbers is calculated using a saturation growth method, generating irregular single-path and multi-path topologies. Transmission delay and area are optimized through multi-objective functions to generate topologies that adapt to different application requirements.
It improves the performance of multi-core processors, reduces power consumption, enhances system flexibility and communication efficiency, and solves the problems of performance bottlenecks and low resource utilization in traditional methods.
Smart Images
Figure CN117931727B_ABST