一种抵御重布线攻击的差分延时检测版图保护电路
By using a differential delay detection layout protection circuit and employing an interleaved routing method for delay detection lines and power lines, combined with digital circuit design, accurate detection of shielding integrity is achieved. This solves the problem of insufficient identification capability of active shielding layers in rewiring attacks and reduces the complexity and power consumption of the detection circuit.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SOUTHEAST UNIV
- Filing Date
- 2023-12-26
- Publication Date
- 2026-07-17
AI Technical Summary
Existing active shielding solutions struggle to effectively identify the integrity of the shielding layer when facing rewiring attacks, and the detection circuit design is highly complex, making it unable to effectively resist rewiring attacks.
A differential delay detection layout protection circuit was designed. It uses a shielding layer with stable output of inherent delay and a shielding layer integrity detection circuit based on delay acquisition. By using an interleaved wiring method for delay detection lines and power lines, combined with digital circuit design, the fluctuation range of the detection value is reduced. The accurate detection of the shielding layer delay parameters is achieved through a ring oscillator and a counter.
It improves the ability to identify rewiring attacks, reduces the design complexity of detection circuits, and can effectively identify the integrity of the shielding layer, reducing the detection area and power consumption.
Smart Images
Figure CN117938344B_ABST