Method for manufacturing a circuit board and circuit board

Abstract

A manufacturing method of a circuit board, comprising the steps of: dividing an inner layer circuit substrate into an inner buried area and a bending area; covering a peelable layer on the inner layer circuit substrate in the bending area; forming a first circuit substrate on a surface of the inner layer circuit substrate; forming a first blind hole penetrating the first circuit substrate in the bending area, and forming a second blind hole penetrating the inner layer circuit substrate in the bending area; arranging an electronic component on the first circuit substrate in the inner buried area; turning over the first circuit substrate in the bending area from the first blind hole, and bending the first circuit substrate from the second blind hole to cover a surface of the electronic component and electrically connect the electronic component; and forming an outer layer circuit substrate on the surface of the first circuit substrate and the electronic component. The application further provides a circuit board.

Description

Technical Field

[0001] This application relates to the field of circuit board technology, and more particularly to a method for manufacturing a circuit board and the circuit board itself. Background Technology

[0002] The manufacturing process for circuit boards with embedded components typically involves first fabricating a circuit board substrate, then performing a capping process to embed the electronic components within the circuit board substrate and electrically connecting them to the solder joints formed during capping. During the capping process, over-etching can easily occur, causing defects in the solder joints and resulting in poor electrical connection between the electronic components and the circuit board substrate. Summary of the Invention

[0003] A method for manufacturing a circuit board includes the following steps: providing an inner circuit board, the inner circuit board being divided into an embedded region and bending regions located on both sides of the embedded region; covering the inner circuit board located in the bending region with a peelable layer; forming a first circuit board on one surface of the inner circuit board, the first circuit board being covered with the peelable layer; forming a first blind via through the first circuit board in the bending region, and forming a second blind via through the inner circuit board in the bending region, the second blind via being located on the side of the first blind via closer to the embedded region; disposing electronic components on the first circuit board located in the embedded region; flipping the first circuit board located in the bending region from the first blind via, and bending the first circuit board from the second blind via to cover the surface of the electronic components away from the inner circuit board and electrically connecting the electronic components; forming an outer circuit board on the surface of the first circuit board, the outer circuit board also covering the electronic components and electrically connecting to the first circuit board.

[0004] In some embodiments, the step of forming the first circuit substrate includes: providing a first copper-clad laminate, the first copper-clad laminate including a first dielectric layer and a first copper layer; covering the surface of a peelable layer with a flexible layer; forming a notch through the first dielectric layer; covering the surface of the inner circuit substrate with the first copper-clad laminate having the notch, the flexible layer being accommodated in the notch; and fabricating circuits on the first copper layer to form a first circuit layer, thereby obtaining the first circuit substrate.

[0005] In some embodiments, during the step of forming the second blind hole, the second blind hole also penetrates the peelable layer, and the surface of the flexible layer is exposed to the second blind hole.

[0006] In some embodiments, the first circuit layer includes a first solder joint and a second solder joint, the first solder joint being located in an embedded region and the second solder joint being located in a bending region; the electronic component has pins disposed on the surface away from the inner circuit substrate; the manufacturing method includes the steps of: soldering the electronic component to the first solder joint; bending the first circuit substrate and electrically connecting the second solder joint to the pins using conductive paste.

[0007] In some embodiments, prior to the step of soldering electronic components onto the first circuit board, the fabrication method further includes: using a jig to separate the first circuit board located in the bending region from the peelable layer through a second blind hole.

[0008] In some embodiments, the manufacturing method further includes: forming a second circuit substrate on the surface of the inner circuit substrate facing away from the first circuit substrate; in the step of forming a second blind via, the second blind via is also disposed through the second circuit substrate.

[0009] A circuit board includes an inner circuit board, a first circuit board, electronic components, and an outer circuit board; the first circuit board is located on the surface of the inner circuit board; the electronic components are located on the surface of the first circuit board opposite to the inner circuit board, and the first circuit board further includes electronic components opposite to the surface of the inner circuit board and electrically connected to the electronic components; the outer circuit board covers the first circuit board and the electronic components are exposed on the surface of the first circuit board.

[0010] In some embodiments, the first circuit board includes a first circuit layer, the first circuit layer includes a first solder joint and a second solder joint, and the electronic component has pins on the surface away from the inner circuit board; the surface of the electronic component without pins is soldered to the first circuit board through the first solder joint, and the pins are electrically connected to the second solder joint through conductive paste.

[0011] In some embodiments, the circuit board further includes a flexible layer located in the bending region of the first circuit substrate and on the surface away from the electronic components, and the outer circuit substrate is also covered with the flexible layer.

[0012] In some embodiments, the circuit board further includes a second circuit board located on the surface of the inner circuit board opposite to the first circuit board, and the second circuit board is electrically connected to the inner circuit board.

[0013] The circuit board manufacturing method provided in this application does not involve a cover-up step, thus avoiding quality problems caused by cover-up in related technologies and reducing the manufacturing cycle. Secondly, in the process of forming the first and second blind vias, the bottom of the first and second blind vias are non-circuit layers with a certain etching space, which avoids the problem of excessive burning and unintended etching, leading to poor soldering, as in related technologies. Furthermore, in this application, the electronic components are embedded before the circuit board covering the electronic components is formed, resulting in a good appearance. Moreover, the direct electrical connection between the electronic components and the first circuit board and the outer circuit board can reduce signal loss between layers and achieve high efficiency in signal transmission between electronic components and circuit layers. Attached Figure Description

[0014] Figure 1 A cross-sectional schematic diagram of a multilayer circuit board provided for related technologies.

[0015] Figure 2 In order to be in Figure 1 A cross-sectional view of the first and second blind vias formed on a multilayer circuit board.

[0016] Figure 3 To Figure 2 The diagram shows a cross-sectional view of the circuit board obtained by connecting electronic components after opening the cover of the multilayer circuit board.

[0017] Figure 4 This is a cross-sectional schematic diagram of the inner layer circuit board provided in an embodiment of this application.

[0018] Figure 5 In order to be in Figure 4 The diagram shows a cross-section of the inner circuit board after a peelable layer has been applied.

[0019] Figure 6 In order to be in Figure 5 The diagram shows a cross-sectional view of the inner layer circuit board after the two opposite surfaces are covered with a first copper-clad laminate and a second copper-clad laminate, respectively.

[0020] Figure 7 To Figure 6 The diagram shows a cross-sectional view of the first copper-clad laminate after circuit fabrication to obtain a first circuit substrate, and the second copper-clad laminate after circuit fabrication to obtain a second circuit substrate.

[0021] Figure 8 In order to be in Figure 7 The diagram shows a cross-section after a first blind via is formed on the side of the first circuit board and a second blind via is formed on the side of the second circuit board.

[0022] Figure 9 for Figure 8 A top view of the structure shown.

[0023] Figure 10 for Figure 8 The diagram shown is a bottom view of the structure.

[0024] Figure 11 In order to be in Figure 8 The diagram shows a cross-sectional view of the first circuit board after electronic components have been connected.

[0025] Figure 12 To be Figure 11 The diagram shows a cross-sectional view of the first circuit board after it has been bent to cover the electronic components.

[0026] Figure 13 In order to be in Figure 12 The diagram shows a cross-sectional view of a circuit board formed by forming an outer circuit substrate on the structure shown.

[0027] Explanation of main component symbols Detailed Implementation To better understand the above-mentioned objectives, features, and advantages of this application, the application will be described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. Many specific details are set forth in the following description to provide a thorough understanding of this application; the described embodiments are merely some, not all, of the embodiments described in this application.

[0028] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. The term "and / or" as used herein includes all and any combination of one or more of the associated listed items.

[0029] In the various embodiments of this application, for ease of description and not limitation, the term "connection" used in the patent application specification and claims is not limited to physical or mechanical connections, whether direct or indirect. Terms such as "upper," "lower," "above," "below," "left," and "right" are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship also changes accordingly.

[0030] Please see Figures 1 to 3 In related technologies, the manufacturing method of the circuit board 100' with embedded components typically includes: Please see Figure 1 A multilayer circuit board 80' is formed. The multilayer circuit board 80' includes multiple dielectric layers (not shown in the figure) and multiple circuit layers (not shown in the figure). The circuit board 80' includes an embedded region I', which does not have a circuit layer.

[0031] Please see Figure 2 A first blind via 81' and a second blind via 82' are formed in the embedded area I'. The circuit layer in the circuit board 80' is exposed through the first blind via 81' to form a solder joint 83' for electrical connection. The second blind via 82' is subsequently used for opening the cover.

[0032] Please see Figure 3 A slot is cut to form a receiving groove 84', and an electronic component 60' is placed in the receiving groove 84' and electrically connected to the solder joint 83'.

[0033] The inventors of this case discovered that the above-mentioned manufacturing method is prone to over-etching during the formation of the first blind via 81' and the second blind via 82', resulting in defects in the solder joint 83', leading to poor subsequent soldering and making it difficult to control the yield of the circuit board 100'. As the number of layers of the multilayer circuit board 80' increases, the time for etching to form the first blind via 81' and the second blind via 82' increases, making it more prone to quality problems. After forming the above-mentioned multilayer circuit board 80', the steps of opening the cover and embedding electronic components 60' are prone to causing appearance problems.

[0034] Please see Figures 4 to 13 This application provides a method for manufacturing a circuit board 100 with embedded components, including the following steps: Step S1: Please refer to Figure 4 An inner circuit board 10 is provided, which is divided into an embedded region I and a bending region II.

[0035] In this embodiment, the inner circuit board 10 includes an inner dielectric layer 11 and two inner circuit layers 13. The two inner circuit layers 13 are located on opposite surfaces of the inner dielectric layer 11 and are electrically connected to each other. In other embodiments, the number of circuit layers in the inner circuit board 10 is not limited and can be one or more.

[0036] The inner dielectric layer 11 can be made of one of the following flexible materials: polyimide (PI), liquid crystal polymer (LCP), and modified polyimide (MPI), or it can be made of one of the following rigid materials: polypropylene (PP) and polytetrafluoroethylene (PTFE).

[0037] The inner layer circuit board 10 is divided along its length into an inner buried region I and a bending region II located on both sides of the inner buried region I. One surface of the inner layer dielectric layer 11 located in the bending region II is exposed to the inner layer circuit layer 13.

[0038] Step S2: Please refer to Figure 5 A peelable layer 20 is covered on the inner dielectric layer 11 located in the bending zone II.

[0039] A peelable layer 20 covers the inner dielectric layer 11 and exposes the surface of the inner circuit layer 13. The peelable layer 20 can be made of materials such as polyimide and polypropylene, and can be removed in subsequent processes.

[0040] Step S3: Please refer to Figure 6A first copper-clad laminate 35 and a second copper-clad laminate 45 are respectively covered on the two opposite surfaces of the inner circuit board 10.

[0041] The first copper-clad laminate 35 includes a first dielectric layer 31 and a first copper layer 352. The first dielectric layer 31 is connected to the inner circuit board 10 and is also connected to the peelable layer 20. The first copper layer 352 is located on the surface of the first dielectric layer 31 facing away from the inner circuit board 10. The second copper-clad laminate 45 includes a second dielectric layer 41 and a second copper layer 452. The second dielectric layer 41 is connected to the inner circuit board 10, and the second copper layer 452 is located on the surface of the second dielectric layer 41 facing away from the inner circuit board 10.

[0042] Both the first dielectric layer 31 and the second dielectric layer 41 can be made of flexible or rigid materials. In this embodiment, both the first dielectric layer 31 and the second dielectric layer 41 are rigid materials. To facilitate subsequent bending, the manufacturing method further includes the step of filling the bending area II with a flexible layer 25, which covers the peelable layer 20; the flexible layer 25 is made of a flexible material. In step S3, a notch 312 is formed penetrating the first dielectric layer 31. When the first copper-clad laminate 35 covers the surface of the inner circuit board 10, the flexible layer 25 is accommodated in the notch 312, and the first copper layer 352 is directly connected to the flexible layer 25.

[0043] In other embodiments, when the material of the first dielectric layer 31 is a flexible material, the step of forming the flexible layer 25 can be omitted.

[0044] Step S4: Please refer to Figure 7 The first copper-clad laminate 35 is used to fabricate circuits to form a first circuit substrate 30, and the second copper-clad laminate 45 is used to fabricate circuits to form a second circuit substrate 40.

[0045] Specifically, the first copper layer 352 is exposed, developed, and etched to form the first circuit layer 33, and the second copper layer 452 is exposed, developed, and etched to form the second circuit layer 43. During the circuit fabrication process, the first circuit layer 33 and the second circuit layer 43 are also electrically connected to the inner circuit layer 13. The first circuit layer 33 and the first dielectric layer 31 together form the first circuit substrate 30, and the second circuit layer 43 and the second dielectric layer 41 together form the second circuit substrate 40.

[0046] The first circuit layer 33 includes a plurality of first solder points 332 and a plurality of second solder points 334. The first solder points 332 are located in the embedded area I, and the second solder points 334 are located in the bending area II. Each first solder point 332 is electrically connected to each second solder point 334.

[0047] Step S5: Please refer to Figure 8A first blind hole 50 is formed in the first circuit board 30, and a second blind hole 55 is formed in the second circuit board 40 and the inner circuit board 10. The second blind hole 55 is located on the side of the first blind hole 50 near the buried area I.

[0048] Please refer to the following: Figure 9 The first blind hole 50 is located on the side of the second welding point 334 opposite to the first welding point 332 and is located within the bending area II. Each first blind hole 50 is C-shaped, and the end of the first blind hole 50 is close to the embedded area I.

[0049] Please refer to the following: Figure 10 The projection of the second blind via 55 on the first circuit board 30 is located between the first solder point 332 and the second solder point 334, and is located within the bending region II. Each second blind via 55 is elongated.

[0050] The first blind via 50 and the second blind via 55 can be formed using methods such as laser ablation and mechanical drilling. Due to processing errors, portions of both opposing surfaces of the peelable layer 20 can be removed to form parts of the first blind via 50 and the second blind via 55; or the peelable layer 20 can be penetrated; or a portion of the inner dielectric layer 11 can be removed to form a portion of the first blind via 50, and a portion of the flexible layer 25 can be removed to form a portion of the second blind via 55. The peelable layer 20 and the inner dielectric layer 11 provide ample etching space for forming the first blind via 50, and the peelable layer 20 and the flexible layer 25 provide ample etching space for forming the second blind via 55, greatly reducing the possibility of unintended etching of the circuit layers and thus improving the yield and quality of the subsequently manufactured circuit board 100.

[0051] In this embodiment, the first blind via 50 penetrates the first circuit board 30, and the peelable layer 20 is exposed on the surface of the first blind via 50; the second blind via 55 penetrates the second circuit board 40, the inner circuit board 10, the peelable layer 20 and extends into the flexible layer 25.

[0052] In this embodiment, there is one first blind hole 50 in each bending area II, and two second blind holes 55 in each bending area II. Both second blind holes 55 are located between the first blind hole 50 and the inner embedded area I.

[0053] Step S6: Please refer to Figure 11 Electronic components 60 are disposed on the first circuit board 30 located in the embedded area I.

[0054] In this embodiment, the electronic component 60 is soldered onto the first circuit board 30 at the first solder joint 332 using a connector 63 to fix the electronic component 60 and prevent displacement of the electronic component 60 during subsequent processes. In other embodiments, the connector 63 can also be an adhesive, which is used to fix the electronic component 60 to the first circuit board 30. The pins 61 of the electronic component 60 for electrical connection are located on the side opposite to the first circuit board 30. The first circuit board 30 located in the bending region II is exposed to the electronic component 60.

[0055] Before soldering the electronic component 60 to the first circuit board 30, a jig 57 can be used to loosen the first circuit board 30 located in the bending area II through the second blind hole 55, so that the first circuit board 30 located in the bending area II is separated from the peelable layer 20, thus avoiding the separation of the first circuit board 30 and the peelable layer 20 after the electronic component 60 is soldered, which would affect the connection reliability between the electronic component 60 and the first circuit board 30.

[0056] Step S7: Please refer to Figure 12 The first circuit board 30 located in the bending area II is flipped from the first blind hole 50, and the first circuit board 30 is bent from the second blind hole 55 to cover the surface of the electronic component 60 away from the inner circuit board 10 and electrically connect the electronic component 60.

[0057] Specifically, after the first circuit board 30 located in the bending area II is bent at the second blind hole 55, the two second blind holes 55 can be bent twice. The first circuit board 30 is bent at 90° at each second blind hole 55, so that the first circuit board 30 overlaps with the pin 61 of the electronic component 60. The second solder point 334 is connected to the pin 61 by conductive paste 65, thereby realizing the electrical connection between the first circuit board 30 and the electronic component 60.

[0058] After the electronic component 60 is electrically connected to the first circuit board 30, the peelable layer 20 can be removed.

[0059] Step S8: Please refer to Figure 13 An outer circuit board 70 is formed on the surface of the first circuit board 30, and the outer circuit board 70 also covers electronic components 60 and is electrically connected to the first circuit board 30.

[0060] The outer circuit board 70 includes an outer dielectric layer 71 and an outer circuit layer 73. The number of circuit layers in the outer circuit board 70 is not limited; it can be one or more layers. In this embodiment, both the outer dielectric layer 71 and the outer circuit layer 73 are single layers. The outer dielectric layer 71 is connected to the first circuit board 30 and the electronic component 60, and is also connected to the flexible layer 25. The outer circuit layer 73 is located on the surface of the outer dielectric layer 71 facing away from the first circuit board 30. The outer circuit layer 73 is electrically connected to the first circuit layer 33, which is attached to the electronic component 60, through a conductive via 75.

[0061] An outer circuit board 70 can also be formed on the surface of the second circuit board 40 opposite to the inner circuit board 10 to increase the number of circuit layers.

[0062] In the above manufacturing process, the step of forming the second circuit board 40 can also be omitted, and the subsequent steps will be adjusted accordingly.

[0063] Please refer to it again. Figure 13 This application also provides a circuit board 100 with embedded components, which can be manufactured by the above-described manufacturing method. The circuit board 100 includes an outer circuit board 70, a first circuit board 30, an inner circuit board 10, and a second circuit board 40 stacked sequentially, and the circuit board 100 also includes electronic components 60.

[0064] The inner circuit board 10 includes an inner dielectric layer 11 and an inner circuit layer 13. The inner circuit board 10 can be a flexible substrate or a rigid substrate. In this embodiment, the inner circuit board 10 is a rigid substrate.

[0065] The first circuit board 30 is located on the surface of the inner circuit board 10 opposite to the second circuit board 40. The first circuit board 30 can be a rigid substrate or a flexible substrate. In this embodiment, the first circuit board 30 is a rigid substrate.

[0066] The first circuit board 30 includes a first dielectric layer 31 and a first circuit layer 33 located on the surface of the first dielectric layer 31. The first circuit layer 33 is located on the surface of the first dielectric layer 31 opposite to the inner circuit board 10, and the first circuit layer 33 is electrically connected to the inner circuit layer 13. The first circuit layer 33 includes a plurality of first solder points 332 and a plurality of second solder points 334, and each first solder point 332 is electrically connected to each second solder point 334.

[0067] Electronic component 60 is located on the surface of first circuit board 30. First circuit board 30 semi-encloses electronic component 60. A flexible layer 25 is provided in the bending region II of first circuit board 30. Flexible layer 25 is provided on the surface of first circuit layer 33 facing first dielectric layer 31 to facilitate bending of rigid first circuit board 30. One surface of electronic component 60 is provided with lead 61. The surface of electronic component 60 without lead 61 is soldered to first solder point 332 to fix electronic component 60 and first circuit board 30. Lead 61 is electrically connected to second solder point 334 through conductive paste 65 to make electronic component 60 electrically connected to first circuit board 30.

[0068] The outer circuit board 70 covers the first circuit board 30 and the electronic component 60. The outer circuit board 70 can be a rigid substrate or a flexible substrate. The outer circuit board 70 includes an outer dielectric layer 71 and an outer circuit layer 73. The outer dielectric layer 71 is connected to the first circuit board 30 and the electronic component 60 exposed on the surface of the first circuit board 30. The outer dielectric layer 71 is also connected to the flexible layer 25. The outer circuit layer 73 is located on the surface of the outer dielectric layer 71 facing away from the first circuit board 30, and the outer circuit layer 73 is electrically connected to the first circuit layer 33 through a conductive via 75. The second circuit board 40 includes a second dielectric layer 41 and a second circuit layer 43. The second dielectric layer 41 is connected to the inner circuit board 10, and the second circuit layer 43 is located on the surface of the second dielectric layer 41 facing away from the inner circuit board 10. The second circuit layer 43 is electrically connected to the inner circuit layer 13. In some embodiments, the second circuit board 40 may be omitted.

[0069] The method for manufacturing the circuit board 100 provided in this application does not involve a cover-opening step, thus avoiding quality problems caused by cover-opening in related technologies and reducing the manufacturing cycle. Secondly, in the process of forming the first blind via 50 and the second blind via 55, the bottom of the first blind via 50 and the second blind via 55 are both non-circuit layers with a certain etching space, which avoids the problem of excessive burning and unintended etching, leading to poor soldering, as in related technologies. Furthermore, in this application, the electronic component 60 is embedded before the circuit board covering the electronic component 60 is formed, resulting in a good appearance. Moreover, the electronic component 60 is directly electrically connected to the first circuit board 30 and the outer circuit board 70, which can reduce signal loss between layers and achieve high efficiency in signal transmission between the electronic component 60 and the circuit layer.

[0070] The above embodiments are only used to illustrate the technical solutions of this application and are not intended to limit it. Although this application has been described in detail with reference to the above preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions to the technical solutions of this application should not depart from the spirit and scope of the technical solutions of this application.

Claims

1. A method for manufacturing a circuit board, characterized in that, Includes the following steps: An inner layer circuit board is provided, the inner layer circuit board being divided into an embedded area and a bending area located on both sides of the embedded area; A peelable layer is covered on the inner circuit board located in the bending region; A first circuit substrate is formed on one surface of the inner circuit substrate, and the first circuit substrate covers the peelable layer. A first blind hole is formed in the bending area and passes through the first circuit board. A second blind hole is formed in the bending area and on the side away from the first blind hole and passes through the inner circuit board. The second blind hole also penetrates the peelable layer. The second blind hole is located on the side of the first blind hole near the embedded area. Separate the first circuit board located in the bending area from the peelable layer through the second blind hole; Electronic components are disposed on the first circuit board located in the embedded area; Flip the first circuit board located in the bending area from the first blind hole, and bend the first circuit board from the second blind hole to cover the surface of the electronic component away from the inner circuit board and electrically connect the electronic component. as well as An outer circuit board is formed on the surface of the first circuit board, and the outer circuit board also covers the electronic component and is electrically connected to the first circuit board.

2. The method for manufacturing a circuit board according to claim 1, characterized in that, The steps for forming the first circuit board include: A first copper-clad laminate is provided, the first copper-clad laminate comprising a first dielectric layer and a first copper layer; A flexible layer is covered on the surface of the peelable layer; A notch is formed penetrating the first dielectric layer, and the first copper-clad laminate forming the notch is covered on the surface of the inner layer circuit board, with the flexible layer housed within the notch; and The first copper layer is fabricated to form a first circuit layer, thus obtaining the first circuit substrate.

3. The method for manufacturing a circuit board according to claim 2, characterized in that, In the step of forming the second blind hole, the surface of the flexible layer is exposed to the second blind hole.

4. The method for manufacturing a circuit board according to claim 2, characterized in that, The first circuit layer includes a first solder joint and a second solder joint, the first solder joint being located in the embedded area and the second solder joint being located in the bending area; the electronic component has pins disposed on the surface opposite to the inner circuit substrate; the manufacturing method includes the following steps: Solder the electronic component to the first solder joint; and The first circuit board is bent, and the second solder joint is electrically connected to the pin using conductive paste.

5. The method for manufacturing a circuit board according to claim 4, characterized in that, A jig is used to separate the first circuit board located in the bending area from the peelable layer through the second blind hole.

6. The method for manufacturing a circuit board according to claim 1, characterized in that, The manufacturing method further includes: forming a second circuit substrate on the surface of the inner circuit substrate opposite to the first circuit substrate. In the step of forming the second blind via, the second blind via is also disposed on the second circuit board.

7. A circuit board manufactured by the method of manufacturing a circuit board according to any one of claims 1-6, characterized in that, include: Inner circuit board; The first circuit board is located on the surface of the inner circuit board; An electronic component is located on the surface of the first circuit board opposite to the inner circuit board. The first circuit board also includes the electronic component on the surface opposite to the inner circuit board and is electrically connected to the electronic component. as well as An outer circuit board covers the first circuit board and the electronic components exposed on the surface of the first circuit board.

8. The circuit board according to claim 7, characterized in that, The first circuit board includes a first circuit layer, the first circuit layer includes a first solder joint and a second solder joint, and the electronic component has a pin on the surface away from the inner circuit board; the surface of the electronic component without the pin is soldered to the first circuit board through the first solder joint, and the pin is electrically connected to the second solder joint through conductive paste.

9. The circuit board according to claim 7, characterized in that, The circuit board further includes a second circuit board, which is located on the surface of the inner circuit board away from the first circuit board, and the second circuit board is electrically connected to the inner circuit board.

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