A method for simulating generation of a coherent rayleigh-distributed radar point clutter

Abstract

The application discloses a coherent LEE distribution radar point clutter simulation generation method, first constructs a lookup table, then generates two n-level m sequences through an improved linear feedback shift register, then transforms the two n-level m sequences into one complex Gaussian white noise sequence based on the constructed lookup table by using Box-Muller, then carries out low-pass filtering processing on the complex Gaussian white noise random sequence through a Gaussian spectrum filter to obtain a complex Gaussian colored noise random sequence, and finally generates coherent LEE distribution radar point clutter meeting radar parameters and environmental parameters through the complex Gaussian colored noise random sequence, so that real-time simulation generation of the coherent LEE distribution radar point clutter is realized.

Description

Technical Field

[0001] This invention belongs to the field of radar technology, and more specifically, relates to a method for simulating and generating coherent Ricean distribution radar point clutter based on FPGA for real-time simulation of radar clutter. Background Technology

[0002] In complex electromagnetic environments, modern radar signals often contain a large amount of clutter. Clutter can affect various aspects of radar performance, including but not limited to target range and velocity detection. Therefore, radar's ability to suppress clutter is also part of its performance indicators. To test radar's ability to suppress clutter, it is usually necessary to place the radar in various complex land, sea, and air environments for testing. Each test consumes a lot of manpower and resources. Radar clutter simulation can test radar performance by simulating clutter in various scenarios, greatly reducing the investment of manpower and resources, improving R&D efficiency, and enhancing operational safety.

[0003] The clutter that radar faces in various complex environments mainly includes volume clutter, surface clutter, and point clutter. Point clutter is a component of both volume clutter and surface clutter, and studying point clutter is helpful for subsequent research on volume clutter and surface clutter.

[0004] For point clutter simulation, various statistical distribution models are currently used to describe its spatial correlation characteristics, while the nth power spectrum model and Gaussian spectrum model are used to describe its temporal correlation characteristics. Typical statistical distribution models include Rayleigh distribution, Rice distribution, log-normal distribution, Weibull distribution, and K-distribution. These distributions are sufficient to describe radar point clutter under certain specific conditions, therefore their accurate modeling and real-time generation are crucial for the development, debugging, and verification of radar systems.

[0005] Methods for simulating various types of point clutter distributions are relatively mature. Initially, due to technological limitations, clutter simulation algorithms were limited to PC-based simulation verification, unsuitable for real-time signal processing, and unable to be implemented in engineering. With the development of integrated circuit and computer technologies, the emergence of Digital Signal Processors (DSPs) enabled the application of clutter simulation algorithms in engineering. DSPs can perform pipelined real-time processing of digital signals. However, with further technological advancements, the requirements for radar signal processing have gradually shifted to high precision, high speed, and high throughput. DSPs have become increasingly unable to meet the requirements of high speed and high throughput, especially in pulse radar applications involving a large number of... The calculation of parameters within and between pulses involves the fact that the period length of radar baseband signals is generally on the order of microseconds, while the operating time of DSPs is on the order of milliseconds or microseconds, and FPGAs can operate on the order of nanoseconds, making them more capable of real-time signal processing than DSPs. In addition, most of the calculations in FPGAs are fixed-point arithmetic, while DSPs perform floating-point arithmetic. Fixed-point arithmetic consumes fewer resources and takes less time than floating-point arithmetic. Furthermore, considering the advantages of FPGAs, such as high flexibility, high speed, and low power consumption, DSPs are gradually being replaced by FPGAs. Implementing clutter simulation algorithms on FPGAs has become a current and future development trend.

[0006] Because FPGAs can only perform multiplication and addition operations, and the simulation algorithms for each type of clutter are mainly divided into ZMNL (Zero Memory Nonlinear Transform) and SIRP (Sphere Invariant Stochastic Process) methods, both of which involve a nonlinear transformation step. This nonlinear transformation step involves solving complex mathematical functions such as linear functions, nonlinear functions, or transcendental functions. Some complex mathematical functions cannot be solved directly on FPGAs. Currently, the main approaches to implementing algorithms on FPGAs are as follows:

[0007] 1. At the mathematical theory level, complex algorithms are converted into simple multiplication and addition operations. This method is effective for some algorithms of moderate complexity, but once the algorithm is too complex, it is difficult to directly convert it into multiplication and addition operations.

[0008] 2. Using IP cores for solving: In FPGA, some specific IP cores can be called to solve specific special functions. For example, the cordic IP core can solve the arctangent function. Solving the arctangent function is a key formula for simulating the log-normal distribution. However, using IP cores for solving is not universal. For some other special functions, it may not be possible to find an IP core to solve them.

[0009] 3. Lookup Table Method: FPGAs lack the ability to directly solve complex mathematical functions. Therefore, complex mathematical functions can be solved on a PC using mathematical software such as MATLAB. The results are then processed into fixed-point representations and stored in the FPGA's memory resources, such as BRAM or DDR. The FPGA can then solve complex nonlinear functions by using the magnitude of the input variable as an address to traverse the memory resources and find the corresponding output. This method is fast, but requires significant storage capacity. As the accuracy of the calculation results increases, the data width and storage depth must also increase, potentially requiring substantial storage resources.

[0010] In summary, the implementation of coherent point clutter simulation algorithms based on FPGA is mainly considered from two perspectives: on the one hand, finding theoretical support for the implementation of various coherent point clutter; on the other hand, finding a suitable and universal method to solve complex mathematical functions in FPGA.

[0011] Coherent Ricean distributed radar point clutter is widely used in fields such as marine monitoring, military, meteorology, UAV and aircraft navigation, and geological exploration. The simulation generation of coherent Ricean distributed radar point clutter can effectively help the research and development and debugging of radar detection systems in various scenarios. Summary of the Invention

[0012] The purpose of this invention is to address the real-time simulation problem of coherent radar point clutter and the problem of solving complex mathematical functions during the simulation generation process. A real-time simulation generation method for coherent Rice distribution radar point clutter is proposed, which generates coherent Rice distribution radar point clutter that satisfies radar parameters and environmental parameters in an FPGA.

[0013] To achieve the above-mentioned objectives, a method for simulating and generating coherent Ricean distribution radar point clutter is proposed, characterized by comprising the following steps:

[0014] (1) Construct a lookup table;

[0015] Establish a fixed-point lookup table (u, S(u)) for the sine function and a fixed-point lookup table (u, C(u)) for the cosine function of the nth-order m sequence, where u represents the nth-order m sequence and n is greater than or equal to 2; S(u) and C(u) represent the sine and cosine values ​​corresponding to u, respectively.

[0016]

[0017]

[0018] Where, round represents rounding, and n1 represents the fixed-point decimal place width of the sine and cosine functions;

[0019] Construct a fixed-point lookup table (u, A(u)) for the logarithmic root function of an n-level m sequence, where A(u) represents the logarithmic root value corresponding to u;

[0020]

[0021] Where n2 represents the fixed-point decimal place width of the logarithmic root function;

[0022] Establish a lookup table for Gaussian spectral filter coefficients Where n3 is the coefficient number of the Gaussian spectral filter. This represents the n3rd filter coefficient;

[0023]

[0024] Where, σ f is the standard deviation of the Gaussian spectrum, N is the length of the Gaussian spectrum filter, and T0 is the radar pulse repetition period;

[0025] Establish a lookup table (i,k) of the slope of the special function of the coherent Rice distribution. i_fi ) and bias lookup table (i, b i_fi ), where i represents the interval number, k i_fi The fixed-point numerical representation of the slope of the i-th interval, b i_fi The fixed-point numerical representation of the bias of the i-th interval;

[0026] Establish a special function for generating coherent Ricean distribution radar point clutter:

[0027] u = σx + s, x ∈ (-4, 4)

[0028] Where x is the input floating-point variable of the special function, u is the output floating-point variable of the special function, and σ is the scaling parameter of the coherent Rice distribution;

[0029] Then x and u are converted into fixed-point variables that the FPGA can process. The conversion formula is as follows:

[0030]

[0031] Where n4 is the fixed-point decimal place width of the input floating-point variable x, and n5 is the fixed-point decimal place width of the output floating-point variable u. fi Let u be the fixed-point variable after the transformation of x. fi Let u be the fixed-point variable after transformation;

[0032] Next, the special function is moved along x. fi The direction is divided into K equally spaced intervals, where K is a power of 2; the maximum value x of the input and output variables in each interval is recorded. fi_max ufi_max and minimum value x fi_min u fi_min Then, based on the maximum and minimum values ​​of the input and output variables within the interval, determine a straight line equation:

[0033]

[0034] (2) Generate two n-level m sequences;

[0035] (2.1) Select two paths n * The primitive polynomial of an m-order sequence:

[0036]

[0037] Wherein, λ0~λ n The coefficients of the primitive polynomial;

[0038] (2.2) Set up two paths n * The initial state of the m-sequence, that is, setting the initial value of each shift register in the improved linear feedback shift register LSFR, must satisfy the condition that the initial values ​​cannot be 0 at the same time;

[0039] (2.3) Obtain two n paths through the improved LSFR * The sequence is of level m, and then two n-order segments are extracted respectively. * The lower n bits of the data bit width of the m-level sequence form two n-level m-sequences, denoted as u1 and u2;

[0040] (3) Generate a complex Gaussian white noise random sequence;

[0041] Obtain the sine value S(u1) and cosine value C(u1) of u1 using the sine function lookup table (u, S(u)) and the cosine function lookup table (u, C(u));

[0042] The logarithmic root value A(u2) of u2 is obtained by looking up the logarithmic root function table (u, A(u)).

[0043] Then, using Box-Muller, u1 and u2 are transformed into a single complex Gaussian white noise sequence, i.e.:

[0044]

[0045] Where x1 and x2 are the real and imaginary digital signals of the complex Gaussian white noise sequence, respectively;

[0046] (4) Generate a complex Gaussian colored noise random sequence;

[0047] (4.1) Design the Gaussian spectrum filter as an FIR filter and set the parameters (σ). fThen calculate the corresponding Gaussian spectral filter coefficients (N, T0).

[0048] (4.2) Regarding the Gaussian spectral filter coefficients Perform the following processing:

[0049]

[0050] Where n4 is the fixed-point decimal place width of the Gaussian spectral filter coefficients;

[0051] (4.3) The complex Gaussian white noise random sequence is low-pass filtered by a Gaussian spectrum filter to obtain a complex Gaussian colored noise random sequence. The real part digital signal and the imaginary part digital signal of the complex Gaussian colored noise random sequence are denoted as X and Y, respectively.

[0052] (5) Generate coherent Rice distribution radar point clutter;

[0053] (5.1) Calculate the interval i containing the real part of the digital signal X of the complex Gaussian colored noise random sequence;

[0054]

[0055] Among them, W X W represents the fixed-point decimal place width of the real part of the digital signal X. X Must be greater than or equal to

[0056] (5.2) Calculate the interval j in which the imaginary part of the digital signal Y of the complex Gaussian colored noise random sequence is located;

[0057]

[0058] Among them, W Y W represents the fixed-point decimal place width of the imaginary part of the digital signal X. Y Must be greater than or equal to

[0059] (5.3) Based on the interval i where the real part digital signal X and the imaginary part digital signal Y are located, the slope lookup table (i, k) is used. i_fi ) and bias lookup table (i, b i_fi Obtain the slope and bias of the real part digital signal X and the imaginary part digital signal Y, where the slope and bias of the real part digital signal X are denoted as k. i_fi b i_fi The slope and bias of the imaginary digital signal Y are denoted as k. j_fi b j_fi ;

[0060] (5.4) Generate coherent Rice distribution radar point clutter;

[0061]

[0062] Where U and V represent the real and imaginary digital signals of the generated coherent Ricean distribution radar point clutter, respectively.

[0063] The objective of this invention is achieved as follows:

[0064] This invention discloses a method for simulating and generating coherent Ricean-distributed radar point clutter. First, a lookup table is constructed. Then, two n-level m-sequences are generated using an improved linear feedback shift register. Based on the constructed lookup table, the two n-level m-sequences are transformed into a complex Gaussian white noise sequence using a Box-Muller algorithm. Next, the complex Gaussian white noise random sequence is low-pass filtered using a Gaussian spectral filter to obtain a complex Gaussian colored noise random sequence. Finally, a coherent Ricean-distributed radar point clutter satisfying radar and environmental parameters is generated using this complex Gaussian colored noise random sequence, thus achieving real-time simulation and generation of coherent Ricean-distributed radar point clutter.

[0065] Meanwhile, the coherent Rice distribution radar point clutter simulation generation method of the present invention also has the following beneficial effects:

[0066] (1) The present invention generates an n-level m-sequence using an improved LSFR structure, which further reduces the correlation between the n-level m-sequences at each adjacent time point, improves the randomness, and makes the power spectral density function smoother.

[0067] (2) This invention uses a method for solving complex mathematical functions in clutter simulation. Compared with the method of solving complex mathematical functions using IP cores in FPGA, this method is not only applicable to the simulation of clutter at coherent Rice distributed radar points, but also applicable to the simulation of clutter at other distributed radar points. It has strong versatility and flexibility. Compared with the method of pre-storing the nonlinear function results of software simulation and then solving the nonlinear function by looking up a table, this method saves more hardware resources.

[0068] (3) The present invention can realize the real-time simulation of coherent Rice distribution radar clutter on FPGA, and its parameters can be changed according to the changes in the environment, which is highly adaptable. Attached Figure Description

[0069] Figure 1 This is a flowchart of a method for simulating and generating coherent Ricean distribution radar point clutter according to the present invention;

[0070] Figure 2 (a) is a schematic diagram of the LSFR structure before the improvement. Figure 2 (b) is a schematic diagram of the improved LSFR structure;

[0071] Figure 3 This is a block diagram of the hardware implementation for generating coherent Rice distribution radar point clutter;

[0072] Figure 4 It is a comparison chart of the amplitude distribution histogram of the generated coherent Ricean distribution radar clutter and the theoretical probability density distribution function curve;

[0073] Figure 5 This is a comparison chart of the power spectrum curve of the generated coherent Rice distribution radar point clutter and the theoretical Gaussian power spectrum curve. Detailed Implementation

[0074] The specific embodiments of the present invention will now be described with reference to the accompanying drawings to enable those skilled in the art to better understand the invention. It should be particularly noted that in the following description, detailed descriptions of known functions and designs that might obscure the main content of the invention will be omitted here.

[0075] Example

[0076] Figure 1 This is a flowchart of a method for simulating and generating coherent Rice distribution radar clutter according to the present invention.

[0077] In this embodiment, as Figure 1 As shown, the present invention provides a method for simulating and generating coherent Ricean distribution radar point clutter, comprising the following steps:

[0078] S1. Construct the lookup table;

[0079] In this embodiment, it is assumed that the generated n-level m-sequence is a 10-level m-sequence. Therefore, the fixed-point decimal place width of the subsequent sine function, cosine function and logarithmic root function is 10, that is, n1 = n2 = 10.

[0080] Establish a fixed-point lookup table (u, S(u)) for the sine function and a fixed-point lookup table (u, C(u)) for the cosine function of the nth-order m sequence, where u represents the nth-order m sequence and n is greater than or equal to 2; S(u) and C(u) represent the sine and cosine values ​​corresponding to u, respectively.

[0081]

[0082]

[0083] Where, round represents rounding, and n1 represents the fixed-point decimal place width of the sine and cosine functions;

[0084] In various mathematical functions, the input and output variables may contain decimals. However, in FPGAs, decimals cannot be directly used for table lookups, calculations, and other operations. Therefore, it is necessary to amplify the decimals by an integer multiple and then round them to the nearest integer. This operation is called fixed-point amplification. Generally, the decimals are amplified by powers of 2, with an amplification factor of 2. P P is called the fixed-point decimal place width, so a fixed-point decimal place width processing operation is required in this step, and the subsequent lookup table is similar;

[0085] Construct a fixed-point lookup table (u, A(u)) for the logarithmic root function of an n-level m sequence, where A(u) represents the logarithmic root value corresponding to u;

[0086]

[0087] Where n2 represents the fixed-point decimal place width of the logarithmic root function;

[0088] Establish a lookup table for Gaussian spectral filter coefficients Where n3 is the coefficient number of the Gaussian spectral filter. This represents the n3rd filter coefficient;

[0089]

[0090] Where, σ f is the standard deviation of the Gaussian spectrum, N is the length of the Gaussian spectrum filter, and T0 is the radar pulse repetition period;

[0091] Establish a lookup table (i,k) of the slope of the special function of the coherent Rice distribution. i_fi ) and bias lookup table (i, b i_fi ), where i represents the interval number, k i_fi The fixed-point numerical representation of the slope of the i-th interval, b i_fi The fixed-point numerical representation of the bias of the i-th interval;

[0092] In this embodiment, when generating coherent Ricean distribution radar point clutter, there are two related special functions that need to be solved, namely:

[0093]

[0094] Where σ is the scaling parameter of the coherent Rice distribution, s is the non-central parameter of the coherent Rice distribution, x and y are the input floating-point variables of the special function, and u and v are the output floating-point variables of the special function. Since the two special functions essentially belong to the same category, the special function that needs to be solved for in the coherent Rice distribution can be represented as:

[0095] u = σx + s, x ∈ (-4, 4)

[0096] To apply this special function in an FPGA, x and u must first be converted into fixed-point variables that the FPGA can process. The conversion formula is as follows:

[0097]

[0098] Where n4 is the fixed-point decimal place width of the input floating-point variable x, and n5 is the fixed-point decimal place width of the output floating-point variable u. fi Let u be the fixed-point variable after the transformation of x. fi Let u be the fixed-point variable after transformation;

[0099] In this embodiment, n4 = 10, n5 = 20, σ = 2, and s = 5.

[0100] Similarly, if you need to convert a fixed-point number to a floating-point number, you can use the following conversion formula:

[0101]

[0102] Next, the special function is moved along x. fi The direction is divided into K = 4096 equally spaced intervals, where K is a power of 2; the maximum value x of the input and output variables in each interval is recorded. fi_max u fi_max and minimum value x fi_min u fi_min Then, based on the maximum and minimum values ​​of the input and output variables within the interval, determine a straight line equation:

[0103]

[0104] The slope and bias of each interval can be calculated using the above linear equation, and this can be used to approximate the special function within that interval. The larger the slope, the closer the linear equation is to the special function within that interval.

[0105] S2. Generate two n-level m sequences;

[0106] S2.1 In this embodiment, two n paths are selected. * =The primitive polynomials of the 17-level m-sequence are as follows:

[0107]

[0108] The coefficients in f1(x) are: λ0=λ 11 =λ 17 All other coefficients are 0; the coefficients in f2(x) are: λ0 = λ 14 =λ 17All other coefficients are 0;

[0109] S2.2, Set up two n paths * The initial state of the m-sequence, that is, setting the initial value of each shift register in the improved linear feedback shift register LSFR, must satisfy the condition that the initial values ​​cannot be 0 at the same time;

[0110] In this embodiment, before using the LSFR structure to start generating the m-sequence, each shift register needs to be assigned an initial value. The initial value assigned to each shift register cannot be 0 at the same time. In this embodiment, the initial state of both m-sequences is set to 0,0000,0000,0000,0001.

[0111] S2.3, Obtain two n paths using the improved LSFR * m-sequence;

[0112] Taking the LSFR structure that generates the first n* level m sequence as an example, the original LSFR structure is as follows: Figure 2 As shown in (a), this structure mainly consists of L shift registers q0,q1,…,q L-1 L feedback branches, 1 XOR module, and L delay modules. -k The system consists of feedback branches, where the feedback coefficients for each feedback branch are λ1, λ2, ..., λ. L Additionally, the delay module z -k The delay k satisfies: k = Ll min +1, where L represents the number of shift registers in the LSFR structure, l min Indicates all λ l The minimum value of l in the case where = 1, l∈[1,L]; In this embodiment, k=7 is set for the first time and k=4 for the second time;

[0113] The original LSFR structure was used to generate an n*-level m sequence after a delay of k time steps. Before the LSFR started running, each shift register needed to be initialized. Each shift register needed to be assigned an initial value. The initial values ​​assigned to each shift register could not all be 0 at the same time, because this would cause the LSFR clock output to be 0.

[0114] After initialization, at regular intervals, the LSFR structure will shift the a-th shift register q a The state is assigned to the (a-1)th register q a-1 That is, update q0,q1,...,q L-2The state of the shift register is given, where a ∈ [1.L-1]. Simultaneously, the state of each shift register is input to the XOR module via a feedback branch for XOR operation, and the output value of the XOR module is assigned to the Lth shift register q. L That is, update q L The state of the shift registers is updated at regular intervals; therefore, the state of each shift register in the LSFR structure is updated at regular intervals.

[0115] At the same time, each shift register is passed through a delay module z -k This allows us to obtain the state of each shift register after a delay of k time steps;

[0116] Finally, by concatenating the states of each shift register after a delay of k time steps, an n*-level m-sequence after a delay of k time steps can be generated.

[0117] The improved LSFR structure is as follows Figure 2 As shown in (b), this structure mainly consists of L shift registers q0, q1, ..., q L-1 The system consists of L sets of feedback networks, each containing L feedback branches and one XOR module. The feedback coefficients of the L feedback branches in the l-th feedback network are p... l1 ,p l2 ,…,p lL The improved LSFR structure is used to generate n*-level m sequences. Before the LSFR starts running, each shift register needs to be initialized. Each shift register needs to be assigned an initial value. The initial values ​​assigned to each shift register cannot be 0 at the same time, because this will cause the LSFR to always output 0.

[0118] After initialization, the state of each shift register is input into each set of feedback networks. In each set of feedback networks, the state of each shift register is input into the XOR module through the corresponding feedback branch for XOR operation. Then, the output value of the XOR module is assigned to the specified shift register. Specifically, the output value of each XOR module in feedback network 1, feedback network 2, ..., feedback network L is assigned to shift register q. L-1 ,q L-2 ,…,q0, that is, the state of each shift register is updated at every time interval;

[0119] Finally, by concatenating the states of each shift register, an n*-level m-sequence can be generated.

[0120] The differences between the improved LSFR structure and the original LSFR structure are as follows:

[0121] The feedback coefficients in the improved LSFR structure and the original LSFR structure have the following relationship:

[0122]

[0123] Where mod 2 means taking the remainder when divided by 2;

[0124] In the improved LSFR structure, the n*-level m-sequence obtained at the next time step is equivalent to the n*-level m-sequence obtained after a delay of k time units in the original structure.

[0125] The n*-level m-sequences generated according to the improved LSFR structure show decreased correlation between adjacent n*-level m-sequences, resulting in a smoother power spectral density function. In this embodiment, the n*-level m-sequences obtained by the improved LSFR structure are considered equivalent to the n*-level m-sequences obtained by delaying the original structure by k time units.

[0126] S2.4 Finally, extract the two paths n respectively. * The lower n bits of the data width of the m-sequence at level n constitute two n-level m-sequences. In this embodiment, the lower 10 bits of the data width of the two 17-level m-sequences constitute two 10-level m-sequences, denoted as u1 and u2.

[0127] S3. Generate a complex Gaussian white noise random sequence;

[0128] Obtain the sine value S(u1) and cosine value C(u1) of u1 using the sine function lookup table (u, S(u)) and the cosine function lookup table (u, C(u));

[0129] The logarithmic root value A(u2) of u2 is obtained by looking up the logarithmic root function table (u, A(u)).

[0130] Then, using the Box-Muller transform, u1 and u2 are transformed into a complex Gaussian white noise sequence, i.e.:

[0131]

[0132] Where x1 and x2 are the real and imaginary digital signals of the complex Gaussian white noise sequence, respectively;

[0133] In this embodiment, x1 and x2 are both fixed-point numbers. After being converted to floating-point numbers, they both follow a standard normal distribution N(0,1).

[0134] S4. Generate a complex Gaussian colored noise random sequence;

[0135] S4.1 Design the Gaussian spectrum filter as an FIR filter, and set the parameters (σ). fThen calculate the corresponding Gaussian spectral filter coefficients (N, T0).

[0136] S4.2 To ensure that the output amplitude of the Gaussian spectrum filter follows a standard normal distribution of N(0,1) and can be used in an FPGA, the coefficients of the Gaussian spectrum filter are adjusted. Perform the following processing:

[0137]

[0138] Where n4 is the fixed-point decimal place width of the Gaussian spectral filter coefficients;

[0139] S4.3. The complex Gaussian white noise random sequence is low-pass filtered by a Gaussian spectrum filter to obtain a complex Gaussian colored noise random sequence. The real part digital signal and the imaginary part digital signal of the complex Gaussian colored noise random sequence are denoted as X and Y, respectively.

[0140] In this embodiment, X and Y are both fixed-point numbers, and after being converted to floating-point numbers, they both follow a standard normal distribution N(0,1);

[0141] S5. Generate coherent Ricean distribution radar point clutter;

[0142] In this embodiment, the hardware block diagram for generating coherent Ricean distribution radar point clutter is as follows: Figure 3 As shown, firstly, the real part digital signal X of the complex Gaussian colored noise random sequence is judged, and the interval i in which the real part digital signal X of the complex Gaussian colored noise random sequence is located is calculated.

[0143]

[0144] Among them, W X W represents the fixed-point decimal place width of the real part of the digital signal X. X Must be greater than or equal to

[0145] Next, the imaginary part digital signal Y of the complex Gaussian colored noise random sequence is judged, and the interval j in which the imaginary part digital signal Y of the complex Gaussian colored noise random sequence is located is calculated;

[0146]

[0147] Among them, W Y W represents the fixed-point decimal place width of the imaginary part of the digital signal X. Y Must be greater than or equal to

[0148] In this embodiment, the interval containing the real and imaginary parts of the complex Gaussian colored noise random sequence is obtained in the FPGA, as shown below. Figure 3As shown, taking the interval i containing the real part of a complex Gaussian colored noise random sequence as an example:

[0149] First, let X and The input is given to an adder, and the output of the adder is denoted as SUM. X The data width is W X +1, then add SUM X Move to the right The shifted output is the interval number i where X is located.

[0150] Then, based on the intervals i and j where the real part digital signal X and the imaginary part digital signal Y are located, the slope lookup table (i, k) is used. i_fi ) and bias lookup table (i, b i_fi Obtain the slope and bias of the real part digital signal X and the imaginary part digital signal Y, where the slope and bias of the real part digital signal X are denoted as k. i_fi b i_fi The slope and bias of the imaginary digital signal Y are denoted as k. j_fi b j_fi ;

[0151] Finally, coherent Ricean distribution radar point clutter is generated;

[0152]

[0153] Where U and V represent the real and imaginary digital signals of the generated coherent Ricean distribution radar point clutter, respectively.

[0154] In this embodiment, coherent Ricean distribution radar clutter data generated by the FPGA is imported into Matlab for amplitude statistics and power spectrum estimation. The results are then compared with the theoretical Ricean distribution probability density function curve and the theoretical Gaussian power spectrum curve. The results are as follows: Figure 4 , Figure 5 As shown; where, Figure 4 In the figure, the histogram is the amplitude characteristic histogram of the coherent Rice distribution radar clutter generated in the FPGA in this invention. The dashed line represents the probability density function curve of the coherent Rice distribution with a scale parameter of σ = 2 and a non-center parameter of s = 5. Figure 5 In the diagram, the solid line represents the power spectrum curve of the coherent Rice distribution radar point clutter generated in the FPGA according to the present invention, and the dashed line represents the theoretical Gaussian power spectrum curve. As can be seen from the results, the amplitude characteristics and power spectrum curve of the coherent Rice distribution radar point clutter generated in the FPGA according to the present invention are basically the same as the theoretical curve, which meets the requirements.

[0155] Although the illustrative specific embodiments of the present invention have been described above to enable those skilled in the art to understand the invention, it should be understood that the invention is not limited to the scope of the specific embodiments. For those skilled in the art, various changes are obvious as long as they are within the spirit and scope of the invention as defined and determined by the appended claims, and all inventions utilizing the concept of the present invention are protected.

Claims

1. A method for simulating and generating coherent Ricean distribution radar point clutter, characterized in that, Includes the following steps: (1) Construct a lookup table; Establish about class Fixed-point lookup table for the sine function of a sequence Fixed-point lookup table for cosine function ,in, express class sequence, Greater than or equal to 2; , They represent The corresponding sine and cosine values; ； ； in, Indicates rounding down. The fixed-point decimal place width for sine and cosine functions; Establish about class Log-root function of a sequence, fixed-point lookup table ,in, express The corresponding logarithmic root value; ； in, This indicates the fixed-point decimal place width of the logarithmic root function; Establish a lookup table for Gaussian spectral filter coefficients ,in, These are the coefficient numbers for the Gaussian spectral filter. Indicates the first Each filter coefficient; ； in, It is the standard deviation of the Gaussian spectrum. It is the length of the Gaussian spectral filter. It is the radar pulse repetition period; Establish a lookup table for the slope of special functions of the coherent Rice distribution. and bias lookup table ,in, Indicates the interval number, Indicates the first The fixed-point numerical representation of the slope of an interval. Indicates the first Fixed-point numerical representation of the bias of an interval; Establish a special function for generating coherent Ricean distribution radar point clutter: ； in, It is a floating-point variable that is the input to a special function. It is the output floating-point variable of a special function. It is the scale parameter of the coherent Rice distribution. It is a non-central parameter of the coherent Rice distribution; Then and The conversion formula is as follows: This transforms the variable into a fixed-point number that can be processed by an FPGA. ； in, It is an input floating-point variable Fixed-point decimal place width, It outputs floating-point variables. Fixed-point decimal place width, for The transformed fixed-point variable, for The transformed fixed-point variable; Next, the special function is followed along The direction is divided into equal intervals. Each interval The value of is an integer power of 2; record the maximum value of the input and output variables within each interval. , and minimum value , Then, based on the maximum and minimum values ​​of the input and output variables within the interval, determine a straight line equation: ； (2) Generate two paths class sequence; (2.1) Select two paths class The primitive polynomial of the sequence: ； in, The coefficients of the primitive polynomial; (2.2) Set up two channels class The initial state of the sequence, that is, setting the initial value of each shift register in the improved linear feedback shift register LFSR, must satisfy the condition that the initial values ​​cannot be 0 at the same time; (2.3) Obtain two paths through the improved LFSR class The sequence is then processed, and two paths are extracted respectively. class Low in the sequence data bit width The position forms two paths class Sequence, denoted as , ; (3) Generate a complex Gaussian white noise random sequence; Lookup table based on sine function Sum and cosine function lookup table Get sine value Sum of cosine values ; Lookup table based on logarithmic root function Get The corresponding logarithmic root value ; Then use Box-Muller to... , Transform it into a complex Gaussian white noise sequence, that is: ； in, and These are the real and imaginary digital signals of the complex Gaussian white noise sequence, respectively. (4) Generate a complex Gaussian colored noise random sequence; (4.1) Design the Gaussian spectrum filter as an FIR filter and set the parameters. Then calculate the corresponding Gaussian spectral filter coefficients. ; (4.2) Regarding the Gaussian spectral filter coefficients Perform the following processing: ； in, It is the fixed-point decimal place width of the Gaussian spectral filter coefficients; (4.3) The complex Gaussian white noise random sequence is low-pass filtered by a Gaussian spectral filter to obtain a complex Gaussian colored noise random sequence. The real and imaginary digital signals of the complex Gaussian colored noise random sequence are denoted as follows: , ; (5) Generate coherent Rice distribution radar point clutter; (5.1) Calculate the digital signal of the real part of a complex Gaussian colored noise random sequence. Location of the interval ; ； in, Represents the real part of the digital signal Fixed-point decimal place width, Must be greater than or equal to ; (5.2) Calculate the imaginary part of the digital signal of a complex Gaussian colored noise random sequence. Location of the interval ; ； in, Represents the imaginary part of the digital signal Fixed-point decimal place width, Must be greater than or equal to ; (5.3) Based on the real part digital signal and imaginary part digital signal Location of the interval Lookup table by slope and bias lookup table Obtain the real part digital signal and imaginary part digital signal The slope and bias, where the real part of the digital signal The slope and bias are denoted as , Imaginary part digital signal The slope and bias are denoted as , ; (5.4) Generate coherent Ricean distribution radar point clutter; ； in, , These represent the real and imaginary digital signals of the generated coherent Ricean distribution radar point clutter, respectively.

2. The method for simulating and generating coherent Ricean distribution radar point clutter according to claim 1, characterized in that, The improved LFSR consists of L shift registers. and The feedback network is composed of groups, where each group of feedback networks contains... One feedback branch and one XOR module, the first The feedback coefficients of the L feedback paths in the group feedback network are respectively ; The state of each shift register is input into each set of feedback networks. In each set of feedback networks, the state of each shift register is input into the XOR module through the corresponding feedback branch for XOR operation. The output value of the XOR module is then assigned to the specified shift register. Specifically, the output value of each XOR module in feedback network 1, feedback network 2, ..., feedback network L is assigned to the shift register respectively. That is, the state of each shift register is updated at regular intervals; Finally, by concatenating the states of each shift register, an n*-level m-sequence can be generated. .

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