Flip chip and preparation method thereof, display panel

Abstract

The application relates to a flip chip and a preparation method thereof and a display panel. The flip chip is provided with a plurality of light guide grooves on a first electrode setting mesa of an epitaxial layer, the groove wall of the light guide groove is a light reflection surface, the light guide grooves can reflect light inside the epitaxial layer towards the side surface of the epitaxial layer, the reflection path of the light can not pass through a multi-quantum well layer, the absorption of the light by the multi-quantum well layer is reduced, the light emission efficiency of the flip chip is improved, meanwhile, the reduction of the absorption of the light by the multi-quantum well layer can reduce the heat generation of the multi-quantum well layer, the performance of the multi-quantum well layer is prevented from being affected, the internal quantum efficiency of the flip chip is maintained, the flip chip provided by the application guides the light towards the side surface of the epitaxial layer through the light guide effect of the light guide grooves, the probability of the light passing through the multi-quantum well layer is reduced, the light absorption of the multi-quantum well layer is reduced, the light emission efficiency of the flip chip is improved, and the quality of the flip chip is enhanced.

Description

Technical Field

[0001] This application relates to the field of light-emitting chip technology, and in particular to a flip chip and its fabrication method, and a display panel. Background Technology

[0002] In an LED (Light-Emitting Diode) chip, light emitted from the multi-quantum-well layer propagates outwards from the epitaxial layer. Some light reaches the outside of the epitaxial layer directly, while some is reflected at the interface between the epitaxial layer and other media, returning to the epitaxial layer. This reflected light may exit the epitaxial layer after one or more reflections, or it may be absorbed by the multi-quantum-well layer within the epitaxial layer, ultimately failing to emit light. The absorption of light by the multi-quantum-well layer reduces the light extraction efficiency of the epitaxial layer, affecting the external quantum efficiency of the LED chip. Furthermore, the absorption of light by the multi-quantum-well layer leads to a temperature increase, affecting its performance and consequently reducing the internal quantum efficiency of the LED chip, further impacting its light extraction efficiency.

[0003] Therefore, how to reduce the absorption of light by multiple quantum well layers and improve the light extraction efficiency of LED chips is a technical problem that urgently needs to be solved. Summary of the Invention

[0004] In view of the shortcomings of the above-mentioned related technologies, the purpose of this application is to provide a flip chip and its fabrication method, as well as a display panel, which aims to solve the problem of low light extraction efficiency of the chip due to the absorption of light by multiple quantum well layers.

[0005] This application first provides a flip chip, including:

[0006] The epitaxial layer has a first semiconductor layer, a multiple quantum well layer and a second semiconductor layer stacked sequentially.

[0007] The first electrode is electrically connected to the first semiconductor layer and located on the side of the first semiconductor layer away from the multi-quantum-well layer; and

[0008] A second electrode electrically connected to the second semiconductor layer and located on the side of the second semiconductor layer facing the multi-quantum-well layer;

[0009] Among them, the surface of the epitaxial layer with electrodes is an electrode setting surface. The electrode setting surface includes a first electrode setting platform configured to set a first electrode and a second electrode setting platform configured to set a second electrode. The first electrode setting platform is provided with a plurality of light guiding grooves. The groove walls of the light guiding grooves are reflective surfaces. The light guiding grooves are configured to reflect light incident on the groove walls from inside the epitaxial layer to the side of the epitaxial layer.

[0010] The aforementioned flip chip features multiple light-guiding grooves on the first electrode mesa of the epitaxial layer. The groove walls are reflective, reflecting light incident from within the epitaxial layer towards the reflective surface, thus avoiding the multi-quantum-well layer and reducing its absorption. This improves the chip's light extraction efficiency. Simultaneously, reduced absorption by the multi-quantum-well layer also decreases heat generation, preventing performance degradation and maintaining the chip's internal quantum efficiency. Therefore, the flip chip provided in this application guides light incident on the first electrode mesa towards the side of the epitaxial layer through the light-guiding grooves, reducing the probability of light passing through the multi-quantum-well layer, improving light extraction efficiency, and enhancing chip quality.

[0011] Optionally, the flip chip also includes:

[0012] The reflective layer covers the sides of the epitaxial layer.

[0013] The aforementioned flip chip also includes a reflective layer covering the sides of the epitaxial layer. This reduces or even eliminates light emission from the sides of the epitaxial layer, prompting more light to be emitted from the main light-emitting surface opposite to the electrode surface. This improves the light emission efficiency of the main light-emitting surface of the flip chip and enables focused light emission from the flip chip.

[0014] Optionally, the reflective layer also covers the electrode mounting surface, with at least a portion of the first electrode and the second electrode exposed in the reflective layer.

[0015] In the aforementioned flip chip, the reflective layer not only covers the sides of the epitaxial layer but also the electrode mounting surface of the epitaxial layer. This further promotes light emission from the main light-emitting surface of the flip chip, increasing the light output efficiency of the main light-emitting surface.

[0016] Optionally, the flip chip also includes:

[0017] A reflector is attached to the electrode mounting surface of the epitaxial layer and is configured to make the groove wall of the light guide groove a reflective surface.

[0018] The aforementioned flip chip also includes a reflector that fits into the wall of the light guide groove. The reflector makes the wall of the light guide groove a reflective surface, thus providing a light reflection function.

[0019] Alternatively, the reflector may be a metal reflector.

[0020] Optionally, the epitaxial layer is an AlGaInP (aluminum gallium indium phosphide) red light epitaxial layer.

[0021] Optionally, the cross-sectional area of ​​the light guide groove gradually decreases along the direction from the opening to the bottom of the groove.

[0022] Optionally, the cross-section of the light guide groove can be either circular or elliptical.

[0023] Optionally, the reflective surface of the light guide groove is an arc surface.

[0024] In the aforementioned flip chip, the reflective surface of the light guide groove is an arc surface. The arc surface has a good guiding effect on the light rays hitting the side of the epitaxial layer, which can improve the light guiding effect of the light guide groove compared to a flat surface.

[0025] Optionally, the cross-section of the light-guiding groove in the direction parallel to the multi-quantum well layer is either circular or elliptical, and the area of ​​the cross-section gradually decreases along the direction from the groove opening to the groove bottom.

[0026] Based on the same inventive concept, this application also provides a display panel, including:

[0027] Drive backplane; and

[0028] Multiple flip chips as described above; the flip chips are electrically connected to the driver backplane.

[0029] The flip-chip used in the aforementioned display panel has multiple light-guiding grooves on the electrode mounting surface of the epitaxial layer. The groove walls are reflective, which reflects light incident from inside the epitaxial layer onto the reflective surface towards the side of the epitaxial layer. This allows the reflected light to bypass the multi-quantum-well layer, reducing light absorption by the multi-quantum-well layer and improving the light extraction efficiency of the flip-chip. Simultaneously, reducing light absorption by the multi-quantum-well layer also reduces heat generation, preventing performance degradation and maintaining the internal quantum efficiency of the flip-chip. Therefore, the flip-chip provided in this application, through the light-guiding effect of the light-guiding grooves, directs light incident on the electrode mounting surface towards the side of the epitaxial layer, reducing the probability of light passing through the multi-quantum-well layer, improving the light extraction efficiency of the flip-chip, and enhancing the display effect of the display panel.

[0030] Based on the same inventive concept, this application also provides a flip chip fabrication method, applicable to the fabrication of flip chips according to any of the foregoing claims, the flip chip fabrication method comprising:

[0031] An epitaxial layer is provided, the epitaxial layer having a first semiconductor layer, a multiple quantum well layer and a second semiconductor layer stacked sequentially;

[0032] Starting from the side where the first semiconductor layer is located, the epitaxial layer is etched to expose the second electrode setting mesa and form multiple light guide grooves on the first electrode setting mesa. The first electrode setting mesa and the second electrode setting mesa are the mesas on the epitaxial layer where the first electrode and the second electrode are set, respectively.

[0033] The groove wall of the light guide groove is treated as a reflective surface;

[0034] A first electrode electrically connected to a first semiconductor layer and a second electrode electrically connected to a second semiconductor layer are provided.

[0035] The flip chip fabricated by the above-described flip chip fabrication method has multiple light-guiding grooves on the first electrode mesa of the epitaxial layer. The groove walls are reflective surfaces, which reflect light incident from inside the epitaxial layer toward the reflective surface toward the side of the epitaxial layer. This allows the reflected light to bypass the multi-quantum well layer, thereby reducing light absorption by the multi-quantum well layer and improving the light extraction efficiency of the flip chip. Simultaneously, reducing light absorption by the multi-quantum well layer also reduces heat generation in the multi-quantum well layer, preventing its performance from being affected and helping to maintain the internal quantum efficiency of the flip chip. Therefore, the flip chip provided in this application, through the light-guiding effect of the light-guiding grooves, guides light incident on the first electrode mesa toward the side of the epitaxial layer, reducing the probability of light passing through the multi-quantum well layer, improving the light extraction efficiency of the flip chip, and enhancing its quality.

[0036] Optionally, processing the groove wall of the light guide groove into a reflective surface includes:

[0037] A metal reflector is placed on the groove wall of the light guide groove;

[0038] After processing the groove walls of the light guide groove into a reflective surface, the process also includes:

[0039] A DBR (Distributed Bragg Reflection) layer is set on the side surface of the epitaxial layer and the electrode setting surface.

[0040] In the aforementioned flip chip fabrication method, a metal reflector is placed on the wall of the light guide groove to form a reflective surface. The metal reflector has strong reflectivity, which helps to improve the light reflectivity of the wall of the light guide groove. In addition, the flip chip fabrication method also sets a reflective layer covering the side surface of the epitaxial layer and the electrode setting surface. The reflective layer can cause the light rays that hit the side surface of the epitaxial layer to be reflected towards the main light-emitting surface of the flip chip, thereby improving the light-emitting efficiency of the main light-emitting surface of the flip chip, that is, increasing the effective light-emitting rate of the flip chip and realizing the focused light emission of the flip chip. Attached Figure Description

[0041] Figure 1 This is a schematic diagram of a flip chip structure in the related technology shown in this application;

[0042] Figure 2 This is a schematic diagram of the structure of the first flip chip provided in an optional embodiment of this application;

[0043] Figure 3for Figure 2 A schematic diagram of the optical path of some light rays inside the epitaxial layer of a flip-chip;

[0044] Figure 4 This is a schematic diagram of the structure of the second flip chip provided in an optional embodiment of this application;

[0045] Figure 5 This is a schematic diagram of the structure of the third flip chip provided in an optional embodiment of this application;

[0046] Figure 6 This is a schematic diagram of the structure of the fourth flip chip provided in an optional embodiment of this application;

[0047] Figure 7 This is a schematic diagram of the structure of the fifth flip chip provided in an optional embodiment of this application;

[0048] Figure 8 This is a schematic diagram of the sixth flip chip provided in an optional embodiment of this application;

[0049] Figure 9a This is a top view of a flip chip provided in an optional embodiment of this application;

[0050] Figure 9b This is another top view schematic diagram of the flip chip provided in an optional embodiment of this application;

[0051] Figure 9c This is another top view schematic diagram of the flip chip provided in an optional embodiment of this application;

[0052] Figure 10 This is a schematic diagram of the structure of a display panel provided in an optional embodiment of this application;

[0053] Figure 11 This is a schematic flowchart of a flip chip fabrication method provided in another optional embodiment of this application;

[0054] Figure 12 This is a schematic diagram of a flip chip manufacturing process provided in another optional embodiment of this application;

[0055] Figure 13 This is a schematic diagram of a flip chip structure provided in another optional embodiment of this application.

[0056] Explanation of reference numerals in the attached figures:

[0057] 10-Flip chip; 11-Epipolar layer; 11a-Electrode mounting surface; 11b-Main light-emitting surface; 11c-Side surface; 12-DBR layer; 13-First electrode; 14-Second electrode; 15-Transparent bonding layer; 16-Sapphire substrate; 20-Flip chip; 21-Epipolar layer; 21a-First electrode mounting mesa; 21b-Second electrode mounting mesa; 210-Light guide groove; 211-First semiconductor layer; 212-Multiple quantum well layer; 213- Second semiconductor layer; 221-First electrode; 222-Second electrode; 23-Metal mirror; 24-DBR layer; 30-Display panel; 31-Driver backplane; 1100-Substrate; 130-Flip chip; 131-Sapphire substrate; 132-Transparent bonding layer; 133-AlGaInP-based red light epitaxial layer; 1330-Light guide groove; 134-N electrode; 135-P electrode; 136-Metal mirror; 137-DBR layer. Detailed Implementation

[0058] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings. Preferred embodiments of this application are shown in the drawings. However, this application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of the disclosure of this application.

[0059] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the specification of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application.

[0060] Figure 1 A schematic diagram of a flip chip 10 in related technology is shown: one surface of the epitaxial layer 11 with electrodes is its electrode mounting surface 11a, and the other surface opposite to the electrode mounting surface 11a is the main light-emitting surface of the epitaxial layer 11, which is referred to as the "main light-emitting surface" 11b for ease of explanation. The side surface 11c of the epitaxial layer 11 connects the main light-emitting surface 11b and the electrode mounting surface 11a. A DBR layer 12 covers the electrode mounting surface 11a of the epitaxial layer 11, and the first electrode 13 and the second electrode 14 are partially exposed outside the DBR layer 12. Light emitted from the multiple quantum well layers in the epitaxial layer 11 will exit towards the outside of the epitaxial layer 11. A portion of this light can directly pass through the epitaxial layer 11 to achieve light emission, but some light will be reflected at the interface between the epitaxial layer 11 and other media, for example, at... Figure 1 In the process, light emitted from epitaxial layer 11 is reflected by DBR layer 12 after hitting it. Because the interface between DBR layer 12 and epitaxial layer 11 is flat, the reflected light... Figure 1 The reflection path of light (indicated by dashed lines with arrows) almost always passes through multiple quantum well layers. Multiple quantum well layers, especially AlGaInP-based ones, readily absorb light. Therefore, a portion of the light reflected back to the multiple quantum well layer will be absorbed and unable to escape. Similarly, Figure 1 In the flip chip 10, a sapphire substrate 16 is bonded to the main light-emitting surface 11b via a transparent bonding layer 15. Light rays incident from the multi-quantum-well layer onto the main light-emitting surface 11b are reflected when they reach the interface between the transparent bonding layer 15 and the epitaxial layer 11. The reflected path of this portion of light will most likely pass through the multi-quantum-well layer, thus being partially absorbed. More importantly, even if some reflected light passes through the multi-quantum-well layer without being absorbed, it will still be reflected again after reaching the DBR layer 12, requiring it to pass through the multi-quantum-well layer again. Understandably, the light oscillates between the main light-emitting surface 11b and the electrode placement surface 11a of the epitaxial layer 11, which greatly increases the probability of light absorption by the multi-quantum-well layer, reduces the light extraction efficiency of the epitaxial layer 11, and lowers the external quantum efficiency of the flip chip 10. Meanwhile, the multi-quantum well layer will generate heat and rise in temperature after absorbing photons, which in turn will affect the performance of the multi-quantum well layer, reduce the internal quantum efficiency of the flip chip 10, and further deteriorate the light output efficiency of the flip chip 10.

[0061] Therefore, this application aims to provide a solution that can solve the above-mentioned technical problems, the details of which will be described in subsequent embodiments.

[0062] An optional embodiment of this application:

[0063] This embodiment first provides a flip chip; please refer to [link / reference]. Figure 2 The following is a schematic diagram of the structure of the flip chip 20:

[0064] The flip chip 20 includes an epitaxial layer 21 and electrodes. The epitaxial layer 21 comprises a first semiconductor layer 211, a multiple quantum well layer 212, and a second semiconductor layer 213 stacked sequentially. One of the first semiconductor layer 211 and the second semiconductor layer 213 is an N-type doped N-type semiconductor layer, and the other is a P-type doped P-type semiconductor layer. It is understood that, in addition to the three basic layer structures mentioned above, the epitaxial layer 21 may also include one or more other layer structures, such as a buffer layer, a transition layer, a current spreading layer, or a waveguide layer.

[0065] The electrodes include a first electrode 221 electrically connected to the first semiconductor layer 211, and a second electrode 222 electrically connected to the second semiconductor layer 213. Because... Figure 2 The chip shown is a flip-chip structure, so the first electrode 221 and the second electrode 222 are both located on the same side of the epitaxial layer 21. For example, in Figure 2In this configuration, the first electrode 221 is located on the side of the first semiconductor layer 211 away from the multi-quantum well layer 212, and the second electrode 222 is located on the side of the second semiconductor layer 213 facing the multi-quantum well layer 212. Figure 2 In terms of the orientation shown, with the second semiconductor layer 213 below and the first semiconductor layer 211 above, both the first electrode 221 and the second electrode 222 are located on the upper side of the epitaxial layer 21.

[0066] In this embodiment, the surface on which the electrodes are disposed of in the epitaxial layer 21 is also referred to as the electrode placement surface, the side of the epitaxial layer 21 opposite to the electrode placement surface is referred to as the main light-emitting surface, and the surface connecting the electrode placement surface and the main light-emitting surface is referred to as the side surface of the epitaxial layer 21. It is understood that the electrode placement surface of the epitaxial layer 21 is not a flat surface on the same plane; it can be divided into at least two parts: a platform for the first electrode 221, i.e., the first electrode placement platform 21a, and a platform for the second electrode 222, i.e., the second electrode placement platform 21b. The first electrode placement platform 21a and the second electrode placement platform 21b have different heights, with the first electrode placement platform 21a being higher than the second electrode placement platform 21b.

[0067] In this embodiment, a plurality of light-guiding grooves 210 are provided on the first electrode setting platform 21a of the epitaxial layer 21. The light-guiding grooves 210 are grooves whose openings are located on the first electrode setting platform 21a and recessed towards the interior of the epitaxial layer 21. The groove walls of the light-guiding grooves 210 are reflective surfaces. When light from inside the epitaxial layer 21 strikes the first electrode setting platform 21a and reaches the groove wall of the light-guiding groove 210, it will be reflected by the groove wall, i.e., by the reflective surface. Furthermore, the light-guiding grooves 210 guide and direct the light, ensuring that the light is reflected towards the side of the epitaxial layer 21. It can be understood that the provision of the light-guiding grooves 210 allows the light reflected by the first electrode setting platform 21a to be directed towards the side of the epitaxial layer 21, such as... Figure 3 As shown, this allows the reflection path of the reflected light to avoid the multiple quantum well layer 212 in the epitaxial layer 21 as much as possible, reducing the probability of the reflected light being absorbed by the multiple quantum well layer 212, thereby improving the light extraction efficiency of the flip chip 20 and maintaining the performance of the epitaxial layer 21.

[0068] A reflective material is disposed on the groove wall of the light guide groove 210, thereby forming a reflective surface on the groove wall. In some examples of this embodiment, the reflective material is attached to the groove wall of the light guide groove 210 to form a reflective mirror, the function of which is to make the groove wall of the light guide groove 210 a reflective surface with reflective capabilities. For example, in some examples, a metal material is deposited on the groove wall of the light guide groove 210, and this metal material forms a metal reflective mirror 23. Please continue to see... Figure 2 and Figure 3 Those skilled in the art will understand that the metal forming the metal reflector 23 should have good reflective properties. For example, in some examples, at least one of metals including, but not limited to, Au (gold), Ag (silver), Al (aluminum), and Cu (copper) can be selected to form the metal reflector 23. Considering that metals such as Cu are yellowish in color, which will affect the color of the reflected light to some extent, thus causing color shift in the flip chip 20, in some examples of this embodiment, metals with a silvery or whiter color, such as Ag and Al, are preferred to be selected to form the metal reflector 23. Figure 2 and Figure 3 The metal reflector 23 is disposed along the wall of the light guide groove 210. In the longitudinal section of the flip chip 20 perpendicular to the main light-emitting surface, the shape of the surface of the metal reflector 23 facing the light guide groove 210 is the same as the shape of the wall of the light guide groove 210, and the shape of the surface away from the epitaxial layer 21 is also the same as the shape of the wall of the light guide groove 210. However, in some other examples of this embodiment, the metal reflector 23 may not be disposed along the wall of the light guide groove 210. For example, the metal material is directly filled in the light guide groove 210. In this case, in the longitudinal section of the flip chip 20, the shape of the surface of the metal reflector 23 facing the light guide groove 210 is the same as the shape of the wall of the light guide groove 210, but the shape of the surface away from the epitaxial layer 21 will be different from the shape of the wall of the light guide groove 210.

[0069] In other examples, the mirror disposed on the groove wall of the light guide groove 210 can also be formed of a non-metallic material, such as a distributed Bragg reflector formed of an oxide material. For example, in some examples of this embodiment, the mirror disposed on the groove wall of the light guide groove 210 is a DBR layer 24, for example, see [link to relevant documentation]. Figure 4 A schematic diagram of another flip chip 20 is shown.

[0070] In some examples of this embodiment, a metal mirror 23 and a DBR layer 24 can be simultaneously disposed on the first electrode placement mesa 21a of the epitaxial layer 21. Please refer to [link to relevant documentation]. Figure 5 As shown. In Figure 5 In the flip chip 20 shown, the metal mirror 23 is fitted to the wall of the light guide groove 210, while the DBR layer 24 partially covers the side of the metal mirror 23 away from the groove wall and partially covers the surface of the epitaxial layer 21.

[0071] In some examples of this embodiment, the light guide groove 210 can be simultaneously disposed on both the first electrode setting platform 21a and the second electrode setting platform 21b, such as... Figure 4As shown. In some examples, the light guide groove 210 may only be provided on the first electrode setting mesa 21a, and not on the second electrode setting mesa 21b. Those skilled in the art should understand that since the second electrode setting mesa 21b is located between the multi-quantum well layer 212 and the main light-emitting surface, even if the surface of the second electrode setting mesa 21b is flat, when it reflects light from the epitaxial layer 21 toward this mesa, it will not basically direct the light toward the multi-quantum well layer 212. Therefore, in this case, providing the light guide groove 210 on the second electrode setting mesa 21b is not very meaningful; in some cases, even providing the light guide groove 210 on the second electrode setting mesa 21b may reduce the light output efficiency of the main light-emitting surface.

[0072] In some examples of this embodiment, the flip chip 20 also includes a reflective layer disposed on the side of the epitaxial layer 21. The reflective layer covers the side of the epitaxial layer 21. It is understood that with the reflective layer disposed on the side of the epitaxial layer 21, light reflected from the wall of the light guide groove 210 to the side of the epitaxial layer 21 cannot be directed from the side; instead, it will be reflected again by the reflective layer on the side, causing this light to ultimately exit from the main light-emitting surface of the epitaxial layer 21. This increases the light extraction efficiency of the main light-emitting surface of the flip chip 20 and improves the concentration of light emitted from the flip chip 20. For example, please refer to... Figure 6 In this embodiment, a metal reflector 23 is disposed in the groove wall of the light guide groove 210. Simultaneously, the flip chip 20 also includes a DBR layer 24 that covers the side surface of the epitaxial layer 21; this DBR layer 24 is the reflective layer covering the side surface of the epitaxial layer 21. In other examples of this embodiment, such as... Figure 7 As shown, the DBR layer 24 can also simultaneously cover the electrode mounting surface and side surface of the epitaxial layer 21, and a metal reflector 23 is also disposed on the groove wall of the light guide groove 210. Therefore, in Figure 7 In the flip chip 20 shown, the reflective layer covers not only the sides of the epitaxial layer 21 but also the electrode mounting surface of the epitaxial layer 21, only exposing the first electrode 221 and the second electrode 222. However, in some other examples of this embodiment, the flip chip 20 may not have a metal reflector, but only a DBR layer 24 that covers both the sides of the epitaxial layer 21 and the electrode mounting surface. For example, please refer to [reference needed]. Figure 8 A schematic diagram of a flip chip structure is shown. Figure 8 In this process, the portion of the DBR layer 24 covering the first electrode mounting platform 21a can be used as the aforementioned reflector, and the portion of the DBR layer 24 covering the side of the epitaxial layer 21 can be used as the aforementioned reflective layer.

[0073] In some examples of this embodiment, the cross-section of the light guide groove 210 gradually decreases along the direction from the groove opening to the bottom of the groove: in the longitudinal section of the partial flip chip 20, the outline of the light guide groove 210 can be formed by connecting an arc segment and a straight line segment end to end, wherein the arc can be a minor arc (e.g., Figure 4 As shown), or a semi-circular arc. When the arc segment is a semi-circular arc, the outline of the light guide groove 210 is semi-circular, such as... Figure 2 , Figure 3 as well as Figures 7 to 8 In the longitudinal section of another flip chip 20, the outline of the light guide groove 210 can also be triangular, for example... Figure 5 and Figure 6 As shown; in some flip-chip 20 longitudinal sections, the outline of the light guide groove 210 can be an inverted trapezoid.

[0074] It is understood that when the outline of the light guide groove 210 in the longitudinal section of the flip chip 20 includes an arc segment, the reflective surface of the light guide groove 210 is an arc surface. In some examples of this embodiment, the outline of the light guide groove 210 in the first longitudinal section of the flip chip 20 is formed by an arc segment a and a straight line segment b connected end to end. The first longitudinal section is perpendicular to the main light-emitting surface, and the line connecting the first electrode 221 and the second electrode 222 is located in the first longitudinal section. That is, the first longitudinal section is the plane formed by the first electrode 221 and the second electrode 222. At the same time, the outline of the light guide groove 210 in the second longitudinal section of the flip chip 20 is also formed by an arc segment c and a straight line segment d connected end to end. The second longitudinal section is perpendicular to the main light-emitting surface, and the line connecting the first electrode 221 and the second electrode 222 is perpendicular to the second longitudinal section. In this example, the space within the light guide groove 210 is hemispherical or "quasi-hemispherical." For example, in some examples, the cross-section of the light guide groove 210 (or the groove shape of the light guide groove 210) is circular, elliptical, or other curved shapes. For example, please refer to [link to relevant documentation]. Figure 9a , Figure 9b as well as Figure 9c The diagrams show several top views of the flip-chip 20. As can be seen from these figures, the shape of the light guide groove 210 can be circular, elliptical, or racetrack-shaped. In some examples of this embodiment, the light guide groove 210 can be uniformly distributed across the entire electrode mounting surface, or uniformly distributed on the first electrode mounting platform 21a. In some examples of this embodiment, the light guide groove 210 can be arrayed on the first electrode mounting platform 21a, avoiding only the location of the first electrode 221.

[0075] In other examples of this embodiment, the reflective surface of the light guide groove 210 is also curved. In a certain longitudinal section of the flip chip 20, the outline of the light guide groove 210 is formed by connecting curved segments and straight segments end to end. However, in other longitudinal sections of the flip chip 20, the outline of the light guide groove 210 may not have curved segments; for example, the outline of the light guide groove 210 may be rectangular. For instance, in a first longitudinal section of a flip chip 20, the outline of the light guide groove 210 is semi-circular, but in a second longitudinal section of the flip chip 20, the outline of the light guide groove 210 is a rectangle with a large length-to-width ratio.

[0076] It is understandable that if the internal space of the light guide groove 210 is hemispherical or "quasi-hemispherical", then each area of ​​the reflective surface of the light guide groove 210 has a basically consistent ability to reflect light to the side of the epitaxial layer 21, which can ensure the uniformity of light output from the flip chip 20.

[0077] This embodiment also provides a display panel; please refer to [link / reference]. Figure 10 The display panel 30 includes a driving backplate 31 and multiple flip chips 20 electrically connected to the driving circuit on the driving backplate 31. The flip chips 20 can be any type of chip with light guide grooves provided earlier in this embodiment, and their structure will not be described in detail here.

[0078] The flip chip and display panel provided in this embodiment have a light-guiding groove with a light-guiding function on the first electrode setting platform of the flip chip epitaxial layer. The reflective surface of the light-guiding groove reflects the light that shines from inside the epitaxial layer onto the wall of the light-guiding groove toward the side of the epitaxial layer. This reduces the number of times the light reflected by the electrode reflective surface passes through the multi-quantum well layer, which helps to reduce the absorption of light by the multi-quantum well layer and improve the light extraction efficiency of the flip chip.

[0079] Another optional embodiment of this application:

[0080] This embodiment will provide a flip chip fabrication method. Please refer to [link to relevant documentation]. Figure 11 as well as Figure 12 ,in Figure 11 The diagram shown is a flowchart of the flip chip fabrication method. Figure 12 The diagram shown illustrates the manufacturing process of this flip chip:

[0081] S1102: Provides an epitaxial layer.

[0082] First, an extension layer 21 is provided, such as Figure 12In (a) of this embodiment, the epitaxial layer 21 comprises, from bottom to top, a second semiconductor layer 213, a multiple quantum well layer 212, and a first semiconductor layer 211. In some examples of this embodiment, the epitaxial layer 21 is an AlGaInP-based red light epitaxial layer; in other examples, the epitaxial layer 21 can be a GaN (gallium nitride)-based blue-green light epitaxial layer. It is understood that, typically, the epitaxial layer 21 is located on the substrate 1100, such as... Figure 12 As shown in (a), if the epitaxial layer 21 is a GaN-based blue-green epitaxial layer, then the substrate 1100 can be the growth substrate of the epitaxial layer 21, which can be a sapphire substrate, a Si (silicon) substrate, or a GaN substrate. Furthermore, when the substrate 1100 is the growth substrate of the epitaxial layer 21, the N-type semiconductor layer in the epitaxial layer 21 is usually closer to the substrate 1100, therefore... Figure 12 In (a), the second semiconductor layer 213 can be an N-type semiconductor layer, while the first semiconductor layer 211 can be a P-type semiconductor layer. If the epitaxial layer 21 is a GaN-based red light epitaxial layer, then the substrate 1100 is usually not the growth substrate for the epitaxial layer 21. The epitaxial layer 21 needs to be transferred and bonded to the substrate 1100 after its growth on its own substrate. In this case, Figure 12 (a) The second semiconductor layer 213 can be a P-type semiconductor layer, while the first semiconductor layer 211 can be an N-type semiconductor layer. Furthermore, there is a transparent bonding layer between the P-type semiconductor layer and the substrate 1100.

[0083] S1104: Starting from the side where the first semiconductor layer is located, the epitaxial layer is etched to expose the second electrode setting mesa and form multiple light guide grooves on the first electrode setting mesa.

[0084] Subsequently, the epitaxial layer 21 can be patterned. For example, in this embodiment, etching is performed on the epitaxial layer 21 from the side where the first semiconductor layer 211 is located. Dry etching is used in this embodiment to expose the second electrode mesa 21b of the epitaxial layer 21 through etching. Multiple light-guiding grooves 210 are formed on the first electrode mesa 21a of the epitaxial layer 21 through etching. In this embodiment, light-guiding grooves 210 are formed only on the first electrode mesa 21a, while no grooves are formed on the upper side of the second electrode mesa 21b. Figure 12 As shown in (b) of the diagram.

[0085] Those skilled in the art will understand that, when etching the epitaxial layer, the exposed second electrode mesa 21b can be etched first, and then the light guide groove 210 can be formed; alternatively, the light guide groove 210 can be formed first, and then the second electrode mesa 21b can be exposed. In some examples, the etching process of forming the light guide groove 210 and the etching process of exposing the second electrode mesa 21b can be performed simultaneously.

[0086] Furthermore, the light guide groove 210 formed in this embodiment is hemispherical, for example... Figure 12 In (b), the light guide groove 210 is hemispherical, but in some other examples of this embodiment, the light guide groove 210 may also be other shapes. For example, its outline in the first longitudinal section may be a shape formed by a straight line segment and an arc segment connected end to end, but its outline in the second longitudinal section may be rectangular; for another example, the light guide groove 210 may be an inverted pyramid shape, such as a triangular pyramid, a square pyramid, a pentagonal pyramid, etc.; or the light guide groove 210 may be an inverted frustum shape.

[0087] S1106: The groove wall of the light guide groove is treated as a reflective surface.

[0088] In this embodiment, after the etching of the epitaxial layer 21 is completed, the groove wall of the light guide groove 210 can be processed to make it a reflective surface. In some examples of this embodiment, a reflector can be set on the groove wall of the light guide groove 210 by processes such as vapor deposition, PVD (Physical Vapor Deposition), CVD (Chemical Vapor Deposition), or even ALD (Atomic Layer Deposition). This reflector can be a metal reflector 23, such as... Figure 12 As shown in (c), it can also be DBR.

[0089] exist Figure 12 In the process, after a metal reflector 23 is placed on the wall of the light guide groove 210, a DBR layer 24 can be deposited on the epitaxial layer 21 by vapor deposition, such as... Figure 12 As shown in (d) in the figure. In some examples, the DBR layer 24 only covers the side surface of the epitaxial layer 21, and in other examples, the DBR layer 24 is only disposed on the electrode surface of the epitaxial layer 21. Figure 12 In the middle, the DBR layer 24 simultaneously covers the side surface of the epitaxial layer 21 and the electrode setting surface.

[0090] S1108: A first electrode electrically connected to the first semiconductor layer and a second electrode electrically connected to the second semiconductor layer are provided.

[0091] Subsequently, a first electrode 221 and a second electrode 222 can be disposed on the epitaxial layer 21. The first electrode 221 is disposed on the first electrode mesa 21a and electrically connected to the first semiconductor layer 211 in the epitaxial layer 21. The second electrode 222 is disposed on the second electrode mesa 21b and electrically connected to the second semiconductor layer 213 in the epitaxial layer 21. Figure 12As shown in (e) in the figure. Those skilled in the art will understand that if a DBR layer 24 is formed on the electrode setting surface of the epitaxial layer 21 before the electrode is set, the DBR layer 24 usually covers the entire electrode setting surface. Therefore, before the electrode is set, the portion of the DBR layer 24 covering the electrode setting surface needs to be patterned so that the electrode setting area is exposed. Then, electrode materials are set in the exposed electrode setting area by means of evaporation, substrate or other methods to form the first electrode 221 and the second electrode 222.

[0092] In some examples of this embodiment, all electrode setup processes are performed after the DBR layer 24 is set. However, in other examples, a portion of the electrode can be set before the DBR layer 24 is set, and then the DBR layer 24 is set. After the DBR layer 24 is set, it is patterned, and the remaining electrode setup processes are completed. For example, the metal contact layers of the first electrode 221 and the second electrode 222 can be set before the DBR layer 24 is set, and then the DBR layer 24 is fabricated. After the DBR layer is fabricated, it is subjected to ICP etching to expose the metal contact layers of the first electrode 221 and the second electrode 222. Then, metal is deposited on the two metal contact layers to complete the electrode setup and obtain the flip chip 20.

[0093] The flip chip fabrication method provided in this embodiment involves setting multiple light-guiding grooves on the first electrode mesa of the epitaxial layer. The groove walls are reflective surfaces, which reflect light incident from inside the epitaxial layer toward the reflective surface toward the side of the epitaxial layer. This allows the reflected light to bypass the multi-quantum well layer, thereby reducing light absorption by the multi-quantum well layer and improving the light extraction efficiency of the flip chip. Simultaneously, reducing light absorption by the multi-quantum well layer also reduces heat generation, preventing performance degradation and maintaining the internal quantum efficiency of the flip chip. Therefore, the flip chip provided in this application, through the light-guiding effect of the light-guiding grooves, directs light incident on the first electrode mesa toward the side of the epitaxial layer, reducing the probability of light passing through the multi-quantum well layer, improving the light extraction efficiency of the flip chip, and enhancing its quality.

[0094] Another optional embodiment of this application:

[0095] To make the details and advantages of the flip chip provided in the foregoing embodiments clearer to those skilled in the art, this embodiment will further describe them with reference to examples. Please refer to [link to relevant documentation]. Figure 13 A flip chip 130 is shown:

[0096] The flip chip 130 provided in this embodiment has a sapphire substrate 131, a transparent bonding layer 132, and an AlGaInP-based red epitaxial layer 133 bonded to the sapphire substrate 131 via the transparent bonding layer 132. The AlGaInP-based red epitaxial layer 133 includes, from bottom to top, a P-type confinement layer, a multiple quantum well layer, and an N-type confinement layer. In some examples of this embodiment, the AlGaInP-based red epitaxial layer 133 includes, from top to bottom, an N-type GaAs (gallium arsenide) buffer layer, an N-type GaP (gallium phosphide) etching stop layer, an N-type GaAs ohmic contact layer, an N-type AlGaInP current spreading layer, an N-type AlInP confinement layer, an N-type waveguide layer, a multiple quantum well layer, a P-type waveguide layer, a P-type AlInP confinement layer, and a P-type GaP window layer. Other real-time configurations of the AlGaInP-based red epitaxial layer 133 are not listed here.

[0097] The side of the AlGaInP red-light epitaxial layer 133 facing the sapphire substrate 131 is its main light-emitting surface, while the side away from the sapphire substrate 131 is its electrode setting surface. The electrode setting surface is composed of an N-electrode setting mesa and a P-electrode setting mesa, wherein the N-electrode setting mesa is higher than the P-electrode setting mesa. The N-electrode 134 and the P-electrode 135 are respectively located on the N-electrode setting mesa and the P-electrode setting mesa. The N-electrode 134 is electrically connected to the N-type confinement layer, and the P-electrode 135 is electrically connected to the P-type confinement layer. Those skilled in the art will understand that the N-electrode 134 and the P-electrode 135 are electrically connected to the N-type confinement layer and the P-type confinement layer, respectively, but this does not mean that the N-electrode 134 must be in contact with the N-type confinement layer, nor does it mean that the P-electrode 135 must be in contact with the P-type confinement layer. For example, in some examples of this embodiment, the P-electrode 135 may be in contact with the P-type GaP window layer, and the N-electrode 134 may be in contact with the N-type AlGaInP current spreading layer.

[0098] On the N-electrode mounting surface, a plurality of light-guiding grooves 1330 are evenly distributed, and the light-guiding grooves 1330 are hemispherical. Along the groove wall of the light-guiding groove 1330, a metal reflector 136 is disposed, and the metal reflector 136 can be formed of at least one of the following metal materials: Au, Al, and Ag.

[0099] In this embodiment, the flip chip 130 also includes a DBR layer 137 that simultaneously covers the side surface of the AlGaInP-based red light epitaxial layer 133 and the electrode setting surface, with both the N electrode 134 and the P electrode 135 exposed in the DBR layer 137.

[0100] Understandably, when light from the AlGaInP red epitaxial layer 133 strikes the electrode mounting surface, it is reflected by the reflective surface of the light guide groove 1330 towards the side of the AlGaInP red epitaxial layer 133. Simultaneously, because the side of the AlGaInP red epitaxial layer 133 is covered by the DBR layer 137, the reflected light cannot exit directly from the side; instead, it is reflected again and ultimately exits from the main light-emitting surface of the AlGaInP red epitaxial layer 133. By adjusting the light path through the light guide groove 1330 and the DBR layer 137, the number of times the light passes through the multiple quantum well layer is reduced, preventing absorption by the multiple quantum well layer. This also increases the light output from the main light-emitting surface of the flip chip 130, improving the quality of the flip chip 130 and the display panel fabricated based on it.

[0101] It should be understood that the shapes mentioned in the various embodiments of this application, such as circles, ellipses, hemispheres, racetracks, and rectangles, are shapes that do not take into account process errors. In actual growth, the influence of process precision may cause these shapes to deviate from the standard shapes, but these shapes with deviations are also within the protection scope of this application.

[0102] In addition, the flip chip provided in this application can be a Micro-LED (micron-level light-emitting diode) chip, a Mini-LED (sub-millimeter light-emitting diode) chip, or a regular LED chip with a size larger than a Mini-LED chip.

[0103] It should be understood that the application of this application is not limited to the examples above. Those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims.

Claims

1. A flip chip, characterized in that, include: An epitaxial layer having a first semiconductor layer, a multiple quantum well layer, and a second semiconductor layer stacked sequentially; A first electrode electrically connected to the first semiconductor layer and located on the side of the first semiconductor layer away from the multiple quantum well layer; as well as A second electrode electrically connected to the second semiconductor layer and located on the side of the second semiconductor layer facing the multiple quantum well layer; The surface of the epitaxial layer with electrodes is an electrode setting surface. The electrode setting surface includes a first electrode setting platform configured to set the first electrode and a second electrode setting platform configured to set the second electrode. The first electrode setting platform is provided with a plurality of light guiding grooves. The groove openings of the light guiding grooves are located on the first electrode setting platform and recessed into the epitaxial layer. The groove walls of the light guiding grooves are reflective surfaces. A metal reflector is attached to the groove walls of the light guiding grooves. The metal reflector is arranged along the groove walls of the light guiding grooves. The light guiding grooves are configured to reflect light incident from inside the epitaxial layer toward the groove walls toward the side of the epitaxial layer.

2. The flip chip as described in claim 1, characterized in that, Also includes: A reflective layer that covers the side surface of the epitaxial layer.

3. The flip chip as described in claim 2, characterized in that, The reflective layer also covers the electrode mounting surface, with at least a portion of the first electrode and the second electrode exposed in the reflective layer.

4. The flip chip as described in claim 1, characterized in that, Also includes: A reflector is disposed in conjunction with the electrode mounting surface of the epitaxial layer and is configured such that the groove wall of the light guide groove becomes a reflective surface.

5. The flip chip as described in claim 1, characterized in that, The epitaxial layer is an aluminum gallium indium phosphide (AGaInP) red light epitaxial layer.

6. The flip chip as described in any one of claims 1-5, characterized in that, The cross-sectional area of ​​the light guide groove gradually decreases along the direction from the opening to the bottom of the groove.

7. The flip chip as described in claim 6, characterized in that, The cross-section of the light guide groove can be either circular or elliptical.

8. The flip chip as described in claim 6, characterized in that, The reflective surface of the light guide groove is an arc surface.

9. A display panel, characterized in that, include: Drive backplane; as well as Multiple flip chips as described in any one of claims 1-8; The flip chip is electrically connected to the drive backplane.

10. A method for fabricating a flip chip, characterized in that, Applied to the fabrication of a flip chip as described in any one of claims 1-8, the flip chip fabrication method comprises: An epitaxial layer is provided, the epitaxial layer having a first semiconductor layer, a multiple quantum well layer and a second semiconductor layer stacked sequentially; Starting from the side where the first semiconductor layer is located, the epitaxial layer is etched to expose the second electrode setting mesa and form a plurality of light guiding grooves on the first electrode setting mesa. The first electrode setting mesa and the second electrode setting mesa are respectively the mesa on the epitaxial layer where the first electrode and the second electrode are set. The groove wall of the light guide groove is processed into a reflective surface; A first electrode electrically connected to the first semiconductor layer and a second electrode electrically connected to the second semiconductor layer are provided.

11. The flip chip fabrication method as described in claim 10, characterized in that, The step of processing the groove wall of the light guide groove into a reflective surface includes: A metal reflector is disposed on the groove wall of the light guide groove; After processing the groove wall of the light guide groove into a reflective surface, the method further includes: A distributed Bragg reflector layer is provided to cover the side surface of the epitaxial layer and the electrode mounting surface.

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