A ReLU and pooling operation integrated circuit and method for a convolutional neural network

Abstract

The application discloses a ReLU and pooling operation integrated circuit and method for a convolutional neural network, and the circuit comprises a capacitor array switch module, a capacitor array module, a comparator, a ReLU operation and pooling operation logic control module; the ReLU operation and pooling operation logic control module is connected with the capacitor array switch module and a ReLU switch module, and is connected with an output switch module; and the comparator output signal is connected with the ReLU operation and pooling operation logic control module. The application utilizes the comparator to control the opening and closing of the switch to perform ReLU operation, stores the voltage after operation in the capacitor array to perform pooling operation, and finally outputs the maximum pooling or average pooling result through the judgment result of the comparator and the ReLU operation and pooling operation logic control module; the ReLU and pooling operation are realized through one circuit, the complexity of ReLU and pooling operation in an analog domain is greatly reduced, and the application can be widely applied to the scene of a large-scale array convolutional neural network.

Description

Technical Field

[0001] This invention relates to an integrated circuit and method for ReLU and pooling operations in convolutional neural networks, belonging to the field of integrated circuit technology. Background Technology

[0002] Convolutional neural networks (CNNs) are widely used in image recognition, machine learning, and object detection. To enable CNNs to adapt to complex functional relationships and improve their learning capabilities, the concept of activation functions has been introduced. Currently, the most commonly used activation function in CNNs is ReLU. Pooling layers reduce the size of feature maps, further filtering information and retaining only the most important parts. Common pooling operations include max pooling and average pooling. Max pooling selects and retains the maximum value of the input data in a local region; average pooling calculates the average value of the data in a local region, retaining the average as the most important information.

[0003] In in-memory computing applications, low area and low power consumption are the performance metrics sought after. Analog circuits are easier to achieve these metrics than digital circuits. Therefore, implementing ReLU and pooling operations in the analog domain can effectively reduce area and power consumption, and improve the overall area efficiency and energy efficiency.

[0004] Patent document CN110008440B discloses a convolution operation based on an analog matrix operation unit and its application. This patent utilizes the unidirectional conductivity of diodes to achieve the ReLU function, which results in high power consumption and severe nonlinearity. The patent uses several resistors, comparators, and multiplexers to compare and select the maximum signal, thus achieving max pooling. It uses several resistors, adders, and voltage inverters to achieve average pooling. This pooling circuit uses a large number of resistors, leading to a large circuit area. The patent separates ReLU, max pooling, and average pooling, using three different circuits to implement their functions, which reduces the overall system speed and results in a large circuit area. Summary of the Invention

[0005] To reduce the difficulty of implementing ReLU and pooling in analog circuits, improve the speed of ReLU, average pooling and max pooling circuits, and at the same time reduce circuit area and power consumption, this invention provides an integrated circuit and method for ReLU and pooling operations in convolutional neural networks.

[0006] In a first aspect, the present invention provides an integrated circuit for ReLU and pooling operations in convolutional neural networks, comprising: an output switch module, a ReLU switch module, a capacitor array switch module, a capacitor array module, a comparator, and a ReLU and pooling operation logic control module; the ReLU and pooling operation logic control module is connected to the capacitor array switch module, the ReLU switch module, and the output switch module; the comparator output signal is connected to the ReLU and pooling operation logic control module, and the comparator is used to determine the magnitude of its positive and negative terminal voltage signals, and control the ReLU and pooling operation logic control module according to the determination result.

[0007] In one embodiment of the present invention, the output switch module includes: switch S1 and switch S2; the ReLU switch module includes: switch S... ReLU1 Switch S ReLU2 The capacitor array switch module includes: switches S3~S 2n+2 The capacitor array module includes: capacitors C1~C n .

[0008] In one embodiment of the present invention, the capacitor array switch module includes switches S3, S5...Switch S... 2n+1 One end is connected to the capacitor array module, and the other end is connected to the positive input terminal of the comparator; the capacitor array switch module includes switches S4, S6...Switch S... 2n+2 One end is connected to the capacitor array module, and the other end is connected to the negative input terminal of the comparator.

[0009] In one embodiment of the present invention, the positive input terminal of the comparator is also connected to switch S1 and switch S2. ReLU1 The negative input terminal of the comparator is also connected to switch S2 and switch S. ReLU2 .

[0010] In one embodiment of the present invention, one end of the capacitor array module is connected to the capacitor array switch module, and the other end is grounded. The capacitor is used to store the voltage value after ReLU and to use the stored voltage for pooling operations. The comparator generates control signals for ReLU and pooling operations based on the magnitude of the positive and negative input signals. The output of the ReLU and pooling operation logic control module is connected to switches S3~S4. 2n+2 Control terminal.

[0011] Secondly, the present invention provides an integrated ReLU and pooling operation method for convolutional neural networks, the method using the aforementioned integrated ReLU and pooling operation circuit for convolutional neural networks, the method including a ReLU operation stage; The ReLU operation stage specifically includes the following steps: Step S101, Reset Phase: Control signal PL ctr RL ctr Both CTR and Ctrl+C are low, and the ReLU and pooling operation logic control module controls switches S1~S2. 2n+2 All connections are disconnected, and the comparator is reset to a high level. Step S102, First signal processing stage: Control signal RL ctr The voltage level changes to high, controlling the ReLU switching module S. ReLU1 S ReLU2 Close the circuit; the positive input terminal of the comparator is connected to the input voltage. V IN The comparator's negative input is grounded; the control signal CTR goes high to determine the first input signal. V IN The sign of the value; based on the comparator's output, there are two cases: like V IN ≥0 V The comparator outputs 1 for comp and 0 for comp_n. like V IN <0 V The comparator outputs 0 for comp and 1 for comp_n; Step S103, First ReLU Operation Stage: When the input signal < 0 V When the output signal is 0 V When the input signal is ≥0 V When the signal is equal to the original signal, the output signal is the same; the expression for the ReLU activation function is:

[0012] The comparator's output is connected to the ReLU and pooling operation logic control module, which can be divided into the following two cases: If comp is 1 and comp_n is 0: the ReLU and pooling operation logic control module closes switch S3 and opens switch S4, transferring the input voltage. V IN When the capacitor C1 stored in the capacitor array module is turned low, the control signal CTR goes low, and the control switches S3 and S4 are turned off. If comp is 0 and comp_n is 1: the ReLU and pooling operation logic control module opens switch S3 and closes switch S4, storing the zero level in capacitor C1 of the capacitor array module. The control signal CTR goes low, opening switches S3 and S4; thus, the first input signal is processed. V IN The ReLU operation is complete; Step S104: Control the input signal n times sequentially according to the above steps using the control signal CTR. V IN Perform ReLU calculations and store the resulting voltages into C2~C3 respectively. n In this process, the ReLU operation is completed for all input signals.

[0013] In one embodiment of the present invention, the method further includes a pooling operation stage, the pooling operation stage including a max pooling operation of operation mode one, the max pooling operation being used to select and retain the maximum value of the input data in a local region; The maximum pooling operation in operation mode one specifically includes the following steps: Step S201, Reset Phase: Control signal PL ctr RL ctr Both CTR and Ctrl+C are low, and the ReLU and pooling operation logic control module controls switches S1~S2. 2n+2 All connections are disconnected, and the comparator is reset to a high level. Step S202, First Signal Processing Stage: Control Signal RL ctr When the level is low, it controls the ReLU switching module S. ReLU1 S ReLU2 Disconnect; control signal CTR goes high, control switches S3 and S6 close, and the remaining switches open; capacitor C1 is connected to the positive input terminal of the comparator, and capacitor C2 is connected to the negative input terminal of the comparator; based on the comparator's output, there are two possible cases: like V C1 ≥ V C2 The comparator outputs 1 for comp and 0 for comp_n. like V C1 < V C2 The comparator outputs 0 for comp and 1 for comp_n. Step S203, First Max Pooling Operation Stage: The output of the comparator is connected to the ReLU operation and pooling operation logic control module, which is divided into the following two cases: If comp is 1 and comp_n is 0: the ReLU operation and pooling operation logic control module controls switches S3 and S8 to close, the other switches to open, and keeps capacitor C1 connected to the positive input terminal of the comparator and capacitor C3 connected to the negative input terminal of the comparator. If comp is 0 and comp_n is 1: the ReLU operation and pooling operation logic control module controls switches S6 and S7 to close, the other switches to open, keep capacitor C2 connected to the negative input terminal of the comparator, capacitor C3 connected to the positive input terminal of the comparator, and then the control signal CTR becomes low level; Step S204, Second Signal Processing Stage: The control signal CTR changes from low to high level. Based on the result of the first signal processing stage in step S202, there are two possible scenarios: like V C1 ≥ V C2 If comp is 1 and comp_n is 0, the ReLU operation and pooling operation logic control module control switch S3 is closed, and the other switches are open; if comp is 0 and comp_n is 1, the ReLU operation and pooling operation logic control module control switch S8 is closed, and the other switches are open. like V C1 < V C2 If comp is 1 and comp_n is 0, the ReLU operation and pooling operation logic control module control switch S7 is closed, and the other switches are open; if comp is 0 and comp_n is 1, the ReLU operation and pooling operation logic control module control switch S6 is closed, and the other switches are open. Step S205: Repeat the above steps to complete. V C1 ~ V Cn The voltage magnitude is determined, and the final control signal CTR becomes high. Based on the output of the last comparator, the final max-pooled voltage value is output through control switch S1 or switch S2.

[0014] In one embodiment of the present invention, the pooling operation stage further includes an average pooling operation in operation mode two, wherein the average pooling operation is used to calculate the average value of data in a local region and retain the average value as important information. The average pooling operation in operation mode two specifically includes the following steps: Step S301, Reset Phase: Control signal PL ctr RL ctr Both CTR and Ctrl+C are low, and the ReLU and pooling operation logic control module controls switches S1~S2. 2n+2 All connections are disconnected, and the comparator is reset to a high level. Step S302, Signal Processing Stage: Control Signal PL ctrWhen CTR goes high, the ReLU and pooling logic control module switches S3~S2000. 2n+1 Close the circuit and connect capacitors C1~C n The charges in the pool are shared and finally output through switch S1 or switch S2 to complete the average pooling operation.

[0015] Thirdly, the present invention provides a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the aforementioned integrated ReLU and pooling operation method for convolutional neural networks.

[0016] Fourthly, the present invention provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the aforementioned integrated ReLU and pooling operation method for convolutional neural networks.

[0017] The beneficial effects of this invention are as follows: This invention provides an integrated circuit and method for ReLU and pooling operations in convolutional neural networks. It utilizes a comparator to control the opening and closing of a switch to perform ReLU operations and stores the resulting voltage in a capacitor array for pooling operations. The comparator's judgment result and the pooling logic control module ultimately output the result after max pooling or average pooling. This invention implements ReLU and pooling operations in a single circuit, significantly reducing the complexity of performing ReLU and pooling operations in the analog domain, and can be widely applied to large-scale array convolutional neural networks. This invention not only combines the circuits implementing ReLU and pooling operations, greatly reducing the complexity of the computational circuit design, but also reduces the circuit area and improves the computational speed. The integrated circuit and method for ReLU and pooling operations of this invention are easy to design, have a small area, high speed, and are easy to integrate. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0019] Figure 1 This is a schematic diagram of the integrated ReLU and pooling operation circuit of the present invention.

[0020] Figure 2 This is a timing diagram of the ReLU operation logic control module of the present invention.

[0021] Figure 3 This is a timing diagram of the average pooling operation logic control module of the present invention.

[0022] Figure 4 This is a schematic diagram of the maximum pooling operation state machine of the present invention.

[0023] Figure 5 The simulation waveforms of ReLU and average pooling in this invention are shown.

[0024] Figure 6 The simulation waveforms of ReLU and max pooling in this invention are shown. Detailed Implementation

[0025] The invention is described in detail below. In the following paragraphs, different aspects of the embodiments are defined in more detail. The aspects so defined may be combined with any of the remaining aspects or aspects unless expressly stated otherwise. In particular, any feature considered preferred or advantageous may be combined with one or more other features considered preferred or advantageous.

[0026] Example 1 This embodiment provides an integrated circuit for ReLU and pooling operations in convolutional neural networks, including: an output switch module, a ReLU switch module, a capacitor array switch module, a capacitor array module, a comparator, and a ReLU and pooling operation logic control module; The comparator output signal is connected to the ReLU operation and pooling operation logic control module. The comparator is used to determine the magnitude of its positive and negative terminal voltage signals and control the ReLU operation and pooling operation logic control module according to the determination result. The ReLU operation and pooling operation logic control module is connected to the comparator, capacitor array switch module, ReLU switch module, and output switch module; the judgment result of the comparator controls the conduction and de-conversion of the corresponding switches to realize the ReLU operation function, the flat pooling and max pooling operation functions.

[0027] Example 2 This embodiment provides an integrated circuit for ReLU and pooling operations in convolutional neural networks. (See also...) Figure 1 It can provide two operation modes: ReLU and average pooling operations, and ReLU and max pooling operations. It includes: output switch module, ReLU switch module, capacitor array switch module, capacitor array module, comparator, and ReLU operation and pooling operation logic control module.

[0028] Optionally, the output switch module includes: switch S1 and switch S2.

[0029] Optionally, the ReLU switching module includes: a switch S ReLU1 Switch SReLU2 .

[0030] Optionally, the capacitor array switching module includes: switches S3~S 2n+2 .

[0031] Optionally, the capacitor array module includes: capacitors C1~C n .

[0032] Optionally, the capacitor array switching module includes switches S3, S5...Switch S... 2n+1 One end is connected to the capacitor array module, and the other end is connected to the positive input terminal of the comparator; the capacitor array switch module includes switches S4, S6...Switch S... 2n+2 One end is connected to the capacitor array module, and the other end is connected to the negative input terminal of the comparator.

[0033] Optionally, the positive input terminal of the comparator is also connected to switch S1 and switch S2. ReLU1 The negative input terminal of the comparator is also connected to switch S2 and switch S. ReLU2 .

[0034] Optionally, one end of the capacitor array module is connected to the capacitor array switch module, and the other end is grounded. The capacitor is used to store the voltage value after ReLU and to use the stored voltage for subsequent pooling operations. The comparator generates control signals for ReLU and pooling operations based on the magnitude of the positive and negative signals of its input. The output of the ReLU and pooling operation logic control module is connected to switches S3~S4. 2n+2 Control terminal.

[0035] The working principle of this embodiment is as follows: first, the input signal is processed... V IN To perform a ReLU operation, the comparator connects the positive input to the input signal and the negative input to ground, then judges the input signal. V IN Is it greater than 0? V ,like V IN ≥0 V If so, the input voltage will be stored in the capacitors of the capacitor array module; if V IN <0 V If the voltage is discharged to zero, the capacitors in the capacitor array module are then subjected to max-pooling. Different capacitors are connected to the positive and negative terminals of the comparator. The comparator determines the magnitude of the voltage at the positive and negative terminals, and controls the connection of different capacitors to the positive and negative terminals based on the determination result. Finally, the maximum value of the voltage in the capacitors is output through the output switch module.

[0036] Example 3 This embodiment provides an integrated ReLU and pooling operation method for convolutional neural networks, which uses an integrated ReLU and pooling operation circuit for convolutional neural networks provided in the above embodiment. The method includes a ReLU operation stage and a pooling operation stage.

[0037] The ReLU operation stage specifically includes the following steps: Step S101, Reset Phase: Control signal PL ctr RL ctr Both CTR and Ctrl+C are low, and the ReLU and pooling operation logic control module controls switches S1~S2. 2n+2 All connections are disconnected, and the comparator is reset to a high level. Step S102, First signal processing stage: Control signal RL ctr The voltage level changes to high, controlling the ReLU switching module S. ReLU1 S ReLU2 Close the circuit; the positive input terminal of the comparator is connected to the input voltage. V IN The comparator's negative input is grounded; the control signal CTR goes high to determine the first input signal. V IN The sign of the value; based on the comparator's output, there are two cases: like V IN ≥0 V The comparator outputs 1 for comp and 0 for comp_n. like V IN <0 V The comparator outputs 0 for comp and 1 for comp_n; Step S103, First ReLU Operation Stage: When the input signal < 0 V When the output signal is 0 V When the input signal is ≥0 V When the signal is equal to the original signal, the output signal is the same; the expression for the ReLU activation function is:

[0038] The comparator's output is connected to the ReLU and pooling operation logic control module, which can be divided into the following two cases: If comp is 1 and comp_n is 0: the ReLU and pooling operation logic control module closes switch S3 and opens switch S4, transferring the input voltage. V IN When the capacitor C1 stored in the capacitor array module is turned low, the control signal CTR goes low, and the control switches S3 and S4 are turned off. If comp is 0 and comp_n is 1: the ReLU operation and pooling operation logic control module controls switch S3 to open and switch S4 to close, storing the zero level in capacitor C1 of the capacitor array module, and the control signal CTR becomes low, controlling switches S3 and S4 to open. This concludes the analysis of the first input signal. V IN The ReLU operation is complete; Step S104: Control the input signal n times sequentially according to the above steps using the control signal CTR. V IN Perform ReLU calculations and store the resulting voltages into C2~C3 respectively. n In this process, the ReLU operation is completed for all input signals.

[0039] Optionally, the pooling operation stage includes max pooling operation in operation mode one and average pooling operation in operation mode two; the max pooling operation is used to select and retain the maximum value of the input data in a local region; the average pooling operation is used to calculate the average value of the data in the local region and retain the average value as important information.

[0040] The maximum pooling operation in operation mode one specifically includes the following steps: Step S201, Reset Phase: Control signal PL ctr RL ctr Both CTR and Ctrl+C are low, and the ReLU and pooling operation logic control module controls switches S1~S2. 2n+2 All connections are disconnected, and the comparator is reset to a high level. Step S202, First Signal Processing Stage: Control Signal RL ctr When the level is low, it controls the ReLU switching module S. ReLU1 S ReLU2 Disconnect; control signal CTR goes high, control switches S3 and S6 close, and the remaining switches open; capacitor C1 is connected to the positive input terminal of the comparator, and capacitor C2 is connected to the negative input terminal of the comparator; based on the comparator's output, there are two possible cases: like V C1 ≥ V C2 The comparator outputs 1 for comp and 0 for comp_n. like V C1 < V C2 The comparator outputs 0 for comp and 1 for comp_n. Step S203, First Max Pooling Operation Stage: The output of the comparator is connected to the ReLU operation and pooling operation logic control module, which is divided into the following two cases: If comp is 1 and comp_n is 0: the ReLU operation and pooling operation logic control module controls switches S3 and S8 to close, the other switches to open, and keeps capacitor C1 connected to the positive input terminal of the comparator and capacitor C3 connected to the negative input terminal of the comparator. If comp is 0 and comp_n is 1: the ReLU operation and pooling operation logic control module controls switches S6 and S7 to close, the other switches to open, keep capacitor C2 connected to the negative input terminal of the comparator, capacitor C3 connected to the positive input terminal of the comparator, and then the control signal CTR becomes low level; Step S204, Second Signal Processing Stage: The control signal CTR changes from low to high level. Based on the result of the first signal processing stage in step S202, there are two possible scenarios: like V C1 ≥ V C2 If comp is 1 and comp_n is 0, the ReLU operation and pooling operation logic control module control switch S3 is closed, and the other switches are open; if comp is 0 and comp_n is 1, the ReLU operation and pooling operation logic control module control switch S8 is closed, and the other switches are open. like V C1 < V C2 If comp is 1 and comp_n is 0, the ReLU operation and pooling operation logic control module control switch S7 is closed, and the other switches are open; if comp is 0 and comp_n is 1, the ReLU operation and pooling operation logic control module control switch S6 is closed, and the other switches are open. Step S205: Repeat the above steps to complete. V C1 ~ V Cn The voltage magnitude is determined, and the final control signal CTR becomes high. Based on the output of the last comparator, the final max-pooled voltage value is output through control switch S1 or switch S2.

[0041] The average pooling operation in operation mode two specifically includes the following steps: Step S301, Reset Phase: Control signal PL ctr RL ctr Both CTR and Ctrl+C are low, and the ReLU and pooling operation logic control module controls switches S1~S2. 2n+2All connections are disconnected, and the comparator is reset to a high level. Step S302, Signal Processing Stage: Control Signal PL ctr When CTR goes high, the ReLU and pooling logic control module switches S3~S2000. 2n+1 Close the circuit and connect capacitors C1~C n The charges in the pool are shared and finally output through switch S1 or switch S2 to complete the average pooling operation.

[0042] Figure 4 This is the state machine diagram for max pooling operations. IDLE is the initial state, COMP_ST is the state after the first comparison, and COMP_ST_0 and COMP_ST_1 are the two states resulting from the first comparison. When PL... ctr When the PL is low, it is in the initial state, and all switches are off. ctr When CTR is high, switches S3 and S6 are closed, and the state machine enters the COMP_ST state to perform the first comparison. If the result of the first comparison is that both comp and CTR are high, switches S3 and S8 are closed, and the state machine enters the COMP_ST_1 state to perform the second comparison. If the result of the first comparison is that comp is low and CTR is high, switches S6 and S7 are closed, and the state machine enters the COMP_ST_0 state to perform the second comparison. Based on the result of the second comparison, different switches are selected to be closed, the maximum pooling value is output, and then the system returns to the initial state.

[0043] The simulation diagram of the integrated ReLU and pooling operation of this invention is shown below. Figure 5 , Figure 6 As shown.

[0044] Figure 5 The simulation diagram shows ReLU and average pooling operations. VIN is the input voltage, VC1, VC2, and VC3 are the voltages stored in capacitors C1, C2, and C3, respectively, and VOUT is the output voltage. With inputs of 500mV, -500mV, and 100mV, after the ReLU operation, the voltages stored in capacitors C1, C2, and C3 are 500mV, 0mV, and 100mV, respectively, effectively reducing negative values ​​to 0 and preserving positive values. Subsequent average pooling operations result in an output of 199.826mV, with an error of 0.174mV from the ideal value. This invention effectively implements the functions of ReLU and average pooling operations.

[0045] Figure 6The simulation diagram shows ReLU and max-pooling operations. VIN is the input voltage, VC1, VC2, and VC3 are the voltages stored in capacitors C1, C2, and C3, respectively, and VOUT is the output voltage. With inputs of -100mV, 500mV, and 200mV, after the ReLU operation, the voltages stored in capacitors C1, C2, and C3 are 0mV, 500mV, and 200mV, respectively, effectively reducing negative values ​​to 0 and preserving positive values. Subsequent max-pooling operations result in a final output of 498.952mV, with an error of 1.048mV ​​from the ideal value. This invention effectively implements the functions of ReLU and max-pooling operations.

[0046] The integrated ReLU and pooling operation circuit for convolutional neural networks constructed in this invention is implemented using a 55nm CMOS process. However, the process simulation of this circuit is not limited to CMOS technology and is also applicable to other process environments. This circuit can be applied to ReLU operations, max pooling operations, and average pooling operations in convolutional neural networks.

[0047] Furthermore, the present invention provides a computer device that may include a processor, memory, network interface, and database connected via a system bus. The processor of the computer device provides computational and control capabilities. The memory of the computer device includes a non-volatile storage medium and internal memory. The non-volatile storage medium stores an operating system, computer programs, and a database. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage medium. The network interface of the computer device is used for communication with external terminals via a network connection. When the computer program is executed by the processor, it causes the processor to perform the steps of a ReLU and pooling operation integrated method for convolutional neural networks as described in any of the above embodiments.

[0048] The working process, working details, and technical effects of the computer device provided in this embodiment can be found in the above embodiment of an integrated ReLU and pooling operation method for convolutional neural networks, and will not be repeated here.

[0049] Furthermore, the present invention also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the steps of an integrated ReLU and pooling operation method for convolutional neural networks as described in any of the above embodiments. The computer-readable storage medium refers to a data storage medium, which may include, but is not limited to, floppy disks, optical disks, hard disks, flash memory, USB flash drives, and / or memory sticks, etc. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices.

[0050] The working process, working details, and technical effects of the computer-readable storage medium provided in this embodiment can be found in the embodiment above regarding an integrated ReLU and pooling operation method for convolutional neural networks, and will not be repeated here.

[0051] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), RAMbus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and RAMbus dynamic RAM (RDRAM).

[0052] Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A circuit integrating ReLU and pooling operations for convolutional neural networks, characterized in that, include: The system includes an output switch module, a ReLU switch module, a capacitor array switch module, a capacitor array module, a comparator, and a ReLU operation and pooling operation logic control module. The ReLU operation and pooling operation logic control module is connected to the capacitor array switch module, the ReLU switch module, and the output switch module. The comparator output signal is connected to the ReLU operation and pooling operation logic control module. The comparator is used to determine the magnitude of its positive and negative terminal voltage signals and controls the ReLU operation and pooling operation logic control module based on the determination result. The output switch module includes: switch S1 and switch S2; the ReLU switch module includes: switch S1. ReLU1 Switch S ReLU2 The capacitor array switch module includes: switches S3~S 2n+2 The capacitor array module includes: capacitors C1~C n ; The capacitor array switch module includes switches S3, S5...Switch S... 2n+1 One end is connected to the capacitor array module, and the other end is connected to the positive input terminal of the comparator; the capacitor array switch module includes switches S4, S6...Switch S... 2n+2 One end is connected to the capacitor array module, and the other end is connected to the negative input terminal of the comparator; The positive input terminal of the comparator is also connected to switch S1 and switch S2. ReLU1 The negative input terminal of the comparator is also connected to switch S2 and switch S. ReLU2 ; One end of the capacitor array module is connected to the capacitor array switch module, and the other end is grounded. The capacitors are used to store the voltage value after ReLU and to use the stored voltage for pooling operations. The comparator determines the magnitude of the positive and negative signals at its input terminals to generate control signals for ReLU and pooling operations. The output of the ReLU and pooling operation logic control module is connected to switches S3~S4. 2n+2 Control terminal.

2. A method for integrating ReLU and pooling operations in convolutional neural networks, characterized in that, The method uses a ReLU and pooling operation integrated circuit for convolutional neural networks as described in claim 1, and the method includes a ReLU operation stage; The ReLU operation stage specifically includes the following steps: Step S101, Reset Phase: Control signal PL ctr RL ctr Both CTR and Ctrl+C are low, and the ReLU and pooling operation logic control module controls switches S1~S2. 2n+2 All connections are disconnected, and the comparator is reset to a high level. Step S102, First signal processing stage: Control signal RL ctr The voltage level changes to high, controlling the ReLU switching module S. ReLU1 S ReLU2 Close the circuit; the positive input terminal of the comparator is connected to the input voltage. V IN The comparator's negative input is grounded; the control signal CTR goes high to determine the first input signal. V IN The sign of the value; based on the comparator's output, there are two cases: like V IN ≥0 V The comparator outputs 1 for comp and 0 for comp_n. like V IN <0 V The comparator outputs 0 for comp and 1 for comp_n; Step S103, First ReLU Operation Stage: When the input signal < 0 V When the output signal is 0 V When the input signal is ≥0 V When the signal is equal to the original signal, the output signal is the same; the expression for the ReLU activation function is: The comparator's output is connected to the ReLU and pooling operation logic control module, which can be divided into the following two cases: If comp is 1 and comp_n is 0: the ReLU and pooling operation logic control module closes switch S3 and opens switch S4, transferring the input voltage. V IN When the capacitor C1 stored in the capacitor array module is turned low, the control signal CTR goes low, and the control switches S3 and S4 are turned off. If comp is 0 and comp_n is 1: the ReLU and pooling operation logic control module opens switch S3 and closes switch S4, storing the zero level in capacitor C1 of the capacitor array module. The control signal CTR goes low, opening switches S3 and S4; thus, the first input signal is processed. V IN The ReLU operation is complete; Step S104: Control the input signal n times sequentially according to the above steps using the control signal CTR. V IN Perform ReLU calculations and store the resulting voltages into C2~C3 respectively. n In this process, the ReLU operation is completed for all input signals.

3. The integrated ReLU and pooling operation method for convolutional neural networks according to claim 2, characterized in that, The method further includes a pooling operation stage, which includes a max pooling operation in operation mode one, whereby the max pooling operation is used to select and retain the maximum value of the input data in a local region. The maximum pooling operation in operation mode one specifically includes the following steps: Step S201, Reset Phase: Control signal PL ctr RL ctr Both CTR and Ctrl+C are low, and the ReLU and pooling operation logic control module controls switches S1~S2. 2n+2 All connections are disconnected, and the comparator is reset to a high level. Step S202, First Signal Processing Stage: Control Signal RL ctr When the level is low, it controls the ReLU switching module S. ReLU1 S ReLU2 Disconnect; control signal CTR goes high, control switches S3 and S6 close, and the remaining switches open; capacitor C1 is connected to the positive input terminal of the comparator, and capacitor C2 is connected to the negative input terminal of the comparator; based on the comparator's output, there are two possible cases: like V C1 ≥ V C2 The comparator outputs 1 for comp and 0 for comp_n. like V C1 < V C2 The comparator outputs 0 for comp and 1 for comp_n. Step S203, First Max Pooling Operation Stage: The output of the comparator is connected to the ReLU operation and pooling operation logic control module, which is divided into the following two cases: If comp is 1 and comp_n is 0: the ReLU operation and pooling operation logic control module controls switches S3 and S8 to close, the other switches to open, and keeps capacitor C1 connected to the positive input terminal of the comparator and capacitor C3 connected to the negative input terminal of the comparator. If comp is 0 and comp_n is 1: the ReLU operation and pooling operation logic control module controls switches S6 and S7 to close, the other switches to open, keep capacitor C2 connected to the negative input terminal of the comparator, capacitor C3 connected to the positive input terminal of the comparator, and then the control signal CTR becomes low level; Step S204, Second Signal Processing Stage: The control signal CTR changes from low to high level. Based on the result of the first signal processing stage in step S202, there are two possible scenarios: like V C1 ≥ V C2 If comp is 1 and comp_n is 0, the ReLU operation and pooling operation logic control module control switch S3 is closed, and the other switches are open; if comp is 0 and comp_n is 1, the ReLU operation and pooling operation logic control module control switch S8 is closed, and the other switches are open. like V C1 < V C2 If comp is 1 and comp_n is 0, the ReLU operation and pooling operation logic control module control switch S7 is closed, and the other switches are open; if comp is 0 and comp_n is 1, the ReLU operation and pooling operation logic control module control switch S6 is closed, and the other switches are open. Step S205: Repeat the above steps to complete. V C1 ~ V Cn The voltage magnitude is determined, and the final control signal CTR becomes high. Based on the output result of the last comparator, switch S1 or switch S2 is controlled to output the final max-pooled voltage value.

4. The integrated ReLU and pooling operation method for convolutional neural networks according to claim 3, characterized in that, The pooling operation stage also includes the average pooling operation of operation mode two, which is used to calculate the average value of data in a local area and retain the average value as important information. The average pooling operation in operation mode two specifically includes the following steps: Step S301, Reset Phase: Control signal PL ctr RL ctr Both CTR and Ctrl+C are low, and the ReLU and pooling operation logic control module controls switches S1~S2. 2n+2 All connections are disconnected, and the comparator is reset to a high level. Step S302, Signal Processing Stage: Control Signal PL ctr When CTR goes high, the ReLU and pooling logic control module switches S3~S2000. 2n+1 Close the circuit and connect capacitors C1~C n The charges in the pool are shared and finally output through switch S1 or switch S2 to complete the average pooling operation.

5. A computer device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the integrated ReLU and pooling operation method for convolutional neural networks as described in any one of claims 2-4.

6. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the integrated ReLU and pooling operation method for convolutional neural networks as described in any one of claims 2-4.

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