Trimming circuit, electronic system and method of operation

CN117991863BActive Publication Date: 2026-10-27CRM ICBG (WUXI) CO LTD
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Patent Information

Application Number
CN202211363875.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-11-02
Publication Date
2026-10-27
Estimated Expiration
2042-11-02

AI Technical Summary

Technical Problem

[0008]鉴于以上所述现有技术的缺点,本发明的目的在于提供一种修调电路、电子系统及工作方法,用于解决现有修调电路不具有外送信号测试功能的问题

Benefits of technology

[0027]如上所述,本发明的修调电路、电子系统及工作方法,通过信号录入模块、熔丝修调模块及输出选择模块的设计,可实现熔丝真实修调前后的重复性模拟修调测试;在真实修调前,通过输入的信号(模拟熔丝信号)模拟出熔丝修调后的情形,检验后级电路的参数是否达到预定的目标范围,以此提升修调的准确率;在真实修调后,通过输入的信号(模拟熔丝信号)模拟出熔丝修调后的情形,观测对比真实修调前方案或其它修调方案。

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Abstract

The application provides a trimming circuit, comprising a signal input module, a fuse trimming module and an output selection module; the signal input module enters a test mode or a trimming mode based on a control signal, and provides an analog fuse signal to the output selection module in the test mode, and provides a trimming signal to the fuse trimming module in the trimming mode; the fuse trimming module receives the trimming signal, and performs a fuse trimming operation based on the trimming signal to generate a trimmed fuse signal; the output selection module receives the analog fuse signal and the trimmed fuse signal, and selects the analog fuse signal or the trimmed fuse signal based on the control signal. Through the trimming circuit provided by the application, the problem that the existing trimming circuit does not have an external signal test function is solved.
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Description

Technical Field

[0001] This invention relates to the field of integrated circuit design technology, and in particular to a tuning circuit, electronic system, and operating method. Background Technology

[0002] With the development of integrated circuit technology, the requirements for circuit performance are becoming increasingly stringent. Circuit characteristics are generally affected by semiconductor manufacturing processes, resulting in variations between batches, wafers, and even different chips on the same wafer. These deviations typically exhibit a normal distribution. When semiconductor process models are highly accurate, designers can maximize the process tolerance compatibility of chip parameters during the circuit design phase through circuit simulations at different process corners and Monte Carlo analysis. However, this compatibility design usually involves relatively lenient parameter trade-offs, and the accuracy of various chip parameters often falls short of optimal requirements.

[0003] Therefore, in the current large-scale integrated circuit design process, designers usually use tuning circuits; tuning can improve the accuracy of analog circuit parameters, narrow the range of specific parameters in the circuit, improve product yield, and enable or disable the function of some digital circuits to achieve differentiated products.

[0004] Common adjustment circuits typically use thin metal strips or polysilicon adjustment fuses. During adjustment, without affecting the surrounding circuits, the fuse is melted by injecting a large current or applying a high voltage to the adjustment bonding pins at both ends, thereby achieving adjustment.

[0005] During testing, if a certain parameter of the circuit fails to meet the requirements, and there is a discrepancy between the measured value and the predetermined target value, it is necessary to adjust it to a certain range using a tuning circuit. Moreover, there is often more than one tuning point in the circuit, and in order to meet the parameter requirements, it may be necessary to combine several tuning points with some tuning schemes.

[0006] Before adjustment, an adjustment formula needs to be calculated based on the difference between the measured value and the predetermined target value. Then, the adjustment scheme is calculated according to the adjustment formula to correct the parameters to match the predetermined target value. The calculation process of the adjustment formula can be theoretically derived from circuit design or statistically analyzed from a large amount of data measured on the wafer, or both methods can be used for mutual verification to improve the accuracy of adjustment.

[0007] However, if the calculated adjustment formula is not accurate enough, the measured parameters after adjustment will not reach the predetermined target value; therefore, designers hope to improve measurement accuracy by sending an external signal. However, existing adjustment circuits do not have an external signal testing function, which will affect the wafer's mid-test yield. Summary of the Invention

[0008] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a tuning circuit, electronic system and working method to solve the problem that the existing tuning circuit does not have the function of external signal testing.

[0009] To achieve the above and other related objectives, the present invention provides a trimming circuit, the trimming circuit comprising: a signal input module, a fuse trimming module, and an output selection module;

[0010] The signal input module enters the test mode or the adjustment mode based on the control signal, and provides the analog fuse signal to the output selection module in the test mode, and provides the adjustment signal to the fuse adjustment module in the adjustment mode.

[0011] The fuse trimming module receives the trimming signal and performs fuse trimming operation based on the trimming signal to generate a trimming fuse signal;

[0012] The output selection module receives the analog fuse signal and the trimming fuse signal, and selects to output either the analog fuse signal or the trimming fuse signal based on the control signal.

[0013] Optionally, the fuse adjustment module includes: a first MOSFET, a second MOSFET, a third MOSFET, a first resistor, and a first fuse; the gate of the first MOSFET is connected to its drain and to the gate of the second MOSFET, the drain is connected to a bias current, and the source is connected to a power supply voltage; the drain of the second MOSFET is connected to the drain of the third MOSFET and generates the fuse adjustment signal, and the source is connected to the power supply voltage; the gate of the third MOSFET is connected to the power supply voltage, and the source is connected to the first terminal of the first resistor; the second terminal of the first resistor is grounded through the first fuse and serves as the adjustment point of the fuse adjustment module.

[0014] Optionally, the signal input module includes: a fourth MOS transistor and a signal PAD; the gate of the fourth MOS transistor is connected to the control signal, the drain is connected to the signal PAD to input the analog fuse signal or the adjustment signal, and the source is connected to the adjustment point of the fuse adjustment module.

[0015] Optionally, the signal input module further includes a first inverter connected between the control signal and the gate terminal of the fourth MOS transistor.

[0016] Optionally, the output selection module includes: a first switch, a second switch, and a second inverter; the control terminals of the first switch and the second switch are correspondingly connected to the control signal and its inverted signal based on the second inverter; the input terminal of the first switch is connected to the adjustment fuse signal; the input terminal of the second switch is connected to the analog fuse signal; and the output terminal of the first switch is connected to the output terminal of the second switch and serves as the output terminal of the output selection module.

[0017] Optionally, the first switch is implemented using a first transmission gate, and the second switch is implemented using a second transmission gate;

[0018] When the signal input module does not include a first inverter, the non-inverting control terminal of the first transmission gate is connected to the inverting control terminal of the second transmission gate and connected to the control signal; the inverting control terminal of the first transmission gate is connected to the non-inverting control terminal of the second transmission gate and connected to the control signal through the second inverter; the input terminal of the first transmission gate is connected to the trimming fuse signal; the input terminal of the second transmission gate is connected to the analog fuse signal; and the output terminal of the first transmission gate is connected to the output terminal of the second transmission gate and serves as the output terminal of the output selection module.

[0019] When the signal input module includes a first inverter, the non-inverting control terminal of the first transmission gate is connected to the inverting control terminal of the second transmission gate and connected to the control signal through the second inverter. The inverting control terminal of the first transmission gate is connected to the non-inverting control terminal of the second transmission gate and connected to the control signal. The input terminal of the first transmission gate is connected to the trimming fuse signal. The input terminal of the second transmission gate is connected to the analog fuse signal. The output terminal of the first transmission gate is connected to the output terminal of the second transmission gate and serves as the output terminal of the output selection module.

[0020] Optionally, the output selection module further includes a third inverter and a fourth inverter; the third inverter is connected between the adjustment fuse signal and the input terminal of the first switch, and the fourth inverter is connected between the analog fuse signal and the input terminal of the second switch.

[0021] The present invention also provides an electronic system comprising: at least one adjustment circuit as described in any of the preceding claims.

[0022] The present invention also provides a method for operating the adjustment circuit as described in any of the preceding claims, the method comprising:

[0023] Based on the control signal, enter the test mode or adjustment mode;

[0024] In test mode, the signal input module inputs the simulated fuse signal, the fuse adjustment module does not perform fuse adjustment operation, and the output selection module outputs the simulated fuse signal to realize simulated fuse adjustment.

[0025] In the adjustment mode, the signal input module inputs the adjustment signal, the fuse adjustment module performs fuse adjustment operation based on the adjustment signal and generates the adjustment fuse signal, and the output selection module outputs the adjustment fuse signal to achieve actual fuse adjustment.

[0026] Optionally, in adjustment mode, after the fuse adjustment operation is completed, the adjustment signal is removed and the voltage value at the signal PAD is measured to determine whether the fuse adjustment operation was successful based on the measured voltage value.

[0027] As described above, the tuning circuit, electronic system, and operating method of the present invention, through the design of the signal input module, fuse tuning module, and output selection module, can realize repeatable simulated tuning tests of the fuse before and after actual tuning. Before actual tuning, the input signal (simulated fuse signal) simulates the state of the fuse after tuning to check whether the parameters of the subsequent circuit have reached the predetermined target range, thereby improving the tuning accuracy. After actual tuning, the input signal (simulated fuse signal) simulates the state of the fuse after tuning, and the results are observed and compared with the scheme before actual tuning or other tuning schemes. Attached Figure Description

[0028] Figure 1 The diagram shown is a schematic of a tuning circuit.

[0029] Figure 2 The diagram shown is a schematic representation of the adjustment circuit of this invention.

[0030] Figure 3 This is another schematic diagram of the adjustment circuit of the present invention.

[0031] Component designation explanation

[0032] 100 Adjustment Circuit

[0033] 101 Fuse Adjustment Module

[0034] 102 Signal Input Module

[0035] 103 Output Selection Module Detailed Implementation

[0036] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0037] Please see Figures 1 to 3 It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Although the illustrations only show components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation, the shape, quantity and proportion of each component in the actual implementation can be arbitrarily changed, and the layout of the components may also be more complex.

[0038] Figure 1 An adjustment circuit is shown, comprising: MOSFETs M1'-M4', resistor R', fuse FUSE', and inverter INV'; wherein, the gate of MOSFET M1' is connected to its drain and then to the gate of MOSFET M2', the drain is connected to the bias current IBIAS, and the source is connected to the power supply voltage VDD; the drain of MOSFET M2' is connected to the drain of MOSFET M3' and then to the input of inverter INV', and the source is connected to the power supply voltage VDD; the gate of MOSFET M3' is connected to the power supply voltage VDD, and the source is connected to the first terminal of resistor R'; the second terminal of resistor R' is grounded through fuse FUSE' and connected to the source of MOSFET M4'; the gate of MOSFET M4' is connected to the control signal CTRL, and the drain is connected to the adjustment signal INPUT; the output of inverter INV' generates the adjustment fuse signal OUTPUT.

[0039] When the control signal CTRL is high, the MOSFET M4' is turned on, allowing the fuse FUSE' to be adjusted. At this time, if the adjustment signal INPUT is applied to the drain of the MOSFET M4', the fuse FUSE' will blow due to the instantaneous large current flowing through it, and the resistance of the fuse will increase from tens of Ω to the MΩ level.

[0040] Before the adjustment, the bias current IBIAS is copied by the current mirror formed by MOSFET M1' and MOSFET M2' and flows through the branch where the fuse FUSE' is located. Since the resistance of the fuse is small, the input of the inverter INV' is low and the output is high, that is, the adjustment fuse signal OUTPUT is high.

[0041] After adjustment, due to the sudden increase in the resistance of the fuse resistor, the input terminal of the inverter INV' becomes high level and the output terminal becomes low level, that is, the adjustment fuse signal OUTPUT becomes low level.

[0042] The current trimming circuit lacks external signal testing capabilities, making it impossible to test external signals before and after the fuse blows. Furthermore, inaccurate trimming formulas lead to poor trimming precision, severely impacting wafer yield during intermediate testing. Therefore, the applicant has proposed a trimming circuit capable of repeated testing before and after trimming.

[0043] like Figure 2 and Figure 3 As shown, this embodiment provides a trimming circuit 100, which includes a fuse trimming module 101, a signal input module 102, and an output selection module 103.

[0044] The fuse trimming module 101 receives the trimming signal and performs fuse trimming operation based on the trimming signal to generate a trimming fuse signal.

[0045] Specifically, the fuse adjustment module 101 includes: a first MOSFET M1, a second MOSFET M2, a third MOSFET M3, a first resistor R1, and a first fuse FUSE1; wherein, the gate of the first MOSFET M1 is connected to its drain and to the gate of the second MOSFET M2, the drain is connected to the bias current IBIAS, and the source is connected to the power supply voltage VDD; the drain of the second MOSFET M2 is connected to the drain of the third MOSFET M3 and generates a fuse adjustment signal, and the source is connected to the power supply voltage VDD; the gate of the third MOSFET M3 is connected to the power supply voltage VDD, and the source is connected to the first terminal of the first resistor R1; the second terminal of the first resistor R1 is grounded through the first fuse FUSE1 and serves as the adjustment point of the fuse adjustment module 101, such as... Figure 2 and Figure 3 As shown.

[0046] In this embodiment, the first MOSFET M1 and the second MOSFET M2 form a current mirror. The mirror ratio is set by the width-to-length ratio of the first MOSFET M1 and the second MOSFET M2, so that the bias current IBIAS is mirrored to the branch where the first fuse FUSE1 is located (i.e., the branch where the second MOSFET M2, the third MOSFET M3, the first resistor R1, and the first fuse FUSE1 are located) according to the set mirror ratio. When the first fuse FUSE1 is not blown, its resistance is only tens of Ω. At this time, the adjustment fuse signal generated at the drain of the third MOSFET M3 is low. When the first fuse FUSE1 blows, its resistance increases sharply from tens of Ω to the MΩ level. At this time, the adjustment fuse signal generated at the drain of the third MOSFET M3 is high.

[0047] The signal input module 102 enters the test mode or the adjustment mode based on the control signal CTRL. In the test mode, it provides an analog fuse signal to the output selection module 103, and in the adjustment mode, it provides an adjustment signal to the fuse adjustment module 101.

[0048] Specifically, the signal input module 102 includes a fourth MOSFET M4 and a signal PAD; wherein, the gate terminal of the fourth MOSFET M4 is connected to the control signal CTRL, the drain terminal is connected to the signal PAD to input the analog fuse blow-off signal or adjustment signal, and the source terminal is connected to the adjustment point of the fuse adjustment module 101, such as... Figure 2 As shown.

[0049] In this embodiment, when the control signal CTRL is low, the gate terminal of the fourth MOS transistor M4 is low, the fourth MOS transistor M4 is turned off, and tuning is not allowed. The circuit enters the test mode and uses the signal INPUT input from the signal PAD as the analog fuse signal.

[0050] When the control signal CTRL is high, the gate of the fourth MOSFET M4 is high, allowing adjustment. The circuit enters adjustment mode and uses the signal INPUT from the signal PAD as the adjustment signal. When the adjustment signal is low, the fourth MOSFET M4 is off. At this time, no instantaneous large current flows through the fourth MOSFET M4 and the first fuse FUSE1 to ground, and the first fuse FUSE1 will not blow. When the adjustment signal is high, the fourth MOSFET M4 is on. At this time, a momentary large current flows through the fourth MOSFET M4 and the first fuse FUSE1 to ground, causing the first fuse FUSE1 to blow.

[0051] In practical applications, to invert the logic of the control signal CTRL (e.g., when CTRL is low, the circuit enters adjustment mode, and when CTRL is high, the circuit enters test mode), a first inverter INV1 can be added to the signal input module 102, connected between the control signal CTRL and the gate of the fourth MOSFET M4. Figure 3 As shown.

[0052] The output selection module 103 receives the analog fuse signal and the trimming fuse signal, and selects to output the analog fuse signal or the trimming fuse signal based on the control signal CTRL.

[0053] Specifically, the output selection module 103 includes: a first switch, a second switch, and a second inverter INV2; wherein, the control terminals of the first switch and the second switch are connected to the control signal CTRL and its inverted signal based on the second inverter INV2, the input terminal of the first switch is connected to the adjustment fuse signal, the input terminal of the second switch is connected to the analog fuse signal, and the output terminal of the first switch is connected to the output terminal of the second switch and serves as the output terminal of the output selection module 103.

[0054] In this embodiment, the first switch and the second switch constitute a two-to-one switch, controlled by the control signal CTRL. When the circuit enters test mode, the first switch opens and the second switch closes, selecting to output an analog fuse signal. When the circuit enters trimming mode, the first switch closes and the second switch opens, selecting to output a trimming fuse signal. In practical applications, the first and second switches can be implemented using any type of switching device, such as a transmission gate, a CMOS composite logic gate, an NMOS logic gate, or a PMOS logic gate. This embodiment does not impose any limitations on this.

[0055] In one possible implementation, the first switch is implemented using a first transmission gate TG1, and the second switch is implemented using a second transmission gate TG2; wherein...

[0056] When the signal input module 102 does not include the first inverter INV1, the non-inverting control terminal of the first transmission gate TG1 is connected to the inverting control terminal of the second transmission gate TG2 and connected to the control signal CTRL. The inverting control terminal of the first transmission gate TG1 is connected to the non-inverting control terminal of the second transmission gate TG2 and connected to the control signal CTRL through the second inverter INV2. The input terminal of the first transmission gate TG1 is connected to the adjustment fuse signal, the input terminal of the second transmission gate TG2 is connected to the analog fuse signal, and the output terminal of the first transmission gate TG1 is connected to the output terminal of the second transmission gate TG2 and serves as the output terminal of the output selection module 103. Figure 2 As shown.

[0057] In this embodiment, when the control signal CTRL is low, the circuit enters the test mode. At this time, the non-inverting input of the first transmission gate TG1 is connected to a low level, the inverting input is connected to a high level, and the first transmission gate TG1 is open. The non-inverting control terminal of the second transmission gate TG2 is connected to a high level, the inverting control terminal is connected to a low level, and the second transmission gate TG2 is closed, selecting to output an analog fuse signal. When the control signal CTRL is high, the circuit enters the adjustment mode. At this time, the non-inverting input of the first transmission gate TG1 is connected to a high level, the inverting input is connected to a low level, and the first transmission gate TG1 is closed. The non-inverting control terminal of the second transmission gate TG2 is connected to a low level, the inverting control terminal is connected to a high level, and the second transmission gate TG2 is open, selecting to output an adjustment fuse signal.

[0058] When the signal input module 102 includes a first inverter INV1, the non-inverting control terminal of the first transmission gate TG1 is connected to the inverting control terminal of the second transmission gate TG2, and connected to the control signal CTRL through the second inverter INV2. The inverting control terminal of the first transmission gate TG1 is connected to the non-inverting control terminal of the second transmission gate TG2 and connected to the control signal CTRL. The input terminal of the first transmission gate TG1 is connected to the adjustment fuse signal, the input terminal of the second transmission gate TG2 is connected to the analog fuse signal, and the output terminal of the first transmission gate TG1 is connected to the output terminal of the second transmission gate TG2 and serves as the output terminal of the output selection module 103. Figure 3 As shown.

[0059] In this embodiment, when the control signal CTRL is low, the circuit enters the adjustment mode. At this time, the non-inverting input of the first transmission gate TG1 is connected to a high level, the inverting input is connected to a low level, and the first transmission gate TG1 is closed. The non-inverting control terminal of the second transmission gate TG2 is connected to a low level, the inverting control terminal is connected to a high level, and the second transmission gate TG2 is open, selecting the output adjustment fuse signal. When the control signal CTRL is high, the circuit enters the test mode. At this time, the non-inverting input of the first transmission gate TG1 is connected to a low level, the inverting input is connected to a high level, and the first transmission gate TG1 is open. The non-inverting control terminal of the second transmission gate TG2 is connected to a high level, the inverting control terminal is connected to a low level, and the second transmission gate TG2 is closed, selecting the output analog fuse signal.

[0060] More specifically, the output selection module 103 also includes: a third inverter INV3 and a fourth inverter INV4; wherein, the third inverter INV3 is connected between the adjustment fuse signal and the input terminal of the first switch, and the fourth inverter INV4 is connected between the analog fuse signal and the input terminal of the second switch, such as... Figure 2 and Figure 3 As shown. By adding a third inverter INV3 and a fourth inverter INV4 to the output selection module 103, the output signal OUTPUT can be adjusted to be in phase or out of phase with the input signal INPUT in the corresponding mode. This is related to the design of the subsequent circuit and can be determined according to the actual application.

[0061] Accordingly, this embodiment also provides a method for operating the adjustment circuit as described above, the method comprising the following steps:

[0062] Enter test mode or adjustment mode based on the control signal CTRL;

[0063] In test mode, the signal input module 102 inputs the simulated fuse signal, the fuse adjustment module 101 does not perform fuse adjustment operation, and the output selection module 103 outputs the simulated fuse signal to realize the simulated adjustment of the fuse.

[0064] In the adjustment mode, the signal input module 102 inputs the adjustment signal, the fuse adjustment module 101 performs fuse adjustment operation based on the adjustment signal and generates an adjustment fuse signal, and the output selection module 103 outputs the adjustment fuse signal to achieve the actual adjustment of the fuse.

[0065] for Figure 2The adjustment circuit 100, when the control signal CTRL is low, turns off the gate of the fourth MOSFET M4, disallowing adjustment, and the circuit enters test mode. The fuse adjustment module 101 does not perform fuse adjustment. Simultaneously, the first switch is open and the second switch is closed. The signal INPUT input from the signal input module 102 is treated as an analog fuse signal. This analog fuse signal passes through the fourth inverter INV4 and the second switch to form the output signal OUTPUT. When the control signal CTRL is high, the gate of the fourth MOSFET M4 is high, allowing adjustment, and the circuit enters adjustment mode. Simultaneously, the first switch is closed and the second switch is open. The signal INPUT input from the signal input module 102 is treated as an adjustment signal. The fuse adjustment module 101 performs fuse adjustment based on this signal and generates an adjustment fuse signal. This adjustment fuse signal passes through the third inverter INV3 and the first switch to form the output signal OUTPUT.

[0066] for Figure 3 The adjustment circuit 100, when the control signal CTRL is high, turns off the gate of the fourth MOSFET M4, preventing adjustment and putting the circuit into test mode. The fuse adjustment module 101 does not perform fuse adjustment. Simultaneously, the first switch is open and the second switch is closed. The signal INPUT input from the signal input module 102 is treated as an analog fuse signal. This analog fuse signal passes through the fourth inverter INV4 and the second switch to form the output signal OUTPUT. When the control signal CTRL is low, the gate of the fourth MOSFET M4 is high, allowing adjustment and putting the circuit into adjustment mode. Simultaneously, the first switch is closed and the second switch is open. The signal INPUT input from the signal input module 102 is treated as an adjustment signal. The fuse adjustment module 101 performs fuse adjustment based on this signal and generates an adjustment fuse signal. This adjustment fuse signal passes through the third inverter INV3 and the first switch to form the output signal OUTPUT.

[0067] In terms of test modes, if the simulated fuse is not blown, the simulated fuse signal is set to a low level, that is, the signal INPUT input at signal PAD is low, and the signal OUTPUT output after passing through the fourth inverter INV4 and the second switch is high. If the simulated fuse is blown, the simulated fuse signal is set to a high level, that is, the signal INPUT input at signal PAD is high, and the signal OUTPUT output after passing through the fourth inverter INV4 and the second switch is low. This is consistent with the actual output state after the fuse is adjusted.

[0068] In the adjustment mode, if the fuse is not blown, the adjustment signal is set to a low level, i.e., the signal INPUT input at signal PAD is low. At this time, the fourth MOSFET M4 is cut off, and no instantaneous large current flows through the fourth MOSFET M4 and the first fuse FUSE1 to ground. The first fuse FUSE1 will not blow. Since the resistance of the fuse is small, the input terminal of the third inverter INV3 is low. After passing through the third inverter INV3 and the first switch, the output signal OUTPUT is high. If the fuse is blown, the adjustment signal is set to a high level, i.e., the signal INPUT input at signal PAD is high. At this time, the fourth MOSFET M4 is turned on, and a large instantaneous current flows through the fourth MOSFET M4 and the first fuse FUSE1 to ground. The first fuse FUSE1 blows, and the resistance of the fuse increases sharply from tens of Ω to the MΩ level. The input terminal of the third inverter INV3 becomes high. After passing through the third inverter INV3 and the first switch, the output signal OUTPUT is low.

[0069] In other words, in test mode, the fuse is not actually blown. Instead, a simulated fuse signal is applied from the signal PAD and sent directly to the subsequent circuit as the output signal OUTPUT to adjust the parameters of the subsequent circuit. By continuously changing the applied simulated fuse signal, it is easy to find the optimal burn-in scheme according to the parameter requirements of the subsequent circuit. In adjustment mode, an adjustment signal is applied from the signal PAD to perform fuse adjustment operation, and the adjusted fuse signal is sent to the subsequent circuit as the output signal OUTPUT to adjust the parameters of the subsequent circuit.

[0070] In practical applications, after the fuse adjustment operation is completed, the adjustment signal is removed and the voltage value at the signal PAD is measured to determine whether the fuse adjustment operation was successful. Specifically, if the signal PAD is used as the test PAD, the measured voltage value is approximately equal to the voltage drop across the fuse resistor. For the fuse blowing operation, if the measured voltage value is approximately equal to the voltage value of the simulated fuse signal applied in test mode to blow the fuse, it means that the fuse has blown and the fuse adjustment operation was successful. Otherwise, it means that the fuse has not blown and the fuse adjustment operation failed.

[0071] Accordingly, this embodiment also provides an electronic system, which includes at least one tuning circuit 100 as described above.

[0072] In practical applications, electronic systems often have more than one adjustment point, and each adjustment point corresponds to an adjustment circuit, resulting in multiple adjustment circuits in the electronic system. In this case, in order to meet the parameter requirements, multiple adjustment points need to be combined to form an adjustment scheme (obtained from the adjustment formula).

[0073] In this embodiment, simulated trimming can be performed before actual trimming. This puts the trimming circuit into test mode and simulates fuse trimming to verify the accuracy of the trimming formula. If the trimming formula is not accurate enough, multiple trimming schemes are simulated to obtain the optimal trimming scheme, and the trimming formula is optimized based on this optimal scheme, thereby improving trimming accuracy and wafer yield. Of course, if the trimming formula is accurate enough, simulated trimming can be omitted before actual trimming, and actual trimming can be performed directly. Alternatively, simulated trimming can be performed after actual trimming to put the trimming circuit into test mode and simulate fuse trimming to compare the results with the original trimming scheme or other trimming schemes. That is:

[0074] 1) When the accuracy of the adjustment formula is uncertain, simulated adjustment is performed before actual adjustment. Various adjustment schemes are combined for multiple adjustment points to simulate the situation after fuse adjustment according to various adjustment schemes, and the best scheme that makes the parameters of the subsequent circuit meet the requirements is found. In this process, if the simulated fuse blows, a high-level simulated fuse signal is applied to the corresponding signal PAD. Conversely, if the simulated fuse does not blow, a low-level simulated fuse signal is applied to the corresponding signal PAD.

[0075] 2) If the adjustment formula is confirmed to be accurate, then simulation adjustment is unnecessary; instead, actual adjustment can be performed directly. Of course, if the optimal adjustment scheme has been obtained, actual adjustment is still necessary. During this process, if the corresponding fuse needs to be blown, a high-level adjustment signal is applied to the corresponding PAD.

[0076] 3) After actual adjustment, if you want to compare the original scheme or other adjustment schemes, you can still perform simulated adjustment by applying a high-level or low-level simulated fuse signal from the signal PAD to perform repeatability testing.

[0077] In summary, the tuning circuit, electronic system, and operating method of this invention, through the design of a signal input module, a fuse tuning module, and an output selection module, can achieve repeatable simulated tuning tests of the fuse before and after actual tuning. Before actual tuning, the input signal (simulated fuse signal) simulates the state of the fuse after tuning, verifying whether the parameters of the subsequent circuit reach the predetermined target range, thereby improving the tuning accuracy. After actual tuning, the input signal (simulated fuse signal) simulates the state of the fuse after tuning, observing and comparing the scheme before actual tuning or other tuning schemes. Therefore, this invention effectively overcomes the various shortcomings of the prior art and has high industrial application value.

[0078] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A tuning circuit, characterized in that, The adjustment circuit includes: a signal input module, a fuse adjustment module, and an output selection module; The signal input module enters the test mode or the adjustment mode based on the control signal, and provides the analog fuse signal to the output selection module in the test mode, and provides the adjustment signal to the fuse adjustment module in the adjustment mode. The fuse trimming module receives the trimming signal and performs fuse trimming operation based on the trimming signal to generate a trimming fuse signal; The output selection module receives the analog fuse signal and the trimming fuse signal, and selects to output either the analog fuse signal or the trimming fuse signal based on the control signal. The signal input module includes a fourth MOS transistor and a signal PAD. The gate of the fourth MOS transistor is connected to the control signal, the drain is connected to the signal PAD, and the source is connected to the adjustment point of the fuse adjustment module. In test mode, the fourth MOS transistor is turned off, and the simulated fuse signal is input through the signal PAD. In adjustment mode, the fourth MOS transistor is turned on, and the adjustment signal is input through the signal PAD.

2. The adjustment circuit according to claim 1, characterized in that, The fuse adjustment module includes: a first MOSFET, a second MOSFET, a third MOSFET, a first resistor, and a first fuse; the gate of the first MOSFET is connected to its drain and to the gate of the second MOSFET, the drain is connected to a bias current, and the source is connected to a power supply voltage; the drain of the second MOSFET is connected to the drain of the third MOSFET and generates the fuse adjustment signal, and the source is connected to the power supply voltage; the gate of the third MOSFET is connected to the power supply voltage, and the source is connected to the first terminal of the first resistor; the second terminal of the first resistor is grounded through the first fuse and serves as the adjustment point of the fuse adjustment module.

3. The adjustment circuit according to claim 1, characterized in that, The signal input module further includes a first inverter, connected between the control signal and the gate terminal of the fourth MOS transistor.

4. The adjustment circuit according to any one of claims 1-3, characterized in that, The output selection module includes: a first switch, a second switch, and a second inverter; the control terminals of the first switch and the second switch are respectively connected to the control signal and its inverted signal based on the second inverter; the input terminal of the first switch is connected to the adjustment fuse signal; the input terminal of the second switch is connected to the analog fuse signal; and the output terminal of the first switch is connected to the output terminal of the second switch and serves as the output terminal of the output selection module.

5. The adjustment circuit according to claim 4, characterized in that, The first switch is implemented using a first transmission gate, and the second switch is implemented using a second transmission gate; When the signal input module does not include a first inverter, the non-inverting control terminal of the first transmission gate is connected to the inverting control terminal of the second transmission gate and connected to the control signal; the inverting control terminal of the first transmission gate is connected to the non-inverting control terminal of the second transmission gate and connected to the control signal through the second inverter; the input terminal of the first transmission gate is connected to the trimming fuse signal; the input terminal of the second transmission gate is connected to the analog fuse signal; and the output terminal of the first transmission gate is connected to the output terminal of the second transmission gate and serves as the output terminal of the output selection module. When the signal input module includes a first inverter, the non-inverting control terminal of the first transmission gate is connected to the inverting control terminal of the second transmission gate and connected to the control signal through the second inverter. The inverting control terminal of the first transmission gate is connected to the non-inverting control terminal of the second transmission gate and connected to the control signal. The input terminal of the first transmission gate is connected to the trimming fuse signal. The input terminal of the second transmission gate is connected to the analog fuse signal. The output terminal of the first transmission gate is connected to the output terminal of the second transmission gate and serves as the output terminal of the output selection module.

6. The adjustment circuit according to claim 4, characterized in that, The output selection module further includes a third inverter and a fourth inverter; the third inverter is connected between the adjustment fuse signal and the input terminal of the first switch, and the fourth inverter is connected between the analog fuse signal and the input terminal of the second switch.

7. An electronic system, characterized in that, The electronic system includes at least one tuning circuit as described in any one of claims 1-6.

8. A method for operating the adjustment circuit as described in any one of claims 1-6, characterized in that, The working method includes: Based on the control signal, enter the test mode or adjustment mode; In test mode, the signal input module inputs the simulated fuse signal, the fuse adjustment module does not perform fuse adjustment operation, and the output selection module outputs the simulated fuse signal to realize simulated fuse adjustment. In the adjustment mode, the signal input module inputs the adjustment signal, the fuse adjustment module performs fuse adjustment operation based on the adjustment signal and generates the adjustment fuse signal, and the output selection module outputs the adjustment fuse signal to achieve actual fuse adjustment.

9. The operating method of the adjustment circuit according to claim 8, characterized in that, In adjustment mode, after the fuse adjustment operation is completed, the adjustment signal is removed and the voltage value at the signal PAD is measured to determine whether the fuse adjustment operation was successful based on the measured voltage value.

Citation Information

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