Display device and method of driving a display device

Abstract

The disclosure relates to a display apparatus and a method of driving the display apparatus. The display apparatus includes a memory, a pixel unit including first pixels disposed in a first area at a first density and second pixels disposed in a second area in contact with the first area at a second density less than the first density, and a degradation compensator that updates degradation information stored in the memory based on an input gray level for the first pixels and the second pixels, and changes the input gray level to an output gray level based on the degradation information. The degradation compensator stores the degradation information in the memory in units of blocks for the pixel unit. The memory stores first degradation information for each of a plurality of first blocks including only the first pixels, stores second degradation information for each of a plurality of second blocks including only the second pixels, and stores both the first degradation information and the second degradation information for each of a plurality of third blocks including both the first pixels and the second pixels.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to and all benefits arising therefrom of Korean Patent Application No. 10-2022-0144561, filed on November 2, 2022, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure generally relates to a display device and a method for driving the display device. Background Technology

[0004] With the development of information technology, display devices, as the connection medium between users and information, have become increasingly important. Therefore, display devices such as liquid crystal displays (LCDs) and organic light-emitting diode (OLEDs) are being used more and more frequently.

[0005] To achieve large-size displays, designs that eliminate existing camera holes and place the camera below the pixel units have gained attention. Pixels that overlap with and do not overlap with the camera can be configured differently in terms of arrangement, area, density, component characteristics, and circuitry. Summary of the Invention

[0006] In display devices where pixels overlapping with and not overlapping with the camera are configured differently, a problem arises where the boundaries between different types of pixels are visible in the image display. This problem can become particularly severe as pixels deteriorate.

[0007] An embodiment provides a display device and a driving method thereof, wherein pixel degradation can be compensated with a minimum storage capacity despite different types of pixel degradation.

[0008] According to embodiments of this disclosure, a display device is provided, the display device comprising: a memory; a pixel unit including a first pixel disposed at a first density in a first region and a second pixel disposed at a second density less than the first density in a second region contacting the first region; and a degradation compensator that updates degradation information stored in the memory based on input gray levels for the first pixel and the second pixel, and changes the input gray level to an output gray level based on the degradation information, wherein the degradation compensator stores the degradation information in the memory on a block-by-block basis for the pixel unit, and wherein the memory stores first degradation information for each of a plurality of first blocks including only the first pixel, stores second degradation information for each of a plurality of second blocks including only the second pixel, and stores both the first degradation information and the second degradation information for each of a plurality of third blocks including both the first pixel and the second pixel.

[0009] In an embodiment, the first degradation information may be information obtained when all pixels constituting the corresponding block are the first pixel, and the second degradation information may be information obtained when all pixels constituting the corresponding block are the second pixel.

[0010] In an embodiment, the storage space allocated to the memory for the degradation information for each of the plurality of third blocks is larger than the storage space allocated to the memory for the degradation information for each of the plurality of first blocks or each of the plurality of second blocks.

[0011] In one embodiment, the size of the storage space allocated to the memory for the first degradation information and the size of the storage space allocated to the memory for the second degradation information are the same.

[0012] In an embodiment, the size of the storage space allocated to the memory for the degraded information for each of the plurality of third blocks may be twice the size of the storage space allocated to the memory for the degraded information for each of the plurality of first blocks or each of the plurality of second blocks.

[0013] In one embodiment, the degradation compensator may include a block determiner that determines the block among the plurality of first blocks, the plurality of second blocks, and the plurality of third blocks that corresponds to the input gray level.

[0014] In an embodiment, the degradation compensator may further include a first degradation information generator, which updates the first degradation information of the corresponding block based on the input gray level determined to correspond to the plurality of first blocks or the plurality of third blocks.

[0015] In an embodiment, the degradation compensator may further include a second degradation information generator, which updates the second degradation information of the corresponding block based on the input gray level determined to correspond to the plurality of second blocks or the plurality of third blocks.

[0016] In an embodiment, the degradation compensator may further include a pixel determiner that determines the pixel among the first pixel and the second pixel that corresponds to the input gray level.

[0017] In an embodiment, the degradation compensator may further include a gray level changer, which changes the input gray level to the output gray level based on the first degradation information when the input gray level corresponds to the first pixel, and changes the input gray level to the output gray level based on the second degradation information when the input gray level corresponds to the second pixel.

[0018] According to embodiments of this disclosure, a method for driving a display device is provided, wherein the display device includes: a first pixel disposed in a first region at a first density; a second pixel disposed in a second region in contact with the first region at a second density less than the first density; and a memory storing degradation information for the first pixel and the second pixel in blocks, the method including: receiving an input gray level for the first pixel and the second pixel; updating the degradation information stored in the memory based on the input gray level; and changing the input gray level to an output gray level based on the degradation information, wherein the memory stores first degradation information for each of a plurality of first blocks including only the first pixel, stores second degradation information for each of a plurality of second blocks including only the second pixel, and stores both the first degradation information and the second degradation information for each of a plurality of third blocks including both the first pixel and the second pixel.

[0019] In an embodiment, the first degradation information may be information obtained when all pixels constituting the corresponding block are the first pixel, and the second degradation information may be information obtained when all pixels constituting the corresponding block are the second pixel.

[0020] In an embodiment, the size of the storage space allocated to the memory for the degradation information for each of the plurality of third blocks may be greater than the size of the storage space allocated to the memory for the degradation information for each of the plurality of first blocks or each of the plurality of second blocks.

[0021] In an embodiment, the size of the storage space allocated to the memory for the first degradation information and the size of the storage space allocated to the memory for the second degradation information can be the same as each other.

[0022] In an embodiment, the size of the storage space allocated to the memory for the degraded information for each of the plurality of third blocks may be twice the size of the storage space allocated to the memory for the degraded information for each of the plurality of first blocks or each of the plurality of second blocks.

[0023] In an embodiment, the method may further include: determining the block among the plurality of first blocks, the plurality of second blocks, and the plurality of third blocks that corresponds to the input gray level.

[0024] In an embodiment, updating the degradation information may include: updating the first degradation information of the corresponding block based on the input gray level determined to correspond to the plurality of first blocks or the plurality of third blocks.

[0025] In an embodiment, updating the degradation information may include: updating the second degradation information of the corresponding block based on the input gray level determined to correspond to the plurality of second blocks or the plurality of third blocks.

[0026] In an embodiment, the method may further include: determining the pixel that corresponds to the input gray level among the first pixel and the second pixel.

[0027] In an embodiment, changing the input gray level to the output gray level may include: when the input gray level corresponds to the first pixel, changing the input gray level to the output gray level based on the first degradation information, and when the input gray level corresponds to the second pixel, changing the input gray level to the output gray level based on the second degradation information. Attached Figure Description

[0028] Figure 1 This is a diagram illustrating a display device according to an embodiment of the present disclosure.

[0029] Figure 2 This is a diagram illustrating pixels according to an embodiment of the present disclosure.

[0030] Figure 3 This is a diagram illustrating pixel units according to an embodiment of the present disclosure.

[0031] Figure 4 This is a diagram illustrating a degradation compensator according to an embodiment of the present disclosure.

[0032] Figure 5 and Figure 6 This is a diagram illustrating the degradation compensation process of the first block according to an embodiment of the present disclosure.

[0033] Figure 7 and Figure 8 This is a diagram illustrating the degradation compensation process of the second block according to an embodiment of the present disclosure.

[0034] Figure 9 and Figure 10 This is a diagram illustrating the degradation compensation process of the third block according to an embodiment of the present disclosure.

[0035] Figure 11 This is a block diagram of an electronic device according to an embodiment of the present disclosure. Detailed Implementation

[0036] In the following description, the invention will now be described more fully with reference to the accompanying drawings, in which various embodiments are illustrated. However, the invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.

[0037] Parts irrelevant to the description will be omitted to clearly describe this disclosure, and throughout the specification, the same or similar constituent elements will be indicated by the same reference numerals. Therefore, the same reference numerals can be used to identify the same or similar elements in different figures.

[0038] In addition, for better understanding and ease of description, the dimensions and thicknesses of each component shown in the accompanying drawings are arbitrarily illustrated, but this disclosure is not limited thereto. For clarity, the thicknesses of some parts and areas have been exaggerated.

[0039] In the accompanying drawings, dimensions may be exaggerated for clarity. It will be understood that when an element is referred to as being located “between” two elements, it can be the only element between the two elements, or there may be one or more intervening elements.

[0040] It will be understood that although the terms “first,” “second,” “third,” etc., may be used herein to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, layers, and / or parts should not be limited by these terms. These terms are used only to distinguish one element, component, region, layer, or part from another. Therefore, without departing from the teachings herein, “first element,” “first component,” “first region,” “first layer,” or “first part” discussed below may be referred to as “second element,” “second component,” “second region,” “second layer,” or “second part.”

[0041] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, unless the context clearly indicates otherwise, “a,” “an,” “the,” and “at least one” do not indicate a limitation on quantity and are intended to include both the singular and the plural. For example, unless the context clearly indicates otherwise, “element” has the same meaning as “at least one element.” “At least one” should not be construed as limited to “a” or “an.” “Or” means “and / or.” As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. It will be further understood that, when used in this specification, the terms “comprising” and / or “including” or “containing” and / or “having” indicate the presence of the stated features, areas, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, areas, integers, steps, operations, elements, components, and / or groups thereof.

[0042] In the description, the expression "equal to" can mean "substantially equal to". That is, it can mean equality to a degree that would be understood by a person skilled in the art. Other expressions may omit "substantially".

[0043] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will also be understood that, unless expressly defined herein, terms (such as those defined in a general dictionary) shall be interpreted as having a meaning consistent with their meaning in the relevant field and in the context of this disclosure, and shall not be interpreted in an idealized or overly formalized sense.

[0044] In the following, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0045] Figure 1 This is a diagram illustrating a display device according to an embodiment of the present disclosure.

[0046] Reference Figure 1 The display device DD according to embodiments of the present disclosure may include a timing controller 11, a data driver 12, a scan driver 13, a pixel unit 14, a degradation compensator 15, a temperature sensor 16, and a memory 17.

[0047] The timing controller 11 can receive timing signals, including vertical synchronization signals, horizontal synchronization signals, and data enable signals, as well as input grayscale IGV for each image frame, from the processor 9 (e.g., graphics processing unit (GPU), central processing unit (CPU), or application processor (AP)).

[0048] The timing controller 11 can supply control signals to each of the data driver 12 and the scan driver 13 in accordance with the specifications of each of them. Furthermore, the timing controller 11 can provide the input gray level IGV to the degradation compensator 15 and receive the output gray level OGV from the degradation compensator 15. The timing controller 11 can provide the output gray level OGV to the data driver 12. However, prior reference... Figure 3 Some of the output grayscale levels OGV can be grayscale levels used for non-pixel region NPA. The timing controller 11 can render the output grayscale level OGV in a manner that allows the output grayscale level used for non-pixel region NPA to be expressed by the peripheral pixel regions PXA1 and PXA2, and then provide the rendered output grayscale level OGV to the data driver 12.

[0049] In embodiments, the timing controller 11 and the degradation compensator 15 may be configured independently or separately, or configured as a single integrated hardware component (e.g., an integrated chip) (or defined as a portion of a single integrated hardware component). In embodiments, the degradation compensator 15 may be implemented in software within the timing controller 11. In some embodiments, the data driver 12 and the timing controller 11 may be configured as a single hardware component or chip. In some embodiments, the data driver 12, the timing controller 11, and the degradation compensator 15 may be configured as a single hardware component or chip.

[0050] The data driver 12 can generate the data voltage to be supplied to the data lines DL1, DL2, DL3, ..., DLs using the output gray level OGV and control signals. In an embodiment, for example, the data driver 12 can sample the output gray level OGV using a clock signal and apply the data voltage corresponding to the output gray level OGV to the data lines DL1 to DLs on a per-pixel-row basis. A pixel row can refer to pixels connected to the same scan line. Here, s can be an integer greater than 0.

[0051] The scan driver 13 can receive clock signals and scan start signals from the timing controller 11, thereby generating scan signals to be provided to scan lines SL1, SL2, SL3, ... and SLm. Here, m can be an integer greater than 0.

[0052] Scan driver 13 can sequentially supply scan signals with pulses having an on-level to scan lines SL1 to SLm. Scan driver 13 can include stages configured as shift registers. Scan driver 13 can generate scan signals under the control of a clock signal, such that each scan stage sequentially transmits a scan start signal in the form of pulses with an on-level to the next scan stage.

[0053] Pixel unit 14 may include pixels containing light-emitting elements. Each pixel PXij may be connected to a corresponding data line and a corresponding scan line. Here, i and j can be integers greater than 0. Pixel PXij may refer to a pixel connected to the i-th scan line and the j-th data line.

[0054] Although not shown in the accompanying drawings, the display device DD may also include a transmit driver. The transmit driver can receive clock signals and transmit stop signals, etc., from the timing controller 11, thereby generating a transmit signal to be provided to the transmit line. In an embodiment, for example, the transmit driver may include transmit stages connected to the transmit line. The transmit stages may be configured in the form of shift registers. In an embodiment, for example, a first transmit stage may generate a transmit signal with a cutoff level based on a transmit stop signal with a cutoff level, and other transmit stages may sequentially generate transmit signals with cutoff levels based on transmit signals with cutoff levels generated by previous transmit stages.

[0055] In embodiments where the display device DD includes the aforementioned emitter driver, each pixel PXij may further include a transistor connected to a corresponding emitter line. This transistor can be turned off during the data write cycle of each pixel PXij to prevent the pixel PXij from emitting light. Hereinafter, for ease of description, embodiments in which no emitter driver is provided will be described in detail.

[0056] Temperature sensor 16 can provide temperature information. The temperature information may be about the ambient temperature of the display device DD. In an embodiment, for example, a single temperature sensor 16 may be provided in the display device DD.

[0057] The degradation compensator 15 can update the degradation information stored in the memory 17 based on the input gray level IGV, and change the input gray level IGV to the output gray level OGV based on the degradation information. The degradation compensator 15 can store the degradation information in the memory 17 on a block-by-block basis with respect to the pixel unit 14.

[0058] In some embodiments, the degradation compensator 15 can update the degradation information stored in the memory 17 based on the input gray level IGV and temperature information TINF. In an embodiment, for example, the degradation compensator 15 (e.g., Figure 4 The first degradation information generator 152 and the second degradation information generator 153 shown can calculate the expected temperature in a pixel unit or block unit based on the input gray level IGV and temperature information TINF. In an embodiment, for example, with respect to ambient temperature, the calculation can be performed in a manner that causes pixels with high input gray levels to have higher expected temperatures. In an alternative embodiment, the degradation compensator 15 can calculate the expected temperature more accurately by using a current sensor (not shown) provided in the display device DD. In an embodiment, for example, with respect to ambient temperature, the calculation can be performed in a manner that causes pixels with high input gray levels and large current flows to have higher expected temperatures. The calculation of the expected temperature can be performed using techniques known in the art. In another alternative embodiment, for example, multiple temperature sensors 16 can be provided in the pixel unit or block unit.

[0059] Memory 17 can store degradation information, including the degree of degradation of the light-emitting elements (or pixels). Memory 17 can be a dedicated memory for implementing this operation, or it can be part of another memory (e.g., a frame memory). Memory 17 can be implemented as a conventional data storage device (e.g., static random access memory (SRAM), dynamic RAM (DRAM), pseudo SRAM (PSRAM), synchronous DRAM (SDRAM), or dual data rate SDRAM (DDR SDRAM), etc.), and therefore, its detailed description will be omitted.

[0060] Degradation information can be cumulative information about the degree of degradation of each block from the initial operation time to the most recent update time. In an embodiment, for example, as a block has a higher grayscale level, a higher temperature, and a longer usage time, the corresponding block's degradation degree can become higher (or greater). In this embodiment, as a block has a lower grayscale level, a lower temperature, and a shorter usage time, the corresponding block's degradation degree can become lower (or less). In an embodiment, memory 17 may store cumulative information up to past update times prior to the most recent update time to reduce memory costs.

[0061] Figure 2 This is a diagram illustrating pixels according to an embodiment of the present disclosure.

[0062] Reference Figure 2 Pixel PXij may include transistors T1 and T2, storage capacitor Cst, and light-emitting element LD.

[0063] In the following description, an embodiment of a pixel circuit implemented using an N-type transistor will be used as an example. However, those skilled in the art can design circuits implemented using P-type transistors by changing the polarity of the voltage applied to the gate terminal. Similarly, those skilled in the art can design circuits implemented using a combination of P-type and N-type transistors. A P-type transistor is a transistor in which the current increases when the voltage difference between the gate electrode and the source electrode increases in the negative direction. An N-type transistor is a transistor in which the current increases when the voltage difference between the gate electrode and the source electrode increases in the positive direction. Transistors can be configured in various forms, including thin-film transistors (TFTs), field-effect transistors (FETs), and bipolar junction transistors (BJTs).

[0064] In an embodiment of pixel PXij, such as Figure 2 As shown, the gate electrode of the first transistor T1 can be connected to the first electrode of the storage capacitor Cst, the first electrode of the first transistor T1 can be connected to the first power line ELVDDL, and the second electrode of the first transistor T1 can be connected to the second electrode of the storage capacitor Cst. The first transistor T1 can be referred to as the driving transistor.

[0065] The gate electrode of the second transistor T2 can be connected to the i-th scan line SLi (also called scan line SLi), the first electrode of the second transistor T2 can be connected to the j-th data line DLj (also called data line DLj), and the second electrode of the second transistor T2 can be connected to the gate electrode of the first transistor T1. The second transistor T2 can be called a scan transistor. Here, i and j can be integers greater than 0.

[0066] The first electrode of the storage capacitor Cst can be connected to the gate electrode of the first transistor T1, and the second electrode of the storage capacitor Cst can be connected to the second electrode of the first transistor T1.

[0067] The anode of the light-emitting element LD can be connected to the second electrode of the first transistor T1, and the cathode of the light-emitting element LD can be connected to the second power supply line ELVSSL. The light-emitting element LD can be configured as an organic light-emitting diode, an inorganic light-emitting diode, or a quantum dot light-emitting diode, etc. Figure 2 The illustration shows an embodiment in which pixel PXij includes a single light-emitting element LD. However, in alternative embodiments, pixel PXij may include multiple light-emitting elements connected in series, in parallel, or in a series / parallel configuration.

[0068] A first power supply voltage can be applied to a first power line ELVDDL, and a second power supply voltage can be applied to a second power line ELVSSL. In an embodiment, for example, during an image display cycle, the first power supply voltage may be higher than the second power supply voltage.

[0069] When a scan signal with a conduction level (here, logic high level) is applied through the scan line SL1, the second transistor T2 is turned on. The data voltage applied to the data line DLj is stored in the first electrode of the storage capacitor Cst.

[0070] A positive drive current, corresponding to the voltage difference between the first and second electrodes of the storage capacitor Cst, flows between the first and second electrodes of the first transistor T1. Therefore, the light-emitting element LD emits light with a brightness corresponding to the data voltage.

[0071] Next, when a scan signal with a cutoff level (here, logic low) is applied through the scan line SL1, the second transistor T2 is turned off, and the data line DLj and the first electrode of the storage capacitor Cst are electrically isolated from each other. Therefore, although the data voltage on the data line DLj changes, the voltage stored in the first electrode of the storage capacitor Cst does not change.

[0072] The features of the embodiments described herein can be applied not only to... Figure 2 The embodiment of pixel PXij shown is applicable to alternative embodiments including pixels with another pixel circuit. In an embodiment, for example, in a display device DD (see...) Figure 1 In the case of including a transmitter driver, pixel PXij may also include a transistor connected to the transmitter line.

[0073] Figure 3 This is a diagram illustrating pixel units according to an embodiment of the present disclosure.

[0074] Reference Figure 3 According to embodiments of the present disclosure, pixel unit 14 may include a first region AR1 and a second region AR2. The first region AR1 and the second region AR2 may be in contact with each other at their boundary EDG.

[0075] The first region AR1 may include first pixels RP1, GP1, and BP1 arranged therein with a first density. First pixel RP1 may be a pixel of a first color, first pixel GP1 may be a pixel of a second color, and first pixel BP1 may be a pixel of a third color. The first color to the third color may be different from each other. The second region AR2 may include second pixels RP2, GP2, and BP2 arranged therein with a second density less than the first density. Second pixel RP2 may be a pixel of the first color, second pixel GP2 may be a pixel of a second color, and second pixel BP2 may be a pixel of a third color. The first density may represent the proportion of the first pixel region PXA1 in the first region AR1. The first pixel region PXA1 may include the light-emitting surfaces of the first pixels RP1, GP1, and BP1. In embodiments, for example, as... Figure 3 As shown, when there are no non-pixel areas in the first region AR1, the first density can be 100%. The second density can represent the proportion of the second pixel region PXA2 in the second region AR2. The second pixel region PXA2 can include the light-emitting surfaces of the second pixels RP2, GP2, and BP2. In an embodiment, for example, when as Figure 3 As shown, when there is a non-pixel region NPA in the second region AR2, the second density can be 50%.

[0076] The pixels of pixel unit 14 can include diamonds. RGB stripes, S-stripes, true RGB and regular Various forms of arrangement, etc., and this disclosure is not limited to. Figure 3 The arrangement shown.

[0077] Display device DD (see also) Figure 1 This can include optical sensors (not shown), such as cameras, fingerprint sensors, proximity sensors, and illuminance sensors. In an embodiment, for example, the optical sensor may be located below the second region AR2. The optical sensor can sense light received through the non-pixel area NPA of the second region AR2 to function as a camera, fingerprint sensor, proximity sensor, or illuminance sensor, etc.

[0078] The first pixels RP1, GP1, and BP1, and the second pixels RP2, GP2, and BP2 can be configured differently from each other in terms of arrangement, area, density, component characteristics, and circuitry. In one embodiment, for example, the component configurations of the first pixels RP1, GP1, and BP1 are the same as those of the second pixels RP2, GP2, and BP2, but the number of pixels per unit area can differ. In another embodiment, for example, the number of first pixels RP1, GP1, and BP1 per unit area can be greater than the number of second pixels RP2, GP2, and BP2 per unit area. The second pixels RP2, GP2, and BP2 are used to compensate for luminance attenuation in non-pixel areas (NPA), and therefore, for the same input grayscale level IGV, a higher luminance output than that of the first pixels RP1, GP1, and BP1 is desired. In this embodiment, for the same input grayscale level IGV, the degradation degree of the second pixels RP2, GP2, and BP2 may be greater than that of the first pixels RP1, GP1, and BP1.

[0079] In this embodiment, the first pixels RP1, GP1, and BP1 and the second pixels RP2, GP2, and BP2 may have different element configurations. For example, the light-emitting area of ​​the light-emitting elements of the second pixels RP2, GP2, and BP2 may be configured to be larger than the light-emitting area of ​​the light-emitting elements of the first pixels RP1, GP1, and BP1. In this embodiment, for the same input grayscale level, the degradation degree of the second pixels RP2, GP2, and BP2 may be lower than that of the first pixels RP1, GP1, and BP1.

[0080] Regardless of the physical configuration, pixel unit 14 can be divided into block units that function as logical units. In an embodiment, for example, degradation compensator 15 can store degradation information about pixel unit 14 in blocks.

[0081] like Figure 3 As shown, the pixels RP1, GP1, BP1, RP2, GP2, and BP2 included in pixel unit 14 can be divided into multiple blocks BL11, BL12, BL13, ..., BL21, BL22, BL23, ..., BL31, BL32, BL33, ... In an embodiment, for example, blocks BL11 to BL33... may not overlap with each other. Although Figure 3 An embodiment is shown in which one block includes 16 pixels, but in some embodiments, the number of pixels included in a block may vary.

[0082] In one embodiment, a block comprising only the first pixels RP1, GP1, and BP1 is defined as a first block BL31, BL32, BL33, ... . The first blocks BL31, BL32, BL33, ... may be located inside the first region AR1. In this embodiment, a block comprising only the second pixels RP2, GP2, and BP2 is defined as a second block BL11, BL12, BL13, ... The second blocks BL11, BL12, BL13, ... may be located inside the second region AR2. In this embodiment, a block comprising both the first pixels RP1, GP1, and BP1 and the second pixels RP2, GP2, and BP2 is defined as a third block BL21, BL22, BL23, ... Some of the third blocks BL21, BL22, BL23, ... may exist in the first region AR1, and others of the third blocks BL21, BL22, BL23, ... may exist in the second region AR2. The third blocks BL21, BL22, BL23, ... may overlap with the boundary EDG.

[0083] The number of blocks BL11 to BL33, ... can be varied according to the specifications (size and resolution, etc.) of pixel unit 14. In an embodiment, for example, the number of pixels in pixel unit 14 can be configured to be 3840 × 2160. The expected temperature can be calculated with relatively large block units (e.g., a block defined by 240 × 120 pixels), and the degree of degradation can be stored with relatively small block units (e.g., a block defined by 8 × 8 pixels).

[0084] In embodiments, the data for large blocks and small blocks can be calculated together by adjusting the units (i.e., the number of pixels included in each block). In embodiments, for example, adjacent large blocks can be interpolated (e.g., binary interpolation) so that small blocks or individual pixel units can be calculated based on the large blocks. In embodiments, the average of adjacent small blocks or adjacent pixel units can be calculated so that large blocks can be calculated based on the small blocks or individual pixel units. As described above, considering various factors (e.g., memory cost or accuracy), individual pixel units, small blocks, and large blocks can be used differently from each other and are compatible with each other.

[0085] Figure 4 This is a diagram illustrating a degradation compensator according to an embodiment of the present disclosure.

[0086] Reference Figure 3 and Figure 4 According to embodiments of the present disclosure, the degradation compensator 15 may include a block determiner 151, a first degradation information generator 152, a second degradation information generator 153, a pixel determiner 154, and a grayscale level changer 155.

[0087] The degradation compensator 15 can update the degradation information AGE1[n] and AGE2[n] stored in the memory 17 based on the input gray level IGV for the first pixel RP1, GP1 and BP1 and the second pixel RP2, GP2 and BP2, and change the input gray level IGV to the output gray level OGV based on the degradation information AGE1[n] and AGE2[n].

[0088] The memory 17 can store first degradation information AGE1[n] for each of the first blocks BL31, BL32, BL33, ... that only include the first pixels RP1, GP1 and BP1, and store second degradation information AGE2[n] for each of the second blocks BL11, BL12, BL13, ... that only include the second pixels RP2, GP2 and BP2, and store both the first degradation information AGE1[n] and the second degradation information AGE2[n] for each of the third blocks BL21, BL22, BL23, ... that include both the first pixels RP1, GP1 and BP1 and the second pixels RP2, GP2 and BP2.

[0089] The first degradation information AGE1[n] can be information obtained under the condition that the pixels constituting the corresponding block are all first pixels RP1, GP1, and BP1 (or based on the assumption that the pixels constituting the corresponding block are all first pixels RP1, GP1, and BP1). The second degradation information AGE2[n] can be information obtained based on the assumption that the pixels constituting the corresponding block are all second pixels RP2, GP2, and BP2. That is, although the first pixels RP1, GP1, and BP1 and the second pixels RP2, GP2, and BP2 are mixed in the third block, the memory 17 can store the first degradation information AGE1[n] obtained under the condition that the pixels constituting the third block are all first pixels RP1, GP1, and BP1, and at the same time, store the second degradation information AGE2[n] obtained under the condition that the pixels constituting the third block are all second pixels RP2, GP2, and BP2. Therefore, the storage space allocated to memory 17 for the degradation information of each of the third blocks BL21, BL22, BL23, ... is greater than the storage space allocated to memory 17 for the degradation information of each of the first blocks BL31, BL32, BL33, ... or the second blocks BL11, BL12, BL13, ...

[0090] In this embodiment, the size of the storage space allocated to the first degradation information AGE1[n] and the second degradation information AGE2[n] in the memory 17 can be the same as each other. The size of the storage space allocated to the memory 17 for the degradation information of each of the third blocks BL21, BL22, BL23, ... can be twice the size of the storage space allocated to the memory 17 for the degradation information of each of the first blocks BL31, BL32, BL33, ... or the second blocks BL11, BL12, BL13, ...

[0091] In this embodiment, additional memory space can be allocated only for the third blocks BL21, BL22, BL23, ... located at the boundary EDG. In this embodiment, the additional allocation of memory space is on a block-by-block basis rather than on a pixel-by-pixel basis, and therefore the cost of the increased memory 17 is minimized.

[0092] The block determiner 151 can determine which blocks the input grayscale level IGV corresponds to in the first block BL31, BL32, BL33, ..., the second block BL11, BL12, BL13, ..., and the third block BL21, BL22, BL23, ... (or determine the corresponding block of the input grayscale level IGV).

[0093] The first degradation information generator 152 can update the first degradation information AGE1[n-1] of the corresponding block based on the input grayscale IGV, which corresponds to the first block BL31, BL32, BL33, ... or the third block BL21, BL22, BL23, ... The updated first degradation information AGE1[n] can be stored in the memory 17.

[0094] In an embodiment, for example, the first degradation information generator 152 may also refer to the temperature information TINF when updating the first degradation information AGE1[n-1].

[0095] The first degradation information generator 152 can calculate the current first degradation amount based on the temperature information TINF and the input gray level IGV, and accumulate the current first degradation amount in the first degradation information AGE1[n-1], thereby updating the first degradation information AGE1[n-1]. In an embodiment, for example, the updated first degradation information AGE1[n] can be calculated as shown in Equation 1 below.

[0096] [Equation 1]

[0097] AGE1[n] = AGE1[n-1] + CDA1[n]

[0098] Here, AGE1[n-1] represents the first degradation information AGE1[n-1] where the first degradation amount is accumulated from the first image frame to the (n-1)th image frame. AGE1[n] represents the first degradation information AGE1[n] where the first degradation amount is accumulated from the first image frame to the nth image frame. Here, n can be an integer greater than 1. CDA1[n] (see CDA1[n]) Figure 5 ) represents the first degradation amount calculated by TINF based on the input gray level IGV of the nth image frame and the associated temperature information.

[0099] In this embodiment, the nth first degradation amount CDA1[n] can correspond to the average value of the individual degradation amounts of the individual pixels belonging to the block. The individual degradation amount (CDA1e[n]) can be calculated as shown in Equation 2 below.

[0100] [Equation 2]

[0101] CDA1e[n] = lmc × tpc

[0102] Here, lmc represents the luminance coefficient. The luminance coefficient (lmc) is proportional to the input gray level corresponding to each pixel. That is, as the input gray level becomes higher, the luminance coefficient (lmc) can become larger. Here, tpc represents the temperature coefficient. The temperature coefficient (tpc) is proportional to the expected temperature corresponding to each pixel. That is, as the expected temperature becomes higher, the temperature coefficient (tpc) can become larger.

[0103] The luminance coefficient (lmc) can be calculated as shown in Equation 3 below.

[0104] [Equation 3]

[0105] lmc = [(IGVu / IGVm)^gma]^lmac

[0106] Here, IGVu represents the input gray level (e.g., a value in the range of 0 to 255) of each pixel in the input gray level IGV, and IGVm represents the maximum input gray level (e.g., 255), gma represents a predetermined gamma value (e.g., 2.2), and lmac represents a predetermined luminance acceleration factor (e.g., a value in the range of 1.0 to 2.0).

[0107] The temperature coefficient (tpc) can be calculated as shown in Equation 4 below.

[0108] [Equation 4]

[0109] tpc=exp^[-Ea / (k×T)]

[0110] Here, exp represents the base of the natural logarithm, and Ea represents a predetermined temperature acceleration factor (e.g., a value in the range of 0.2 to 0.5). Here, k represents a predetermined constant. Here, T represents the expected temperature corresponding to each pixel. The unit of the expected temperature can be absolute temperature.

[0111] In an embodiment, the first degradation information generator 152 may not directly calculate Equation 4. In an embodiment, for example, the first degradation information generator 152 may pre-store the temperature coefficient (tpc) for each expected temperature (T) in the form of a lookup table and use the temperature coefficient (tpc). In an embodiment, the first degradation information generator 152 may not directly calculate Equation 3. In an embodiment, for example, the first degradation information generator 152 may pre-store the luminance coefficient (lmc) for each input gray level (IGVu) in the form of a lookup table and use the luminance coefficient (lmc). Providing Equations 1 to 4 above only describes the degradation amount as proportional to the input gray level and the expected temperature, and does not imply that calculations according to Equations 1 to 4 are mandatory.

[0112] In an alternative embodiment, the nth first degradation amount CDA1[n] can be calculated based on the average gray level of the pixels belonging to the block, as shown in Equation 5 below.

[0113] [Equation 5]

[0114] CDA1[n] = 1mc × tpc

[0115] In Equation 3, IGVu represents the average input gray level of the pixels in the block. In Equation 4, T represents the expected temperature corresponding to the block.

[0116] The second degradation information generator 153 can update the second degradation information AGE2[n-1] of the corresponding block based on the input gray level IGV determined to correspond to the second block BL11, BL12, BL13, ... or the third block BL21, BL22, BL23, ... The updated second degradation information AGE2[n] can be stored in the memory 17.

[0117] The second degradation information generator 153 can calculate the nth second degradation amount CDA2[n] based on the temperature information TINF and the input gray level IGV (see...). Figure 7 The second degradation amount CDA2[n] is accumulated in the second degradation information AGE2[n-1], thereby updating the second degradation information AGE2[n-1]. In an embodiment, for example, the updated second degradation information AGE2[n] can be calculated as shown in Equation 6 below.

[0118] [Equation 6]

[0119] AGE2[n] = AGE2[n-1] + CDA2[n]

[0120] Here, AGE2[n-1] represents the second degradation information AGE2[n-1] where the second degradation amount is accumulated from the first image frame to the (n-1)th image frame. AGE2[n] represents the second degradation information AGE2[n] where the second degradation amount is accumulated from the first image frame to the nth image frame. CDA2[n] represents the nth second degradation amount CDA2[n] calculated based on the input gray level IGV and the associated temperature information TINF of the nth image frame.

[0121] The calculation method for the nth second degradation amount CDA2[n] is essentially the same as that for the nth first degradation amount CDA1[n] (see the description related to Equations 2 to 5), and therefore, any repeated detailed descriptions will be omitted. However, the luminance acceleration factor (lmac) used when calculating the nth second degradation amount CDA2[n] and the luminance acceleration factor (lmac) used when calculating the nth first degradation amount CDA1[n] can be different from each other. In an embodiment, for example, when the degradation degree of the second pixels RP2, GP2, and BP2 is higher than that of the first pixels RP1, GP1, and BP1 with respect to the same input gray level, the luminance acceleration factor (lmac) used when calculating the nth second degradation amount CDA2[n] can be set to be smaller than the luminance acceleration factor (lmac) used when calculating the nth first degradation amount CDA1[n]. Therefore, although the degradation degree of different types of pixels is different from each other, the pixels can output the same luminance with respect to the same input gray level.

[0122] The pixel determiner 154 can determine which blocks the input grayscale level IGV in the first pixels RP1, GP1, and BP1, and the second pixels RP2, GP2, and BP2 corresponds to (or determine the corresponding block of the input grayscale level IGV). That is, although the input grayscale levels IGV belong to the same block, the pixel determiner 154 can individually determine which block each of the input grayscale levels IGV in the first pixels RP1, GP1, and BP1, and the second pixels RP2, GP2, and BP2 corresponds to (or determine the corresponding block of each of the input grayscale levels IGV).

[0123] When the input gray level IGV corresponds to the first pixels RP1, GP1, and BP1, the gray level changer 155 can change the input gray level IGV to the output gray level OGV based on the first degradation information AGE1[n]. When the input gray level IGV corresponds to the second pixels RP2, GP2, and BP2, the gray level changer 155 can change the input gray level IGV to the output gray level OGV based on the second degradation information AGE2[n]. The output gray level OGV can be equal to or greater than the input gray level IGV. In an embodiment, for example, when the pixel is a pixel with a greater degree of degradation, the gray level changer 155 can generate an output gray level with a greater difference from the corresponding input gray level. In this embodiment, since the pixel is a pixel with a lower degree of degradation, the gray level changer 155 can generate an output gray level with a smaller difference from the corresponding input gray level.

[0124] In the embodiments, as referred to above Figure 4 As described, degradation compensation can be performed with reference to the temperature information TINF from temperature sensor 16. However, in an alternative embodiment, the display device DD (see...) Figure 1 The temperature sensor 16 may be omitted, and the degradation compensator 15 may perform degradation compensation without referencing the temperature information TINF. In an embodiment, for example, the individual degradation amount (CDA1e[n]) of Equation 2 may have the same value as the luminance coefficient (lmc). In this embodiment, the nth first degradation amount CDA1[n] of Equation 5 may have the same value as the luminance coefficient (lmc). That is, the temperature coefficient (tpc) may not be considered in degradation compensation.

[0125] Figure 5 and Figure 6 This is a diagram illustrating the degradation compensation process of the first block according to an embodiment of the present disclosure.

[0126] In the following text, reference will be made to Figure 3 , Figure 4 , Figure 5 and Figure 6 The process of the degradation compensator 15 operating with respect to the first BL31 according to an embodiment is described.

[0127] exist Figure 5 In this block, the input grayscale level IGV(BL31) refers to the input grayscale levels IGV(RP1), IGV(GP1), and IGV(BP1) of the pixels belonging to the first block BL31. Therefore, the block determiner 151 can determine that the input grayscale level IGV(BL31) corresponds to the first block BL31. Based on the determination result from the block determiner 151, only the first degradation information generator 152 can be operated, and the second degradation information generator 153 can be left unoperated.

[0128] The first degradation information generator 152 can receive first degradation information AGE1[n-1](BL31) about the first block BL31 from the memory 17. The first degradation information generator 152 can calculate the nth first degradation amount CDA1[n](BL31) based on the input gray level IGV(BL31). The first degradation information generator 152 can accumulate the nth first degradation amount CDA1[n](BL31) in the first degradation information AGE1[n-1](BL31), thereby storing the updated first degradation information AGE1[n](BL31) in the memory 17.

[0129] The pixel determiner 154 can determine that the input gray levels IGV(RP1), IGV(GP1), and IGV(BP1) all correspond to the first pixels RP1, GP1, and BP1. Therefore, the gray level changer 155 can change the input gray level IGV(BL31) to the output gray level OGV(BL31) based on the first degradation information AGE1[n](BL31).

[0130] In an embodiment, the grayscale changer 155 can interpolate the first degradation information AGE1[n](BL31) about the first block BL31 using first degradation information selected from at least one of the adjacent blocks BL21, BL32, ..., thereby generating a grayscale changer 155. Figure 6 The first individual degradation information AGE1[n](RP1), AGE1[n](GP1), and AGE1[n](BP1) for each pixel is shown. The grayscale changer 155 can apply the first individual degradation information AGE1[n](RP1), AGE1[n](GP1), and AGE1[n](BP1) to the corresponding input grayscale levels IGV(RP1), IGV(GP1), and IGV(BP1), thereby generating the output grayscale level OGV(BL31).

[0131] Figure 7 and Figure 8 This is a diagram illustrating the degradation compensation process of the second block according to an embodiment of the present disclosure.

[0132] In the following text, reference will be made to Figure 3 , Figure 4 , Figure 7 and Figure 8 The process of the degradation compensator 15 operating with respect to the second BL11 according to an embodiment is described.

[0133] exist Figure 7In this block, the input gray level IGV(BL11) refers to the input gray levels IGV(RP2), IGV(GP2), and IGV(BP2) of the pixels belonging to the second block BL11. Therefore, the block determiner 151 can determine that the input gray level IGV(BL11) corresponds to the second block BL11. Based on the determination result from the block determiner 151, only the second degradation information generator 153 can be operated, and the first degradation information generator 152 can be left unoperated.

[0134] The second degradation information generator 153 can receive second degradation information AGE2[n-1](BL11) about the second block BL11 from the memory 17. The second degradation information generator 153 can calculate the nth second degradation amount CDA2[n](BL11) based on the input gray level IGV(BL11). The second degradation information generator 153 can accumulate the nth second degradation amount CDA2[n](BL11) in the second degradation information AGE2[n-1](BL11), thereby storing the updated second degradation information AGE2[n](BL11) in the memory 17.

[0135] The pixel determiner 154 can determine that the input gray levels IGV(RP2), IGV(GP2), and IGV(BP2) all correspond to the second pixels RP2, GP2, and BP2. Therefore, the gray level changer 155 can change the input gray level IGV(BL11) to the output gray level OGV(BL11) based on the second degradation information AGE2[n](BL11).

[0136] In an embodiment, the grayscale changer 155 can interpolate the second degradation information AGE2[n](BL11) about the second block BL11 using the second degradation information of at least one of the adjacent blocks BL12, BL21, ..., thereby generating the grayscale changer 155. Figure 8 The second individual degradation information for each pixel, AGE2[n](RP2), AGE2[n](GP2), and AGE2[n](BP2), is shown. The grayscale changer 155 can apply the second individual degradation information AGE2[n](RP2), AGE2[n](GP2), and AGE2[n](BP2) to the corresponding input grayscale levels IGV(RP2), IGV(GP2), and IGV(BP2), thereby generating the output grayscale level OGV(BL11).

[0137] Figure 9 and Figure 10 This is a diagram illustrating the degradation compensation process of the third block according to an embodiment of the present disclosure.

[0138] Reference Figure 3 , Figure 4 , Figure 9 and Figure 10 The process of the deterioration compensator 15 operating with respect to the third BL21 is described.

[0139] exist Figure 9 In this block, the input gray level IGV(BL21) refers to the input gray levels IGV(RP1), IGV(GP1), IGV(BP1), IGV(RP2), IGV(GP2), and IGV(BP2) for pixels belonging to the third block BL21. Therefore, the block determiner 151 can determine that the input gray level IGV(BL21) corresponds to the third block BL21. Based on the determination result, only the first degradation information generator 152 and the second degradation information generator 153 can be operated.

[0140] The first degradation information generator 152 can receive first degradation information AGE1[n-1](BL21) about the third block BL21 from the memory 17. The first degradation information generator 152 can calculate the nth first degradation amount CDA1[n](BL21) based on the input gray level IGV(BL21). The first degradation information generator 152 can accumulate the nth first degradation amount CDA1[n](BL21) in the first degradation information AGE1[n-1](BL21), thereby storing the updated first degradation information AGE1[n](BL21) in the memory 17.

[0141] Additionally, the second degradation information generator 153 can receive second degradation information AGE2[n-1](BL21) about the third block BL21 from the memory 17. The second degradation information generator 153 can calculate the nth second degradation amount CDA2[n](BL21) based on the input gray level IGV(BL21). The second degradation information generator 153 can accumulate the nth second degradation amount CDA2[n](BL21) in the second degradation information AGE2[n-1](BL21), thereby storing the updated second degradation information AGE2[n](BL21) in the memory 17.

[0142] The pixel determiner 154 can determine that some input gray levels IGV(RP1), IGV(GP1), and IGV(BP1) among the input gray levels IGV(BL21) correspond to the first pixels RP1, GP1, and BP1. Furthermore, the pixel determiner 154 can determine that some input gray levels IGV(RP2), IGV(GP2), and IGV(BP2) among the input gray levels IGV(BL21) correspond to the second pixels RP2, GP2, and BP2.

[0143] The grayscale changer 155 can change some of the input grayscale levels IGV(RP1), IGV(GP1), and IGV(BP1) in the input grayscale level IGV(BL21) to some of the output grayscale level OGV(BL21) based on the first degradation information AGE1[n](BL21). Furthermore, the grayscale changer 155 can change some of the input grayscale levels IGV(RP2), IGV(GP2), and IGV(BP2) in the input grayscale level IGV(BL21) to some of the output grayscale level OGV(BL21) based on the second degradation information AGE2[n](BL21).

[0144] In an embodiment, the grayscale changer 155 can interpolate the first degradation information AGE1[n](BL21) about the third block BL21 using the first degradation information of at least one of the adjacent blocks BL11, BL22, BL31, ..., thereby generating the grayscale changer 155. Figure 10 The first individual degradation information AGE1[n](RP1), AGE1[n](GP1), and AGE1[n](BP1) for each pixel is shown. The grayscale changer 155 can apply the first individual degradation information AGE1[n](RP1), AGE1[n](GP1), and AGE1[n](BP1) to the corresponding input grayscale levels IGV(RP1), IGV(GP1), and IGV(BP1), thereby generating some of the output grayscale levels OGV(BL21).

[0145] In an embodiment, the grayscale changer 155 can interpolate the second degradation information AGE2[n](BL21) about the third block BL21 using the second degradation information of at least one of the adjacent blocks BL11, BL22, BL31, ..., thereby generating the grayscale changer 155. Figure 10 The second individual degradation information AGE2[n](RP2), AGE2[n](GP2), and AGE2[n](BP2) for each pixel is shown. The grayscale changer 155 can apply the second individual degradation information AGE2[n](RP2), AGE2[n](GP2), and AGE2[n](BP2) to the corresponding input grayscale levels IGV(RP2), IGV(GP2), and IGV(BP2), thereby generating some of the output grayscale levels OGV(BL21).

[0146] Figure 11 This is a block diagram of an electronic device according to an embodiment of the present disclosure.

[0147] Figures 1 to 10The degradation compensator 15 described herein may be included in at least one of the various blocks, elements, and modules included in the electronic device 101. In embodiments, for example, the degradation compensator 15 may be implemented as part of or defined by a part of the processor 110.

[0148] Electronic device 101 outputs various information through display module 140 in the operating system. When processor 110 executes an application stored in memory 180, display module 140 provides application information to the user through display panel 141.

[0149] The processor 110 acquires external input via the input module 130 or the sensor module 161 and executes an application corresponding to the external input. In an embodiment, for example, when a user selects the camera icon displayed on the display panel 141, the processor 110 acquires user input via the input sensor 161-2 and activates the camera module 171. The processor 110 transmits image data corresponding to the captured image acquired by the camera module 171 to the display module 140. The display module 140 can display the image corresponding to the captured image via the display panel 141.

[0150] In an embodiment, for example, when personal information authentication is performed in the display module 140, the fingerprint sensor 161-1 acquires the input fingerprint information as input data. The processor 110 compares the input data acquired by the fingerprint sensor 161-1 with the authentication data stored in the memory 180, and executes the application based on the comparison result. The display module 140 can display the information executed according to the application logic through the display panel 141.

[0151] In one embodiment, for example, when a music stream icon displayed via display module 140 is selected, processor 110 acquires user input via input sensor 161-2 and activates the music stream application stored in memory 180. When a music execution command is entered in the music stream application, processor 110 activates sound output module 163, thereby providing the user with sound information corresponding to the music execution command.

[0152] The operation of electronic device 101 has been briefly described above. The configuration of electronic device 101 will be described in detail below. Some components of electronic device 101, which will be described later, can be integrated to provide as a single component, and a single component can be divided into two or more components to provide.

[0153] Reference Figure 11Electronic device 101 can communicate with external electronic device 102 via a network (e.g., a short-range wireless communication network or a long-range wireless communication network). According to an embodiment, electronic device 101 may include a processor 110, a memory 180, an input module 130, a display module 140, a power module 150, an internal module 160, and an external module 170. According to an embodiment, at least one of the components selected from the above-described components may be omitted from electronic device 101, or at least another component may be added. According to an embodiment, some of the above-described components (e.g., sensor module 161, antenna module 162, or audio output module 163) may be integrated into another component (e.g., display module 140).

[0154] Processor 110 can control at least one other component (e.g., a hardware or software component) of electronic device 101 connected to processor 110 by executing software, and perform various data processing or calculations. According to an embodiment, as at least part of the data processing or calculation, processor 110 can store commands or data received from another component (e.g., input module 130, sensor module 161, or communication module 173) in volatile memory 181, and process the commands or data stored in volatile memory 181. Resulting data can be stored in non-volatile memory 182.

[0155] Processor 110 may include a main processor 111 and an auxiliary processor 112. The main processor 111 may include at least one selected from a central processing unit (CPU) 111-1 and an application processor (AP). The main processor 111 may also include at least one selected from a graphics processing unit (GPU) 111-2, a communication processor (CP), and an image signal processor (ISP). The main processor 111 may also include a neural processing unit (NPU) 111-3. The NPU 111-3 is a process specifically for handling artificial intelligence models, and the artificial intelligence models can be generated through machine learning. The artificial intelligence model may include multiple layers of artificial neural networks. The artificial neural network may be selected from any combination of deep neural networks (DNN), convolutional neural networks (CNN), recurrent neural networks (RNN, recurrent Boltzmann machines), restricted Boltzmann machines (RBM), deep belief networks (DBN), deep Q-networks, and at least two of the above networks, but this disclosure is not limited to the networks described above. In addition to the hardware architecture, the artificial intelligence model may also additionally or alternatively include a software architecture. At least two of the processing units and processors described above can be implemented as an integrated component (e.g., a single chip). Alternatively, the at least two components can be implemented as independent components (e.g., multiple chips).

[0156] The auxiliary processor 112 may include a controller 112-1. The controller 112-1 may include interface conversion circuitry and timing control circuitry. The controller 112-1 receives image signals from the main processor 111 and outputs image data by converting the data format of the image signals into an interface specification suitable for the display module 140. The controller 112-1 may output various control signals for driving the display module 140.

[0157] The auxiliary processor 112 may also include a data conversion circuit 112-2, a gamma correction circuit 112-3, and a rendering circuit 112-4. The data conversion circuit 112-2 receives image data from the controller 112-1 and compensates the image data according to the characteristics of the electronic device 101 or user configuration to display the image at a desired brightness, or converts the image data to reduce power consumption or compensate for image retention. The gamma correction circuit 112-3 can convert image data or gamma reference voltage, etc., so that the image displayed in the electronic device 101 has desired gamma characteristics. The rendering circuit 112-4 receives image data from the controller 112-1 and renders the image data by taking into account the pixel arrangement of the display panel 141 applied to the electronic device 101. At least one selected from the data conversion circuit 112-2, gamma correction circuit 112-3, and rendering circuit 112-4 can be integrated into another component (e.g., the main processor 111 or the controller 112-1). At least one of the data conversion circuit 112-2, gamma correction circuit 112-3, and rendering circuit 112-4 may be integrated into the data driver 143, which will be described later.

[0158] Memory 180 may store various data used by at least one component (e.g., processor 110 or sensor module 161) as well as input or output data regarding commands associated therewith. Memory 180 may include at least one of volatile memory 181 and non-volatile memory 182.

[0159] The input module 130 can receive commands or data from outside the electronic device 101 (e.g., from a user or external electronic device 102) to be used in components of the electronic device 101 (e.g., processor 110 or sensor module 161).

[0160] Input module 130 may include a first input module 131 and a second input module 132. Commands or data are input from the user to the first input module 131, and commands or data are input from an external electronic device 102 to the second input module 132. The first input module 131 may include a microphone, mouse, keyboard, buttons (e.g., keypads), or pen (e.g., a passive or active pen). The second input module 132 may support a specified protocol through which it can be connected to the external electronic device 102, either wired or wirelessly. According to embodiments, the second input module 132 may include a High Definition Multimedia Interface (HDMI), a Universal Serial Bus (USB) interface, a Secure Digital Card (SD) card interface, or an audio interface. The second input module 132 may include a connector capable of physically connecting the second input module 132 to the external electronic device 102, such as an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

[0161] Display module 140 provides visual information to the user. Display module 140 may include display panel 141, scan driver 142, and data driver 143. Display module 140 may also include a window, chassis, and bracket for protecting display panel 141.

[0162] The display panel 141 may include a liquid crystal display panel, an organic light-emitting display panel, or an inorganic light-emitting display panel, and the type of display panel 141 is not specifically limited. The display panel 141 may be rigid, rollable, or foldable. The display module 140 may also include a support, bracket, or head dissipation component for supporting the display panel 141.

[0163] The scan driver 142 is a driver chip and can be mounted in the display panel 141. Alternatively, the scan driver 142 can be integrated into the display panel 141. In embodiments, for example, the scan driver 142 may include an amorphous silicon TFT gate (ASG) driver circuit, a low-temperature polycrystalline silicon (LTPS) TFT gate driver circuit, or an oxide semiconductor TFT gate (OSG) driver circuit embedded in the display panel 141. The scan driver 142 receives control signals from the controller 112-1 and outputs scan signals to the display panel 141 in response to the control signals.

[0164] The display panel 141 may also include a transmitter driver (not shown). The transmitter driver outputs a transmitter control signal to the display panel 141 in response to a control signal received from the controller 112-1. The transmitter driver may be configured differently from the scan driver 142, or may be integrated into the scan driver 142.

[0165] The data driver 143 receives a control signal from the controller 112-1 and converts the image data into an analog voltage (e.g., a data voltage), and then outputs the data voltage to the display panel 141 in response to the control signal.

[0166] The data driver 143 can be integrated into another component (e.g., controller 112-1). The functions of the interface conversion circuit and timing control circuit of the controller 112-1 can be integrated into the data driver 143.

[0167] The display module 140 may also include a transmitter driver and a voltage generation circuit. The voltage generation circuit can output various voltages for driving the display panel 141.

[0168] Power module 150 supplies power to the components of electronic device 101. Power module 150 may include a battery for charging a power supply voltage. The battery may include a primary battery that is not rechargeable, a secondary battery that is rechargeable, or a fuel cell. Power module 150 may include a power management integrated circuit (PMIC). The PMIC supplies optimized power for each of the modules described above and later. Power module 150 may include a wireless power transmitting / receiving component electrically connected to the battery. The wireless power transmitting / receiving component may include a plurality of coil-shaped antenna radiators.

[0169] The electronic device 101 may also include an internal module 160 and an external module 170. The internal module 160 may include a sensor module 161, an antenna module 162, and a sound output module 163. The external module 170 may include a camera module 171, an optical module 172, and a communication module 173.

[0170] Sensor module 161 can sense input caused by the user's body or by a pen serving as the first input module 131, and generate an electrical signal or data value corresponding to the input. Sensor module 161 may include at least one selected from fingerprint sensor 161-1, input sensor 161-2, and digitizer 161-3.

[0171] The fingerprint sensor 161-1 can generate data values ​​corresponding to a user's fingerprint. The fingerprint sensor 161-1 can include either an optical fingerprint sensor or a capacitive fingerprint sensor.

[0172] Input sensor 161-2 can generate data values ​​corresponding to coordinate information of input caused by the user's body or by the pen. Input sensor 161-2 generates capacitance changes caused by the input as data values. Input sensor 161-2 can sense input caused by a passive pen, or send data to / receive data from an active pen.

[0173] Input sensor 161-2 can also measure biometric signals, such as blood pressure, water content, or body fat. In an embodiment, for example, when a user remains still for a specific period of time while allowing a body part to contact the sensor layer or sensing panel, input sensor 161-2 can output information to the user by sensing biometric signals based on changes in the electric field caused by the body part.

[0174] The digitizer 161-3 can generate data values ​​corresponding to the coordinate information of the input caused by the pen. The digitizer 161-3 generates the change in electric field caused by the input as a data value. The digitizer 161-3 can sense the input caused by a passive pen, or send data to / receive data from an active pen.

[0175] At least one of the fingerprint sensor 161-1, input sensor 161-2, and digitizer 161-3 can be implemented using a sensor layer formed on the display panel 141 by a continuous process. The fingerprint sensor 161-1, input sensor 161-2, and digitizer 161-3 can be disposed on the top of the display panel 141, and any one of the fingerprint sensor 161-1, input sensor 161-2, and digitizer 161-3 (e.g., digitizer 161-3) can be disposed on the bottom of the display panel 141.

[0176] At least two of the fingerprint sensor 161-1, input sensor 161-2, and digitizer 161-3 can be integrated into a single sensing panel using the same process. In embodiments where at least two of the fingerprint sensor 161-1, input sensor 161-2, and digitizer 161-3 are integrated into a single sensing panel, the sensing panel can be disposed between the display panel 141 and a window disposed at the top of the display panel 141. According to embodiments, the sensing panel can be disposed on the window, and the position of the sensing panel is not specifically limited.

[0177] At least one of the fingerprint sensor 161-1, input sensor 161-2, and digitizer 161-3 can be built into or disposed in the display panel 141. That is, at least one of the fingerprint sensor 161-1, input sensor 161-2, and digitizer 161-3 can be formed simultaneously by the process of forming the elements (e.g., light-emitting elements and transistors) included in the display panel 141.

[0178] Additionally, sensor module 161 can generate electrical signals or data values ​​corresponding to the internal or external states of electronic device 101. For example, sensor module 161 may also include a gesture sensor, gyroscope sensor, atmospheric pressure sensor, magnetic sensor, accelerometer, grip force sensor, proximity sensor, color sensor, infrared (IR) sensor, biometric sensor, temperature sensor, humidity sensor, or lighting sensor.

[0179] Antenna module 162 may include one or more antennas for transmitting or receiving signals or power to or from an external source. According to an embodiment, communication module 173 may transmit or receive signals from an external electronic device via an antenna suitable for a communication scheme. The antenna pattern of antenna module 162 may be integrated into a configuration such as display module 140 or input sensors 161-2 (e.g., display panel 141).

[0180] The sound output module 163 is a means for outputting sound signals to the outside of the electronic device 101, and may include, for example, a speaker for general purposes such as multimedia playback or recording playback, and a receiver for telephone reception only. According to embodiments, the receiver may be integrally formed with the speaker or separately formed from the speaker. The sound output pattern of the sound output module 163 may be integrated into the display module 140.

[0181] Camera module 171 can capture still images and moving images. According to an embodiment, camera module 171 may include at least one lens, image sensor, or image signal processor. Camera module 171 may also include an infrared camera capable of measuring the presence of a user, the user's position, or the user's eyes, etc.

[0182] The optical module 172 can provide light. The optical module 172 may include a light-emitting diode or a xenon lamp. The optical module 172 may operate in conjunction with the camera module 171 or independently of the camera module 171.

[0183] Communication module 173 can support the establishment of wired or wireless communication channels between electronic device 101 and external electronic device 102, as well as the communication performance through the established communication channels. Communication module 173 may include any one of the following: wireless communication modules such as cellular communication modules, short-range wireless communication modules, or Global Navigation Satellite System (GNSS) communication modules; and wired communication modules such as local area network (LAN) communication modules or power line communication modules; or both wireless communication modules and wired communication modules. Communication module 173 can communicate with external electronic device 102 via short-range communication networks such as Bluetooth, Wi-Fi Direct, or Infrared Data Association (IrDA), or long-range communication networks such as cellular networks, the Internet, or computer networks (e.g., LANs or wide area networks (WANs)). The aforementioned communication modules can be implemented as a single chip, or each of the communication modules can be implemented as a separate chip.

[0184] The input module 130, sensor module 161, and camera module 171 can be used to control the operation of the display module 140 in conjunction with the processor 110.

[0185] The processor 110 outputs commands or data to the display module 140, sound output module 163, camera module 171, or optical module 172 based on the input data received from the input module 130. In an embodiment, for example, the processor 110 may generate image data corresponding to input data applied via a mouse or active pen, and output the image data to the display module 140. Alternatively, the processor 110 may generate command data corresponding to the input data and output the command data to the camera module 171 or optical module 172. When no input data is received from the input module 130 for a certain period of time, the processor 110 may change the operating mode of the electronic device 101 to a low-power mode or sleep mode, thereby reducing the power consumed by the electronic device 101.

[0186] The processor 110 outputs commands or data to the display module 140, the sound output module 163, the camera module 171, or the optical module 172 based on the sensing data received from the sensor module 161. In an embodiment, for example, the processor 110 can compare authentication data applied by the fingerprint sensor 161-1 with authentication data stored in the memory 180, and then execute the application based on the comparison result. Based on sensing data sensed by the input sensor 161-2 or the digitizer 161-3, the processor 110 can execute commands or output corresponding image data to the display module 140. When a temperature sensor is included in the sensor module 161, the processor can receive temperature data about the temperature measured from the sensor module 161, and further perform brightness correction, etc., on the image data based on the temperature data.

[0187] Processor 110 can receive measurement data from camera module 171 regarding the presence of a user, the user's location, or the user's eyes. Processor 110 can also perform brightness correction on image data based on the measurement data. In an embodiment, for example, processor 110, which determines the presence of a user through input from camera module 171, can output brightness-corrected image data to display module 140 via data conversion circuit 112-2 or gamma correction circuit 112-3.

[0188] Some of these components can be interconnected via communication schemes between peripheral devices, such as buses, general purpose input / output (GPIO), serial peripheral interfaces (SPI), mobile industry processor interfaces (MIPI), or super path interconnect (UPI) links, to exchange signals (e.g., commands or data). Processor 110 can communicate with display module 140 via a bonding interface. In embodiments, for example, processor 110 may use any of the above-described communication schemes. However, this disclosure is not limited to the above-described communication schemes.

[0189] The electronic device 101 according to various embodiments can be one of a variety of types of devices. In embodiments, for example, the electronic device 101 can be a portable communication device (e.g., a smartphone), a computer device, a portable multimedia device, a portable medical device, a camera, a wearable device, or an electrical appliance. The electronic device 101 according to embodiments of this disclosure is not limited to the devices described above.

[0190] In the display device and the driving method of the display device according to the embodiments of the present disclosure, although different types of pixels are degraded, the pixel degraded can be compensated with minimal storage capacity.

[0191] This invention should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the inventive concept to those skilled in the art.

[0192] Although the invention has been specifically illustrated and described with reference to embodiments thereof, those skilled in the art will understand that various changes in form and detail may be made therein without departing from the spirit or scope of the invention as defined by the appended claims.

Claims

1. A display device, wherein, The display device includes: Memory; A pixel unit includes a first pixel disposed at a first density in a first region and a second pixel disposed at a second density less than the first density in a second region contacting the first region; and The degradation compensator updates the degradation information stored in the memory based on the input gray levels for the first pixel and the second pixel, and changes the input gray level to the output gray level based on the degradation information. The degradation compensator stores the degradation information in the memory on a block-by-block basis for each pixel unit. The memory stores first degradation information for each of a plurality of first blocks that include only the first pixel, second degradation information for each of a plurality of second blocks that include only the second pixel, and both the first degradation information and the second degradation information for each of a plurality of third blocks that include both the first pixel and the second pixel.

2. The display device according to claim 1, wherein, The first degradation information is obtained when all pixels constituting the corresponding block are the first pixel, and The second degradation information is obtained when all the pixels constituting the corresponding block are the second pixel.

3. The display device according to claim 2, wherein, The storage space allocated to the memory for the degradation information in each of the plurality of third blocks is greater than the storage space allocated to the memory for the degradation information in each of the plurality of first blocks or each of the plurality of second blocks.

4. The display device according to claim 3, wherein, The storage space allocated to the memory for the first degradation information and the storage space allocated to the memory for the second degradation information are the same size.

5. The display device according to claim 4, wherein, The size of the storage space allocated to the memory for the deterioration information for each of the plurality of third blocks is twice the size of the storage space allocated to the memory for the deterioration information for each of the plurality of first blocks or each of the plurality of second blocks.

6. The display device according to claim 1, wherein, The degradation compensator includes a block determiner that determines the block among the plurality of first blocks, the plurality of second blocks, and the plurality of third blocks that corresponds to the input gray level.

7. The display device according to claim 6, wherein, The degradation compensator further includes a first degradation information generator, which updates the first degradation information of the corresponding block based on the input gray level determined to correspond to the plurality of first blocks or the plurality of third blocks.

8. The display device according to claim 7, wherein, The degradation compensator further includes a second degradation information generator, which updates the second degradation information of the corresponding block based on the input gray level determined to correspond to the plurality of second blocks or the plurality of third blocks.

9. The display device according to claim 8, wherein, The degradation compensator further includes a pixel determiner, which determines the pixel among the first pixel and the second pixel that corresponds to the input gray level.

10. The display device according to claim 9, wherein, The degradation compensator further includes a gray level changer, which changes the input gray level to the output gray level based on the first degradation information when the input gray level corresponds to the first pixel, and changes the input gray level to the output gray level based on the second degradation information when the input gray level corresponds to the second pixel.

11. A method for driving a display device, wherein, The display device includes: a first pixel disposed in a first region at a first density; a second pixel disposed in a second region contacting the first region at a second density less than the first density; and a memory for storing degradation information for the first pixel and the second pixel in blocks, the method including: Receive input gray levels for the first pixel and the second pixel; Update the degradation information stored in the memory based on the input grayscale level; and Based on the degradation information, the input gray level is changed into the output gray level. The memory stores first degradation information for each of a plurality of first blocks that include only the first pixel, second degradation information for each of a plurality of second blocks that include only the second pixel, and both the first degradation information and the second degradation information for each of a plurality of third blocks that include both the first pixel and the second pixel.

12. The method according to claim 11, wherein, The first degradation information is obtained when all pixels constituting the corresponding block are the first pixel, and The second degradation information is obtained when all the pixels constituting the corresponding block are the second pixel.

13. The method according to claim 12, wherein, The storage space allocated to the memory for the degradation information in each of the plurality of third blocks is greater than the storage space allocated to the memory for the degradation information in each of the plurality of first blocks or each of the plurality of second blocks.

14. The method according to claim 13, wherein, The storage space allocated to the memory for the first degradation information and the storage space allocated to the memory for the second degradation information are the same size.

15. The method according to claim 14, wherein, The size of the storage space allocated to the memory for the deterioration information for each of the plurality of third blocks is twice the size of the storage space allocated to the memory for the deterioration information for each of the plurality of first blocks or each of the plurality of second blocks.

16. The method according to claim 11, wherein, The method further includes: Identify the block among the plurality of first blocks, the plurality of second blocks, and the plurality of third blocks that corresponds to the input gray level.

17. The method according to claim 16, wherein, The updating of the degradation information includes: updating the first degradation information of the corresponding block based on the input gray level determined to correspond to the plurality of first blocks or the plurality of third blocks.

18. The method according to claim 17, wherein, The updating of the degradation information includes: updating the second degradation information of the corresponding block based on the input gray level determined to correspond to the plurality of second blocks or the plurality of third blocks.

19. The method according to claim 18, wherein, The method further includes: Determine the pixel that corresponds to the input gray level between the first pixel and the second pixel.

20. The method according to claim 19, wherein, The step of changing the input gray level to the output gray level includes: when the input gray level corresponds to the first pixel, changing the input gray level to the output gray level based on the first degradation information; and when the input gray level corresponds to the second pixel, changing the input gray level to the output gray level based on the second degradation information.

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