A four-channel image sharpening system based on ZYNQ

Abstract

The application relates to the technical field of image processing, and discloses a four-channel image sharpening system based on ZYNQ, which comprises an image acquisition module, a color space conversion module, an image sharpening module and a storage management module arranged at the PL end of a ZYNQ chip, wherein the output end of the image acquisition module is connected with the input end of the color space conversion module; the output end of the color space conversion module is connected with the input end of the image sharpening module; the output end of the image sharpening module is connected with the input end of the storage management module; the output end of the storage management module is connected with the input end of a DDR module; and the DDR module is bidirectionally connected with the storage management module. Through the four-channel image processing mode, the values of four effective pixel positions can be calculated simultaneously in a single cycle, and the problem of time sequence violation easily occurring in the algorithm level is solved.

Description

Technical Field

[0001] This invention relates to the field of image processing technology, and more specifically to a four-channel image sharpening system based on ZYNQ. Background Technology

[0002] The raw images acquired by image sensors are often insufficient for certain specific use cases and require denoising processing. However, denoising an image is equivalent to averaging or integrating the image, which can cause the loss of high-frequency components such as image edges and detail areas, resulting in a decrease in image quality and clarity. Therefore, after denoising, there is usually an image enhancement component to compensate for the high-frequency components.

[0003] Traditional desharpening masking algorithms are a commonly used spatial domain-based image enhancement algorithm. This algorithm enhances the image by superimposing the original image with its own high-frequency components through contour edge enhancement. However, because the high-frequency components in the image contain image details, noise, and overshoot and undershoot caused by the elimination of gray-scale abrupt edges, it can amplify image noise or cause overshoot at image edges while improving clarity, resulting in poor image quality.

[0004] Common image processing algorithms, such as those based on CPU serial image data processing, are no longer sufficient to meet the real-time requirements of image processing. Parallel image data processing methods, such as single-channel processing based on FPGAs or ZYNQ, are increasingly unable to handle the massive data volumes required for high-resolution images and complex algorithms, and are prone to timing violations. Summary of the Invention

[0005] This invention provides a four-channel image sharpening system based on ZYNQ to solve the above-mentioned problems.

[0006] This invention is achieved through the following technical solution:

[0007] A four-channel image sharpening system based on ZYNQ includes an image acquisition module, a color space conversion module, an image sharpening module, and a storage management module disposed at the PL terminal of the ZYNQ chip. The output of the image acquisition module is connected to the input of the color space conversion module; the output of the color space conversion module is connected to the input of the image sharpening module; the output of the image sharpening module is connected to the input of the storage management module; the output of the storage management module is connected to the input of the DDR module; and the output of the DDR module is connected to the input of the storage management module.

[0008] An image acquisition module is used to acquire raw image data and convert the raw image data into four-channel RAW domain image data. It includes an acquisition unit and a data path conversion unit. The raw image data is input to the acquisition unit, and the output of the acquisition unit is connected to the input of the data path conversion unit. The acquisition unit uses a Sony IMX226CQJ-C CMOS image sensor. This sensor can set the output image format by configuring its built-in registers. This unit sets the output to ten-channel RAW domain image data. Compared to other low-margin output formats, this output can output ten effective pixel values ​​in a single clock cycle, which can improve data throughput.

[0009] A color space conversion module is used to convert the four-channel RAW domain image data into four-channel YCbCr domain image data; it includes a color interpolation unit and a color correction unit, wherein the input of the color interpolation unit is connected to the output of the data path conversion unit, and the output of the color interpolation unit is connected to the input of the color correction unit.

[0010] An image sharpening and correction module is used to sharpen and correct the Y component data of the four-channel YCbCr domain image data to obtain enhanced image data of the high-frequency part of the YCbCr domain image data, and then output the enhanced image data together with the Cb and Cr component data of the YCbCr domain image data; it includes a matrix unit, a blur unit, a cache unit, and a correct unit; the input of the matrix unit is connected to the output of the color correction unit, and the output of the matrix unit is connected to the input of the blur unit; the output of the blur unit is connected to the input of the correct unit; the outputs of the correct unit and the cache unit are connected to the input of the storage management module;

[0011] The storage management module is used to store the data output by the image sharpening and correction module;

[0012] The DDR module is bidirectionally connected to the storage management module.

[0013] As an optimization, the acquisition unit is used to transmit ten valid pixel values ​​to the data path conversion unit within a single clock cycle. The ten valid pixel values ​​are RAW domain image data in ten-channel format.

[0014] As an optimization, the data path conversion unit is used to convert ten-channel RAW domain image data into four-channel RAW domain image data by channel merging and channel splitting.

[0015] Specifically, the channel merging section converts the ten channels generated by the image sensor into two independent channels, each containing five paths of the original ten channels; the channel splitting section converts the two independent channels into four channels for output; the four-channel RAW domain image data output by the data path conversion module is used as input to the color space conversion module for subsequent processing.

[0016] As an optimization, the color interpolation unit is used to process the four-channel RAW domain image data using a gradient-based bilinear interpolation algorithm to obtain four-channel RGB domain image data that can be sorted out into red, green and blue color filter arrays.

[0017] Since the photodiodes of CMOS image sensors cannot distinguish light sources of different wavelengths, a color filter array that can separate red, green and blue is required. Therefore, the color interpolation unit uses a gradient-based bilinear interpolation algorithm to process the four-channel RAW domain image data and finally convert it into four-channel RGB domain image data.

[0018] As an optimization, the color correction unit is used to convert four-channel RGB domain image data into four-channel YCbCr domain image data using a conversion formula.

[0019] The color correction unit calculates the grayscale component, namely the Y component, that the sharpening algorithm needs to process. It then converts the four-channel RGB domain image data into four-channel YCbCr domain image data using a conversion formula. Since it is inconvenient to calculate floating-point numbers at the PL end, the formula can be magnified by 1024 times. After the calculation is completed, the result is shifted 10 bits to the right, which is equivalent to reducing it by 1024 times.

[0020] As an optimization, the matrix unit extracts the Y component of the four-channel YCbCr domain image data and uses a data caching method to construct the building matrix required by the subsequent modules, specifically:

[0021] The matrix unit utilizes FIFOs and registers to generate a data buffer circuit. It buffers the input single-channel serial image data through four FIFOs. The output of each FIFO is connected to the input of the next FIFO and is output together with the fifth row of input image data, realizing the simultaneous output of five rows of data. The output of each row of data undergoes two-level register stamping processing to form a 5*2 matrix. The data within the window of the matrix is ​​used to generate the blur value in the blur unit.

[0022] Specifically, the matrix unit uses a 5*2 rectangular window to generate the building matrix, and the matrix unit contains 4 independent building matrices; the parallel hardware circuit of one of the building matrices includes 4 FIFOs, which perform row buffering operations on one of the channels of the input four-channel format Y component. The output of each FIFO is connected to the input of the next FIFO, and the output of each FIFO is connected to 2 shift registers, forming a 5*2 register window. The data in the 4 building matrix windows participate in the generation of blur values ​​in the subsequent blur module.

[0023] As an optimization, the blur unit determines the center blur value by calculating the average value of the data in a 5*5 window around the center pixel. Generating a blur value requires extracting the values ​​of four building matrices generated by the matrix unit. The four-channel processing method can generate four valid blur values ​​in a single cycle.

[0024] The blur unit processes the original image using Gaussian blur to obtain its low-frequency components. This part selects a normalized Gaussian filter with a size of 5 and a sigma of 1. Four constructing matrices collaboratively participate in the generation of one blur value. After multiplying the corresponding elements of different constructing matrices by the corresponding parameters of the filter operator, the result is divided by the normalization coefficient 52. Experiments have shown that if the size is too large, points farther from the center point have smaller weights and are almost ineffective, while also consuming excessive PL-side hardware resources. Therefore, a filter with a size of 5 is most suitable. When the size is fixed, a larger sigma value results in better smoothing of the Gaussian filter.

[0025] As an optimization, the Cache unit is used to cache the Cb and Cr components of the four-channel image data that are not processed by the algorithm, and output them together after the Y component of the four-channel image data has been processed.

[0026] The Cache unit uses a multi-level register staking method to cache the four-channel Cb components and four-channel Cr components that do not require algorithm processing. The delay level of the multi-level register staking is determined according to the number of delay cycles required for algorithm processing. After the four-channel Y components are processed by the desharpening mask algorithm, they are output together with the data components cached by the Cache module for use by subsequent modules.

[0027] As an optimization, the Correct unit subtracts the original Y component from the processed blur value and takes the absolute value, compares it with a set threshold coefficient, sharpens the gain if the requirement is met, and leaves the value unchanged if the requirement is not met. Finally, it is output together with the Cb and Cr components cached in the Cache unit.

[0028] The Correct unit uses a multi-stage pipeline to process the Y component data in four-channel format. Because the improved desharpening mask algorithm involves multi-stage calculations, processing the entire algorithm flow's data at once would increase processing time and pose a risk of timing violations. Therefore, a four-stage pipeline is used to process the data in stages.

[0029] As an optimization, the storage management module converts the YCbCr pixel stream into an AXI4-Stream format video stream at the PL end to complete the data stream communication between the VDMA and the PL end. The VDMA then converts the AXI4-Stream format video stream into the standard AXI4 format and sends the data to the AXI_HP interface at the PS end through the axi4_s2mm interface. The image data is then transmitted to the DDR for caching to complete the image caching and display.

[0030] The storage management module and the DDR module temporarily cache the processed image data through data interaction to solve the problems such as flickering, tearing, and frame drops that may occur during real-time image transmission. The storage management module on the PL side calls the DDR module on the PS side to solve the frame caching problem.

[0031] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0032] This invention improves upon traditional desharpening mask algorithms, proposing an image sharpening algorithm suitable for hardware implementation. Since the high-frequency components of an image contain image details, noise, and overshoot and undershoot caused by the elimination of gray-scale abrupt edges, traditional desharpening mask algorithms, while enhancing the image, may amplify image noise or cause overshoot at image edges, resulting in poor image quality. Therefore, this invention adds a module for filtering low- and mid-frequency signals and noise, achieving better sharpening results.

[0033] This invention utilizes the parallel processing capabilities of ZYNQ's PL terminal for logic resources and its multi-stage pipeline architecture to perform parallel processing on the input image data, greatly optimizing the latency problem caused by the hierarchical structure of image algorithms.

[0034] This invention uses a four-channel image processing method to simultaneously calculate the values ​​of four effective pixel positions in a single cycle. This not only solves the problem of timing violations that are easy to occur at the algorithm level, but also improves the resolution format of the image to be processed from the 1080P standard to the 4K standard. Attached Figure Description

[0035] The accompanying drawings, which are included to provide a further understanding of embodiments of the invention and form part of this application, do not constitute a limitation thereof. In the drawings:

[0036] Figure 1 This is a system block diagram of a four-channel image sharpening system based on ZYNQ as described in this invention;

[0037] Figure 2 This is a system block diagram of the image acquisition module in this invention;

[0038] Figure 3 This is a system block diagram of the color space conversion module in this invention;

[0039] Figure 4 This is a system block diagram of the image sharpening module in this invention;

[0040] Figure 5 This is a schematic diagram of channel conversion in the present invention;

[0041] Figure 6 This is a flowchart of the improved anti-sharpening mask algorithm in this invention;

[0042] Figure 7 This is a schematic diagram of ten-channel data transmission in this invention;

[0043] Figure 8 This is a schematic diagram of the single-channel processing method in this invention;

[0044] Figure 9 This is a schematic diagram of the four-channel processing method in this invention;

[0045] Figure 10 This is a schematic diagram illustrating the construction of a matrix cache in this invention;

[0046] Figure 11 This is a schematic diagram illustrating the generation of the constructed matrix in this invention;

[0047] Figure 12 This is the Gaussian blur filtering operator in this invention;

[0048] Figure 13 This is a schematic diagram illustrating the generation of the blur submodule in this invention.

[0049] 1-Image acquisition module, 2-Color space conversion module, 3-Image sharpening module, 4-Storage management module, 5-DDR module, 6-Acquisition unit, 7-Data path conversion unit, 8-Color difference unit, 9-Color correction unit, 10-Matrix unit, 11-Blur unit, 12-Cache unit, 13-Correct unit. Detailed Implementation

[0050] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to embodiments and accompanying drawings. The illustrative embodiments and descriptions of this invention are for illustrative purposes only and are not intended to limit the invention. References Figure 1 This invention discloses a four-channel image sharpening system based on ZYNQ, comprising an image acquisition module 1, a color space conversion module 2, an image sharpening module 3, a storage management module 4, and a DDR module 5. The output of the image acquisition module 1 is connected to the input of the color space conversion module 2; the output of the color space conversion module 2 is connected to the input of the image sharpening module 3; the output of the image sharpening module 3 is connected to the input of the storage management module 4; the output of the storage management module 4 is connected to the input of the DDR module 5; and the output of the DDR module 5 is connected to the input of the storage management module 4. (Reference) Figure 2 The image acquisition module 1 includes an acquisition unit 6 and a data path conversion unit 7; the output of the acquisition unit 6 is connected to the input of the data path conversion unit 7.

[0051] refer to Figure 3 The color space conversion module 2 includes a color interpolation unit 8 and a color correction unit 9; the output of the color interpolation unit 8 is connected to the input of the color correction unit 9.

[0052] refer to Figure 4 The image sharpening module 3 internally includes a matrix unit 10, a blur unit 11, a cache unit 12, and a correct unit 13; the output of the matrix unit 10 is connected to the input of the blur unit 11; the output of the blur unit 11 is connected to the input of the correct unit 13; the outputs of the correct unit 13 and the cache unit 12 are connected to the input of the storage management module 4.

[0053] The acquisition unit uses a Sony IMX226CQJ-C CMOS image sensor to acquire raw images. The image sensor can determine the output image format via bus configuration at the PS end of the ZYNQ. The unit sets the output to ten-channel RAW domain image data. Compared to other low-margin output formats, this output can output ten effective pixel values ​​in a single clock cycle, effectively improving data throughput.

[0054] Due to the maximum clock frequency limit provided by the ZYNQ's PL pin, the hardware system cannot directly process the ten-channel image data output from the CMOS image sensor, requiring optimization of this data. Therefore, a data path conversion module is used to solve this problem. This module employs channel merging and channel splitting to convert the ten-channel RAW domain image data into a four-channel RAW domain image data format. Figure 5 The channel merging section converts the original ten channels output by the CMOS image sensor into two independent channels, each containing five paths of the original ten channels. The channel splitting section then converts the two independent channels into four channels for output. The four-channel RAW domain image data output by the data path conversion module is used as input to the color space conversion module for subsequent processing.

[0055] Since the photodiodes of CMOS image sensors cannot distinguish light sources of different wavelengths, a color filter array that can separate red, green and blue is required. Therefore, the four-channel RAW domain image data output by the upper-level module needs to be converted into four-channel RGB domain image data through the color interpolation part. This part uses a gradient-based bilinear interpolation algorithm to process the RAW domain image data.

[0056] The algorithm part of the subsequent module mainly processes the Y component in the YCbCr domain image data. Therefore, the four-channel RGB domain image data restored by the color interpolation part still needs to be converted into four-channel YCbCr domain image data by the color correction part. The calculation formula of the color correction part is shown in formulas (1), (2), and (3).

[0057] Y=0.299*R+0.587*G+0.114*B (1)

[0058] Cb=-0.169*R-0.331*G+0.5*B_+128 (2)

[0059] Cr=0.5*R-0.419*G-0.081*B+128 (3)

[0060] The desharpening mask algorithm is a commonly used image enhancement algorithm. This algorithm first performs low-pass filtering on the original image to obtain its low-frequency components, then subtracts the original image from its low-frequency components to obtain the original image that retains the high-frequency components. Finally, it uses a sharpening gain coefficient to enhance the original image that retains the high-frequency components and then superimposes it on the original image to obtain the final sharpened image.

[0061] Through analysis and comparison, it can be seen that since the high-frequency part of an image contains image details, noise, and overshoots and undershoots caused by the elimination of grayscale sudden-change edges, the traditional unsharp masking algorithm will amplify image noise or cause overshoot phenomena at the edge portions of the image while enhancing the image, leading to poor imaging quality.

[0062] To address this problem, the present invention proposes an improved unsharp masking algorithm suitable for hardware implementation. Based on the traditional unsharp masking algorithm, this algorithm adds a module for filtering mid-low frequency signals and noise, and the flowchart is as Figure 6 shown. Before processing, it is necessary to convert the color space of the original image from the RGB domain to the YCbCr domain, extract the Y component data therein for processing, and leave the other components unprocessed. Since the Y component serves as the luminance part of the original image, processing it alone can achieve better results. After that, low-pass filtering is performed on the Y component data of the original image to obtain its blurred钝化 image blur, then the Y component data is subtracted from this part to obtain the high-frequency part of the Y component. Subsequently, the absolute value of the high-frequency part is compared with a preset threshold coefficient th (0<th<1). If it is greater than the threshold coefficient, the high-frequency part is multiplied by the sharpening gain coefficient and superimposed with the Y component data of the original image; if it is less than the threshold coefficient, it remains unchanged.

[0063] Traditional image processing methods based on ZYNQ or FPGA are usually single-channel processing methods. Under a limited operating frequency, such methods can only process images of 1080P standard and lower resolutions, and do not have real-time processing capability for images of higher resolutions. To avoid the occurrence of timing violations, the present invention improves the traditional unsharp masking algorithm. The improved algorithm sharpens the original image on the basis of a four-channel image processing method. This processing method realizes sharpening processing for 4K resolution images on the premise of meeting the operating frequencies and transmission frame rates of supporting hardware devices such as ZYNQ boards, CMOS image sensors, and display screens, and can better meet the requirements of hardware systems for resolution and real-time performance.

[0064] Taking the pixel value data stream of a certain channel as an example, the image data stream of the single-channel processing method is as Figure 8 shown, where a, b, c, and d respectively represent the 1st, 2nd, 3rd, and 4th rows of one frame of image, and the pixel value addresses are continuous.

[0065] The output of the data path conversion part has been converted to the four-channel processing method, and its image data stream is as Figure 9 shown. This processing method includes four channels, where a, b, c, and d also represent the 1st, 2nd, 3rd, and 4th rows of one frame of image, except that this method can output four consecutive pixel values simultaneously within one clock cycle. After the output of a certain row of data of one frame of image is completed, the next row of data is output immediately afterwards.

[0066] The flowchart of the image sharpening module of the present invention is as follows: Figure 4 As shown, in order to effectively process the four-channel Y components output by the color space conversion unit, this invention requires the generation of a total of 4 matrix units.

[0067] The four channels of the Y component need to be processed by their respective matrix units to generate a 5x2 construct matrix. Since the image data for each channel is input serially, generating a 5x2 construct matrix requires acquiring five rows of image data simultaneously. This necessitates data buffering. To address this, four FIFOs are used to buffer the first four rows of data before the next input data becomes the fifth row. However, this only achieves the simultaneous presence of five rows of data. To achieve a 5x2 construct matrix, two sets of registers are needed to store the data, allowing two columns of data to appear simultaneously.

[0068] Taking the first two data points of each row of the four-channel Y component as an example, the schematic diagram for generating the matrix is ​​as follows: Figure 11 As shown, a, b, c, d, and e represent the image data of rows 1 to 5 of each channel, respectively, and four construct matrices are generated using a FIFO buffer. Note that since the Y component is divided into 4 channels and the maximum resolution of the input image is 4096*2160, meaning the maximum number of pixels per row in a frame is 4096, the FIFO depth cannot be less than 1024 (4096 / 4 = 1024).

[0069] The data from the four channels of the Y component, after passing through their respective matrix modules, yields four different construction matrices. These construction matrices need to be input collaboratively into a blur submodule for computation. In other words, obtaining the blur value of a specific pixel requires the participation of four construction matrices, and the Gaussian filter selected by the blur module is a 5x5 matrix. The principle for generating the blur value of a specific pixel is as follows: Figure 13 As shown, a, b, c, d, and e represent the first to fifth rows of data in the original image, respectively. Taking the dashed box blur_A as an example, this box contains 25 pixel values, which need to be multiplied by the corresponding elements of the 5*5 Gaussian blur filter. After weighted averaging, the blur value of pixel c3 is obtained. Since the first row of the filter is only multiplied by the second, third, and fourth elements of that row, only the values ​​need to be taken. Figure 11 The filter takes the pixel values ​​of matrix_B (a2), matrix_C (a3), and matrix_D (a4). The second row of the filter needs to be multiplied by the five elements in this row, so it takes the pixel values ​​of matrix_A (b1 and b5), matrix_B (b2), matrix_C (b3), and matrix_D (b4), and so on for the remaining rows.

[0070] The different pixel values ​​required by the four matrix units are all input in the same clock cycle, so the blur values ​​of four pixels can be obtained in one cycle, which greatly improves the data throughput compared to the single-channel processing method.

[0071] The Correct unit employs a four-stage pipeline. During computation, the first-stage subtraction unit subtracts the original center pixel value output from the matrix unit from the blur value output from the blur unit each clock cycle. The result is passed to the second-stage absolute value unit for absolute value processing, used for subsequent comparison with the threshold coefficient th. If the absolute value is greater than the set threshold, sharpening is performed; otherwise, no processing is performed. The third-stage multiplication unit multiplies the result of the subtraction unit from the first stage by the sharpening gain coefficient. The fourth-stage addition unit superimposes the center pixel data output from the matrix module with the result of the third-stage multiplication unit, including the original center pixel values ​​that did not meet the conditions and were not processed. Finally, the sharpened and corrected Y component data is obtained and output along with the Cb and Cr component data cached in the Cache module.

[0072] To ensure the image is free from flickering, tearing, and frame drops, the storage management module uses DDR to handle frame buffering. Internally, the PS (Power Position) chip contains DDR, which can be accessed via a mapped virtual address. However, for the PL (Power Position) chip, VDMA (Virtual Memory Mapping) is required to read and write data in the PS's DDR. VDMA is a commonly used IP core in ZYNQ chips for scheduling image data. The PS can configure and access the VDMA's internal registers through the top-level AXI4-Lite interface. To access DDR from the PL, the YCbCr pixel stream from the PL needs to be converted to an AXI4-Stream format video stream to complete data communication between the VDMA and PL. The VDMA then converts the AXI4-Stream video stream back to standard AXI4 format and sends the data to the PS's AXI_HP interface via the axi4_s2mm interface, before transferring it to the DDR module for buffering. The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above description is only a specific embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A four-channel image sharpening system based on ZYNQ, characterized in that, This includes an image acquisition module, a color space conversion module, an image sharpening module, and a storage management module located at the PL end of the ZYNQ chip, and a DDR module located at the PS end of the ZYNQ chip. An image acquisition module is used to acquire raw image data and convert the format of the raw image data into four-channel RAW domain image data; it includes an acquisition unit and a data path conversion unit; the input terminal of the acquisition unit receives the raw image data, and the output terminal of the acquisition unit is connected to the input terminal of the data path conversion unit; A color space conversion module is used to convert the four-channel RAW domain image data into four-channel YCbCr domain image data; it includes a color interpolation unit and a color correction unit, wherein the input of the color interpolation unit is connected to the output of the data path conversion unit, and the output of the color interpolation unit is connected to the input of the color correction unit. An image sharpening and correction module is used to sharpen and correct the Y component data of the four-channel YCbCr domain image data to obtain enhanced image data of the high-frequency part of the YCbCr domain image data, and then output the enhanced image data together with the Cb and Cr component data of the YCbCr domain image data; it includes a matrix unit, a blur unit, a cache unit, and a correct unit; the input of the matrix unit is connected to the output of the color correction unit, and the output of the matrix unit is connected to the input of the blur unit; the output of the blur unit is connected to the input of the correct unit; the outputs of the correct unit and the cache unit are connected to the input of the storage management module; The matrix unit extracts the Y component of the four-channel YCbCr domain image data and constructs the building matrix required by the subsequent modules using a data caching method. Specifically: The matrix unit utilizes FIFO and registers to generate a data buffer circuit. It buffers a single-channel serial image data input through four FIFOs. The output of each FIFO is connected to the input of the next FIFO and is output together with the fifth row of image data, realizing the simultaneous output of five rows of data. The output of each row of data is processed by two levels of registers to form a 5*2 matrix. The data within the window of the matrix is ​​used to generate the blur value in the blur unit. The blur unit determines the center blur value by calculating the average value of the data in a 5*5 window around the center pixel. To generate a blur value, it is necessary to extract the values ​​of four building matrices generated by the matrix unit. The four-channel processing method can generate four valid blur values ​​in a single cycle. The storage management module is used to store the data output by the image sharpening and correction module; The DDR module is bidirectionally connected to the storage management module.

2. The four-channel image sharpening system based on ZYNQ according to claim 1, characterized in that, The acquisition unit is used to transmit ten valid pixel values ​​to the data path conversion unit within a single clock cycle. The ten valid pixel values ​​are RAW domain image data in ten-channel format.

3. The four-channel image sharpening system based on ZYNQ according to claim 2, characterized in that, The data path conversion unit is used to convert ten-channel RAW domain image data into four-channel RAW domain image data by channel merging and channel splitting.

4. The four-channel image sharpening system based on ZYNQ according to claim 3, characterized in that, The color interpolation unit is used to process four-channel RAW domain image data using a gradient-based bilinear interpolation algorithm to obtain four-channel RGB domain image data from which red, green, and blue color filter arrays can be separated.

5. A four-channel image sharpening system based on ZYNQ according to claim 4, characterized in that, The color correction unit is used to convert four-channel RGB domain image data into four-channel YCbCr domain image data using a conversion formula.

6. The four-channel image sharpening system based on ZYNQ according to claim 1, characterized in that, The cache unit is used to cache the Cb and Cr components of the four-channel image data that are not processed by the algorithm, and output them together after the Y component of the four-channel image data has been processed.

7. A four-channel image sharpening system based on ZYNQ according to claim 6, characterized in that, The Correct unit subtracts the original Y component from the processed blur value and takes the absolute value, then compares it with a set threshold coefficient. If the requirement is met, the sharpening gain is applied; otherwise, the value remains unchanged. Finally, the result is output together with the Cb and Cr components cached in the Cache unit.

8. A four-channel image sharpening system based on ZYNQ according to claim 7, characterized in that, The storage management module converts the YCbCr pixel stream into an AXI4-Stream format video stream at the PL end, completing data stream communication between the VDMA and the PL end. The VDMA then converts the AXI4-Stream format video stream into the standard AXI4 format and sends the data to the AXI_HP interface at the PS end through the axi4_s2mm interface. The image data is then transmitted to the DDR for caching to complete image caching and display.

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