A graph matching method and system based on dynamic reconfiguration calculation
Patent Information
- Application Number
- CN202410065184.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-01-16
- Publication Date
- 2026-08-18
- Estimated Expiration
- 2044-01-16
AI Technical Summary
然而,这种方式在匹配的过程中采用固定的执行模式,导致处理器的处理效率较低,进而降低了整体的匹配速度
[0040](1)本发明的基于动态重构计算的图匹配方法,将任务按照执行阶段划分为更加细粒度的多个子任务,利用流水线形式的多个可重构处理单元并行进行图模式匹配,大大提高了任务间以及任务内的并行性,并且根据子任务的负载特征、子任务对应的可重构处理单元的利用率及子任务执行的延迟,通过动态调度将每个任务的子任务分配至对应最优的可重构处理单元进行图模式匹配,最大化可重构处理单元构成的流水线的吞吐量和效率,大大提升了处理单元的利用率,进而提高了图模式匹配的速度。
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Figure CN118015309B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of graph pattern mining in big data processing, and more specifically, relates to a graph matching method and system based on dynamic reconstruction calculation. Background Technology
[0002] Graph pattern mining (GPM) can find subgraphs in a given graph that match a target pattern. GPM has important applications in many fields such as chemical engineering, bioinformatics, spam detection, and social sciences.
[0003] Related research indicates that purely software-based graph pattern matching methods often fall short of practical requirements. Due to the irregularity of graph data access, general-purpose processors cannot efficiently access this data, leading to numerous redundant memory accesses and low parallelism. These problems are particularly severe when performing graph pattern mining on large-scale graphs. Therefore, existing technologies typically offload the task sequence to hardware (CPU) for matching. However, this approach employs a fixed execution pattern during the matching process, resulting in low processor efficiency and consequently reducing the overall matching speed.
[0004] Furthermore, in actual graph pattern mining, some graph patterns may have the same computational features. If these features are directly implemented in hardware, they will be matched repeatedly during the graph pattern mining process. These redundant matching operations greatly increase the additional overhead generated during multi-pattern matching and reduce the overall matching speed. Summary of the Invention
[0005] To address the shortcomings and improvement needs of existing technologies, this invention provides a graph matching method and system based on dynamic reconstruction calculation, with the aim of improving the speed of graph pattern matching.
[0006] To achieve the above objectives, according to a first aspect of the present invention, a graph matching method based on dynamic reconstruction calculation is provided, comprising:
[0007] S1. Obtain the matching order of each graph pattern to be matched in the given graph to generate a task sequence;
[0008] S2. Based on the execution stage of the task, each task in the task sequence is divided into multiple sub-tasks, and multiple reconfigurable processing units are set up.
[0009] S3. Each subtask is dynamically scheduled and assigned to the corresponding optimal reconfigurable processing unit for parallel graph pattern matching, specifically including:
[0010] S31. Assign each of the subtasks to the corresponding reconfigurable processing unit;
[0011] S32. Based on the load characteristics of the subtasks, the utilization rate of the reconfigurable processing units corresponding to the subtasks, and the execution latency of the subtasks, a dynamic balancing algorithm is adopted. With the goal of the pipeline composed of multiple reconfigurable processing units approaching the maximum theoretical throughput and efficiency, the subtasks among the reconfigurable processing units are reallocated to achieve graph pattern matching by assigning each subtask to the corresponding optimal reconfigurable processing unit until all matching tasks in the task sequence are completed.
[0012] Furthermore, in S1, the matching order of each graph pattern to be matched in the given graph is obtained, including:
[0013] S11. Extract the feature sub-map of each pattern to be matched in the given graph;
[0014] S12. Merge the same feature parts in the feature subgraphs of different graph patterns to be matched to obtain merged feature subgraphs and feature subgraphs unique to different graph patterns to be matched; wherein, for each graph pattern to be matched, the unique feature subgraph and the corresponding merged feature subgraph together constitute the feature subgraph of the corresponding graph pattern.
[0015] S13. Generate the first vertex matching order of the merged feature subgraphs, and generate the second vertex matching order corresponding to the unique feature subgraphs of different graph patterns to be matched; for each graph pattern to be matched, concatenate the second vertex matching order with the corresponding first vertex matching order to obtain the matching order of the graph pattern to be matched.
[0016] Furthermore, S13 also includes:
[0017] The first vertex symmetry order of the merged feature subgraph is generated, and the second vertex symmetry order corresponding to the feature subgraphs unique to different graph patterns to be matched is generated respectively; for each graph pattern to be matched, the second vertex symmetry order is concatenated with the corresponding first vertex symmetry order to obtain the symmetry order of the graph pattern to be matched.
[0018] In S1, when generating the task sequence, the method further includes: generating the task sequence according to the matching order of the graph patterns to be matched and the symmetric order of the graph patterns to be matched.
[0019] Furthermore, in S3, during the graph pattern matching process performed by the reconfigurable processing unit, the corresponding subtasks are pruned according to the symmetrical order of the graph patterns to be matched, specifically including:
[0020] The vertex ID comparison order of the subtasks is obtained according to the symmetric order of the graph pattern to be matched. When the vertex ID of the subtask does not exceed the set threshold, the vertex IDs of the subtasks are compared to prune the corresponding subtasks.
[0021] Furthermore, in S31, if the number of subtasks is less than the number of reconfigurable processing units, the subtasks are assigned to reconfigurable processing units with shorter latency.
[0022] Otherwise, the subtasks with the same number of reconfigurable processing units are assigned to the reconfigurable processing units. In S32, after the subtasks are assigned to the corresponding optimal reconfigurable processing units for graph pattern matching, the reconfigurable processing units release memory and jump to S31 to continue graph pattern matching for the remaining subtasks.
[0023] Furthermore, multiple reconfigurable processing units are located in memory.
[0024] According to a second aspect of the present invention, a graph matching system based on dynamic reconstruction computation is provided, characterized in that it is used to execute the graph matching method according to any one of the first aspects, the graph matching system comprising:
[0025] The task sequence generation module is used to obtain the matching order of each graph pattern to be matched in a given graph in order to generate a task sequence;
[0026] An adaptive fine-grained task decomposition module is used to divide each task in the task sequence into multiple subtasks according to the execution stage of the task.
[0027] Multiple reconfigurable processing units are used to perform graph pattern matching on corresponding subtasks in parallel;
[0028] A dynamic scheduling module is used to allocate each subtask to a corresponding reconfigurable processing unit; and based on the load characteristics of the subtask, the utilization rate of the reconfigurable processing unit corresponding to the subtask, and the execution latency of the subtask, a dynamic balancing algorithm is used to reallocate the subtasks among the reconfigurable processing units with the goal of the pipeline composed of multiple reconfigurable processing units approaching the maximum theoretical throughput and efficiency, so as to allocate each subtask to the corresponding optimal reconfigurable processing unit for graph pattern matching until all matching tasks in the task sequence are completed.
[0029] Furthermore, the task sequence generation module includes:
[0030] The feature sub-map acquisition unit is used to extract the feature sub-map of each pattern to be matched in a given graph.
[0031] The merging unit is used to merge the same feature parts in the feature subgraphs of different graph patterns to be matched, to obtain a merged feature subgraph and a feature subgraph unique to each graph pattern to be matched; wherein, for each graph pattern to be matched, the unique feature subgraph and the corresponding merged feature subgraph together constitute the feature subgraph of the corresponding graph pattern.
[0032] The matching order generation unit is used to generate the first vertex matching order of the merged feature subgraph and to generate the second vertex matching order corresponding to the feature subgraphs unique to different graph patterns to be matched; for each graph pattern to be matched, the second vertex matching order is concatenated with the corresponding first vertex matching order to obtain the matching order of the graph pattern to be matched.
[0033] The symmetry order generation unit is used to generate the first vertex symmetry order of the merged feature subgraph and to generate the second vertex symmetry order corresponding to the feature subgraphs unique to different graph patterns to be matched; for each graph pattern to be matched, the second vertex symmetry order is concatenated with the corresponding first vertex symmetry order to obtain the symmetry order of the graph pattern to be matched.
[0034] The task sequence generation module further includes generating the task sequence according to the matching order of the graph patterns to be matched and the symmetrical order of the graph patterns to be matched.
[0035] According to a third aspect of the present invention, an electronic device is provided, including a computer-readable storage medium and a processor;
[0036] The computer-readable storage medium is used to store executable instructions;
[0037] The processor is configured to read executable instructions stored in the computer-readable storage medium and execute the graph matching method according to any one of the first aspects.
[0038] According to a fourth aspect of the invention, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements the graph matching method as described in any of the first aspects.
[0039] In summary, the above-described technical solutions conceived in this invention can achieve the following beneficial effects:
[0040] (1) The graph matching method based on dynamic reconfiguration computation of the present invention divides the task into multiple subtasks with finer granularity according to the execution stage, and uses multiple reconfigurable processing units in pipeline form to perform graph pattern matching in parallel, which greatly improves the parallelism between and within tasks. Furthermore, based on the load characteristics of the subtasks, the utilization rate of the reconfigurable processing units corresponding to the subtasks, and the execution delay of the subtasks, the subtasks of each task are dynamically scheduled to be assigned to the corresponding optimal reconfigurable processing units for graph pattern matching, thereby maximizing the throughput and efficiency of the pipeline composed of reconfigurable processing units, greatly improving the utilization rate of processing units, and thus improving the speed of graph pattern matching.
[0041] (2) Furthermore, when obtaining the matching order or symmetric order, the computational features of different modes in graph pattern matching are considered. By merging the same feature parts in the feature subgraphs of multiple graph patterns to be matched, only one vertex matching order or symmetric order needs to be obtained for the same feature subgraphs of different modes. By merging the matching order shared between different modes, the redundant operations corresponding to the same matching process are reduced, the extra overhead generated during multi-mode matching is reduced, and the overall matching speed is further improved.
[0042] (3) Furthermore, the pruning scheme provided by the present invention is easy to implement in hardware in the reconfigurable processing unit. The comparison between the vertex IDs of the subtasks is only performed when the vertex ID of the subtask does not exceed the set threshold, which can quickly perform pruning, greatly reduce pruning delay, and thus reduce the average matching time of the entire pattern matching.
[0043] (4) Preferably, the reconfigurable processing unit is located in memory, so that the matching task is processed in memory. Compared with the prior art, which performs task matching directly in the CPU, the present invention can reduce the communication between the processor and memory and reduce the overhead caused by the task accessing memory, thereby further improving the speed and efficiency of graph pattern matching.
[0044] In summary, the graph matching method of this invention is an energy-efficient matching method. By accelerating the matching process of common feature parts of multiple target patterns through multi-path merging based on pattern features, the matching process is merged, thereby improving the speed of graph pattern matching. At the same time, different tasks are divided into independent subtasks and dynamically scheduled in reconfigurable processing units in memory, which greatly reduces the number of off-chip communication of the processor, improves the task parallelism of graph pattern matching, reduces computational redundancy, lowers the cache miss rate, and further improves the speed and efficiency of graph mining. Attached Figure Description
[0045] Figure 1 This is a schematic diagram of the graph matching method based on dynamic reconstruction calculation in this invention.
[0046] Figure 2 This is a schematic diagram of a graph matching method based on dynamic reconstruction calculation in an embodiment of the present invention.
[0047] Figure 3 This is a flowchart illustrating the dynamic scheduling of processing units based on task characteristics in an embodiment of the present invention.
[0048] Figure 4 This is a flowchart illustrating multipath merging acceleration based on pattern features in an embodiment of the present invention. Detailed Implementation
[0049] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention. Furthermore, the technical features involved in the various embodiments of this invention described below can be combined with each other as long as they do not conflict with each other.
[0050] In this invention, the terms "first," "second," etc., used in the invention and accompanying drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.
[0051] like Figure 1 and Figure 2 As shown, the graph matching method based on dynamic reconstruction calculation of the present invention mainly includes:
[0052] S1. Obtain the matching order of each graph pattern to be matched in the given graph to generate a task sequence;
[0053] S2. Based on the execution phase of the task, each task in the task sequence is divided into multiple subtasks with finer granularity, and multiple reconfigurable processing units are set up; where the execution phase of the task is also the execution steps of the task.
[0054] S3. Dynamic scheduling is used to allocate subtasks of each task to the corresponding optimal reconfigurable processing unit for parallel graph pattern matching, specifically including:
[0055] S31. Assign subtasks to the corresponding reconfigurable processing units;
[0056] S32. Based on the load characteristics of the subtasks, the utilization rate of the reconfigurable processing units corresponding to the subtasks, and the execution latency of the subtasks, a dynamic balancing algorithm is adopted. With the goal of maximizing the theoretical throughput and efficiency of the pipeline composed of multiple reconfigurable processing units, the subtasks among the reconfigurable processing units are reallocated. This ensures that each subtask is assigned to the corresponding optimal reconfigurable processing unit for graph pattern matching until all matching tasks are completed. In this embodiment of the invention, a greedy dynamic balancing algorithm is used; in other embodiments, other dynamic balancing algorithms may be employed.
[0057] Specifically, such as Figure 3 As shown, in S31, if the number of subtasks is less than the number of reconfigurable processing units, the subtasks are assigned to the reconfigurable processing units with shorter latency. If the number of subtasks is greater than the number of reconfigurable processing units, the subtasks matching the number of reconfigurable processing units are assigned to the reconfigurable processing units. In S32, after each subtask is assigned to the corresponding optimal reconfigurable processing unit for graph pattern matching, the reconfigurable processing unit continues to perform graph pattern matching for the remaining subtasks according to the steps of S31-S32 until all task matching is completed.
[0058] The graph matching method based on dynamic reconfiguration computation of the present invention allocates the subtasks of each task to the corresponding optimal reconfigurable processing unit for graph pattern matching by dynamically scheduling according to the load characteristics of the subtask, the utilization rate of the reconfigurable processing unit corresponding to the subtask, and the execution delay of the subtask. This maximizes the throughput and efficiency of the pipeline composed of reconfigurable processing units, greatly improves the utilization rate of the processing unit, and thus improves the speed of graph pattern matching.
[0059] Furthermore, by dividing the task into multiple subtasks with finer granularity according to the execution stage, and using multiple reconfigurable processing units in a pipeline form to perform graph pattern matching in parallel, the parallelism between and within tasks is greatly improved, and the speed of graph pattern matching is further improved compared with existing technologies.
[0060] Preferably, in S2, the reconfigurable processing unit is located in memory, so that the matching task is processed in memory. Compared with the prior art, which performs task matching directly in the CPU, the present invention can reduce the communication between the processor and memory and reduce the overhead caused by the task accessing memory, thereby further improving the speed and efficiency of graph pattern matching.
[0061] As a further design of the present invention, such as Figure 4 As shown, in S1, a multi-path merging acceleration method based on pattern features is used to obtain the matching order of each graph pattern to be matched in a given graph. Specifically, this includes:
[0062] S11. Extract the feature sub-map of each pattern to be matched in the given graph;
[0063] S12. Merge the same feature parts in the feature subgraphs of different graph patterns to be matched to obtain merged feature subgraphs and feature subgraphs unique to different graph patterns to be matched; wherein, for each graph pattern to be matched, the unique feature subgraph and the corresponding merged feature subgraph together constitute the feature subgraph of that graph pattern.
[0064] S13. Generate the first vertex matching order of the merged feature subgraphs, and generate the second vertex matching order corresponding to the unique feature subgraphs of different graph patterns to be matched; for each graph pattern to be matched, concatenate the second vertex matching order with the corresponding first vertex matching order to obtain the matching order of the graph pattern to be matched. The matching order of the graph pattern describes the priority order in which each vertex in the graph pattern is matched within that pattern.
[0065] Furthermore, S1 also includes obtaining the symmetric order of each graph pattern to be matched in the given graph, and generating a task sequence based on the matching order and the symmetric order.
[0066] S13 further includes: generating the first vertex symmetry order of the merged feature subgraph, and generating the second vertex symmetry order corresponding to the unique feature subgraphs of different graph patterns to be matched; for each graph pattern to be matched, the second vertex symmetry order is concatenated with the corresponding first vertex symmetry order to obtain the symmetry order of the graph pattern to be matched. The symmetry order of the graph patterns is obtained through the vertex dependencies between the graph patterns to be matched, describing how each vertex should be expanded and which vertices can be considered valid candidate vertices for the expansion step.
[0067] The method of this invention adopts a multi-path merging acceleration approach based on pattern features. By merging the same feature parts in the feature subgraphs of multiple patterns to be matched, only the vertex matching order and symmetry order need to be obtained once for the same feature subgraphs of different patterns. By merging the matching order shared between different patterns, redundant operations corresponding to the same matching process are reduced, the additional overhead generated during multi-pattern matching is reduced, and the overall matching speed is further improved.
[0068] Furthermore, in S3, during the graph pattern matching process in the reconfigurable processing unit, the subtasks are pruned according to the symmetric order of each obtained graph pattern to be matched. Specifically, this includes:
[0069] The vertex ID comparison order of the subtasks is obtained according to the symmetric order of the graph pattern to be matched. When the vertex ID of the subtask does not exceed the set threshold, the vertex IDs of the subtasks are compared to prune the corresponding subtasks.
[0070] The pruning scheme provided by this invention is easy to implement in hardware within a reconfigurable processing unit. It only compares the vertex IDs of subtasks when the vertex IDs of the subtasks do not exceed a set threshold, enabling fast pruning, greatly reducing pruning latency, and thus reducing the average matching time of the entire pattern matching process.
[0071] Based on the above graph matching method, this invention provides a specific application of this method in spam detection. When applied to spam detection, nodes in the given graph represent different email addresses, edges in the given graph represent emails sent between different email addresses, and one edge represents an email sent between two email addresses. The graph pattern to be matched is a graph pattern associated with spam email addresses, including: email address patterns that have email exchanges with spam email addresses, patterns where spam email addresses forward emails to other email addresses through one or more email addresses, etc. The task in the task sequence is to find the graph pattern to be matched; the subtask is a step or execution stage for finding the corresponding graph pattern to be matched.
[0072] Based on the graph matching method described above, all matching tasks are completed to achieve network spam detection.
[0073] When applied to spam detection, this method divides the task into more granular subtasks according to execution stages. It utilizes multiple reconfigurable processing units in a pipelined manner to perform graph pattern matching in parallel, rather than directly employing a fixed execution pattern. This significantly improves parallelism between and within tasks. For example, if the current task to be matched is to find emails forwarded from certain email addresses to other email addresses by spam accounts, the method can use different reconfigurable execution units for optimal matching for different numbers of relay email addresses, eliminating the need for separate matching and improving the speed of graph pattern matching related to spam accounts in spam detection. Furthermore, based on the load characteristics of subtasks, the utilization rate of the corresponding reconfigurable processing units, and the execution latency of subtasks, dynamic scheduling allocates each task's subtasks to the corresponding optimal reconfigurable processing unit for graph pattern matching. This maximizes the throughput and efficiency of the pipeline formed by the reconfigurable processing units, greatly improving the utilization rate of the processing units and thus increasing the speed of graph pattern matching related to spam accounts in spam detection.
[0074] Example 2
[0075] This invention provides a graph matching system based on dynamic reconstruction computation, comprising:
[0076] The task sequence generation module is used to obtain the matching order of each graph pattern to be matched in a given graph in order to generate a task sequence;
[0077] An adaptive fine-grained task decomposition module is used to divide each task in a task sequence into multiple subtasks with finer granularity based on the execution stage of the task.
[0078] Multiple parallel reconfigurable processing units are used to perform graph pattern matching on corresponding subtasks in parallel.
[0079] The dynamic scheduling module is used to allocate subtasks to corresponding reconfigurable processing units. Based on the load characteristics of the subtasks, the utilization rate of the reconfigurable processing units corresponding to the subtasks, and the execution latency of the subtasks, a dynamic balancing algorithm is used to reallocate the subtasks among the reconfigurable processing units with the goal of making the pipeline composed of multiple reconfigurable processing units approach the maximum theoretical throughput and efficiency, so as to allocate each subtask to the corresponding optimal reconfigurable processing unit.
[0080] Preferably, the reconfigurable processing unit is located in memory.
[0081] Furthermore, the task sequence generation module includes: a feature sub-graph acquisition unit, a merging unit, a matching order generation unit, and a symmetric order generation unit.
[0082] The feature submap acquisition unit is used to extract the feature submap for each pattern to be matched in a given graph;
[0083] The merging unit is used to merge the same feature parts in the feature subgraphs of different graph patterns to be matched, to obtain a merged feature subgraph and a feature subgraph unique to each graph pattern to be matched; wherein, for each graph pattern to be matched, the merged feature subgraph and the unique feature subgraph together constitute the feature subgraph of that graph pattern.
[0084] The matching order generation unit is used to generate the first vertex matching order of the merged feature subgraphs, and to generate the second vertex matching order corresponding to the feature subgraphs unique to different graph patterns to be matched. For each graph pattern to be matched, the second vertex matching order is concatenated with the corresponding first vertex matching order to obtain the matching order of the graph pattern to be matched.
[0085] The symmetry order generation unit is used to generate the first vertex symmetry order of the merged feature subgraph and to generate the second vertex symmetry order corresponding to the feature subgraphs unique to different graph patterns to be matched. For each graph pattern to be matched, the second vertex symmetry order is concatenated with the corresponding first vertex symmetry order to obtain the symmetry order of the graph pattern to be matched.
[0086] Each module or unit is used to execute the steps corresponding to the graph matching method based on dynamic reconstruction calculation in Embodiment 1 above, which will not be repeated here. Embodiment 3
[0087] This invention provides an electronic device, including a computer-readable storage medium and a processor;
[0088] Computer-readable storage media are used to store executable instructions;
[0089] The processor is used to read executable instructions stored in a computer-readable storage medium and execute the graph matching method based on dynamic reconstruction computation in Embodiment 1.
[0090] Example 4
[0091] This invention provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements a graph matching method based on dynamic reconstruction calculation as described in Embodiment 1.
[0092] The graph matching method of this invention accelerates the process by multi-path merging based on pattern features, obtaining the matching order and pattern symmetry order of each graph pattern to be matched in a given graph. For identical parts in different patterns, only one mining operation is needed, reducing redundant operations in the matching process and improving the overall matching speed. Through adaptive fine-grained task decomposition, different tasks are divided into multiple pipelined stages, and each stage is assigned a reconfigurable processing unit for processing, improving task parallelism and further enhancing the speed and efficiency of graph mining. By dynamically scheduling reconfigurable processing units based on task features, the utilization rate of reconfigurable processing units in the pipeline is detected, and reconfigurable processing units are reallocated and scheduled according to a dynamic balancing algorithm and task load characteristics, thereby maximizing the throughput and efficiency of the entire pipeline and further improving the speed of graph pattern matching.
[0093] Those skilled in the art will readily understand that the above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.
Claims
1. A graph matching method based on dynamic reconfiguration computation, the graph matching method is applied in network spam detection, characterized in that, include: S1. Obtain the matching order of each graph pattern to be matched in the given graph to generate a task sequence; In the given graph, nodes represent different email addresses, edges represent emails sent between different email addresses, and one edge represents an email sent between two email addresses. The graph patterns to be matched are those associated with spam emails, including: email patterns that have corresponded with spam emails, and patterns that spam emails forward to other emails through one or more emails. S2. Based on the execution stage of the task, each task in the task sequence is divided into multiple sub-tasks, and multiple reconfigurable processing units are set; the task in the task sequence is to find the graph pattern to be matched; the sub-task is the step or execution stage of finding the corresponding graph pattern to be matched. S3. Each subtask is dynamically scheduled and assigned to the corresponding optimal reconfigurable processing unit for parallel graph pattern matching, specifically including: S31. Assign each of the subtasks to the corresponding reconfigurable processing unit; S32. Based on the load characteristics of the subtask, the utilization rate of the reconfigurable processing unit corresponding to the subtask, and the execution delay of the subtask, a dynamic balancing algorithm is adopted to reallocate the subtasks among the reconfigurable processing units with the goal of the pipeline composed of multiple reconfigurable processing units approaching the maximum theoretical throughput and efficiency. This is to achieve the allocation of each subtask to the corresponding optimal reconfigurable processing unit for graph pattern matching until all matching tasks in the task sequence are completed. In S1, the matching order of each graph pattern to be matched in the given graph is obtained, including: S11. Extract the feature sub-map of each pattern to be matched in the given graph; S12. Merge the same feature parts in the feature subgraphs of different graph patterns to be matched to obtain merged feature subgraphs and feature subgraphs unique to different graph patterns to be matched; wherein, for each graph pattern to be matched, the unique feature subgraph and the corresponding merged feature subgraph together constitute the feature subgraph of the corresponding graph pattern. S13. Generate the first vertex matching order of the merged feature subgraphs, and generate the second vertex matching order corresponding to the unique feature subgraphs of different graph patterns to be matched; for each graph pattern to be matched, concatenate the second vertex matching order with the corresponding first vertex matching order to obtain the matching order of the graph pattern to be matched.
2. The graph matching method of claim 1, wherein, S13 also includes: The first vertex symmetry order of the merged feature subgraph is generated, and the second vertex symmetry order corresponding to the feature subgraphs unique to different graph patterns to be matched is generated respectively; for each graph pattern to be matched, the second vertex symmetry order is concatenated with the corresponding first vertex symmetry order to obtain the symmetry order of the graph pattern to be matched. In S1, when generating the task sequence, the method further includes: generating the task sequence according to the matching order of the graph patterns to be matched and the symmetric order of the graph patterns to be matched.
3. The graph matching method of claim 2, wherein, In S3, during the graph pattern matching process performed by the reconfigurable processing unit, the corresponding subtasks are pruned according to the symmetrical order of the graph patterns to be matched, specifically including: The vertex ID comparison order of the subtasks is obtained according to the symmetric order of the graph pattern to be matched. When the vertex ID of the subtask does not exceed the set threshold, the vertex IDs of the subtasks are compared to prune the corresponding subtasks.
4. The graph matching method of claim 1, wherein, In S31, if the number of subtasks is less than the number of reconfigurable processing units, the subtasks are assigned to reconfigurable processing units with shorter latency. Otherwise, the subtasks with the same number of reconfigurable processing units are assigned to the reconfigurable processing units. In S32, after the subtasks are assigned to the corresponding optimal reconfigurable processing units for graph pattern matching, the reconfigurable processing units release memory and jump to S31 to continue graph pattern matching for the remaining subtasks.
5. The graph matching method of claim 1, wherein, Multiple of the reconfigurable processing units are located in memory.
6. A graph matching system based on dynamic reconfiguration computation, characterized in that, For performing the graph matching method according to any one of claims 1-5, the graph matching system comprises: The task sequence generation module is used to obtain the matching order of each graph pattern to be matched in a given graph in order to generate a task sequence; An adaptive fine-grained task decomposition module is used to divide each task in the task sequence into multiple subtasks according to the execution stage of the task. Multiple reconfigurable processing units are used to perform graph pattern matching on corresponding subtasks in parallel; A dynamic scheduling module is used to allocate each subtask to a corresponding reconfigurable processing unit; and based on the load characteristics of the subtask, the utilization rate of the reconfigurable processing unit corresponding to the subtask, and the execution latency of the subtask, a dynamic balancing algorithm is used to reallocate the subtasks among the reconfigurable processing units with the goal of the pipeline composed of multiple reconfigurable processing units approaching the maximum theoretical throughput and efficiency, so as to allocate each subtask to the corresponding optimal reconfigurable processing unit for graph pattern matching until all matching tasks in the task sequence are completed.
7. The graph matching system of claim 6, wherein, The task sequence generation module includes: The feature sub-map acquisition unit is used to extract the feature sub-map of each pattern to be matched in a given graph. The merging unit is used to merge the same feature parts in the feature subgraphs of different graph patterns to be matched, to obtain a merged feature subgraph and a feature subgraph unique to each graph pattern to be matched; wherein, for each graph pattern to be matched, the unique feature subgraph and the corresponding merged feature subgraph together constitute the feature subgraph of the corresponding graph pattern. The matching order generation unit is used to generate the first vertex matching order of the merged feature subgraph and to generate the second vertex matching order corresponding to the feature subgraphs unique to different graph patterns to be matched; for each graph pattern to be matched, the second vertex matching order is concatenated with the corresponding first vertex matching order to obtain the matching order of the graph pattern to be matched. The symmetry order generation unit is used to generate the first vertex symmetry order of the merged feature subgraph and to generate the second vertex symmetry order corresponding to the feature subgraphs unique to different graph patterns to be matched; for each graph pattern to be matched, the second vertex symmetry order is concatenated with the corresponding first vertex symmetry order to obtain the symmetry order of the graph pattern to be matched. The task sequence generation module further includes generating the task sequence according to the matching order of the graph patterns to be matched and the symmetrical order of the graph patterns to be matched.
8. An electronic device, comprising: Includes computer-readable storage media and processors; The computer-readable storage medium is used to store executable instructions; The processor is configured to read executable instructions stored in the computer-readable storage medium and execute the graph matching method according to any one of claims 1-5.
9. A computer readable storage medium having stored thereon a computer program, characterized in that, When the program is executed by the processor, it implements the graph matching method as described in any one of claims 1-5.
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