A marine doppler log analog speed detection device

Abstract

The application provides a marine Doppler log analog speed detection device, which comprises a forward crystal oscillator starting circuit for realizing forward frequency output, which is composed of a NAND gate integrated block A driving circuit, a first set of 2-blade 11-grade wave band switches, forward oscillators A-K and a forward frequency output circuit; a backward crystal oscillator starting circuit for realizing backward frequency output, which is composed of a NAND gate integrated block B driving circuit, a second set of 2-blade 11-grade wave band switches, backward oscillators A'-K' and a backward frequency output circuit; and a power supply circuit and a forward-backward frequency common ground output circuit. By using the characteristics of simultaneous switching of the first set of 2-blade 11-grade wave band switches and the second set of 2-blade 11-grade wave band switches, and by matching the oscillator frequencies corresponding to the switch grade ends of the two sets of switches, the flexible switching of 11 analog speeds is realized, the test efficiency and test precision are improved, the artificial cost is reduced, the stability of the output frequency is greatly enhanced, and the error index in the analog speed precision test is met.

Description

Technical Field

[0001] This invention relates to the field of ship speed detection, specifically to a ship Doppler log analog speed detection device. Background Technology

[0002] A marine Doppler log is a navigation instrument used to measure a ship's speed and cumulative voyage. The speed information it provides is crucial for ship navigation. Based on the Doppler effect, it employs a pulsed dual-beam operating mode, with a transducer mounted on the bottom of the ship symmetrically and obliquely emitting sound waves along the ship's longitudinal axis. When the ship moves relative to the water, the frequency of the forward-received sound wave is higher than the transmission frequency, while the frequency of the rear-received sound wave is lower than the transmission frequency. The difference in sound wave frequencies received forward and backward is called the Doppler frequency shift, which is proportional to the ship's speed. This frequency shift is used to calculate the ship's speed relative to the water.

[0003] Simulated speed accuracy testing is a key test in the overall performance testing of a Doppler log. It requires calculating the forward and backward frequency difference based on the algorithm, determining the forward and backward frequencies to simulate the forward and backward sound wave frequencies received by the transducer, and then loading these two frequency signals onto the input terminals of the forward and backward channels of the Doppler log receiver to complete this test.

[0004] In the simulated speed accuracy test, 11 simulated speeds were set according to high speed, medium speed, and low speed for testing. These 11 simulated speeds were used to obtain 11 sets of forward and backward frequencies based on the algorithm to simulate the forward and backward acoustic wave frequencies received by the transducer, as detailed in Table 1. In the table, "Displayed Speed" refers to the speed displayed on the speedometer device. If the error between the "Displayed Speed" and the "Theoretical Speed" is within ±0.1kΩ or ±0.5% of the specification, the speedometer device is considered to be functioning normally.

[0005] In existing designs, commonly used single-channel output instruments cannot meet the requirement of simultaneously obtaining two frequency signals. Two identical instruments must be used to form a dual-channel output. However, two identical instruments are bulky, heavy, and inconvenient to carry, making them unsuitable for shipboard testing of speedometers. A dual-channel output instrument can output two frequency signals, but for each simulated speed, the frequency signals of both channels must be paired and set. In actual testing, there were 11 simulated speeds, requiring the pairing and setting of 22 frequency values. This operation is cumbersome, especially in batch product testing, where the number of repeated settings increases dramatically, leading to time consumption, errors, and significantly reduced testing efficiency. Summary of the Invention

[0006] To address the issues of existing single-channel output instruments being unable to simultaneously obtain two frequency signals and dual-channel output instruments being cumbersome to operate, especially in batch testing where repeated settings are frequent and testing efficiency is low, this invention proposes a marine Doppler speed gauging device. This device utilizes an 11-band multi-stage switch, combined with forward and backward crystal oscillator circuits, enabling simultaneous output of each set of forward and backward frequencies. This design facilitates operation and significantly improves testing efficiency.

[0007] A marine Doppler speed gauging device for simulating speed detection includes: a forward crystal oscillator circuit for outputting forward frequency, a backward crystal oscillator circuit for outputting backward frequency, and a power supply circuit connected to the forward and backward crystal oscillator circuits; the forward and backward crystal oscillator circuits are grounded through a common ground output line for forward and backward frequencies.

[0008] The forward crystal oscillator starting circuit includes: a NOT gate integrated circuit A driving circuit; a first group of 2-pole 11-position band switches connected to the NOT gate integrated circuit A driving circuit via a common terminal; forward crystal oscillators A to K connected to the 11 positions of the first group of 2-pole 11-position band switches; and a forward frequency output line that outputs the frequency generated by the NOT gate integrated circuit A driving circuit; the forward crystal oscillators A to K are connected to the NOT gate integrated circuit A driving circuit.

[0009] The backward crystal oscillator starting circuit includes: a NOT gate integrated circuit B driving circuit, a second set of 2-pole 11-position band switches connected to the NOT gate integrated circuit B driving circuit through a common terminal, backward crystal oscillators A' to K' connected to the 11 positions of the second set of 2-pole 11-position band switches, and a backward frequency output line that outputs the frequency generated by the NOT gate integrated circuit B driving circuit. The backward crystal oscillators A' to K' are connected to the NOT gate integrated circuit B driving circuit.

[0010] Preferably, the NOT gate integrated circuit A driving circuit is composed of NOT gate integrated circuit A, resistor R1, resistor R2, capacitor C1, capacitor C2, and capacitor C3, and the NOT gate integrated circuit A includes NOT gate 1 to NOT gate 6.

[0011] Preferably, the connection relationship of the forward crystal oscillator starting circuit is as follows: the common terminal 1-12(b) of the first group of 2-pole 11-range band switches is connected to one end of capacitor C2; the range terminals 1-1(b) to 1-11(b) of the first group of switches are respectively connected to one end of forward crystal oscillators A to K; the other ends of forward crystal oscillators A to K are connected in parallel to pin 1 of NOT gate integrated circuit A, i.e., the input terminal of NOT gate #1; pin 1 of NOT gate integrated circuit A is connected to one end of resistor R1; pin 2 of NOT gate integrated circuit A, i.e., the output terminal of NOT gate #1, is connected to the other end of resistor R1. One end of resistor R2 is connected to pin 3 of NOT gate A, i.e., the input terminal of NOT gate #2. The other end of resistor R2 is connected to pin 4 of NOT gate A, i.e., the output terminal of NOT gate #2. One end of capacitor C1 is connected to pin 2 of NOT gate A, and the other end of capacitor C1 is connected to pin 3 of NOT gate A. The other end of capacitor C2 is connected to pin 5 of NOT gate A, i.e., the input terminal of NOT gate #3. Pin 4 of NOT gate A is connected to pin 5 of NOT gate A. Pin 6 of NOT gate A, i.e., the output terminal of NOT gate #3, is connected to one end of capacitor C3.

[0012] Preferably, the NOT gate integrated circuit B driving circuit is composed of NOT gate integrated circuit B, resistor R3, resistor R4, capacitor C4, capacitor C5, and capacitor C6, and the NOT gate integrated circuit B includes NOT gate 1 to NOT gate 6.

[0013] Preferably, the backward crystal oscillator starting circuit is connected as follows: the common terminal 2-12(b) of the second group of 2-pole 11-range band switches is connected to one end of capacitor C5; the range terminals 2-1(b) to 2-11(b) of the second group of switches are respectively connected to one end of backward crystal oscillators A' to K'; the other ends of backward crystal oscillators A' to K' are connected in parallel to pin 1 of NOT gate integrated circuit B, i.e., the input terminal of NOT gate #1; pin 1 of NOT gate integrated circuit B is connected to one end of resistor R3; pin 2 of NOT gate integrated circuit B, i.e., the output terminal of NOT gate #1, is connected to the other end of resistor R3. One end of resistor R4 is connected to pin 3 of NOT gate IC B, i.e., the input terminal of NOT gate #2, and the other end of resistor R4 is connected to pin 4 of NOT gate IC B, i.e., the output terminal of NOT gate #2. One end of capacitor C4 is connected to pin 2 of NOT gate IC B, and the other end of capacitor C4 is connected to pin 3 of NOT gate IC B. The other end of capacitor C5 is connected to pin 5 of NOT gate IC B, i.e., the input terminal of NOT gate #3. Pin 4 of NOT gate IC B is connected to pin 5 of NOT gate IC B, and pin 6 of NOT gate IC B, i.e., the output terminal of NOT gate #3, is connected to one end of capacitor C6.

[0014] Preferably, pins 14 and 7 of the NOT gate integrated circuit A correspond to the positive power supply VCC terminal and the ground terminal GND of the NOT gate integrated circuit A driving circuit, respectively, and pins 14 and 7 of the NOT gate integrated circuit B correspond to the positive power supply VCC terminal and the ground terminal GND of the NOT gate integrated circuit B driving circuit, respectively.

[0015] Preferably, the forward frequency output line includes: a diode D1 connected to the other end of capacitor C3 and connected to the solder pad of the forward terminal block, a forward terminal block, and a lead 1 connected to the socket of the forward terminal block.

[0016] Preferably, the backward frequency output line includes: a diode D2 connected to the other end of capacitor C6 and connected to the solder pad of the backward terminal block, a backward terminal block, and a lead 2 connected to the socket of the backward terminal block.

[0017] Preferably, the forward and backward frequency common ground output line includes: a GND terminal block connected to pin 7 of NAND gate IC A and NAND gate IC B, and a lead wire 3 connected to the GND terminal block socket.

[0018] Preferably, the power supply circuit includes: a power socket, a single-pole switch, a fuse, a power transformer, a housing, a rectifier bridge, a power indicator light, a three-terminal Zener diode, a filter capacitor C7, and a filter capacitor C8.

[0019] Preferably, the power supply circuit is connected as follows: the L terminal of the power socket is connected to one end of a single-pole switch; the other end of the single-pole switch is connected to any input terminal (AC220V) of the primary coil of the power transformer via a fuse; the other input terminal (AC220V) of the primary coil of the power transformer is connected to the N terminal of the power socket; the ground terminal of the power socket is connected to the chassis; the output terminal (AC8V) of the secondary coil of the power transformer is connected to any AC input terminal (~) of the rectifier bridge; the output terminal (AC6V) of the secondary coil of the power transformer is connected to one end of the power indicator light; the other end of the power indicator light is connected in parallel with the other AC input terminal (~) of the rectifier bridge and then connected to the common terminal of the secondary coil of the power transformer; the DC output terminal (+) of the rectifier bridge is connected to the input terminal (INPUT) of the Zener diode; the DC output terminal (-) of the rectifier bridge is connected to the ground terminal (GND) of the Zener diode; and filter capacitors C7 and C8 are connected in parallel to the input terminal (INPUT) and the ground terminal (GND) of the Zener diode.

[0020] Preferably, the power supply circuit is connected to NOT gate integrated circuit A and NOT gate integrated circuit B as follows: pin 14 (VCC) of NOT gate integrated circuit A and pin 14 (VCC) of NOT gate integrated circuit B are connected in parallel to the output terminal (OUTPUT) of the three-terminal regulator, and pin 7 (GND) of NOT gate integrated circuit A and pin 7 (GND) of NOT gate integrated circuit B are connected in parallel to the ground terminal (GND) of the three-terminal regulator.

[0021] The present invention has the following beneficial effects:

[0022] This invention provides a simulated speed detection device for a marine Doppler log. By controlling the forward and backward crystal oscillator starting circuits to synchronously connect to the forward and backward crystal oscillators, and combining the forward and backward frequency output lines, simultaneous output of the forward and backward frequencies is achieved. Simultaneously, NOT gate integrated circuit A and NOT gate integrated circuit B are respectively set in the forward and backward crystal oscillator starting circuits. Using NOT gates combined with appropriately valued resistors and capacitors, a stable oscillation circuit is formed to drive the crystal oscillator to generate a continuous clock frequency signal. Utilizing the structural characteristic that the positions of the first and second sets of 2-pole 11-range band switches simultaneously open and simultaneously connect to the next range, and by correspondingly matching the crystal oscillator frequencies of the two sets of switch positions, free switching between 11 simulated speeds to be measured is achieved. In batch product testing, reducing labor costs and testing errors caused by repetitive testing significantly improves testing efficiency. By connecting a high-precision crystal oscillator to each position of the first and second set of 2-pole 11-position band switches, the NOT gate IC A driver circuit and the NOT gate IC B driver circuit can output high-precision frequency signals. While flexibly switching between 11 sets of frequency signals for output, the accuracy of the output frequency can be greatly improved, meeting the error specifications in analog speed accuracy testing.

[0023] A multi-tap power transformer combined with a rectifier circuit is used in the power supply circuit to enable multiple electronic components to be used together. By setting filter capacitors C7 and C8 on both ends of the three-terminal Zener diode, interference from other signals on the power supply is filtered out, thereby providing a more stable power signal for the entire forward crystal oscillator starting circuit and the backward crystal oscillator starting circuit.

[0024] By setting leads 1, 3, and 2 in the forward frequency output line, backward frequency output line, and forward and backward frequency output lines respectively, the forward and backward frequencies can be output. The frequencies output by leads 1, 2, and 3 can be connected to a Doppler speed meter receiver to realize the simulation speed accuracy test. The structure is simple, space-saving, easy to maintain, and lightweight and portable, making it suitable for shipboard maintenance. Attached Figure Description

[0025] Figure 1 A schematic diagram of the overall framework of a marine Doppler speed gauging device.

[0026] Figure 2 A schematic diagram of the overall circuit of a marine Doppler speed gauging device.

[0027] Figure 3 A forward crystal oscillator circuit diagram for a marine Doppler log analog speed detection device.

[0028] Figure 4A circuit diagram of a backward crystal oscillator starting circuit for a marine Doppler speed gauging device. Detailed Implementation

[0029] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0030] A marine Doppler speed gauging device, such as Figure 1 The diagram shows an overall framework of a marine Doppler speed gauging device, comprising: a forward crystal oscillator circuit for forward frequency output, a backward crystal oscillator circuit for backward frequency output, and a power supply circuit connected to the forward and backward crystal oscillator circuits; the forward and backward crystal oscillator circuits are grounded via a common ground output line for both forward and backward frequencies.

[0031] like Figure 2 The diagram shows the overall circuit diagram of a marine Doppler speed gauging device. The forward crystal oscillator circuit includes: a NOT gate integrated circuit A driving circuit; a first group of 2-pole 11-position band switches connected to the NOT gate integrated circuit A driving circuit via a common terminal; forward crystal oscillators A to K connected to the 11 positions of the first group of 2-pole 11-position band switches; and a forward frequency output circuit that outputs the frequency generated by the NOT gate integrated circuit A driving circuit. The forward crystal oscillators A to K are connected to the NOT gate integrated circuit A driving circuit.

[0032] The backward crystal oscillator starting circuit includes: a NOT gate integrated circuit B driving circuit, a second set of 2-pole 11-position band switches connected to the NOT gate integrated circuit B driving circuit through a common terminal, backward crystal oscillators A' to K' connected to the 11 positions of the second set of 2-pole 11-position band switches, and a backward frequency output line that outputs the frequency generated by the NOT gate integrated circuit B driving circuit. The backward crystal oscillators A' to K' are connected to the NOT gate integrated circuit B driving circuit.

[0033] Preferably, the NOT gate integrated circuit A driving circuit is composed of NOT gate integrated circuit A, resistor R1, resistor R2, capacitor C1, capacitor C2, and capacitor C3, and the NOT gate integrated circuit A includes NOT gate 1 to NOT gate 6.

[0034] like Figure 3The diagram shows a forward crystal oscillator starting circuit for a marine Doppler odometer. Preferably, the connection relationship of the forward crystal oscillator starting circuit is as follows: the common terminal 1-12(b) of the first group of 2-pole 11-range band switches is connected to one end of capacitor C2; the range terminals 1-1(b) to 1-11(b) of the first group of switches are respectively connected to one end of forward crystal oscillators A to K; the other ends of forward crystal oscillators A to K are connected in parallel to pin 1 of NOT gate integrated circuit A, i.e., the input terminal of NOT gate #1; pin 1 of NOT gate integrated circuit A is connected to one end of resistor R1; pin 2 of NOT gate integrated circuit A, i.e., the output terminal of NOT gate #1, is connected to... The other end of resistor R1 is connected to the other end of resistor R2. One end of resistor R2 is connected to pin 3 of NOT gate A, i.e., the input terminal of NOT gate #2. The other end of resistor R2 is connected to pin 4 of NOT gate A, i.e., the output terminal of NOT gate #2. One end of capacitor C1 is connected to pin 2 of NOT gate A. The other end of capacitor C1 is connected to pin 3 of NOT gate A. The other end of capacitor C2 is connected to pin 5 of NOT gate A, i.e., the input terminal of NOT gate #3. Pin 4 of NOT gate A is connected to pin 5 of NOT gate A. Pin 6 of NOT gate A, i.e., the output terminal of NOT gate #3, is connected to one end of capacitor C3.

[0035] like Figure 4 The diagram shown is a backward crystal oscillator starting circuit diagram for a marine Doppler odometer. Preferably, the NOT gate integrated circuit B driving circuit is composed of NOT gate integrated circuit B, resistor R3, resistor R4, capacitor C4, capacitor C5, and capacitor C6. The NOT gate integrated circuit B contains NOT gates 1# to 6#.

[0036] Preferably, the backward crystal oscillator starting circuit is connected as follows: the common terminal 2-12(b) of the second group of 2-pole 11-range band switches is connected to one end of capacitor C5; the range terminals 2-1(b) to 2-11(b) of the second group of switches are respectively connected to one end of backward crystal oscillators A' to K'; the other ends of backward crystal oscillators A' to K' are connected in parallel to pin 1 of NOT gate integrated circuit B, i.e., the input terminal of NOT gate #1; pin 1 of NOT gate integrated circuit B is connected to one end of resistor R3; pin 2 of NOT gate integrated circuit B, i.e., the output terminal of NOT gate #1, is connected to the other end of resistor R3. One end of resistor R4 is connected to pin 3 of NOT gate IC B, i.e., the input terminal of NOT gate #2, and the other end of resistor R4 is connected to pin 4 of NOT gate IC B, i.e., the output terminal of NOT gate #2. One end of capacitor C4 is connected to pin 2 of NOT gate IC B, and the other end of capacitor C4 is connected to pin 3 of NOT gate IC B. The other end of capacitor C5 is connected to pin 5 of NOT gate IC B, i.e., the input terminal of NOT gate #3. Pin 4 of NOT gate IC B is connected to pin 5 of NOT gate IC B, and pin 6 of NOT gate IC B, i.e., the output terminal of NOT gate #3, is connected to one end of capacitor C6.

[0037] Preferably, pins 14 and 7 of the NOT gate integrated circuit A correspond to the positive power supply VCC terminal and the ground terminal GND of the NOT gate integrated circuit A driving circuit, respectively, and pins 14 and 7 of the NOT gate integrated circuit B correspond to the positive power supply VCC terminal and the ground terminal GND of the NOT gate integrated circuit B driving circuit, respectively.

[0038] Preferably, the forward frequency output line includes: a diode D1 connected to the other end of capacitor C3 and connected to the solder pad of the forward terminal block, a forward terminal block, and a lead 1 connected to the socket of the forward terminal block.

[0039] Preferably, the backward frequency output line includes: a diode D2 connected to the other end of capacitor C6 and connected to the solder pad of the backward terminal block, a backward terminal block, and a lead 2 connected to the socket of the backward terminal block.

[0040] Preferably, the forward and backward frequency common ground output line includes: a GND terminal block connected to pin 7 of NAND gate IC A and NAND gate IC B, and a lead wire 3 connected to the GND terminal block socket.

[0041] Preferably, the power supply circuit includes: a power socket, a single-pole switch, a fuse, a power transformer, a housing, a rectifier bridge, a power indicator light, a three-terminal Zener diode, a filter capacitor C7, and a filter capacitor C8.

[0042] Preferably, the power supply circuit is connected as follows: the L terminal of the power socket is connected to one end of a single-pole switch; the other end of the single-pole switch is connected to any input terminal (AC220V) of the primary coil of the power transformer via a fuse; the other input terminal (AC220V) of the primary coil of the power transformer is connected to the N terminal of the power socket; the ground terminal of the power socket is connected to the chassis; the output terminal (AC8V) of the secondary coil of the power transformer is connected to any AC input terminal (~) of the rectifier bridge; the output terminal (AC6V) of the secondary coil of the power transformer is connected to one end of the power indicator light; the other end of the power indicator light is connected in parallel with the other AC input terminal (~) of the rectifier bridge and then connected to the common terminal of the secondary coil of the power transformer; the DC output terminal (+) of the rectifier bridge is connected to the input terminal (INPUT) of the Zener diode; the DC output terminal (-) of the rectifier bridge is connected to the ground terminal (GND) of the Zener diode; and filter capacitors C7 and C8 are connected in parallel to the input terminal (INPUT) and the ground terminal (GND) of the Zener diode.

[0043] Preferably, the power supply circuit is connected to NOT gate integrated circuit A and NOT gate integrated circuit B as follows: pin 14 (VCC) of NOT gate integrated circuit A and pin 14 (VCC) of NOT gate integrated circuit B are connected in parallel to the output terminal (OUTPUT) of the three-terminal regulator, and pin 7 (GND) of NOT gate integrated circuit A and pin 7 (GND) of NOT gate integrated circuit B are connected in parallel to the ground terminal (GND) of the three-terminal regulator.

[0044] Connect the power socket to the mains power supply to provide AC220V AC power to the power transformer. Close the single-pole switch, and the AC6V AC voltage output by the power transformer is directly supplied to the power indicator light, causing it to light up. The AC8V AC voltage output by the power transformer is rectified by the rectifier bridge to convert the AC8V AC voltage to DC8V DC voltage. Then, the DC8V DC voltage is reduced to DC5V DC voltage by the three-terminal Zener diode. The DC5V DC voltage output by the three-terminal Zener diode is supplied to the NOT gate integrated circuits A and B, enabling them to operate.

[0045] Example 1:

[0046] The simulated speed detection device of the marine Doppler log is connected to a marine Doppler log to conduct a simulated speed accuracy test. The speed displayed by the log is shown in Table 1. The simulated speed accuracy index is ±0.1kn or ±0.5%. The 11 different theoretical speeds in Table 1 are used as 11 simulated speeds to be tested. By rotating the 2-blade 11-band switch knob, the output of 11 sets of forward and backward frequency signals corresponding to the 11 simulated speeds to be tested is switched synchronously.

[0047] Table 1

[0048]

[0049] The process of switching between 11 different simulated speeds using the aforementioned marine Doppler speed chronometer simulated speed detection device is as follows: The first group of switches (1-1 to 1-12) of the 2-pole 11-position band switch is connected to the forward crystal oscillator A-K oscillation circuit, and the second group of switches (2-1 to 2-12) is connected to the backward crystal oscillator A'-K' oscillation circuit. By rotating the knob of the 2-pole 11-position band switch, the first and second groups of switches are simultaneously switched, i.e., the previous group of forward and backward crystal oscillator oscillation circuits is disconnected, and the next group of forward and backward crystal oscillator oscillation circuits is connected, causing the two synchronously connected forward and backward crystal oscillators to oscillate simultaneously. The forward and backward crystal oscillator frequency signals generated after oscillation are output through the forward frequency output line and the backward frequency output line, respectively. Stable amplitude and frequency paired forward and backward crystal oscillator frequency signals are output between leads 1 and 3, and between leads 2 and 3, respectively. Connect leads 1, 2, and 3 to the input terminals of the front and rear channels of the Doppler speed meter receiver to achieve simulated speed accuracy testing.

[0050] The specific work is as follows, where Table 2 shows the forward and backward frequencies generated when switching between different simulation speeds.

[0051] Table 2

[0052]

[0053] Using the theoretical speed value 1 as the simulated speed, output the forward and backward crystal oscillator frequencies: Rotate the 2-pole 11-position band switch to position 1. Connect the common terminal 1-12(a) of the first group of switches of the 2-pole 11-position band switch to the position terminal 1-1(a) of the first group of switches, and disconnect all other positions. This connects the forward crystal oscillator A to the forward crystal oscillator starting circuit, and the forward crystal oscillator A starts oscillating. The forward crystal oscillator frequency of 2000.35KHz is output between lead 1 and lead 3. At the same time, connect the common terminal 2-12(a) of the second group of switches of the 2-pole 11-position band switch to the position terminal 2-1(a) of the second group of switches, and disconnect all other positions. This connects the backward crystal oscillator A' to the backward crystal oscillator starting circuit, and the backward crystal oscillator A' starts oscillating. The backward crystal oscillator frequency of 1999.64KHz is output between lead 2 and lead 3.

[0054] Using the theoretical speed value 2 as the simulated speed, output the forward and backward crystal oscillator frequencies: Rotate the 2-pole 11-position band switch to position 2. Connect the common terminal 1-12(a) of the first group of switches of the 2-pole 11-position band switch to the position terminal 1-2(a) of the first group of switches, and disconnect all other positions. This connects the forward crystal oscillator B to the forward crystal oscillator starting circuit, and the forward crystal oscillator B starts oscillating. The output frequency of the forward crystal oscillator between lead 1 and lead 3 is 2000.71KHz. At the same time, connect the common terminal 2-12(a) of the second group of switches of the 2-pole 11-position band switch to the position terminal 2-2(a) of the second group of switches, and disconnect all other positions. This connects the backward crystal oscillator B' to the backward crystal oscillator starting circuit, and the backward crystal oscillator B' starts oscillating. The output frequency of the backward crystal oscillator between lead 2 and lead 3 is 1999.29KHz.

[0055] Using the theoretical speed value of 3 as the simulated speed, the forward and backward crystal oscillator frequencies are output as follows: Rotate the 2-pole 11-position band switch to position 3. Connect the common terminal 1-12(a) of the first group of switches of the 2-pole 11-position band switch to the position terminal 1-3(a) of the first group of switches, and disconnect all other positions. This connects the forward crystal oscillator C to the forward crystal oscillator starting circuit, and the forward crystal oscillator C starts oscillating. The forward crystal oscillator frequency of 2001.06KHz is output between lead 1 and lead 3. At the same time, connect the common terminal 2-12(a) of the second group of switches of the 2-pole 11-position band switch to the position terminal 2-3(a) of the second group of switches, and disconnect all other positions. This connects the backward crystal oscillator C' to the backward crystal oscillator starting circuit, and the backward crystal oscillator C' starts oscillating. The backward crystal oscillator frequency of 1998.93KHz is output between lead 2 and lead 3.

[0056] Using the theoretical speed value of 4 as the simulated speed, the forward and backward crystal oscillator frequencies are output as follows: Rotate the 2-pole 11-position band switch to position 4. Connect the common terminal 1-12(a) of the first group of switches of the 2-pole 11-position band switch to the position terminal 1-4(a) of the first group of switches, and disconnect all other positions. This connects the forward crystal oscillator D to the forward crystal oscillator starting circuit, and the forward crystal oscillator D starts oscillating. The forward crystal oscillator frequency of 2001.42KHz is output between lead 1 and lead 3. At the same time, connect the common terminal 2-12(a) of the second group of switches of the 2-pole 11-position band switch to the position terminal 2-4(a) of the second group of switches, and disconnect all other positions. This connects the backward crystal oscillator D' to the backward crystal oscillator starting circuit, and the backward crystal oscillator D' starts oscillating. The backward crystal oscillator frequency of 1998.58KHz is output between lead 2 and lead 3.

[0057] Using the theoretical speed value of 5 as the simulated speed, the forward and backward crystal oscillator frequencies are output as follows: Rotate the 2-pole 11-position band switch to position 5. Connect the common terminal 1-12(a) of the first group of switches of the 2-pole 11-position band switch to the position terminal 1-5(a) of the first group of switches, and disconnect all other positions. This connects the forward crystal oscillator E to the forward crystal oscillator starting circuit, and the forward crystal oscillator E starts oscillating. The forward crystal oscillator frequency of 2001.77KHz is output between lead 1 and lead 3. At the same time, connect the common terminal 2-12(a) of the second group of switches of the 2-pole 11-position band switch to the position terminal 2-5(a) of the second group of switches, and disconnect all other positions. This connects the backward crystal oscillator E' to the backward crystal oscillator starting circuit, and the backward crystal oscillator E' starts oscillating. The backward crystal oscillator frequency of 1998.22KHz is output between lead 2 and lead 3.

[0058] Using the theoretical speed value of 10 as the simulated speed, output the forward and backward crystal oscillator frequencies: Rotate the 2-pole 11-position band switch to position 6. Connect the common terminal 1-12(a) of the first group of switches of the 2-pole 11-position band switch to the position terminal 1-6(a) of the first group of switches, and disconnect all other positions. This connects the forward crystal oscillator F to the forward crystal oscillator starting circuit, and the forward crystal oscillator F starts oscillating. The output frequency of the forward crystal oscillator between lead 1 and lead 3 is 2003.55KHz. At the same time, connect the common terminal 2-12(a) of the second group of switches of the 2-pole 11-position band switch to the position terminal 2-6(a) of the second group of switches, and disconnect all other positions. This connects the backward crystal oscillator F' to the backward crystal oscillator starting circuit, and the backward crystal oscillator F' starts oscillating. The output frequency of the backward crystal oscillator between lead 2 and lead 3 is 1996.45KHz.

[0059] Using the theoretical speed value of 15 as the simulated speed, the forward and backward crystal oscillator frequencies are output as follows: Rotate the 2-pole 11-position band switch to position 7. Connect the common terminal 1-12(a) of the first group of switches of the 2-pole 11-position band switch to the position terminal 1-7(a) of the first group of switches, and disconnect all other positions. This connects the forward crystal oscillator G to the forward crystal oscillator starting circuit, and the forward crystal oscillator G starts oscillating. The forward crystal oscillator frequency of 2005.33KHz is output between lead 1 and lead 3. At the same time, connect the common terminal 2-12(a) of the second group of switches of the 2-pole 11-position band switch to the position terminal 2-7(a) of the second group of switches, and disconnect all other positions. This connects the backward crystal oscillator G' to the backward crystal oscillator starting circuit, and the backward crystal oscillator G' starts oscillating. The backward crystal oscillator frequency of 1994.68KHz is output between lead 2 and lead 3.

[0060] Using the theoretical speed value of 20 as the simulated speed, the forward and backward crystal oscillator frequencies are output as follows: Rotate the 2-pole 11-position band switch to position 8. Connect the common terminal 1-12(a) of the first group of switches of the 2-pole 11-position band switch to the position terminal 1-8(a) of the first group of switches, and disconnect all other positions. This connects the forward crystal oscillator H to the forward crystal oscillator starting circuit, and the forward crystal oscillator H starts oscillating. The forward crystal oscillator frequency of 2007.11KHz is output between lead 1 and lead 3. At the same time, connect the common terminal 2-12(a) of the second group of switches of the 2-pole 11-position band switch to the position terminal 2-8(a) of the second group of switches, and disconnect all other positions. This connects the backward crystal oscillator H' to the backward crystal oscillator starting circuit, and the backward crystal oscillator H' starts oscillating. The backward crystal oscillator frequency of 1992.91KHz is output between lead 2 and lead 3.

[0061] Using the theoretical speed value of 30 as the simulated speed, the forward and backward crystal oscillator frequencies are output as follows: Rotate the 2-pole 11-position band switch to position 9. Connect the common terminal 1-12(a) of the first group of switches of the 2-pole 11-position band switch to the position terminal 1-9(a) of the first group of switches, and disconnect all other positions. This connects the forward crystal oscillator I to the forward crystal oscillator starting circuit, and the forward crystal oscillator I starts oscillating. The forward crystal oscillator frequency of 2010.68KHz is output between lead 1 and lead 3. At the same time, connect the common terminal 2-12(a) of the second group of switches of the 2-pole 11-position band switch to the position terminal 2-9(a) of the second group of switches, and disconnect all other positions. This connects the backward crystal oscillator I' to the backward crystal oscillator starting circuit, and the backward crystal oscillator I' starts oscillating. The backward crystal oscillator frequency of 1989.37KHz is output between lead 2 and lead 3.

[0062] Using the theoretical speed value of 40 as the simulated speed, the forward and backward crystal oscillator frequencies are output as follows: Rotate the 2-pole 11-position band switch to position 10. Connect the common terminal 1-12(a) of the first group of switches of the 2-pole 11-position band switch to the position terminal 1-10(a) of the first group of switches, and disconnect all other positions. This connects the forward crystal oscillator J to the forward crystal oscillator starting circuit, and the forward crystal oscillator J starts oscillating. The forward crystal oscillator frequency of 2014.25KHz is output between lead 1 and lead 3. At the same time, connect the common terminal 2-12(a) of the second group of switches of the 2-pole 11-position band switch to the position terminal 2-10(a) of the second group of switches, and disconnect all other positions. This connects the backward crystal oscillator J' to the backward crystal oscillator starting circuit, and the backward crystal oscillator J' starts oscillating. The backward crystal oscillator frequency of 1985.84KHz is output between lead 2 and lead 3.

[0063] Using the theoretical speed value of 50 as the simulated speed, the forward and backward crystal oscillator frequencies are output as follows: Rotate the 2-pole 11-position band switch to position 11. Connect the common terminal 1-12(a) of the first group of switches of the 2-pole 11-position band switch to the position terminal 1-11(a) of the first group of switches, and disconnect all other positions. This connects the forward crystal oscillator K to the forward crystal oscillator starting circuit, and the forward crystal oscillator K starts oscillating. The forward crystal oscillator frequency of 2017.33KHz is output between lead 1 and lead 3. At the same time, connect the common terminal 2-12(a) of the second group of switches of the 2-pole 11-position band switch to the position terminal 2-11(a) of the second group of switches, and disconnect all other positions. This connects the backward crystal oscillator K' to the backward crystal oscillator starting circuit, and the backward crystal oscillator K' starts oscillating. The backward crystal oscillator frequency of 1981.82KHz is output between lead 2 and lead 3.

[0064] By comparing Table 1 with the test results above, it can be concluded that when the device is used to provide the odometer with the preceding and following frequency signals, the speed displayed by the odometer is within the error range of the theoretical speed, that is, the speed displayed by the odometer is consistent with the theoretical speed.

[0065] When the simulated speed detection device is connected to the marine Doppler log, the speed displayed by the log and the theoretical speed are within the error range, meaning that the simulated speed provided by the Doppler log simulated speed detection device is consistent with the theoretical speed.

[0066] It should be noted that the specific embodiments described above enable those skilled in the art to more fully understand the present invention, but do not limit the present invention in any way. Therefore, although the present invention has been described in detail with reference to the accompanying drawings and embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the present invention. In short, all technical solutions and improvements that do not depart from the spirit and scope of the present invention should be covered within the protection scope of the present invention patent.

Claims

1. A marine Doppler speed gauging device for simulating speed detection, characterized in that, include: A forward crystal oscillator starting circuit that realizes forward frequency output, a backward crystal oscillator starting circuit that realizes backward frequency output, and a power supply circuit connected to the forward crystal oscillator starting circuit and the backward crystal oscillator starting circuit. The forward crystal oscillator starting circuit and the backward crystal oscillator starting circuit are grounded through the forward and backward frequency common ground output lines; The forward crystal oscillator starting circuit includes: a NOT gate integrated circuit A driving circuit; a first group of 2-pole 11-position band switches connected to the NOT gate integrated circuit A driving circuit via a common terminal; forward crystal oscillators A to K connected to the 11 positions of the first group of 2-pole 11-position band switches; and a forward frequency output line that outputs the frequency generated by the NOT gate integrated circuit A driving circuit; the forward crystal oscillators A to K are connected to the NOT gate integrated circuit A driving circuit. The backward crystal oscillator starting circuit includes: a NOT gate integrated circuit B driving circuit, a second set of 2-pole 11-position band switches connected to the NOT gate integrated circuit B driving circuit through a common terminal, backward crystal oscillators A' to K' connected to the 11 positions of the second set of 2-pole 11-position band switches, and a backward frequency output line that outputs the frequency generated by the NOT gate integrated circuit B driving circuit. The backward crystal oscillators A' to K' are connected to the NOT gate integrated circuit B driving circuit.

2. The marine Doppler speed gauging device as described in claim 1, characterized in that... The NOT gate integrated circuit A driving circuit consists of NOT gate integrated circuit A, resistor R1, resistor R2, capacitor C1, capacitor C2, and capacitor C3. The NOT gate integrated circuit A contains NOT gates 1# to 6#.

3. The marine Doppler log simulated speed detection device as described in claim 2, characterized in that... The connection relationship of the forward crystal oscillator starting circuit is as follows: The common terminal of the first group of 2-pole 11-position band switches is connected to one end of capacitor C2. The position terminals of the first group of switches are respectively connected to one end of forward crystal oscillators A to K. The other ends of forward crystal oscillators A to K are connected in parallel and then connected to pin 1 of NOT gate integrated circuit A, i.e., the input terminal of NOT gate #1. Pin 1 of NOT gate integrated circuit A is connected to one end of resistor R1. Pin 2 of NOT gate integrated circuit A, i.e., the output terminal of NOT gate #1, is connected to the other end of resistor R1. One end of resistor R2 is connected to pin 3 of NOT gate integrated circuit A, i.e., the input terminal of NOT gate #2. The other end of resistor R2 is connected to pin 4 of NOT gate integrated circuit A, i.e., the output terminal of NOT gate #2. One end of capacitor C1 is connected to pin 2 of NOT gate integrated circuit A. The other end of capacitor C1 is connected to pin 3 of NOT gate integrated circuit A. The other end of capacitor C2 is connected to pin 5 of NOT gate integrated circuit A, i.e., the input terminal of NOT gate #3. Pin 4 of NOT gate integrated circuit A is connected to pin 5 of NOT gate integrated circuit A. Pin 6 of NOT gate integrated circuit A, i.e., the output terminal of NOT gate #3, is connected to one end of capacitor C3.

4. The marine Doppler log simulated speed detection device as described in claim 1, characterized in that... The NOT gate integrated circuit B driving circuit consists of NOT gate integrated circuit B, resistor R3, resistor R4, capacitor C4, capacitor C5, and capacitor C6. The NOT gate integrated circuit B contains NOT gates 1# to 6#.

5. The marine Doppler log simulated speed detection device as described in claim 4, characterized in that... The backward crystal oscillator starting circuit is connected as follows: the common terminal of the second group of 2-pole 11-range band switches is connected to one end of capacitor C5; the range terminals of the second group of switches are respectively connected to one end of backward crystal oscillators A' to K'; the other ends of backward crystal oscillators A' to K' are connected in parallel to pin 1 of NOT gate integrated circuit B, i.e., the input terminal of NOT gate #1; pin 1 of NOT gate integrated circuit B is connected to one end of resistor R3; pin 2 of NOT gate integrated circuit B, i.e., the output terminal of NOT gate #1, is connected to the other end of resistor R3; and one end of resistor R4 is connected to the NOT gate... Pin 3 of the NOT gate (input terminal 2#) is connected to pin 4 of the NOT gate integrated circuit B (output terminal 2#). One end of capacitor C4 is connected to pin 2 of the NOT gate integrated circuit B, and the other end of capacitor C4 is connected to pin 3 of the NOT gate integrated circuit B. The other end of capacitor C5 is connected to pin 5 of the NOT gate integrated circuit B (input terminal 3#). Pin 4 of the NOT gate integrated circuit B is connected to pin 5 of the NOT gate integrated circuit B, and pin 6 of the NOT gate integrated circuit B (output terminal 3#) is connected to one end of capacitor C6.

6. A marine Doppler log simulated speed detection device as described in claim 3 or 5, characterized in that... Pin 14 and pin 7 of the NOT gate integrated circuit A correspond to the positive power supply VCC terminal and the ground terminal GND of the NOT gate integrated circuit A driving circuit, respectively. Pin 14 and pin 7 of the NOT gate integrated circuit B correspond to the positive power supply VCC terminal and the ground terminal GND of the NOT gate integrated circuit B driving circuit, respectively.

7. The marine Doppler speed gauging device as described in claim 1, characterized in that, The forward frequency output line includes: a diode D1 connected to the other end of capacitor C3 and connected to the solder pad of the forward terminal block, a forward terminal block, and a lead 1 connected to the socket of the forward terminal block.

8. The marine Doppler log simulated speed detection device according to claim 1, characterized in that, The backward frequency output line includes: a diode D2 connected to the other end of capacitor C6 and connected to the solder pad of the backward terminal block, the backward terminal block, and a lead 2 connected to the socket of the backward terminal block.

9. The marine Doppler speed gauging device as described in claim 1, characterized in that, The forward and backward frequency common ground output lines include: a GND terminal block connected to pin 7 of NAND gate integrated circuit A and NAND gate integrated circuit B, and a lead wire 3 connected to the GND terminal block socket.

10. The marine Doppler speed gauging device as described in claim 1, characterized in that, The power supply circuit includes: a power socket, a single-pole switch, a fuse, a power transformer, a chassis, a rectifier bridge, a power indicator light, a three-terminal Zener diode, a filter capacitor C7, and a filter capacitor C8.

11. The marine Doppler log simulated speed detection device according to claim 10, characterized in that... The power supply circuit is connected as follows: the L terminal of the power socket is connected to one end of a single-pole switch; the other end of the single-pole switch is connected to any input terminal of the primary coil of the power transformer via a fuse; the other input terminal of the primary coil of the power transformer is connected to the N terminal of the power socket; the ground terminal of the power socket is connected to the chassis; the AC 8V output terminal of the secondary coil of the power transformer is connected to any AC input terminal of the rectifier bridge; the AC 6V output terminal of the secondary coil of the power transformer is connected to one end of the power indicator light; the other end of the power indicator light is connected in parallel with the other AC input terminal of the rectifier bridge and then connected to the common terminal of the secondary coil of the power transformer; the DC positive output terminal of the rectifier bridge is connected to the input terminal of the Zener diode; the DC negative output terminal of the rectifier bridge is connected to the ground terminal of the Zener diode; and filter capacitors C7 and C8 are connected in parallel to the input terminal and the ground terminal of the Zener diode.

12. A marine Doppler speed gauging device as described in claim 1 or 10, characterized in that, The connection relationship between the power supply circuit and NOT gate integrated circuit A and NOT gate integrated circuit B is as follows: pin 14 of NOT gate integrated circuit A and pin 14 of NOT gate integrated circuit B are connected in parallel to the output terminal of the three-terminal Zener diode, and pin 7 of NOT gate integrated circuit A and pin 7 of NOT gate integrated circuit B are connected in parallel to the ground terminal of the three-terminal Zener diode.

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