Single-color screen display method, system, electronic device and computer readable storage medium
Patent Information
- Application Number
- CN202211444101.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-11-18
- Publication Date
- 2026-10-27
- Estimated Expiration
- 2042-11-18
AI Technical Summary
[0004]本申请实施例提供了一种单色屏显示方法、系统、电子设备及计算机可读存储介质,可以解决现有单色屏显示时屏幕端接收大量冗余数据,需要占用较大传输带宽,并且屏幕端的处理复杂度较高的问题
[0037]第六方面,本申请实施例提供一种计算机程序产品,当计算机程序产品在电子设备上运行时,使得电子设备执行上述第二方面任一项所述的方法。
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Figure CN118057831B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of display technology, and in particular to a monochrome screen display method, system, electronic device, and computer-readable storage medium. Background Technology
[0002] Currently, in some scenarios, full-color effects can be achieved using multiple monochrome screens. For example, due to the technological limitations of micro light-emitting diodes (micro-LEDs), full-color effects are often achieved using micro-LED monochrome screens in augmented reality (AR) scenarios. Specifically, this is achieved by blending three monochrome screens—red, green, and blue—to achieve the desired color effect.
[0003] In practical applications, the System-on-Chip (SOC) sends MIPI protocol data packets to three monochrome screens via the Mobile Industry Processor Interface (MIPI). Each MIPI protocol data packet includes image data with three color channels, for example, image data including R, G, and B channels. Each monochrome screen receives the MIPI protocol data packet from the SOC and displays it in monochrome according to the packet. However, this results in the screen receiving a large amount of redundant data, consuming significant transmission bandwidth, and increasing the processing complexity at the screen end. Summary of the Invention
[0004] This application provides a monochrome screen display method, system, electronic device, and computer-readable storage medium, which can solve the problems of existing monochrome screen displays receiving a large amount of redundant data, requiring a large transmission bandwidth, and having high processing complexity at the screen end.
[0005] In a first aspect, embodiments of this application provide a monochrome screen display system, including a processing module, a first monochrome screen, a second monochrome screen, and a third monochrome screen;
[0006] The processing module is used to: acquire a first mobile industry processor interface MIPI protocol data packet, the first MIPI protocol data packet including image data, the image data including data of the first color channel, data of the second color channel, and data of the third color channel; parse the first MIPI protocol data packet to obtain the image data, and then extract the data of the first color channel, the data of the second color channel, and the data of the third color channel from the image data; perform a packet assembly operation on the data of the first color channel to obtain a second MIPI protocol data packet, and send the second MIPI protocol data packet to the first monochrome screen; perform a packet assembly operation on the data of the second color channel to obtain a third MIPI protocol data packet, and send the third MIPI protocol data packet to the second monochrome screen; perform a packet assembly operation on the data of the third color channel to obtain a fourth MIPI protocol data packet, and send the fourth MIPI protocol data packet to the third monochrome screen.
[0007] The first monochrome screen is used to: receive the second MIPI protocol data packet, parse the second MIPI protocol data packet to obtain the data of the first color channel, and display the data of the first color channel;
[0008] The second monochrome screen is used to: receive the third MIPI protocol data packet, parse the third MIPI protocol data packet to obtain the data of the second color channel, and display the data of the second color channel;
[0009] The third monochrome screen is used to: receive the fourth MIPI protocol data packet, parse the fourth MIPI protocol data packet to obtain the data of the third color channel, and display the data of the third color channel.
[0010] As can be seen from the above technical solution, in this embodiment, after extracting and separating the data of each color channel from the image data in the first MIPI protocol data packet, the data of each color channel is repackaged to obtain a MIPI protocol data packet containing only a single color channel data. This MIPI protocol data packet containing only a single color channel data is then sent to each monochrome screen. In this way, each monochrome screen only receives the color channel data that needs to be displayed and does not receive color channel data that does not need to be displayed, reducing redundant data received by the screen. Furthermore, compared to a MIPI protocol data packet containing image data of three color channels, the MIPI protocol data packet containing only a single color channel data has a smaller data volume, thus saving transmission bandwidth. In addition, since each monochrome screen receives a MIPI protocol data packet containing only a single color channel data, the screen can parse the MIPI protocol data packet and then display the single color channel data, reducing processing complexity.
[0011] In some possible implementations of the first aspect, the processing module includes a first logic unit, a second logic unit, a third logic unit, and a fourth logic unit;
[0012] The first logic unit is connected to the second logic unit, the third logic unit, and the fourth logic unit, respectively;
[0013] The first logic unit is used to: parse the first MIPI protocol data packet to obtain image data; extract the data of the first color channel, the data of the second color channel, and the data of the third color channel from the image data; send the data of the first color channel to the second logic unit, send the data of the second color channel to the third logic unit, and send the data of the third color channel to the fourth logic unit.
[0014] The second logic unit is used to: receive data from the first color channel, perform packet assembly operation on the data of the first color channel to obtain a second MIPI protocol data packet, and send the second MIPI protocol data packet to the first monochrome screen;
[0015] The third logic unit is used to: receive data from the second color channel, perform packet assembly operation on the data from the second color channel to obtain the third MIPI protocol data packet, and send the third MIPI protocol data packet to the second monochrome screen.
[0016] The fourth logic unit is used to: receive data from the third color channel, perform packet assembly operations on the data from the third color channel to obtain the fourth MIPI protocol data packet, and send the fourth MIPI protocol data packet to the third monochrome screen.
[0017] In some possible implementations of the first aspect, the processing module is a field-programmable gate array (FPGA), and the first, second, third, and fourth logic units are all D-PHY or C-PHY.
[0018] In this implementation, multiple logic units are simulated within the FPGA, and each logic unit performs functions such as parsing MIPI protocol data packets, extracting and separating individual color channel data, repackaging and sending individual color channel data. This allows a complete MIPI signal to be divided into three custom monochrome MIPI signals via the FPGA, saving transmission bandwidth and reducing the processing complexity at the screen end.
[0019] In some possible implementations of the first aspect, the first logical unit includes a fifth logical unit and a data processing unit;
[0020] The fifth logic unit is used to: parse the first MIPI protocol data packet to obtain image data, and send the image data to the data processing unit;
[0021] The data processing unit is used to: extract data from the image data of the first color channel, the second color channel, and the third color channel; send the data of the first color channel to the second logic unit, send the data of the second color channel to the third logic unit, and send the data of the third color channel to the fourth logic unit.
[0022] In this implementation, the data processing unit performs the extraction and separation of individual color channel data, while the second, third, fourth, and fifth logic units perform the parsing and packaging of MIPI data packets. Thus, the functions implemented by the second, third, fourth, and fifth logic units are exactly the same, making design and implementation easier.
[0023] In some possible implementations of the first aspect, the processing module is an FPGA, and the second, third, fourth, and fifth logic units are all D-PHY or C-PHY.
[0024] In some possible implementations of the first aspect, the image data is RGB image data, the first color channel is the R channel, the second color channel is the G channel, and the third color channel is the B channel.
[0025] In some possible implementations of the first aspect, the processing module is specifically used to: receive a first MIPI protocol data packet from the system-on-chip (SoC).
[0026] Secondly, embodiments of this application provide a monochrome screen display method, applied to a processing module, the method comprising:
[0027] Acquire the first mobile industry processor interface MIPI protocol data packet, which includes image data, and the image data includes data from the first color channel, the second color channel, and the third color channel.
[0028] After parsing the first MIPI protocol data packet to obtain the image data, the data of the first color channel, the data of the second color channel, and the data of the third color channel are extracted from the image data.
[0029] The data of the first color channel is packetized to obtain the second MIPI protocol data packet, and the second MIPI protocol data packet is sent to the first monochrome screen.
[0030] The data of the second color channel is packetized to obtain the third MIPI protocol data packet, and then the third MIPI protocol data packet is sent to the second monochrome screen.
[0031] The data from the third color channel is grouped into packets to obtain the fourth MIPI protocol data packet, which is then sent to the third monochrome screen.
[0032] In some possible implementations of the second aspect, the processing module is an FPGA.
[0033] In some possible implementations of the second aspect, the image data is RGB image data, the first color channel is the R channel, the second color channel is the G channel, and the third color channel is the B channel.
[0034] Thirdly, embodiments of this application provide an electronic device, including a first monochrome screen, a second monochrome screen, a third monochrome screen, a processing module, a memory, and a computer program stored in the memory and executable on the processing module. When the processing module executes the computer program, it implements the method as described in any of the second aspects above.
[0035] Fourthly, embodiments of this application provide a computer-readable storage medium storing a computer program that, when executed by a processor, implements the method as described in any of the second aspects above.
[0036] Fifthly, embodiments of this application provide a chip system including a processor coupled to a memory. The processor executes a computer program stored in the memory to implement the method described in any of the second aspects above. The chip system may be a single chip or a chip module composed of multiple chips.
[0037] Sixthly, embodiments of this application provide a computer program product that, when run on an electronic device, causes the electronic device to perform the method described in any of the second aspects above.
[0038] It is understood that the beneficial effects of the second to sixth aspects mentioned above can be found in the relevant descriptions in the first aspect mentioned above, and will not be repeated here. Attached Figure Description
[0039] Figure 1A A schematic block diagram of a monochrome screen display system provided in this application embodiment;
[0040] Figure 1B Another schematic block diagram of the system architecture of the monochrome screen display system provided in the embodiments of this application;
[0041] Figure 2A Another schematic block diagram of the system architecture of the monochrome screen display system provided in the embodiments of this application;
[0042] Figure 2BA schematic flowchart illustrating a monochrome screen display method provided in an embodiment of this application;
[0043] Figure 3A A schematic diagram of the logic unit provided in the embodiments of this application;
[0044] Figure 3B Another schematic diagram of a logic unit provided in the embodiments of this application;
[0045] Figure 4A A schematic block diagram of a monochrome screen display system architecture provided in an embodiment of this application;
[0046] Figure 4B Another schematic block diagram of the monochrome screen display system architecture provided in the embodiments of this application;
[0047] Figure 4C A schematic block diagram of a MIPI protocol data packet provided in an embodiment of this application;
[0048] Figure 4D A schematic block diagram of the logic unit of the FPGA provided in the embodiments of this application;
[0049] Figure 4E This is a schematic diagram of MIPI protocol data packet transmission provided in an embodiment of this application;
[0050] Figure 5 A schematic flowchart illustrating a monochrome screen display method provided in an embodiment of this application;
[0051] Figure 6 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation
[0052] In the following description, specific details such as particular system architectures and technologies are set forth for illustrative purposes and not for limiting purposes, in order to provide a thorough understanding of the embodiments of this application.
[0053] The following provides an exemplary description of the system architecture that may be involved in the embodiments of this application.
[0054] For example, please see Figure 1A This is a schematic block diagram of a monochrome screen display system provided in an embodiment of this application. The system may include SOC 11, monochrome screen 12, monochrome screen 13 and monochrome screen 14.
[0055] The SOC 11 can be connected to monochrome screens 12, 13, and 14 via MIPI interfaces. For example, the SOC 11 has three MIPI interfaces, which are connected to monochrome screens 12, 13, and 14 respectively, with each MIPI interface corresponding to one monochrome screen.
[0056] In practical applications, SOC11 sends MIPI protocol data packets to monochrome screens 12, 13, and 14, respectively. Upon receiving the MIPI protocol data packets from SOC11, monochrome screens 12, 13, and 14 each perform monochrome display according to the MIPI protocol data packets. The MIPI protocol data packets sent by SOC11 to each monochrome screen are identical.
[0057] The MIPI protocol does not support the transmission of pixel format for a single color channel; therefore, the MIPI protocol data packets output from the SOC11 include image data for three color channels. As an example, Figure 1A The image data in the MIPI protocol data packet is shown to be RGB image data, which refers to image data with R, G, and B channels.
[0058] In other words, the MIPI protocol data packets received by monochrome screens 12, 13, and 14 all contain image data with three color channels. However, each monochrome screen only needs data from one color channel to achieve monochrome display; the data from the other two color channels is redundant.
[0059] like Figure 1A As shown, the SOC11 transmits RGB image data to each monochrome screen via MIPI protocol data packets. Assume monochrome screen 12 is used to display red, monochrome screen 13 is used to display green, and monochrome screen 14 is used to display blue. In this case, monochrome screen 12 only needs data from the R channel to display red; it does not need data from the G and B channels. That is, for monochrome screen 12, the data from the G and B channels is redundant. Similarly, monochrome screen 13 only needs data from the G channel to display green, and the data from the R and B channels is redundant; monochrome screen 14 only needs data from the B channel to display blue, and the data from the R and G channels is redundant.
[0060] Because the MIPI protocol data packets, which include image data with three color channels, are large in size, the SOC11 transmits image data with three color channels to each monochrome screen via MIPI protocol data packets. This not only causes the screen to receive a large amount of redundant data, but also occupies a large amount of transmission bandwidth.
[0061] Furthermore, when a monochrome screen displays in monochrome according to MIPI protocol data packets, it typically first parses the MIPI protocol data packets to obtain the image data, which includes data for three color channels. Then, it extracts and separates the data for individual color channels from this image data, and identifies the required color channel data from multiple individual color channel data. Finally, it displays in monochrome based on the required color channel data. This process involves the monochrome screen performing MIPI protocol data packet parsing, extraction and separation of individual color channel data, color channel data identification, and monochrome display based on its own required color channel data, resulting in high processing complexity. In other words, transmitting image data with three color channels to various monochrome screens via MIPI protocol data packets also increases the processing complexity of the display driver integrated circuit chip (DDIC) at the screen end.
[0062] Specifically Figure 1A In the system shown, for monochrome screen 12, after receiving the MIPI protocol data packet from SOC 11, it parses the MIPI protocol data packet to obtain the RGB image data in the MIPI protocol data packet; then, it extracts and separates the R channel data, G channel data, and B channel data from the RGB image data, and identifies the required color channel data as the R channel data; finally, it displays the R channel data to show red. Similarly, monochrome screens 13 and 14 perform similar processes, displaying green and blue respectively.
[0063] Optionally, Figure 1A The system shown may also include a bridge chip 15, see details. Figure 1B The diagram shown is a schematic block diagram of another system architecture of the monochrome screen display system provided in this application embodiment. The input terminal of the bridge chip 15 is connected to the SOC 11, and the output terminal of the bridge chip 15 is connected to the monochrome screens 12, 13 and 14 respectively.
[0064] like Figure 1B As shown, SOC11 outputs MIPI protocol data packets containing RGB image data. After receiving the MIPI protocol data packet, bridging chip 15 copies the MIPI protocol data packet to obtain three identical MIPI protocol data packets, and then transmits these three MIPI protocol data packets to monochrome screens 12, 13, and 14 respectively. In this process, bridging chip 15 is used to copy and distribute MIPI protocol data packets.
[0065] exist Figure 1BIn the system shown, the image data with three color channels is still transmitted to each monochrome screen via MIPI protocol data packets. Therefore, the problems mentioned above, such as the screen receiving a large amount of redundant data, occupying a large amount of transmission bandwidth, and the high processing complexity of DDIC on the screen, still exist.
[0066] To address the issues mentioned above, the monochrome screen display solution provided in this application splits a single MIPI signal with three color channels into three single-color-channel MIPI signals and transmits each of the three monochrome MIPI signals to a monochrome screen. This allows the screen to receive only single-color-channel data, reducing redundant data received by the screen, saving transmission bandwidth, and also reducing the processing complexity of the DDIC on the screen.
[0067] To better illustrate the monochrome screen display scheme provided in the embodiments of this application, the following is combined with... Figure 2A and Figure 2B An illustrative example will be provided.
[0068] Please see Figure 2A This is a schematic block diagram of another system architecture of the monochrome screen display system provided in the embodiments of this application. The system may include SOC 21, processing module 22, first monochrome screen 23, second monochrome screen 24 and third monochrome screen 25.
[0069] SOC21 is connected to processing module 22 via MIPI interface, and processing module 22 is connected to first monochrome screen 23, second monochrome screen 24 and third monochrome screen 25 via MIPI interface respectively.
[0070] It should be noted that SOC21 is optional. In some other embodiments, SOC21 can be replaced with other devices or other modules, which is not limited here.
[0071] The processing module 22 can be an Application Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA), other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. Other programmable logic devices include, for example, Programmable Array Logic (PAL) and General Purpose Array Logic (GAL); it can also be a Central Processing Unit (CPU), other general-purpose processors, or Digital Signal Processors (DSPs). General-purpose processors can be microprocessors or any conventional processor.
[0072] The first monochrome screen 23, the second monochrome screen 24, and the third monochrome screen 25 typically refer to monochrome screens used to display the three primary colors. For example, if the three primary colors are red, green, and blue, the first monochrome screen 23 is used to display red, the second monochrome screen 24 is used to display green, and the third monochrome screen 25 is used to display blue.
[0073] The first monochrome screen 23, the second monochrome screen 24, and the third monochrome screen 25 can all be micro-LED monochrome screens, or they can be other types of monochrome screens, which are not limited here.
[0074] Please see Figure 2B This is a schematic flowchart of a monochrome screen display method provided in an embodiment of this application. The method may include the following steps:
[0075] Step S201: Processing module 22 receives the first MIPI protocol data packet from SOC21.
[0076] It should be noted that the first MIPI protocol data packet refers to a data packet that conforms to the MIPI protocol. This data packet may include, but is not limited to, image data, which includes data from the first color channel, the second color channel, and the third color channel.
[0077] In practical applications, the first, second, and third color channels will differ depending on the format of the image data.
[0078] For example, when the image data is RGB image data, the first color channel can be the R channel, the second color channel can be the G channel, and the third color channel can be the B channel.
[0079] For example, when the image data is YUV image data, the first color channel can be the Y channel, the second color channel can be the U channel, and the third color channel can be the V channel.
[0080] It should also be noted that SOC21 can be replaced with other modules or other devices. When SOC21 is replaced with other modules or other devices, the processing module 22 can receive the first MIPI protocol data packet from the other module or other device. There is no restriction on the source of the first MIPI protocol data packet.
[0081] In step S202, the processing module 22 parses the first MIPI protocol data packet to obtain image data.
[0082] The first MIPI protocol data packet is a data packet obtained by assembling the packet according to the MIPI protocol. Therefore, the first MIPI protocol data packet can be unpacked according to the MIPI protocol to obtain the image data in the first MIPI protocol data packet.
[0083] Step S203: Processing module 22 extracts and separates the data of the first color channel, the second color channel, and the third color channel from the image data.
[0084] Image data has complete three color channel data, while a monochrome screen only needs a single color channel data to achieve monochrome display. Therefore, in order to reduce the redundant data received by the screen, the single color channel data can be extracted and separated from the image data, and then the data of the single color channel can be transmitted to the corresponding monochrome screen.
[0085] For example, the image data in the first MIPI protocol data packet is RGB image data, and the R channel data, G channel data and B channel data are extracted and separated from the RGB image data.
[0086] Step S204: Processing module 22 performs packet assembly operation on the data of the first color channel to obtain the second MIPI protocol data packet, performs packet assembly operation on the data of the second color channel to obtain the third MIPI protocol data packet, and performs packet assembly operation on the data of the third color channel to obtain the fourth MIPI protocol data packet.
[0087] After extracting and separating the data of individual color channels, in order to transmit the data of each color channel to the corresponding monochrome screen through the MIPI interface, the processing module 22 can group the data of each color channel according to the MIPI protocol standard so that the data packets obtained by grouping still conform to the MIPI protocol standard and can still be transmitted through the MIPI protocol.
[0088] That is, for a single color channel data, the processing module 22 can repackage the single color channel data according to the MIPI protocol to obtain a MIPI protocol data packet including the single color channel data.
[0089] It should be noted that the second, third, and fourth MIPI protocol data packets each contain data for only a single color channel. Therefore, compared to the first MIPI protocol data packet, which includes data for three color channels, the second, third, and fourth MIPI protocol data packets have a smaller data volume. This results in less bandwidth being used when transmitting the second, third, and fourth MIPI protocol data packets to various monochrome screens, thus saving bandwidth.
[0090] For example, the image data is RGB image data with all three color channels, meaning the first MIPI protocol data packet includes data from all three color channels. The second MIPI protocol data packet only includes the R channel data, the third MIPI protocol data packet only includes the G channel data, and the fourth MIPI protocol data packet only includes the B channel data. In this case, the data volume of the second, third, and fourth MIPI protocol data packets is approximately only one-third the data volume of the first MIPI protocol data packet. That is, the size of the MIPI protocol data packet sent from processing module 22 is only about one-third the size of the MIPI protocol data packet sent from SOC 21.
[0091] Typically, processing module 22 can perform packet assembly operations on the data of the first color channel, the second color channel, and the third color channel in parallel; that is, the packet assembly operations of the first color channel, the second color channel, and the third color channel are processed in parallel. Of course, they can also be processed in a different way.
[0092] In step S205, the processing module 22 sends a second MIPI protocol data packet to the first monochrome screen 23, a third MIPI protocol data packet to the second monochrome screen 24, and a fourth MIPI protocol data packet to the third monochrome screen 25.
[0093] It is understandable that processing module 22 can perform packet assembly operations on the data of the first color channel, the second color channel, and the third color channel in parallel to obtain the corresponding MIPI protocol data packets, and can also send the assembled MIPI protocol data packets in parallel. That is to say, the parallel processing flow includes packet assembly operations and transmission operations. Typically, in the parallel processing flow, packet assembly operations are performed on the data of a single color channel to obtain the MIPI protocol data packet, and then the MIPI protocol data packet is sent.
[0094] Step S206: The first monochrome screen 23 parses the second MIPI protocol data packet to obtain the data of the first color channel and displays the data of the first color channel.
[0095] Specifically, the first monochrome screen 23 unpacks the second MIPI protocol data packet according to the MIPI protocol, obtains the data of the first color channel in the second MIPI protocol data packet, and sends the data of the first color channel to the display.
[0096] In step S207, the second monochrome screen 24 parses the third MIPI protocol data packet to obtain the data of the second color channel and displays the data of the second color channel.
[0097] Specifically, the second monochrome screen 24 unpacks the third MIPI protocol data packet according to the MIPI protocol, obtains the data of the second color channel in the third MIPI protocol data packet, and sends the data of the second color channel to the display.
[0098] In step S208, the third monochrome screen 25 parses the fourth MIPI protocol data packet to obtain the data of the third color channel and displays the data of the third color channel.
[0099] Specifically, the third monochrome screen 25 unpacks the fourth MIPI protocol data packet according to the MIPI protocol, obtains the data of the third color channel in the fourth MIPI protocol data packet, and sends the data of the third color channel to the display.
[0100] It should be noted that in a normal MIPI protocol data packet, three bytes correspond to one pixel. In this case, the screen can display one pixel based on three bytes without any display anomalies. A normal MIPI protocol data packet refers to a data packet containing image data with three color channels.
[0101] In the second, third, and fourth MIPI protocol data packets, one byte corresponds to one pixel. Therefore, a customized implementation of DDIC on the screen is required so that DDIC on the screen can display one pixel according to one byte without causing display abnormalities.
[0102] It should also be noted that when displaying monochrome based on MIPI protocol data packets containing complete data for all three color channels, the processing complexity of DDIC on the screen is lower when displaying monochrome based on MIPI protocol data packets containing only a single color channel.
[0103] Specifically, when the screen receives a MIPI protocol data packet containing three color channel data, the DDIC on the screen needs to perform the following process: parse the MIPI protocol data packet, extract and separate the individual color channel data from the image data, identify the color channel data required by itself from multiple color channel data, and send the individual color channel data to the display.
[0104] When the screen receives a MIPI protocol data packet containing only a single color channel, the DDIC on the screen needs to perform the following processes: parse the MIPI protocol data packet and send the single color channel data to the display.
[0105] The comparison shows that when the screen displays monochrome based on MIPI protocol data including single color channel data, it does not need to perform the processes of extracting and separating single color channel data from image data and identifying the required color channel data from multiple color channel data, thus reducing the processing complexity.
[0106] As can be seen from the above, the monochrome screen display scheme provided in this application reduces redundant data received by the screen, saves transmission bandwidth, and also reduces the processing complexity of the screen.
[0107] As shown above, the processing module 22 can perform functions such as parsing, extraction and separation of single color channel data, and packet assembly. The parsing function refers to parsing MIPI protocol data packets, and the packet assembly function refers to performing packet assembly operations according to the MIPI protocol to obtain MIPI protocol data packets.
[0108] In practical applications, the processing module 22 can be used to perform functions such as parsing, extracting and separating individual color channel data, and packaging.
[0109] For example, see Figure 3A The schematic diagram of the logic units shown indicates that the processing module 22 may include a first logic unit 221, a second logic unit 222, a third logic unit 223, and a fourth logic unit 224. The first logic unit 221 is connected to the second logic unit 222, the third logic unit 223, and the fourth logic unit 224, respectively.
[0110] The first logic unit 221 is used to acquire the first MIPI protocol data packet and parse the first MIPI protocol data packet to obtain the image data in the first MIPI protocol data packet; then extract and separate the data of the first color channel, the data of the second color channel, and the data of the third color channel from the image data; and transmit the data of the first color channel to the second logic unit 222, transmit the data of the second color channel to the second logic unit 222, and transmit the data of the third color channel to the fourth logic unit 224.
[0111] The second logic unit 222 receives data from the first logic unit 221 for the first color channel, performs packet assembly operations on the data for the first color channel to obtain a second MIPI protocol data packet, and transmits the second MIPI protocol data packet to the first monochrome screen 23. The first monochrome screen 23 parses the second MIPI protocol data packet, obtains the data for the first color channel, and then displays the data for the first color channel.
[0112] Similarly, the third logic unit 223 receives data from the second color channel from the first logic unit 221, performs packet assembly operations on the second color channel data to obtain a third MIPI protocol data packet, and transmits the third MIPI protocol data packet to the second monochrome screen 24. The second monochrome screen 24 parses the third MIPI protocol data packet, obtains the data of the second color channel, and then displays the data of the second color channel.
[0113] The fourth logic unit 224 receives data from the third color channel from the first logic unit 221, performs packet assembly operations on the third color channel data to obtain a third MIPI protocol data packet, and transmits the third MIPI protocol data packet to the third monochrome screen 25. The third monochrome screen 25 parses the third MIPI protocol data packet, obtains the data of the third color channel, and then displays the data of the third color channel.
[0114] The first logic unit 221 is used to implement the parsing function and the extraction and separation function of single color channel data, while the second logic unit 222, the third logic unit 223 and the fourth logic unit 224 are used to implement the package assembly function.
[0115] The first logic unit 221 can extract individual color channel data from the image data in parallel and send them to the second logic unit 222, the third logic unit 223 and the fourth logic unit 224 in parallel. The second logic unit 222, the third logic unit 223 and the fourth logic unit 224 can also perform packet assembly operations on the individual color channel data in parallel.
[0116] See also, for example, Figure 3B Another schematic diagram of a logic unit is shown. The processing module 22 may include a data processing unit 2211, a fifth logic unit 2212, a second logic unit 222, a third logic unit 223, and a fourth logic unit 224.
[0117] The output of the fifth logic unit 2212 is connected to the input of the data processing unit 2211, and the output of the data processing unit 2211 is connected to the inputs of the second logic unit 222, the third logic unit 223, and the fourth logic unit 224, respectively.
[0118] The fifth logic unit 2212 is used to parse the first MIPI protocol data packet, obtain image data, and transmit the image data to the data processing unit 2211.
[0119] The data processing unit 2211 is used to extract and separate the data of the first color channel, the data of the second color channel, and the data of the third color channel from the image data, and transmit the data of the first color channel to the second logic unit 222, the data of the second color channel to the third logic unit 223, and the data of the third color channel to the fourth logic unit 224.
[0120] The second logic unit 222 is used to receive data from the first color channel from the first logic unit 221, perform packet assembly operation on the data of the first color channel to obtain the second MIPI protocol data packet, and transmit the second MIPI protocol data packet to the first monochrome screen 23.
[0121] The third logic unit 223 is used to receive data from the second color channel from the first logic unit 221, perform packet assembly operation on the data of the second color channel to obtain the third MIPI protocol data packet, and transmit the third MIPI protocol data packet to the second monochrome screen 24.
[0122] The fourth logic unit 224 is used to receive data from the third color channel from the first logic unit 221, perform packet assembly operation on the data of the third color channel to obtain the third MIPI protocol data packet, and transmit the fourth MIPI protocol data packet to the third monochrome screen 25.
[0123] Figure 3B Compared to Figure 3A The data processing unit 2211 performs the extraction and separation of individual color channel data. This allows the fifth logic unit 2212, the second logic unit 222, the third logic unit 223, and the fourth logic unit 224 to be designed as identical logic units. Specifically, these units all possess parsing and packet assembly functions. The fifth logic unit 2212 uses the parsing function, while the second, third, and fourth logic units 222 and 223 use the packet assembly function. This simplifies design and implementation.
[0124] Understandable Figure 3A and Figure 3B The logic units and data processing units shown can be software modules, hardware modules, or functional modules implemented by the combined action of software and hardware.
[0125] For example, when the processing module 22 is an FPGA, Figure 3A and Figure 3BThe first logic unit 221, the second logic unit 222, the third logic unit 223, the fourth logic unit 224, and the fifth logic unit 2212 can all be either D-PHY modules or C-PHY modules. Among them, PHY (Physical) belongs to the lowest level of the MIPI interface, that is, the physical layer, i.e., the port physical layer, which directly involves physical connections, signal transmission, etc.
[0126] As shown above, the processing module 22 can be an FPGA, and the image data in the first MIPI protocol data packet can be RGB image data. To better illustrate the monochrome screen display scheme provided in this application embodiment, the following will be combined with... Figures 4A-4E This will be explained using FPGA and RGB image data as examples. Figure 4A This is a schematic block diagram of a monochrome screen display system architecture provided in an embodiment of this application. Figure 4B This is another schematic block diagram of the monochrome screen display system architecture provided in the embodiments of this application. Figure 4C This is a schematic block diagram of a MIPI protocol data packet provided in an embodiment of this application. Figure 4D This is a schematic block diagram of the logic unit of the FPGA provided in the embodiments of this application. Figure 4E This is a schematic diagram of MIPI protocol data packet transmission provided in an embodiment of this application.
[0127] like Figure 4A As shown, the monochrome display system may include SOC41, FPGA42, a first monochrome screen 43, a second monochrome screen 44, and a third monochrome screen 45. FPGA42 includes D-PHY 421, D-PHY 422, D-PHY 423, and D-PHY 424.
[0128] The SOC41 outputs a MIPI protocol data packet containing RGB image data and transmits the MIPI protocol data packet to the FPGA42 via the MIPI interface.
[0129] After receiving the MIPI protocol data packet containing RGB image data, the FPGA42 can parse the MIPI protocol data packet through the D-PHY 421 to obtain the RGB image data, and extract and separate the R channel data, G channel data, and B channel data from the RGB image data; finally, the R channel data is transmitted to the D-PHY 422, the G channel data is transmitted to the D-PHY 423, and the B channel data is transmitted to the D-PHY 424.
[0130] After receiving the R channel data, D-PHY 422 performs packet assembly to obtain a MIPI protocol data packet containing the R channel data, and then transmits the MIPI protocol data packet to the first monochrome screen 43 through the MIPI interface. The first monochrome screen 43 then parses the received MIPI protocol data packet to obtain the R channel data, and displays it in red according to the R channel data.
[0131] After receiving the G channel data, D-PHY 423 performs packet assembly to obtain a MIPI protocol data packet containing the G channel data, and then transmits the MIPI protocol data packet to the second monochrome screen 44 through the MIPI interface. The second monochrome screen 44 then parses the received MIPI protocol data packet to obtain the G channel data, and displays green based on the G channel data.
[0132] After receiving the B-channel data, D-PHY 424 performs packet assembly to obtain a MIPI protocol data packet containing the B-channel data, and then transmits this MIPI protocol data packet to the third monochrome screen 45 via the MIPI interface. The third monochrome screen 45 then parses the received MIPI protocol data packet to obtain the B-channel data, and displays it in blue according to the B-channel data display.
[0133] D-PHY 422, D-PHY 423, and D-PHY 424 can process data from each color channel in parallel.
[0134] It is understandable that when the monochrome screen's interface is a display serial interface (DSI), the logic unit in the FPGA42 can be a D-PHY; when the monochrome screen's interface is a camera serial interface (CSI), the logic unit in the FPGA42 can be a C-PHY.
[0135] Figure 4A D-PHY 421 is used to implement the parsing function and the single color channel extraction and separation function, while D-PHY 422 to D-PHY 424 are used to implement the packet assembly function. Therefore, D-PHY 421 is different from D-PHY 422 to D-PHY 424.
[0136] For ease of design and implementation, all D-PHYs in the FPGA42 can be identical, meaning all D-PHYs are used for parsing and packet assembly. In this case, an additional data processing unit is needed to implement the individual color channel extraction and separation function. For example, such as... Figure 4BAs shown, a data processing unit is set up within the FPGA. This unit extracts the R, G, and B channel data from the RGB image data and transmits each channel data to its corresponding D-PHY. All four D-PHYs in the FPGA perform parsing and packet assembly functions; however, one D-PHY uses parsing while the other three use packet assembly. Figure 4A and Figure 4B The similarities will not be elaborated here.
[0137] like Figure 4C As shown, the MIPI protocol data packet 46 transmitted from SOC41 to FPGA42 includes Low Power State (LPS), start of transmission (SOT), package header, RGB data, and end of transmission (EoT).
[0138] like Figure 4D As shown, after receiving the MIPI protocol data packet 46, the FPGA42 parses the MIPI protocol data packet 46 through the D-PHY421 to obtain the RGB image data, such as... Figure 4D The D-PHY421 includes data such as RGBRGBRGB.
[0139] After extracting the R, G, and B channel data from the RGB image data, the D-PHY421 transmits the R channel data to the D-PHY422, the G channel data to the D-PHY423, and the B channel data to the D-PHY424.
[0140] like Figure 4E As shown, the D-PHY422 performs packet assembly operation on the R channel data to obtain the MIPI protocol data packet 47, and transmits the MIPI protocol data packet 47 to the first monochrome screen 43.
[0141] The D-PHY423 performs packet assembly operations on the G channel data to obtain the MIPI protocol data packet 48, and transmits the MIPI protocol data packet 48 to the second monochrome screen 44.
[0142] The D-PHY424 performs packet assembly on the B channel data to obtain the MIPI protocol data packet 49, and then transmits the MIPI protocol data packet 49 to the third monochrome screen 45.
[0143] It is important to note that due to the unique nature of FPGA hardware, the above process is an extremely fast pipeline with minimal latency. Furthermore, the D-PHY and data processing units in the FPGA are simulated; that is, leveraging the programmable nature of the FPGA, each logic unit is simulated through programming, and each logic unit performs its corresponding function.
[0144] As can be seen above, the FPGA divides a MIPI signal containing RGB image data into three monochrome MIPI signals and transmits each of the three monochrome MIPI signals to the corresponding monochrome screen. This allows the monochrome screen to display monochrome data based on the monochrome MIPI signals, reducing redundant data received at the screen end, saving transmission bandwidth, and reducing the processing complexity of the DDIC at the screen end.
[0145] Please see Figure 5 This is a schematic flowchart of a monochrome screen display method provided in an embodiment of this application. The method is applied to a processing module and may include the following steps:
[0146] Step S501: Obtain the first mobile industry processor interface MIPI protocol data packet. The first MIPI protocol data packet includes image data, which includes data from the first color channel, the second color channel, and the third color channel.
[0147] In some possible implementations, the image data is RGB image data, with the first color channel being the R channel, the second color channel being the G channel, and the third color channel being the B channel.
[0148] Step S502: After parsing the first MIPI protocol data packet and obtaining the image data, extract the data of the first color channel, the data of the second color channel, and the data of the third color channel from the image data.
[0149] Step S503: Perform packet assembly operation on the data of the first color channel to obtain the second MIPI protocol data packet, and send the second MIPI protocol data packet to the first monochrome screen.
[0150] Step S504: Perform packet assembly operation on the data of the second color channel to obtain the third MIPI protocol data packet, and send the third MIPI protocol data packet to the second monochrome screen.
[0151] Step S505: Perform packet assembly operation on the data of the third color channel to obtain the fourth MIPI protocol data packet, and send the fourth MIPI protocol data packet to the third monochrome screen.
[0152] It should be noted that steps S503 to S505 can be executed in parallel or not. The processing module can be, but is not limited to, an FPGA. Each monochrome screen receives a MIPI protocol data packet containing data for a single color channel and can perform monochrome display according to the MIPI protocol data packet. The similarities between this embodiment and the embodiments described above can be referred to interchangeably and will not be repeated here.
[0153] Please see Figure 6 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. The electronic device may include a processing module 610, a memory 620, a first monochrome screen 630, a second monochrome screen 640, and a third monochrome screen 650.
[0154] It is understood that the structures illustrated in the embodiments of this application do not constitute a specific limitation on the electronic device. In other embodiments of this application, the electronic device may include more or fewer components than illustrated, or combine some components, or split some components, or have different component arrangements. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.
[0155] For example, when the electronic device is a virtual reality (VR) / AR / mixed reality (MR) device, the electronic device may also include a communication module and a sensor module, etc. The sensor module may include inertial sensors and touch sensors, etc.
[0156] The processing module 610 may include one or more processing units, such as an application processor (AP), a graphics processing unit (GPU), an image signal processor (ISP), or a digital signal processor (DSP). These different processing units may be independent devices or integrated into one or more processors.
[0157] In some embodiments, the processing module 610 may include one or more interfaces. Interfaces may include MIPI interfaces, etc. MIPI interfaces can be used to connect the processing module 610 to each monochrome screen. MIPI interfaces include camera serial interface (CSI) and display serial interface (DSI), etc. In some embodiments, the processing module 610 communicates with the first monochrome screen 630, the second monochrome screen 640, and the third monochrome screen 650 via the DSI interface or the CSI interface to realize the display function of the electronic device.
[0158] Of course, the processing module 610 may also include a general-purpose input / output (GPIO) interface. The GPIO interface can be configured as a MIPI interface through software configuration. In some embodiments, the GPIO interface can be used to connect the processing module 610 to the first monochrome screen 630, the second monochrome screen 640, and the third monochrome screen 650 to realize the display function.
[0159] It is understood that the interface connection relationships between the modules illustrated in the embodiments of this application are merely illustrative and do not constitute a limitation on the structure of the electronic device. In other embodiments of this application, the electronic device may also employ different interface connection methods or combinations of multiple interface connection methods as described in the above embodiments.
[0160] The electronic device implements display functions through a GPU, a first monochrome screen 630, a second monochrome screen 640, and a third monochrome screen 650, as well as an application processor. The GPU is a microprocessor for image processing, connecting the various monochrome screens and the application processor. The GPU is used to perform mathematical and geometric calculations and for graphics rendering. The processing module 610 may include one or more GPUs, which execute program instructions to generate or modify display information.
[0161] The first monochrome screen 630, the second monochrome screen 640, and the third monochrome screen 650 are used to display images, videos, etc. The monochrome screen includes a display panel. The display panel can be a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), a MiniLED, a MicroLED, a Micro-OLED, a quantum dot light-emitting diode (QLED), etc.
[0162] The memory 620 can be used to store computer executable program code, which includes instructions. The memory 620 may include a program storage area and a data storage area. The program storage area may store the operating system, at least one application program required for a function (such as sound playback, image playback, etc.), etc. The data storage area may store data created during the use of the electronic device (such as audio data, phonebook, etc.). Furthermore, the memory 620 may include high-speed random access memory, and may also include non-volatile memory, such as at least one disk storage device, flash memory device, universal flash storage (UFS), etc. The processing module 610 executes various functional applications and data processing of the electronic device by running instructions stored in the memory 620 and / or instructions stored in a memory disposed within the processing module. For example, the processing module 610 implements the computer program in the memory 620 to implement the relevant processes of the aforementioned monochrome display method.
[0163] The electronic device provided in this application embodiment may include a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the method as described in any of the above method embodiments.
[0164] This application also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps described in the various method embodiments above.
[0165] This application provides a computer program product that, when run on an electronic device, enables the electronic device to perform the steps described in the various method embodiments above.
[0166] This application also provides a chip system, which includes a processor coupled to a memory. The processor executes a computer program stored in the memory to implement the methods described in the above embodiments. The chip system may be a single chip or a chip module composed of multiple chips.
[0167] In the above embodiments, the descriptions of each embodiment have their own emphasis. Parts not detailed or described in a particular embodiment can be referred to in the relevant descriptions of other embodiments. It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application. Furthermore, in the description of this application specification and the appended claims, the terms "first," "second," "third," etc., are only used to distinguish descriptions and should not be construed as indicating or implying relative importance. References to "one embodiment" or "some embodiments" in this application specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in yet other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized.
[0168] Finally, it should be noted that the above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. A monochrome screen display system, characterized in that, Includes a processing module, a first monochrome screen, a second monochrome screen, and a third monochrome screen; The processing module is configured to: acquire a first mobile industry processor interface MIPI protocol data packet, the first MIPI protocol data packet including image data, the image data including data of a first color channel, data of a second color channel, and data of a third color channel; parse the first MIPI protocol data packet to obtain the image data, and then extract the data of the first color channel, the data of the second color channel, and the data of the third color channel from the image data; perform a packet assembly operation on the data of the first color channel to obtain a second MIPI protocol data packet, and send the second MIPI protocol data packet to the first monochrome screen; The data of the second color channel is packetized to obtain a third MIPI protocol data packet, and the third MIPI protocol data packet is sent to the second monochrome screen. The data of the third color channel is packetized to obtain a fourth MIPI protocol data packet, and the fourth MIPI protocol data packet is sent to the third monochrome screen; wherein, the second MIPI protocol data packet, the third MIPI protocol data packet, and the fourth MIPI protocol data packet are all MIPI protocol data packets that only include data of a single color channel; The first monochrome screen is used to: receive the second MIPI protocol data packet, parse the second MIPI protocol data packet to obtain the data of the first color channel, and display the data of the first color channel; The second monochrome screen is used to: receive the third MIPI protocol data packet, parse the third MIPI protocol data packet to obtain the data of the second color channel, and display the data of the second color channel; The third monochrome screen is used to: receive the fourth MIPI protocol data packet, parse the fourth MIPI protocol data packet to obtain the data of the third color channel, and display the data of the third color channel.
2. The system according to claim 1, characterized in that, The processing module includes a first logic unit, a second logic unit, a third logic unit, and a fourth logic unit; The first logic unit is connected to the second logic unit, the third logic unit, and the fourth logic unit, respectively. The first logic unit is configured to: parse the first MIPI protocol data packet to obtain the image data; extract the data of the first color channel, the data of the second color channel, and the data of the third color channel from the image data; send the data of the first color channel to the second logic unit, send the data of the second color channel to the third logic unit, and send the data of the third color channel to the fourth logic unit; The second logic unit is configured to: receive data from the first color channel, perform packet assembly operation on the data from the first color channel to obtain the second MIPI protocol data packet, and send the second MIPI protocol data packet to the first monochrome screen; The third logic unit is used to: receive data from the second color channel, perform packet assembly operation on the data of the second color channel to obtain the third MIPI protocol data packet, and send the third MIPI protocol data packet to the second monochrome screen; The fourth logic unit is used to: receive data from the third color channel, perform packet assembly operations on the data from the third color channel to obtain the fourth MIPI protocol data packet, and send the fourth MIPI protocol data packet to the third monochrome screen.
3. The system according to claim 2, characterized in that, The processing module is a field-programmable gate array (FPGA), and the first logic unit, the second logic unit, the third logic unit, and the fourth logic unit are all D-PHY or C-PHY.
4. The system according to claim 2, characterized in that, The first logic unit includes a fifth logic unit and a data processing unit; The fifth logic unit is used to: parse the first MIPI protocol data packet to obtain the image data, and send the image data to the data processing unit; The data processing unit is configured to: extract data from the image data of the first color channel, the second color channel, and the third color channel; send the data of the first color channel to the second logic unit, send the data of the second color channel to the third logic unit, and send the data of the third color channel to the fourth logic unit.
5. The system according to claim 4, characterized in that, The processing module is an FPGA, and the second, third, fourth and fifth logic units are all D-PHY or C-PHY.
6. The system according to any one of claims 1 to 5, characterized in that, The image data is RGB image data, the first color channel is the R channel, the second color channel is the G channel, and the third color channel is the B channel.
7. The system according to claim 1, characterized in that, The processing module is specifically used to: receive the first MIPI protocol data packet from the system-on-a-chip (SOC).
8. A monochrome screen display method, characterized in that, Applied to a processing module, the method includes: Acquire a first mobile industry processor interface MIPI protocol data packet, the first MIPI protocol data packet including image data, the image data including data of a first color channel, data of a second color channel and data of a third color channel; After parsing the first MIPI protocol data packet to obtain the image data, the data of the first color channel, the data of the second color channel, and the data of the third color channel are extracted from the image data; The data of the first color channel is grouped into packets to obtain a second MIPI protocol data packet, and the second MIPI protocol data packet is sent to the first monochrome screen. The data of the second color channel is packetized to obtain a third MIPI protocol data packet, and the third MIPI protocol data packet is sent to the second monochrome screen. The data of the third color channel is packetized to obtain the fourth MIPI protocol data packet, and the fourth MIPI protocol data packet is sent to the third monochrome screen; The second MIPI protocol data packet, the third MIPI protocol data packet, and the fourth MIPI protocol data packet are all MIPI protocol data packets that only include data from a single color channel.
9. The method according to claim 8, characterized in that, The processing module is an FPGA.
10. The method according to claim 8 or 9, characterized in that, The image data is RGB image data, the first color channel is the R channel, the second color channel is the G channel, and the third color channel is the B channel.
11. An electronic device, characterized in that, The method includes a first monochrome screen, a second monochrome screen, a third monochrome screen, a processing module, a memory, and a computer program stored in the memory and executable on the processing module, wherein the processing module, when executing the computer program, implements the method as described in any one of claims 8 to 10.
12. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by a processor, it implements the method as described in any one of claims 8 to 10.
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