Method and apparatus for detecting light emitting diodes

Abstract

The application discloses a light emitting diode detection method and a detection device. The detection method comprises the following steps: providing a to-be-detected device, wherein the to-be-detected device comprises a diode; applying a bias voltage to the to-be-detected device; obtaining a first voltage node corresponding to a first change point of the capacitance of the to-be-detected device when the voltage rises; and judging the type of excess carriers in the diode according to the first voltage node. The method provided by the application can detect the type of excess carriers in the diode.

Description

Technical Field

[0001] This application relates to the semiconductor field, and more particularly to a method and apparatus for detecting light-emitting diodes. Background Technology

[0002] Light-emitting diodes (LEDs) have a typical "sandwich" layered structure, with the top and bottom layers being the cathode and anode, respectively, and an organic or inorganic functional layer in the middle. The working principle of an LED is as follows: driven by an external electric field, electrons and holes are injected from the cathode and anode, respectively. Upon reaching the functional layer, the electrons and holes combine to form excitons. These excited and unstable excitons then return to the ground state, releasing energy in the form of photons, thus emitting light.

[0003] Due to the presence of interface barriers, carrier injection can be either easy or difficult, referred to as "majority carriers" and "minority carriers," respectively. Furthermore, when the number of functional layers (e.g., hole transport layers, hole injection layers, electron transport layers, electron injection layers, etc.) is increased to improve device luminous efficiency and lifetime, the injection barrier also increases, leading to more complex and variable electron and hole injection within the device. Based on these mechanisms, for a diode to achieve optimal luminous efficiency and lifetime, not only is effective injection, transport, and recombination of electrons and holes required, but a balance between electron and hole injection is also necessary. Therefore, determining the type of excess carriers, i.e., majority carriers, in the device is extremely important. Summary of the Invention

[0004] In view of this, this application provides a method and apparatus for detecting light-emitting diodes. The method provided by this application can detect the type of excess charge carriers in the diode.

[0005] The embodiments of this application are implemented as follows:

[0006] In a first aspect, this application provides a method for detecting a light-emitting diode, comprising the following steps:

[0007] A device under test is provided, the device under test including a diode;

[0008] Apply a bias voltage to the device under test;

[0009] Obtain the first voltage node corresponding to the inflection point of the initial change in capacitance of the device under test when the voltage rises;

[0010] Based on the first voltage node, determine the type of excess carriers in the diode.

[0011] In some embodiments, the first voltage node includes V1 corresponding to the diode;

[0012] The method for determining the type of excess carriers in the diode based on the first voltage node includes:

[0013] A preset hole-blocking voltage V2 and a preset electron-blocking voltage V3 are provided. V1, V2 and V3 are compared to determine the type of excess carriers in the diode.

[0014] In some embodiments, the device under test further includes a hole-blocking device corresponding to the diode and an electron-blocking device corresponding to the diode;

[0015] In the step of obtaining the first voltage node corresponding to the inflection point of the initial change in capacitance of the device under test when the voltage rises, the first voltage node of the diode is V1, the first voltage node of the hole blocking device is V2, and the first voltage node of the electron blocking device is V3.

[0016] In some embodiments, the step of comparing V1, V2, and V3 to determine the type of excess carriers in the diode includes:

[0017] When the absolute value of the difference between V1 and V2 is greater than or equal to 0 and less than or equal to 0.2V, the type of excess carrier in the diode is determined to be electron;

[0018] When the absolute value of the difference between V1 and V3 is greater than or equal to 0 and less than or equal to 0.2V, the type of excess carrier in the diode is determined to be holes.

[0019] In some embodiments, the step of obtaining the first voltage node corresponding to the inflection point of the initial change in capacitance of the device under test when the voltage rises includes:

[0020] Obtain the capacitance-voltage change curve of the device under test;

[0021] Obtain the voltage value corresponding to the first inflection point in the capacitance-voltage change curve, where the voltage value is the first voltage node.

[0022] In some embodiments, the slope of the capacitance-voltage change curve at the first inflection point is greater than or equal to 0.577.

[0023] In some embodiments, the step of obtaining the first voltage node corresponding to the inflection point of the initial change in capacitance of the device under test when the voltage rises, wherein the first voltage node of the diode is V1, the first voltage node of the hole blocking device is V2, and the first voltage node of the electron blocking device is V3, includes:

[0024] Obtain the first capacitance-voltage change curve of the diode, and obtain the voltage value corresponding to the first inflection point when the capacitance initially rises in the first capacitance-voltage change curve, wherein the voltage value is V1.

[0025] Obtain the second capacitance-voltage change curve of the hole blocking device, and obtain the voltage value corresponding to the first inflection point when the capacitance initially rises in the second capacitance-voltage change curve, wherein the voltage value is V2.

[0026] Obtain the third capacitance-voltage change curve of the resistive electronic device, and obtain the voltage value corresponding to the first inflection point when the capacitance initially rises in the third capacitance-voltage change curve, wherein the voltage value is V3.

[0027] In some embodiments, the step of applying a bias voltage to the device under test further includes:

[0028] Obtain the second voltage node V' corresponding to the point where the capacitance of the diode reaches its maximum value when the voltage rises;

[0029] Obtain information on the change in the light emission brightness of the diode as the voltage increases;

[0030] When the luminous intensity increases when the voltage is greater than or equal to V', the minimum turn-on voltage of the diode is determined to be V'.

[0031] In some embodiments, after obtaining information on the change in the luminous intensity of the diode as the voltage rises, the method further includes: discarding the current detection result when the voltage is greater than or equal to V' and the luminous intensity is constant or decreases.

[0032] In some embodiments, during the step of applying a bias voltage to the device under test, the voltage variation range is 0–8V; and / or,

[0033] The boost step size is 0.3 to 0.6V.

[0034] Secondly, this application provides a detection device for light-emitting diodes, comprising:

[0035] A mounting base having a device mounting position for placing the device to be tested; and,

[0036] The acquisition mechanism includes a bias circuit structure, which is used to apply a bias voltage to the device under test at the device mounting position and acquire the capacitance signal of the device under test.

[0037] In some embodiments, the device mounting position has a first connection terminal and a second connection terminal, the bias circuit structure includes a first power supply, an LCR meter, and a bias adapter, one end of the bias adapter is connected to the first connection terminal, the other end is connected to the first power supply, the second connection terminal is connected to the first power supply, and the two ends of the LCR meter are respectively connected to the two ends of the first power supply; and / or,

[0038] The device further includes a first information processing mechanism, which is electrically connected to the bias circuit structure and is used to establish a capacitance-voltage change curve based on the bias signal output by the bias circuit structure and the capacitance signal.

[0039] In some embodiments, the device further includes a housing having a light-shielding space, and the base is disposed within the light-shielding space;

[0040] The acquisition mechanism also includes a silicon photonics circuit structure, which is used to acquire the optical information of the device under test after a bias voltage is applied to the device under test.

[0041] In some embodiments, the device mounting position has a light-emitting side;

[0042] The silicon photonics circuit structure includes a second power supply, an ammeter, and a silicon photodiode connected in series to form a loop. The silicon photodiode is located on the light-emitting side of the device mounting position and is used to collect light information emitted by the device under test mounted on the device mounting position.

[0043] In some embodiments, the device further includes a second information processing mechanism electrically connected to the acquisition mechanism, for establishing a brightness-voltage variation curve based on the bias signal output by the bias circuit structure and the optical signal output by the silicon photonics circuit structure.

[0044] Beneficial effects:

[0045] The technical solution provided in this application determines the change of charge carriers inside the device based on the change of capacitance in the device under an applied electric field, thereby identifying the type of excess charge carriers in the device. This provides guidance for optimizing device structure and film materials, and helps improve device performance. Furthermore, the method in this application can reflect the change of charge carriers in most devices, with high accuracy, few influencing factors, and a wide range of applications. Attached Figure Description

[0046] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0047] Figure 1 This is a schematic flowchart of a method for detecting a light-emitting diode according to the first embodiment of this application;

[0048] Figure 2 This is a schematic flowchart of a method for detecting a light-emitting diode according to a second embodiment of this application;

[0049] Figure 3 This is a schematic flowchart of a method for detecting a light-emitting diode according to a third embodiment of this application;

[0050] Figure 4 This is a schematic flowchart of a method for detecting a light-emitting diode according to the fourth embodiment of this application;

[0051] Figure 5 This is a schematic flowchart of a method for detecting a light-emitting diode according to the fifth embodiment of this application;

[0052] Figure 6 This is a schematic diagram of the structure of a light-emitting diode detection device according to an embodiment of this application;

[0053] Figure 7 yes Figure 6 Schematic diagrams of medium bias circuit structure and silicon photonics circuit structure;

[0054] Figure 8 This is the capacitance-voltage curve of the device under test in Example 1;

[0055] Figure 9 This is the brightness-voltage curve of the device under test in Example 1;

[0056] Figure 10 This is the capacitance-voltage curve of the device under test in Example 2;

[0057] Figure 11 This is the capacitance-voltage curve of the device under test in Example 3;

[0058] Figure 12 This is the capacitance-voltage curve of the device under test in Example 4;

[0059] Figure 13 This is the capacitance-voltage curve of the device under test in Example 5;

[0060] Figure 14This is the capacitance-voltage curve of the device under test in Example 6;

[0061] Figure 15 This is the capacitance-voltage curve of the device under test in Example 7;

[0062] Figure 16 This is a schematic diagram of the QLED device in Example 1;

[0063] Figure 17 This is a schematic diagram of the structure of a single electronic device in Comparative Example 1;

[0064] Figure 18 This is a schematic diagram of the single-hole device in Comparative Example 1. Detailed Implementation

[0065] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application. In addition, it should be understood that the specific embodiments described herein are only for illustration and explanation of this application and are not intended to limit this application. In this application, unless otherwise stated, directional terms such as "upper" and "lower" specifically refer to the drawing directions in the accompanying drawings. In addition, in the description of this application specification, the term "including" means "including but not limited to". Various embodiments of this application may exist in the form of a range; it should be understood that the description in the form of a range is only for convenience and conciseness and should not be construed as a hard limitation on the scope of this application; therefore, it should be considered that the range description has specifically disclosed all possible sub-ranges and single values ​​within that range. For example, it should be assumed that the description of a range from 1 to 6 specifically discloses subranges such as from 1 to 3, from 1 to 4, from 1 to 5, from 2 to 4, from 2 to 6, from 3 to 6, etc., as well as single numbers within the range, such as 1, 2, 3, 4, 5, and 6, regardless of the range. Furthermore, whenever a numerical range is referred to herein, it means including any referenced number (fraction or integer) within the range referred to.

[0066] In this application, "and / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. A and B can be singular or plural.

[0067] In this application, "at least one" means one or more, and "more than one" means two or more. "At least one," "at least one of the following," or similar expressions refer to any combination of these items, including any combination of single or multiple items. For example, "at least one of a, b, or c," or "at least one of a, b, and c," can both mean: a, b, c, ab (i.e., a and b), ac, bc, or abc, where a, b, and c can be single or multiple.

[0068] The technical solution of this application is implemented as follows:

[0069] Firstly, this application proposes a method for detecting light-emitting diodes (LEDs). Figures 1 to 5 This is a specific embodiment of the light-emitting diode detection method proposed in this application.

[0070] Please see Figure 1 The detection method includes the following steps:

[0071] Step S100: Provide a device to be tested, the device to be tested including a diode;

[0072] Step S200: Apply a bias voltage to the device under test;

[0073] Step S300: Obtain the first voltage node corresponding to the inflection point of the initial change in capacitance of the device under test when the voltage rises;

[0074] Step S400: Determine the type of excess carriers in the diode based on the first voltage node.

[0075] The inventors discovered that the entire process of carrier injection, recombination, and luminescence is accompanied by changes in device capacitance. By observing these changes in capacitance, the changes in charge carriers within the device can be determined. Please refer to [link to relevant documentation]. Figure 8The CV curve of a mid-QLED device, combined with the working mechanism of a light-emitting diode, shows that after applying voltage to the device, majority carriers are injected into the functional layer first, followed by minority carriers. When majority carriers are injected, charge begins to accumulate at the interface between the functional layer and the electrodes, and the capacitance of the device begins to rise rapidly (the initial rise point is the first inflection point). After minority carriers are injected into the functional layer, they recombine with majority carriers to form uncharged excitons, which then emit light. Simultaneously, with the injection of minority carriers, the amount of charge accumulated at the interface begins to decrease, and the capacitance drops from its highest value (i.e., the curve peak). The capacitance rises at the first inflection point due to majority carrier injection; therefore, the first inflection point is the majority carrier injection point. The capacitance decreases at the curve peak due to minority carrier injection; therefore, the curve peak is the minority carrier injection point. At this point, the device emits light, and the voltage corresponding to the curve peak can be understood as the minimum turn-on voltage of the device. The technical solution provided in this application determines the change of charge carriers inside the device based on the change of capacitance in the device under an applied electric field, thereby identifying the type of excess charge carriers in the device. This provides guidance for optimizing device structure and film materials, and helps improve device performance. Furthermore, the method of this application is simple, easy to operate, can reflect the change of charge carriers in most devices, has high accuracy, few influencing factors, and a wide range of applications.

[0076] In some embodiments, the first voltage node includes V1, which refers to the first voltage node corresponding to the inflection point of the initial change in the diode's capacitance when a bias voltage is applied to the diode; correspondingly, step S400 includes: providing a preset hole-blocking voltage V2 and a preset electron-blocking voltage V3, comparing V1 with V2 and V3, and determining the type of excess carriers in the diode. Wherein, V2 refers to the first voltage node of a hole-blocking device with a hole transport capability lower than that of the device under test; V3 refers to the first voltage node of a hole-blocking device with an electron transport capability lower than that of the device under test.

[0077] Furthermore, in some embodiments, in step S100, the device to be tested further includes a hole blocking device corresponding to the diode and an electron blocking device corresponding to the diode; correspondingly, in step S300, the first voltage node of the diode is V1, the first voltage node of the hole blocking device is V2, and the first voltage node of the electron blocking device is V3.

[0078] This application's method obtains the first voltage node V (i.e., the first inflection point of each device) corresponding to the initial rise of capacitance in an applied electric field for a diode, its corresponding hole-blocking device, and its corresponding electron-blocking device. By comparing these values, it can determine which carrier-blocking device's first inflection point is closer to the first inflection point of the complete diode. This allows for the determination of whether excess carrier injection is affected by changes in the device structure, and ultimately, the type of excess carrier in the diode. This provides guidance for optimizing device structure and film materials, contributing to improved device performance. For details, please refer to [link to relevant documentation]. Figure 2 In some embodiments, the detection method may be implemented according to the following steps:

[0079] Step S10: Provide a diode, a hole blocking device corresponding to the diode, and an electron blocking device corresponding to the diode;

[0080] Step S20: The diode, the hole blocking device, and the electron blocking device are respectively used as devices to be tested, and a bias voltage is applied to the devices to be tested;

[0081] Step S30: Obtain the first voltage node corresponding to the inflection point of the initial change in capacitance of the device under test when the voltage rises. The first voltage node of the diode is V1, the first voltage node of the hole blocking device is V2, and the first voltage node of the electron blocking device is V3.

[0082] Step S40: Compare V1, V2 and V3 to determine the type of excess carriers in the diode.

[0083] The diode refers to a light-emitting diode with a complete device structure, comprising a stacked anode, a hole-functional layer, a light-emitting layer, an electronic functional layer, and a cathode. The hole-functional layer promotes hole transport and can be a single layer or at least two layers. Specifically, the hole-functional layer includes, but is not limited to, a hole transport layer and / or a hole injection layer. Similarly, the electron transport layer promotes electron transport and can be a single layer or at least two layers. Specifically, the electron transport layer includes, but is not limited to, an electron transport layer and / or an electron injection layer. The hole-blocking device refers to a device, compared to a diode, where the hole-side film layer reduces hole transport capability by changing any single parameter among material type, thickness, and concentration, according to a single variable principle. The hole-blocking device includes an anode, a hole-functional layer, a light-emitting layer, an electronic functional layer, and a cathode. The electron blocking device refers to a device, compared to a diode, in which the electron-side film layer reduces the electron transport capability by changing any single parameter among parameters such as material type, thickness, and concentration, according to the principle of a single variable. The electron blocking device includes an anode, a hole functional layer, a light-emitting layer, an electron functional layer, and a cathode.

[0084] The method described in this application is applicable to light-emitting diodes with any structure and any film material.

[0085] It is understandable that in practical applications, if the diodes to be determined to have the excess carrier type are from the same batch and have the same film layer design, then during testing, only the same electron blocking device and / or hole blocking device can be used for testing. This can save the time of manufacturing electron blocking devices and hole blocking devices, improve testing efficiency, and reduce testing costs.

[0086] As a non-limiting example, in some embodiments:

[0087] The anode and cathode are anodes and cathodes known in the art for use in light-emitting diodes. For example, they can be independently selected from, but not limited to, metal electrodes, silicon carbide electrodes, metal oxide electrodes, or composite electrodes. The material of the metal electrode is selected from at least one of Ag, Al, Mg, Au, Cu, Mo, Pt, Ca, and Ba. The material of the silicon carbide electrode is selected from at least one of silicon, graphite, carbon nanotubes, graphene, and carbon fibers. The material of the metal oxide electrode is selected from at least one of indium-doped tin oxide, fluorine-doped tin oxide, antimony-doped tin oxide, aluminum-doped zinc oxide, gallium-doped zinc oxide, indium-doped zinc oxide, magnesium-doped zinc oxide, and aluminum-doped magnesium oxide. The composite electrode is selected from AZO / Ag / AZO, AZO / Al / AZO, ITO / Ag / ITO, ITO / Al / ITO, ZnO / Ag / ZnO, ZnO / Al / ZnO, TiO2 / Ag / TiO2, TiO2 / Al / TiO2, ZnS / Ag / ZnS, or ZnS / Al / ZnS.

[0088] The light-emitting layer can be an organic light-emitting layer or a quantum dot light-emitting layer. When the light-emitting layer is an organic light-emitting layer, the light-emitting diode can be an organic light-emitting diode; when the light-emitting layer is a quantum dot light-emitting layer, the light-emitting diode can be a quantum dot light-emitting diode.

[0089] The material of the organic light-emitting layer is a material known in the art for organic light-emitting layers used in light-emitting diodes, for example, it may be selected from, but is not limited to, at least one of CBP:Ir(mppy)3(4,4'-bis(N-carbazole)-1,1'-biphenyl:tris[2-(p-tolyl)pyridine-C2,N)iridium(III)), TCTX:Ir(mmpy)(4,4',4”-tris(carbazole-9-yl)triphenylamine:tris[2-(p-tolyl)pyridine-C2,N)iridium), diaromatic anthracene derivatives, stilbene aromatic derivatives, pyrene derivatives, fluorene derivatives, TBPe fluorescent material emitting blue light, TTPX fluorescent material emitting green light, TBRb fluorescent material emitting orange light, and DBP fluorescent material emitting red light.

[0090] The material of the quantum dot emitting layer is a quantum dot material known in the art for use in quantum dot emitting layers of light-emitting diodes. For example, it may be selected from, but is not limited to, at least one of single-structure quantum dots and core-shell structure quantum dots. The single-structure quantum dots are selected from at least one of group II-VI compounds, group IV-VI compounds, group III-V compounds, and group I-III-VI compounds. The group II-VI compounds are selected from CdS, CdSe, CdTe, ZnS, ZnSe, ZnTe, ZnO, HgS, HgSe, HgTe, CdSeS, CdSeTe, CdSTe, ZnSeS, ZnSeTe, ZnSTe, HgSeS, HgSeTe, HgSTe, CdZnS, CdZnSe, CdZnTe, CdHgS, CdHgSe, CdHgTe, H ...HgSe, CdHgTe, HgSe, CdHgSe, CdHgTe, HgSe, CdHgSe, CdHgTe, HgSe, CdHgSe, CdHgTe, HgSe, CdHgSe, CdHgSe, CdHgTe, HgSe, CdHgSe, CdHgSe, CdHgSe, CdHgSe, CdHgSe, HgSe, CdHgSe, CdHgSe, CdHgSe, CdHgSe, CdHgSe, CdHgSe, CdHgSe, CdHgSe, CdHgSe, CdHgSe, CdHgSe, CdHgSe, CdHgSe, CdHgSe, CdHgSe At least one of gZnS, HgZnSe, HgZnTe, CdZnSeS, CdZnSeTe, CdZnSTe, CdHgSeS, CdHgSeTe, CdHgSTe, HgZnSeS, HgZnSeTe, and HgZnSTe, wherein the IV-VI compound is selected from SnS, SnSe, SnTe, PbS, PbSe, PbTe, SnSeS, SnSeTe, SnSTe, PbSeS, PbSeTe, PbSTe, SnPbS, SnPbSe, SnPbTe, SnPbSSe, SnPbSeTe, Sn At least one of PbSTe, wherein the III-V compound is selected from GaN, GaP, GaAs, GaSb, AlN, AlP, AlAs, AlSb, InN, InP, InAs, InSb, GaNP, GaNAs, GaNSb, GaPAs, GaPSb, AlNP, AlNAs, AlNSb, AlPAs, AlPSb, InNP, InNAs, InNSb, InPAs, InPSb, GaAlNP, GaAlNAs, GaAlNSb, GaAlPAs, GaAlPSb, GaInNP, GaInNA The quantum dot is selected from at least one of the following: s, GaInNSb, GaInPAs, GaInPSb, InAlNP, InAlNAs, InAlNSb, InAlPAs, and InAlPSb; the I-III-VI group compound is selected from at least one of CuInS2, CuInSe2, and AgInS2; the core of the core-shell quantum dot is selected from any one of the above single-structure quantum dots; and the shell material of the core-shell quantum dot is selected from at least one of CdS, CdTe, CdSeTe, CdZnSe, CdZnS, CdSeS, ZnSe, ZnSeS, and ZnS.

[0091] As an example, the core-shell structured quantum dots may be selected from, but are not limited to, at least one of CdSe / CdSeS / CdS, InP / ZnSeS / ZnS, CdZnSe / ZnSe / ZnS, CdSeS / ZnSeS / ZnS, CdSe / ZnS, CdSe / ZnSe / ZnS, ZnSe / ZnS, ZnSeTe / ZnS, CdSe / CdZnSeS / ZnS, and InP / ZnSe / ZnS.

[0092] The material of the hole transport layer can be any material known in the art for hole transport layers, for example, selected from, but not limited to, poly[bis(4-phenyl)(2,4,6-trimethylphenyl)amine] (PTAA), 2,2',7,7'-tetratetra[N,N-di(4-methoxyphenyl)amino]-9,9'-spiro-omeTAD, 4,4'-cyclohexylbis[N,N-di(4-methylphenyl)aniline] (TAPC), N,N′-bis(1-naphthyl)-N,N′-diphenyl-1,1′-diphenyl-4,4′-diamine (NPB), 4,4'-bis(N-carbazole)-1,1'-biphenyl (CBP), poly[(9,9-dioctylfluorenyl-2,7-diyl)-co-(4,4'-(N-(para-)] The following are included: butylphenyl diphenylamine (TFB), poly(9-vinylcarbazole) (PVK), polytriphenylamine (Poly-TPD), 4,4',4”-tris(carbazole-9-yl)triphenylamine (TCTA), N,N'-diphenyl-N,N'-di(3-methylphenyl)-1,1'-biphenyl-4,4'-diamine (TPD), N,N'-bis(3-methylphenyl)-N,N'-diphenyl-9,9-spirodifluorene-2,7-diamine (Spiro-TPD), N,N'-di-1-naphthyl-N,N'-diphenyl-9,9'-spirodi[9H-fluorene]-2,7-diamine (Spiro-NPB), MoO3, WO3, NiO, V2O5, CuO, p-type gallium nitride, and CrO3.

[0093] The material of the hole injection layer can be any material known in the art for hole injection layers, such as, but not limited to, poly(ethylene dioxythiophene):polystyrene sulfonate (PEDOT:PSS), poly(9,9-dioctyl-fluorene-co-N-(4-butylphenyl)-diphenylamine) (TFB), polyarylamines, poly(N-vinylcarbazole), polyaniline, polypyrrole, N,N,N',N'-tetra(4-methoxyphenyl)-benzidine (TPD), 4-bis[N-(1-naphthyl)-N-phenyl-amino]biphenyl (α-NPD), 4,4',4”-tris[phenyl(m-tolyl)amino]triphenylamine (m-MTDATA), 4,4',4”-tris(N- The following are some of the following: 1,1-carbazolyl)-triphenylamine (TCTA), 1,1-bis[(di-4-tolylamino)phenylcyclohexane (TAPC), 4,4',4”-tris(diphenylamino)triphenylamine (TDATA) doped with tetrafluoro-tetracyanoquinone dimethylane (F4-TCNQ), p-doped phthalocyanine (e.g., F4-TCNQ-doped zinc phthalocyanine (ZnPc)), F4-TCNQ-doped N,N'-diphenyl-N,N'-di(1-naphthyl)-1,1'-biphenyl-4,4”-diamine (α-NPD), hexaazabenzanphenanthrene-hexanonitrile (HAT-CN), nickel oxide, molybdenum oxide, tungsten oxide, vanadium oxide, molybdenum sulfide, tungsten sulfide, and copper oxide.

[0094] The material of the electron transport layer can be selected from, but is not limited to, one or more of metal oxides, doped metal oxides, group 2-6 semiconductor materials, group 3-5 semiconductor materials, and group 1-3-6 semiconductor materials. Specifically, the metal oxide can be selected from, but is not limited to, one or more of ZnO, TiO2, SnO2, and Al2O3; the metal oxide in the doped metal oxide can be selected from, but is not limited to, at least one of ZnO, TiO2, and SnO2, and the doping element can be selected from, but is not limited to, one or more of Al, Mg, Li, In, and Ga. For example, the doped metal oxide can be aluminum zinc oxide (AZO), lithium-doped zinc oxide (LZO), and magnesium-doped zinc oxide (MZO), etc.; the group 2-6 semiconductor material can be selected from, but is not limited to, one or more of ZnS, ZnSe, and CdS; the group 3-5 semiconductor material can be selected from, but is not limited to, at least one of InP and GaP; and the group 1-3-6 semiconductor material can be selected from, but is not limited to, at least one of CuInS and CuGaS.

[0095] The material of the electron injection layer can be any material known in the art for use in electron injection layers, such as at least one selected from, but not limited to, LiF, MgP, MgF2, Al2O3, Ga2O3, LiF / Yb, ZnO, Cs2CO3, RbBr, and Rb2CO3.

[0096] In step S20, the voltage range is 0–8V, and during the test, the voltage gradually increases within this range. As an example, the voltage range can be 0–8V, 0–7V, 0–6V, 0–5V, 0–4V, 0–3V, 0–2V, 1–8V, 2–8V, 3–8V, 1–5V, 1–6V, or any range between 0V and 8V, etc. Within this voltage range, the device can operate normally, exhibiting high luminous efficiency and lifespan, and will not be damaged.

[0097] In step S20, during the test, the voltage boost step size is 0.3 to 0.6V, for example, 0.3V, 0.2V, 0.4V, 0.45V, 0.5V, 0.55V, 0.6V, and values ​​within any two of the above ranges. Within this step size range, it helps to accurately capture changes in capacitance and improve the accuracy of capturing the first and second voltage nodes.

[0098] In some embodiments of this application, step S30 can be implemented as follows:

[0099] Step S31: Obtain the capacitance-voltage change curve of the device under test;

[0100] Step S32: Obtain the voltage value corresponding to the first inflection point when the capacitance initially rises in the capacitance-voltage change curve. The voltage value is the first voltage node.

[0101] The first inflection point refers to the point where the capacitance initially rises rapidly and the slope of the capacitance-voltage curve increases rapidly for the first time. Specifically, the slope of the capacitance-voltage change curve at the first inflection point is greater than or equal to 0.577.

[0102] Specifically, the device to be tested includes a diode, a hole-blocking device corresponding to the diode, and an electron-blocking device corresponding to the diode. Accordingly, when step S31 is specifically implemented, three capacitance-voltage change curves (CV curves) corresponding to the three devices can be obtained, and then three first voltage nodes corresponding to the three CV curves can be obtained, namely V1 corresponding to the diode, V2 corresponding to the hole-blocking device, and V3 corresponding to the electron-blocking device.

[0103] Please see Figure 3 Specifically, step S30 may include:

[0104] Step S30a: Obtain the first capacitance-voltage change curve of the diode, and obtain the voltage value corresponding to the first inflection point when the capacitance initially rises in the first capacitance-voltage change curve, wherein the voltage value is V1;

[0105] Step S30b: Obtain the second capacitance-voltage change curve of the hole blocking device, and obtain the voltage value corresponding to the first inflection point when the capacitance initially rises in the second capacitance-voltage change curve, wherein the voltage value is V2;

[0106] Step S30c: Obtain the third capacitance-voltage change curve of the resistive electronic device, and obtain the voltage value corresponding to the first inflection point when the capacitance initially rises in the third capacitance-voltage change curve, wherein the voltage value is V3.

[0107] It is understandable that steps S30a, S30b, and S30c do not have a specific order. For example, step S30b can be performed before, after, or simultaneously with S30a or S30c, and step S30c can also be performed before, after, or simultaneously with S30a or S30b.

[0108] Please see Figure 4 In some embodiments of this application, step S40 may include:

[0109] Step S40a: When the absolute value of the difference between V1 and V2 is greater than or equal to 0 and less than or equal to 0.2V, the type of excess carrier in the diode is determined to be electrons;

[0110] In step S40b, when the absolute value of the difference between V1 and V3 is greater than or equal to 0 and less than or equal to 0.2V, the type of excess carrier in the diode is determined to be holes.

[0111] It is understandable that the absolute value of the difference between V1 and V2 is greater than or equal to 0 and less than or equal to 0.2V. For example, the absolute value of the difference can be 0V, 0.01V, 0.05V, 0.1V, 0.15V, 0.2V, or any value within the range of any two of the above values. When the absolute value of the difference between V1 and V2 is greater than or equal to 0 and less than or equal to 0.2V, it can be determined that the two voltage values ​​are basically equal, indicating that the carrier transport level of the diode and the hole-blocking device is the same at this voltage. However, it is known that the hole transport capability of the hole-blocking device is weakened compared to the diode. The fact that the carrier transport level remains unchanged at this voltage can only mean that the excess carrier type of the diode is electron. Similarly, the absolute value of the difference between V1 and V3 must be greater than or equal to 0 and less than or equal to 0.2V. For example, the absolute value of the difference can be 0V, 0.01V, 0.05V, 0.1V, 0.15V, 0.2V, or any value within the range of any two of the above values. When the absolute value of the difference between V1 and V3 is greater than or equal to 0 and less than or equal to 0.2V, it can be determined that the two voltage values ​​are basically equal, indicating that the carrier transport level of the diode and the resistive electronic device is the same at this voltage. However, it is known that the electron transport capability of the resistive electronic device is weakened compared to the diode. The fact that the carrier transport level remains unchanged at this voltage can only mean that the excess carrier type of the diode is holes. In addition, if the absolute values ​​of the differences between V1 and V2, and the absolute values ​​of the differences between V1 and V3 are not within the range of 0 to 0.2V, the test result is determined to be abnormal, the result is discarded, and the test is repeated.

[0112] Furthermore, based on the analysis of the curve peaks above, it can be seen that the method of this application can also detect the turn-on voltage of the diode. For details, please refer to... Figure 5 After step S20, the following steps may also be included:

[0113] Step S51: Obtain the second voltage node V' corresponding to the point where the capacitance of the diode reaches its maximum value when the voltage rises;

[0114] Step S52: Obtain information on the change in the light emission brightness of the diode as the voltage increases;

[0115] Step S53: When the voltage is greater than or equal to V' and the light emission brightness increases, the minimum turn-on voltage of the diode is determined to be V'.

[0116] It should be noted that steps S51 to S53 are not involved in the step ordering of steps S30 and S40. Steps S51 to S53 can be executed after step S20, after step S30, after step S40, or simultaneously with step S30.

[0117] Furthermore, in some embodiments, step S20 may be followed by:

[0118] Step S54: When the voltage is greater than or equal to V' and the luminous brightness is constant or decreases, discard the current test result.

[0119] Considering that the capacitance will also drop rapidly when the device breaks down and short-circuits due to excessive voltage, in order to eliminate interference factors, this application further examines the brightness-voltage change of the device. When the capacitance drops while the brightness remains constant or drops, the current situation is judged to be abnormal, thereby eliminating the minimum start-up voltage value obtained at this time and improving the detection accuracy.

[0120] Secondly, this application proposes a device for excess carriers in a light-emitting diode, see reference. Figure 6 The device includes a base and a data collection mechanism. Using this device, the above method can be performed conveniently and quickly to accurately determine the type of excess carriers in a light-emitting diode.

[0121] Specifically, see Figure 6 The base has a device mounting position 13 for placing the device under test; the acquisition mechanism includes a bias circuit structure 1, which is used to apply a bias voltage to the device under test on the device mounting position 13 and acquire the capacitance signal of the device under test.

[0122] Please see Figure 7 In some embodiments of this application, the bias circuit structure 1 includes a first power supply 11, an LCR meter 14, and a bias adapter 12. The device mounting position 13 has a first connection terminal and a second connection terminal. The bias circuit structure 1 includes a first power supply 11, an LCR meter 14, and a bias adapter 12. One end of the bias adapter 12 is connected to the first connection terminal, and the other end is connected to the first power supply 11. The second connection terminal is connected to the first power supply 11. The two ends of the LCR meter 14 are respectively connected to the two ends of the first power supply 11. The first power supply 11 can be a DC power meter. When the device under test is mounted on the device mounting position 13, the DC power meter is connected in series with the device under test, and the LCR meter 14 is connected in parallel with the device under test. The DC power meter and the LCR meter 14 respectively input DC and AC signals to the bias adapter 12 for integration and superposition, and then apply them to the device under test. By increasing the DC voltage signal, the LCR meter 14 measures the change in device capacitance during voltage change and collects the capacitance signal. This bias circuit structure 1 provides a stable DC and AC signal source for the device under test, ensuring that the process of the device's capacitance changing with the voltage in real time is successfully acquired.

[0123] In some embodiments of this application, the device further includes a first information processing mechanism electrically connected to the bias circuit structure 1. After acquiring the capacitance signal, the bias circuit structure 1 outputs it to the first information processing mechanism, and simultaneously outputs a bias signal to the first information processing mechanism. Upon receiving the bias signal and the capacitance signal, the first information processing mechanism processes the two signals and plots a capacitance-voltage change curve that reflects the change in capacitance with voltage. Specifically, the first information processing mechanism can be a computer.

[0124] Further, please refer to Figure 6 and 7 In some embodiments of this application, the device further includes a housing 4 with a light-shielding space, and the base is disposed within the light-shielding space. Thus, when the device under test, mounted on the device mounting position 13, emits light, the acquisition mechanism can successfully acquire the light signal, avoiding the influence of ambient light. The acquisition mechanism also includes a silicon photonics circuit structure 2, which is used to acquire the light information of the device under test after a bias voltage is applied. The light signal can be the brightness of light.

[0125] Specifically, the silicon photonics circuit structure 2 includes a second power supply 21 connected in series to form a loop, an ammeter 22, and a silicon photodiode 23. The silicon photodiode 23 is located on the light-emitting side of the device mounting position 13 and is used to collect the light information emitted by the device under test mounted on the device mounting position 13. The second power supply 21 can be a DC power meter. The silicon photodiode 23 is connected in series with the ammeter 22 and the DC power meter. The silicon photodiode 23 and the device under test are located inside the same dark box. The light emission direction of the device under test is directly facing the silicon photodiode 23. When the device under test emits light, the silicon photodiode 23 can collect the light information.

[0126] Furthermore, the device also includes a second information processing unit, which is electrically connected to the acquisition unit. This second information processing unit is used to establish a brightness-voltage change curve based on the bias signal output from the bias circuit structure 1 and the optical signal output from the silicon photodiode structure 2. The silicon photodiode 23 converts the detected optical signal into an electrical signal, which is recorded by the ammeter 22 and transmitted to the second information processing unit. The second information processing unit converts the electrical signal into a brightness value, thus generating the brightness-voltage curve in real time. The second information processing unit can be a computer.

[0127] In some embodiments, the first information processing unit and the second information processing unit may be the same information processing unit 3. In this way, the device structure is more streamlined, occupies less space, has lower cost, and can compare the CV curve and the brightness-voltage curve together, which is convenient for data analysis.

[0128] The technical solutions and effects of this application will be described in detail below through specific embodiments and comparative examples. The following embodiments are only some embodiments of this application and are not intended to limit this application in any specific way.

[0129] Example 1

[0130] A QLED device, see Figure 16 The QLED device includes a substrate 70, an anode 10, a hole injection layer 20, a hole transport layer 30, a light-emitting layer 40, an electron transport layer 50, and a cathode 60, which are stacked sequentially.

[0131] (1) Fabrication method of QLED device:

[0132] A glass substrate 70 with an ITO anode 10 is provided, wherein the thickness of the ITO anode 10 is 110 nm;

[0133] PEDOT:PSS material was spin-coated onto the anode 10 to obtain a hole injection layer 20 with a thickness of 35 nm.

[0134] CBP material is spin-coated onto the hole injection layer 20 to obtain a hole transport layer 30 with a thickness of 22 nm;

[0135] Green CdSn / ZnS quantum dot material was spin-coated onto the hole transport layer 30 to obtain a light-emitting layer 40 with a thickness of 21 nm.

[0136] ZnO material is spin-coated onto the light-emitting layer 40 to obtain an electron transport layer 50 with a thickness of 28 nm;

[0137] An Ag electrode is deposited on the electron transport layer 50 to obtain a cathode 60 with a thickness of 100 nm, thus obtaining a QLED device.

[0138] (2) Fabrication methods of resistive electronic devices

[0139] The device structure and fabrication method of resistive electronic devices are basically the same as those of QLED devices, with the only difference being in the fabrication method of resistive electronic devices:

[0140] An Au electrode is deposited on the electron transport layer 50 to obtain a cathode 60 with a thickness of 50 nm, thus obtaining an electron blocking device.

[0141] (3) Preparation method of hole blocking device

[0142] The structure and fabrication method of hole-blocking devices are basically the same as those of QLED devices, with the only difference being in the fabrication method of hole-blocking devices:

[0143] TFB material is spin-coated onto the hole injection layer 20 to obtain a hole transport layer 30 with a thickness of 27 nm.

[0144] (4) Types of excess carriers

[0145] Provide such as Figure 6 The detection device shown.

[0146] Install the QLED device in mounting position 13, turn on the first power supply 11 and the second power supply 21, and control the voltage of the first power supply 11 and the second power supply 21 to gradually increase in steps of 0.5V within the range of 0-8V. Collect the capacitance signal, light signal and voltage signal of the device, and plot the first CV curve and the brightness-voltage curve. Then install the blocking device in mounting position 13, turn on the first power supply 11 and the second power supply 21, and control the voltage of the first power supply 11 and the second power supply 21 to gradually increase in steps of 0.5V within the range of 0-8V. Collect the capacitance signal of the device and plot the second CV curve. Then install the hole blocking device in mounting position 13, turn on the first power supply 11 and the second power supply 21, and control the voltage of the first power supply 11 and the second power supply 21 to gradually increase in steps of 0.5V within the range of 0-8V. Collect the capacitance signal of the device and plot the third CV curve. Record the curves as follows. Figure 2 and Figure 3 As shown.

[0147] from Figure 8 As can be seen, the difference between the first voltage node V1 of the first CV curve (line 1) and the first voltage node of the CV curve (line 2) of the resistive electronic device is 0.01V, which is in the range of 0V-0.2V, indicating that the excess carriers in the QLED device are holes; and V2 is 2V.

[0148] from Figure 9 As can be seen from the brightness-voltage curve, when the voltage is greater than the second voltage node V2 (2V) of the first CV curve, the brightness shows an upward trend. Therefore, the turn-on voltage of this device is V2, i.e. 2.0V.

[0149] Example 2

[0150] The scheme in this embodiment is basically the same as that in embodiment 1, except that in this embodiment:

[0151] The light-emitting layer 40 is made of blue CdSn / ZnS quantum dots, which are spin-coated on the hole transport layer 30 to obtain a light-emitting layer 40 with a thickness of 25nm.

[0152] from Figure 10As can be seen, the difference between the first voltage node V1 of the first CV curve (line 1) and the first voltage node of the CV curve of the hole blocking device (line 3) is 0.1V, which is in the range of 0V-0.2V, indicating that the excess carriers in the QLED device are electrons.

[0153] Example 3

[0154] The scheme in this embodiment is basically the same as that in embodiment 1, except that in this embodiment:

[0155] The electron transport layer 50 is made of ZnMgO, which has a higher carrier mobility than ZnO, and the thickness of the electron transport layer 50 is reduced to 24 nm. Figure 11 It can be seen that the difference between the first voltage node V1 of the first CV curve (line 1) and the first voltage node of the CV curve of the resistive electronic device (line 2) is 0.01V, which is within the range of 0V-0.2V. This indicates that the excess carriers in the QLED device are holes. Furthermore, the capacitance amplitude of the second voltage node of the first CV curve (line 1) is much smaller than that of the second voltage node of the CV curve of the resistive electronic device (line 2). The capacitance amplitude of the second voltage node of the CV curve of the hole-blocking device (line 3) is even lower. This indicates that the injection of majority carriers, i.e., holes, inside the device is suppressed, and less charge accumulates at the interface, indicating that the carriers are gradually approaching a state of equilibrium.

[0156] Example 4

[0157] The scheme in this embodiment is basically the same as that in embodiment 1, except that in this embodiment:

[0158] Hole transport layer 30 was replaced with PVK, a material with a slightly shallower energy level than CBP, and its thickness was 20 nm. Figure 12 It can be seen that the difference between the first voltage node V1 of the first CV curve (line 1) and the first voltage node of the CV curve (line 2) of the resistive electronic device is 0.103V, which is in the range of 0V-0.2V, indicating that the excess carriers in the QLED device are holes.

[0159] Example 5

[0160] The scheme in this embodiment is basically the same as that in embodiment 1, except that in this embodiment:

[0161] Hole transport layer 30 was replaced with TCTA, a material with a slightly shallower energy level than CBP, and the thickness of hole transport layer 30 was 18 nm. From Figure 13It can be seen that the difference between the first voltage node V1 of the first CV curve (line 1) and the first voltage node of the CV curve (line 2) of the resistive electronic device is 0.09V, which is in the range of 0V-0.2V, indicating that the excess carriers in the QLED device are holes.

[0162] Example 6

[0163] The scheme in this embodiment is basically the same as that in embodiment 1, except that in this embodiment:

[0164] The emitting layer 40 is made of blue CdSn / ZnS quantum dots with a spin-coating thickness of 25 nm, while the electron transport layer 50 is made of ZnMgO with a spin-coating thickness of 24 nm. In this device, the excess carriers are electrons.

[0165] from Figure 14 As can be seen, the difference between the first voltage node V1 of the first CV curve (line 1) and the first voltage node of the CV curve (line 3) of the hole blocking device is 0.01V, which is within the range of 0V-0.2V, indicating that the excess carriers in the QLED device are electrons.

[0166] Comparative Example 1

[0167] This comparative device includes single-electronic devices (see...) Figure 17 ) and single-hole devices (see Figure 18 Compared to the conventional device in Example 1, the single-electron device structure lacks the hole injection layer 20 and hole transport layer 30, while all other conditions are identical. The single-hole device structure lacks the electron transport layer 50, while all other conditions are identical. This comparative example uses a conventional method to determine the type of excess carriers in the device. Specifically, a 2mA current is applied to both the single-electron and single-hole devices, allowing the devices to be continuously powered at this current, which constitutes power-on aging. During this process, the voltage change of the single-carrier device over time is monitored. If the voltage of the single-electron device is significantly higher than that of the single-hole device, the excess carriers are holes; otherwise, they are electrons.

[0168] See Figure 15 As can be seen from the figure, the voltage difference between the single-electron device (solid line) and the single-hole device (dashed line) is too small, and the voltage of the single-electron device is not constantly greater than that of the single-hole device, making it impossible to determine the type of excess carriers, thus proving the limitations of this judgment method.

[0169] The detection method and detection device for light-emitting diodes provided in the embodiments of this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A method for detecting a light-emitting diode, characterized in that, Includes the following steps: A device under test is provided, the device under test including a diode; Apply a bias voltage to the device under test; Obtain the first voltage node corresponding to the inflection point of the initial change in capacitance of the device under test when the voltage rises; Based on the first voltage node, determine the type of excess carriers in the diode; Wherein, the first voltage node includes V1 corresponding to the diode; the method for determining the type of excess carriers in the diode based on the first voltage node includes: providing a preset hole blocking voltage V2 and a preset electron blocking voltage V3, comparing V1, V2 and V3, and determining the type of excess carriers in the diode; The device under test further includes a hole-blocking device corresponding to the diode and an electron-blocking device corresponding to the diode; in the step of obtaining the first voltage node corresponding to the inflection point of the initial change in capacitance of the device under test when the voltage rises, the first voltage node of the diode is V1, the first voltage node of the hole-blocking device is V2, and the first voltage node of the electron-blocking device is V3; wherein, the hole-blocking device refers to a device that reduces hole transport capability by changing parameters, and the electron-blocking device refers to a device that reduces electron transport capability by changing parameters; The step of comparing V1, V2, and V3 to determine the type of excess carrier in the diode includes: when the absolute value of the difference between V1 and V2 is greater than or equal to 0 and less than or equal to 0.2V, the type of excess carrier in the diode is determined to be electron; when the absolute value of the difference between V1 and V3 is greater than or equal to 0 and less than or equal to 0.2V, the type of excess carrier in the diode is determined to be hole.

2. The detection method according to claim 1, characterized in that, The steps for obtaining the first voltage node corresponding to the inflection point of the initial change in capacitance of the device under test when the voltage rises include: Obtain the capacitance-voltage change curve of the device under test; Obtain the voltage value corresponding to the first inflection point in the capacitance-voltage change curve, where the voltage value is the first voltage node.

3. The detection method according to claim 2, characterized in that, The slope of the capacitance-voltage change curve at the first inflection point is greater than or equal to 0.

577.

4. The detection method according to claim 1, characterized in that, The steps for obtaining the first voltage node corresponding to the inflection point of the initial change in capacitance of the device under test when the voltage rises include: Obtain the first capacitance-voltage change curve of the diode, and obtain the voltage value corresponding to the first inflection point when the capacitance initially rises in the first capacitance-voltage change curve, wherein the voltage value is V1. Obtain the second capacitance-voltage change curve of the hole blocking device, and obtain the voltage value corresponding to the first inflection point when the capacitance initially rises in the second capacitance-voltage change curve, wherein the voltage value is V2. Obtain the third capacitance-voltage change curve of the resistive electronic device, and obtain the voltage value corresponding to the first inflection point when the capacitance initially rises in the third capacitance-voltage change curve, wherein the voltage value is V3.

5. The detection method according to claim 1, characterized in that, The step of applying a bias voltage to the device under test further includes: Obtain the second voltage node V' corresponding to the point where the capacitance of the diode reaches its maximum value when the voltage rises; Obtain information on the change in the light emission brightness of the diode as the voltage increases; When the luminous intensity increases when the voltage is greater than or equal to V', the minimum turn-on voltage of the diode is determined to be V'.

6. The detection method according to claim 5, characterized in that, After obtaining information on the change in the luminous intensity of the diode as the voltage increases, the method further includes: discarding the current detection result when the voltage is greater than or equal to V' and the luminous intensity is constant or decreases.

7. The detection method according to claim 1, characterized in that, In the step of applying a bias voltage to the device under test, the voltage range is 0~8V; and / or, The boost step size is 0.3~0.6V.

8. A detection device for light-emitting diodes (LEDs), used to implement the LED detection method according to any one of claims 1 to 7, characterized in that, include: A base having a device mounting position for placing the device to be tested; as well as, The acquisition mechanism includes a bias circuit structure, which is used to apply a bias voltage to the device under test at the device mounting position and acquire the capacitance signal of the device under test.

9. The detection device according to claim 8, characterized in that, The device mounting position has a first connection terminal and a second connection terminal. The bias circuit structure includes a first power supply, an LCR meter, and a bias adapter. One end of the bias adapter is connected to the first connection terminal, and the other end is connected to the first power supply. The second connection terminal is connected to the first power supply. The two ends of the LCR meter are respectively connected to the two ends of the first power supply; and / or, The device further includes a first information processing mechanism, which is electrically connected to the bias circuit structure and is used to establish a capacitance-voltage change curve based on the bias signal output by the bias circuit structure and the capacitance signal.

10. The detection device according to claim 8, characterized in that, The device also includes a housing with a light-proof space, and the base is disposed within the light-proof space; The acquisition mechanism also includes a silicon photonics circuit structure, which is used to acquire the optical information of the device under test after a bias voltage is applied to the device under test.

11. The detection device according to claim 10, characterized in that, The device mounting position has a light-emitting side; The silicon photonics circuit structure includes a second power supply, an ammeter, and a silicon photodiode connected in series to form a loop. The silicon photodiode is located on the light-emitting side of the device mounting position and is used to collect light information emitted by the device under test mounted on the device mounting position.

12. The detection device according to claim 10, characterized in that, The device further includes a second information processing mechanism, which is electrically connected to the acquisition mechanism and is used to establish a brightness-voltage change curve based on the bias signal output by the bias circuit structure and the light information output by the silicon photonics circuit structure.

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