LDO over-current protection circuit

Abstract

The application relates to the technical field of integrated circuits, in particular to an LDO overcurrent protection circuit which comprises an output sampling current, a current comparator and a reference current, the output end of the output sampling current is connected with the input end of the current comparator, the output end of the reference current is connected with the other input end of the current comparator, and the output end of the current comparator serves as an overcurrent protection signal; the current comparator comprises current scaling tubes MP4, MP5, MP6, MP7, MP8, MP9, MP10, MP11, MN3, MN4 and a resistor R1, the source end and the gate end of the MP4, the MP6 and the MP8 are connected respectively, and the source end and the gate end of the MP5, the MP7, the MP9 and the MP11 are connected respectively. The LDO overcurrent protection circuit adopts a novel current comparator to replace a traditional voltage comparator, so that the LDO overcurrent protection is more accurate and controllable, the overcurrent protection threshold point does not change with the resistance value, the structure is simpler, the performance of the LDO is improved, and the limitation of the traditional voltage comparator in the overcurrent protection circuit is solved.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, specifically to an LDO overcurrent protection circuit. Background Technology

[0002] LDO, or low dropout regulator, is a type of low-dropout linear regulator that converts a high-voltage input into a stable low-voltage output. Due to its advantages of low noise, low ripple, and low heat loss, LDOs are widely used in various applications. Overcurrent protection is a crucial function of LDOs, primarily protecting the power system from overcurrent damage. When the LDO's output current exceeds a certain range, the overcurrent protection function automatically activates, shutting down the LDO to prevent further current increases.

[0003] Existing LDO overcurrent protection technologies such as Figure 6 As shown, the main process involves sampling the output current of the LDO, converting it into a voltage signal through a resistor, and then comparing it with the reference voltage inside the chip using a voltage comparator to obtain an overcurrent protection signal. The overcurrent protection signal is then used to determine whether the LDO function needs to be turned off.

[0004] The problem with this technology is that it requires a reference voltage circuit and a voltage comparator circuit, which makes the structure relatively complex. In addition, the internal resistance of the chip has a large dispersion value due to the fluctuation of integrated circuit process, and the temperature characteristics are also poor. This leads to a large dispersion of the overcurrent protection point, which limits it in some precise applications. Based on this, we have developed a new type of LDO overcurrent protection circuit. Summary of the Invention

[0005] The purpose of this invention is to provide an LDO overcurrent protection circuit to solve the problems mentioned in the background art.

[0006] To achieve the above objectives, the present invention provides the following technical solution: an LDO overcurrent protection circuit, comprising an output sampling current, a current comparator, and a reference current, wherein the output terminal of the output sampling current is connected to the input terminal of the current comparator, the output terminal of the reference current is connected to another input terminal of the current comparator, and the output terminal of the current comparator serves as an overcurrent protection signal;

[0007] The current comparator includes current scaling transistors MP4, MP5, MP6, MP7, MP8, MP9, MP10, MP11, and MP12, resistor R1, and MN3 and MN4.

[0008] The source terminals of MP4, MP6, MP8, MP10, and MP12 are connected and connected to a power supply. The gate terminals of MP4, MP6, and MP8 are connected in sequence. The gate-drain terminal of MP4 is short-circuited. The gate-drain terminal of MP4 is connected to the source terminal of MP5. The gate-drain terminal of MP5 is connected. The drain terminal of MP6 is connected to the source terminal of MP7. The gate terminals of MN4 and MN3 are connected, and their source terminals are connected and grounded. The drain terminal of MN4 is connected to the drain terminal of MP7. The gate-drain terminal of MN3 is short-circuited and connected to the drain terminal of MP9. The drain terminal of MP8 is connected to the source terminal of MP9, and is also connected to the gate terminals of MP10 and MP12, and connected to the output sampling current output terminal. The drain terminal of MP10 is connected to the source terminal of MP11. The drain terminal of MP11 is connected to the positive terminal of resistor R1 and serves as the output terminal of the overcurrent protection signal. The negative terminal of resistor R1 is grounded. The gate terminals of MP5, MP7, MP9, and MP11 are connected in sequence.

[0009] In a preferred embodiment, the current comparator further includes MN5, which replaces resistor R1.

[0010] In a preferred embodiment, the aspect ratio of the current scaling transistor MP4 to MP6, and the aspect ratio of MP5 to MP7 are 1:A; the aspect ratio of MN4 to MN3 is B:1; the aspect ratio of MP4 to MP8 is 1:C; and the aspect ratio of MP5 to MP9 is 1:A, where A, B, and C represent proportional figures.

[0011] In a preferred embodiment, the current of MN3 is The current of the MP8 is , where I REF The reference current;

[0012] when hour,

[0013] ,

[0014] Right now , where I SAMPLE This is the sampling current.

[0015] In a preferred embodiment, the output sampling current includes an LDO output driver transistor MP0, an LDO output current sampling transistor MP1, output current bias transistors MP2 and MP3, a resistor R0, and output current adjustment transistors MN0 and MN1. The source terminals of the LDO output driver transistor MP0 and the LDO output current sampling transistor MP1 are connected and connected to a power supply, and their gate terminals and drain terminals are connected. The gate terminals of the output current bias transistors MP2 and MP3 are connected, and their source terminals are connected and connected to the drain terminals of MP0 and MP1. The gate and drain terminals of MP2 are short-circuited and connected to the positive terminal of the resistor R0, and the negative terminal of the resistor R0 is grounded. The gate terminals of the output current adjustment transistors MN0 and MN1 are connected, and their source terminals are connected and grounded. The gate and drain terminals of the output current adjustment transistor MN0 are short-circuited and connected to the drain terminal of MP3.

[0016] In a preferred embodiment, the output sampling current further includes a bias current transistor MN2, which is used to replace the resistor R0.

[0017] In a preferred embodiment, the width-to-length ratio of the LDO output drive transistor MP0 and the LDO output current sampling transistor MP1 is N:1, and the width-to-length ratio of the output current adjustment transistors MN0 and MN1 is 1:M, where N and M represent proportional figures.

[0018] In a preferred embodiment, the sampling current is obtained using MNO and MN1, which have a width-to-length ratio of 1:M. .

[0019] Compared with the prior art, the present invention has the following beneficial effects: The present invention provides an LDO overcurrent protection circuit, which uses a novel current comparator to replace the traditional voltage comparator, making the LDO overcurrent protection more accurate and controllable. Its overcurrent protection threshold does not change with the resistance value, and the structure is also simpler, improving the performance of the LDO and solving the limitations of the traditional voltage comparator in overcurrent protection circuits. Attached Figure Description

[0020] Figure 1 This is a block diagram of the present invention;

[0021] Figure 2 This is a circuit diagram of the current comparator in this invention;

[0022] Figure 3 This is a circuit diagram of another form of current comparator in this invention;

[0023] Figure 4 This is a circuit diagram of the output sampling current generation circuit in this invention;

[0024] Figure 5The circuit diagram shows another form of the output sampling current generation circuit of the present invention;

[0025] Figure 6 This is a block diagram of the overcurrent protection current of a traditional LDO. Detailed Implementation

[0026] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0027] Please see Figure 1-5 The present invention provides a technical solution: an LDO overcurrent protection circuit, including an output sampling current, a current comparator and a reference current, wherein the output terminal of the output sampling current is connected to the input terminal of the current comparator, the output terminal of the reference current is connected to the other input terminal of the current comparator, and the output terminal of the current comparator serves as an overcurrent protection signal.

[0028] The current comparator includes current scaling transistors MP4, MP5, MP6, MP7, MP8, MP9, MP10, MP11, and MP12, resistor R1, and MN3 and MN4.

[0029] The source terminals of MP4, MP6, MP8, MP10, and MP12 are connected and connected to the power supply. The gate terminals of MP4, MP6, and MP8 are connected in sequence. The gate-drain terminal of MP4 is shorted. The gate-drain terminal of MP4 is connected to the source terminal of MP5. The gate-drain terminal of MP5 is connected. The drain terminal of MP6 is connected to the source terminal of MP7. The gate terminals of MN4 and MN3 are connected, and their source terminals are connected and grounded. The drain terminal of MN4 is connected to the drain terminal of MP7. The gate-drain terminal of MN3 is shorted and connected to the drain terminal of MP9. The drain terminal of MP8 is connected to the source terminal of MP9, and is also connected to the gate terminals of MP10 and MP12, and connected to the output sampling current output terminal. The drain terminal of MP10 is connected to the source terminal of MP11. The drain terminal of MP11 is connected to the positive terminal of resistor R1 and serves as the output terminal of the overcurrent protection signal. The negative terminal of resistor R1 is grounded. The gate terminals of MP5, MP7, MP9, and MP11 are connected in sequence.

[0030] Furthermore, the aspect ratio of current scaling transistors MP4 to MP6, and MP5 to MP7, is 1:A; the aspect ratio of MN4 to MN3 is B:1; the aspect ratio of MP4 to MP8 is 1:C; and the aspect ratio of MP5 to MP9 is 1:A, where A, B, and C represent proportional figures. Therefore, the current of MN3 is... The current of MP8 is , where I REF The reference current;

[0031] when hour,

[0032] ,

[0033] Right now , where I SAMPLE For sampling current;

[0034] when When the current of MP8 increases, the gate voltage of MP10 decreases, the current of MP10 increases, the current of resistor R1 also increases, the overcurrent protection signal will output a high level, and at the same time, because the current of MP12 increases, the voltage of VB terminal will be pulled high, and the LDO driver transistor MP0 will be turned off, forming an overvoltage protection function.

[0035] In specific implementation, such as Figure 3 In the circuit shown, replacing resistor R1 with bias current transistor MN5 can provide a stable bias current, reduce power consumption and cost, and make the overcurrent protection signal output more reliable.

[0036] In specific implementation, the output sampling current includes LDO output driver transistor MP0, LDO output current sampling transistor MP1, output current bias transistors MP2 and MP3, resistor R0, and output current adjustment transistors MN0 and MN1. The source terminals of LDO output driver transistor MP0 and LDO output current sampling transistor MP1 are connected and connected to the power supply, and their gate terminals and drain terminals are connected. The gate terminals of output current bias transistors MP2 and MP3 are connected, and their source terminals are connected and connected to the drain terminals of MP0 and MP1. The gate and drain terminals of MP2 are short-circuited and connected to the positive terminal of resistor R0, and the negative terminal of resistor R0 is grounded. The gate terminals of output current adjustment transistors MN0 and MN1 are connected, and their source terminals are connected and grounded. The gate and drain terminals of output current adjustment transistor MN0 are short-circuited and connected to the drain terminal of MP3.

[0037] In this invention, the width-to-length ratio of the LDO output driver transistor MP0 and the LDO output current sampling transistor MP1 is N:1, and the width-to-length ratio of the output current adjustment transistors MN0 and MN1 is 1:M. Here, N and M represent proportional figures. Because the output current of LDOs is typically large, the structure of this invention first uses PMOS sampling transistors with a ratio of N:1 to adjust the LDO output current according to... The proportional sampling is achieved through a circuit structure composed of R0, MP2, and MP3, allowing the current flowing through MP1 to be sampled proportionally. The sampling current is precisely equal to the current flowing through MN0, and the influence of the LDO output voltage on the sampling current is avoided. Using MNO and MN1 with a width-to-length ratio of 1:M, the sampling current is obtained as follows: This current is the proportionally controllable LDO sampling current obtained by the structure of this invention.

[0038] In specific implementation, such as Figure 5 In the circuit shown, in order to reduce the operating power consumption of the LDO, the resistance of R0 needs to be relatively large, which will result in a large area of ​​R0 and high cost. Therefore, the bias current transistor MN2 is used to replace the resistor R0, which can provide a stable bias current and reduce power consumption and cost.

[0039] This LDO overcurrent protection circuit replaces the traditional voltage comparator with a current comparator. The current comparator consists of multiple current-scaling transistors and resistors, and outputs a sampled current as a reference signal for comparison. Internally, this sampled current is compared with a reference current. When the output sampled current exceeds the reference current, the current comparator outputs an overcurrent protection signal. The key lies in the design of the current comparator, where the operating state of the current-scaling transistors is affected by the current. By changing the gate voltage of the current-scaling transistors, their on-resistance can be precisely controlled, thereby achieving precise control of the overcurrent protection threshold. Compared to traditional voltage comparators, this current comparator offers higher accuracy and stability because it directly compares the output sampled current without needing to convert it to a voltage signal via resistors. Therefore, it is not affected by resistor manufacturing variations or temperature changes.

[0040] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. An LDO overcurrent protection circuit, characterized in that, It includes an output sampling current, a current comparator, and a reference current. The output terminal of the output sampling current is connected to the input terminal of the current comparator, the output terminal of the reference current is connected to the other input terminal of the current comparator, and the output terminal of the current comparator serves as an overcurrent protection signal. The current comparator includes current scaling transistors MP4, MP5, MP6, MP7, MP8, MP9, MP10, MP11, and MP12, resistor R1, and MN3 and MN4. The source terminals of MP4, MP6, MP8, MP10, and MP12 are connected and connected to a power supply. The gate terminals of MP4, MP6, and MP8 are connected in sequence. The gate-drain terminal of MP4 is short-circuited. The gate-drain terminal of MP4 is connected to the source terminal of MP5. The gate-drain terminal of MP5 is connected. The drain terminal of MP6 is connected to the source terminal of MP7. The gate terminals of MN4 and MN3 are connected, and their source terminals are connected and grounded. The drain terminal of MN4 is connected to the drain terminal of MP7. The gate-drain terminal of MN3 is short-circuited and connected to the drain terminal of MP9. The drain terminal of MP8 is connected to the source terminal of MP9, and is also connected to the gate terminals of MP10 and MP12, and connected to the output sampling current output terminal. The drain terminal of MP10 is connected to the source terminal of MP11. The drain terminal of MP11 is connected to the positive terminal of resistor R1 and serves as the output terminal of the overcurrent protection signal. The negative terminal of resistor R1 is grounded. The gate terminals of MP5, MP7, MP9, and MP11 are connected in sequence. The output sampling current includes an LDO output driver transistor MP0, an LDO output current sampling transistor MP1, output current bias transistors MP2 and MP3, a resistor R0, and output current adjustment transistors MN0 and MN1. The source terminals of the LDO output driver transistor MP0 and the LDO output current sampling transistor MP1 are connected and connected to a power supply, and their gate terminals and drain terminals are connected. The gate terminals of the output current bias transistors MP2 and MP3 are connected, and their source terminals are connected and connected to the drain terminals of MP0 and MP1. The gate and drain terminals of MP2 are short-circuited and connected to the positive terminal of the resistor R0, and the negative terminal of the resistor R0 is grounded. The gate terminals of the output current adjustment transistors MN0 and MN1 are connected, and their source terminals are connected and grounded. The gate and drain terminals of the output current adjustment transistor MN0 are short-circuited and connected to the drain terminal of MP3.

2. The LDO overcurrent protection circuit according to claim 1, characterized in that: The current comparator also includes MN5, which replaces resistor R1.

3. The LDO overcurrent protection circuit according to claim 2, characterized in that: The aspect ratio of the current scaling transistors MP4 to MP6, and the aspect ratio of MP5 to MP7 are 1:A; the aspect ratio of MN4 to MN3 is B:1; the aspect ratio of MP4 to MP8 is 1:C; and the aspect ratio of MP5 to MP9 is 1:A, where A, B, and C represent proportional figures.

4. An LDO overcurrent protection circuit according to claim 3, characterized in that: The current of MN3 is The current of the MP8 is , where I REF The reference current; when hour, ， Right now , where I SAMPLE This is the sampling current.

5. An LDO overcurrent protection circuit according to claim 4, characterized in that: The output sampling current also includes a bias current transistor MN2, which is used to replace resistor R0.

6. An LDO overcurrent protection circuit according to claim 5, characterized in that: The width-to-length ratio of the LDO output drive transistor MP0 and the LDO output current sampling transistor MP1 is N:1, and the width-to-length ratio of the output current adjustment transistors MN0 and MN1 is 1:M, where N and M represent proportional figures.

7. An LDO overcurrent protection circuit according to claim 6, characterized in that: Using MNO and MN1, which have a width-to-length ratio of 1:M, the sampling current is obtained as follows: .

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