A retinal-like bionic circuit for frequency encoding of light intensity

CN118095388BActive Publication Date: 2026-10-20SUN YAT SEN UNIV
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Patent Information

Application Number
CN202410102582.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-01-24
Publication Date
2026-10-20
Estimated Expiration
2044-01-24

AI Technical Summary

Technical Problem

[0007]1.现有的光电类神经形态传感器所采用的工艺和材料往往与标准CMOS工艺兼容性差,不利于与相对成熟的硅基神经形态计算芯片集成

Benefits of technology

[0027]1.采用与CMOS工艺兼容的PD-MOS结构作为感光部件,使得仿生电路能够与相对成熟的硅基神经形态计算芯片高度集成。

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Abstract

The application discloses a kind of frequency coding of light intensity retinal analog circuit, it is related to neural morphological optoelectronic device for the prior art single polarity problem proposes the present scheme. Including two parallel neural channels;The pulse signal frequency of first neural channel output rises with light intensity, the pulse signal frequency of second neural channel output falls with light intensity. Advantage lies in: compatible with CMOS process, can be highly integrated with relatively mature silicon-based neural morphological computing chip. It can be generated by exchanging the position of PD-MOS and ordinary MOSFET respectively the pulse frequency that is positively correlated and negatively correlated with light intensity, to simulate the function of ON type and OFF type bipolar cell in retina, to provide two kinds of information of bright vision and dark vision respectively, to improve the sensitivity and contrast of light perception. By adjusting the bias current of current mirror, the size of excitation current can be adjusted, and the frequency of pulse emission can be changed, with gain modulation function.
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Description

Technical Field

[0001] This invention relates to neuromorphic optoelectronic devices, and more particularly to a retina-like bionic circuit that frequency-encodes light intensity. Background Technology

[0002] Neuromorphic electronics simulates key functions of biological nervous systems, and its neuromorphic in-memory computing method has significant advantages in terms of computational power consumption and storage overhead compared to the traditional von Neumann computing architecture. After years of development, neuromorphic computing has yielded silicon-based neuromorphic computing chips such as TrueNorth, Loihi, and Tianjic. However, to realize a complete neuromorphic artificial intelligence perception system, corresponding neuromorphic sensors and receptors are needed, and data needs to be encoded in the form of neural impulses.

[0003] Taking optoelectronic sensing devices as an example, existing hardware implementations for converting light signals into electrical pulses mainly include transistors based on heterojunction channels, floating gates, metal-oxide-semiconductor transistors, memristors, and devices based on phase change materials or ferroelectric materials. On the one hand, the fabrication processes of these devices are mostly incompatible with standard CMOS processes, making integration with backend computing chips difficult. On the other hand, these optoelectronic devices often only have one polarity response to changes in light intensity, meaning the pulse firing frequency only increases with increasing light intensity. However, the retina can achieve two polarities of response—excitation under illumination and inhibition under illumination—through its ON-type and OFF-type bipolar cells, respectively. This mechanism enhances light sensitivity and contrast.

[0004] Cross-sectional images and structures of IGZO-type synaptic transistors observed using transmission electron microscopy (TEM) are shown below. Figure 1 and Figure 2 shown. (Duan N, Li Y, Chiang HC, et al. An electro-photo-sensitive synaptictransistor for edge neuromorphic visual systems [J]. Nanoscale, 2019, 11(38): 17590-17599.)

[0005] ON-type and OFF-type parallel transmission channel principle (S. The Central Nervous System: Structure and Function by Per Brodal.Oxford University Press,New York,1992,ISBN 0-19-505518-7,xi+464pp.$39.95(cloth).[J].Journal of Neurochemistry,1994,63(1).DOI:10.1046 / j.1471-4159.1994.63010390.x.), such as Figure 3 As shown.

[0006] The existing technology mainly has the following technical problems:

[0007] 1. The existing optoelectronic neuromorphic sensors often use processes and materials that are incompatible with standard CMOS processes, which is not conducive to integration with relatively mature silicon-based neuromorphic computing chips.

[0008] 2. Existing photoelectric neuromorphic sensors often only produce a single polarity response, while the two types of bipolar cells in the retina can produce both excitation and inhibition responses to light to improve light sensitivity and contrast.

[0009] 3. Existing neuromorphic devices still use traditional ADCs for their back-end readout circuits instead of pulse spike outputs. Summary of the Invention

[0010] The purpose of this invention is to provide a retina-like bionic circuit that performs frequency encoding of light intensity, so as to solve the problems existing in the prior art.

[0011] The present invention describes a retina-like bionic circuit for frequency encoding of light intensity, comprising two parallel neural channels; the frequency of the pulse signal output by the first neural channel increases with light intensity, and the frequency of the pulse signal output by the second neural channel decreases with light intensity.

[0012] Each neural pathway includes:

[0013] Output unit: Used to output pulse signals whose frequency is related to the light intensity;

[0014] Photosensitive unit: used to adjust the output frequency of the output unit according to the light intensity;

[0015] Bias current source: used to provide an adjustable bias current to the photosensitive unit to adjust the sensitivity and gain of the photosensitive unit.

[0016] The output units in the two neural pathways have the same structure, each including a capacitor and the first to fifth MOS transistors;

[0017] The source of the first MOSFET is connected to VDD. The drain of the first MOSFET is connected to the lower plate of the capacitor, the gate of the second MOSFET, and the gate of the fourth MOSFET at the same point and then connected to the output terminal of the photosensitive unit. The gate of the first MOSFET is connected to the upper plate of the capacitor, the drain of the third MOSFET, and the drain of the fifth MOSFET at the same point and then serves as the output terminal of the output unit.

[0018] The source of the second MOSFET is connected to VDD, and the drain of the second MOSFET is connected to the gate of the third MOSFET, the drain of the fourth MOSFET, and the gate of the fifth MOSFET, respectively.

[0019] The source of the third MOSFET is connected to VDD; the source of the fourth MOSFET is grounded; and the source of the fifth MOSFET is grounded.

[0020] The first photosensitive unit includes a sixth MOS transistor and a seventh MOS transistor, wherein the seventh MOS transistor is a PD-MOS structure;

[0021] The drain, gate, and gate of the sixth MOSFET are connected to the output terminal of the first bias current source after they reach a common point; the source of the sixth MOSFET is grounded.

[0022] The drain of the seventh MOSFET serves as the output terminal of the photosensitive unit, the source of the seventh MOSFET is grounded, and the PD cathode of the seventh MOSFET is externally biased.

[0023] The second photosensitive unit includes an eighth MOS transistor and a seventh MOS transistor, wherein the seventh MOS transistor is a PD-MOS structure;

[0024] The drain, gate, and gate of the eighth MOSFET are connected to the output terminal of the second bias current source after they reach a common point; the source of the eighth MOSFET is grounded.

[0025] The drain of the ninth MOSFET serves as the output terminal of the photosensitive unit, the source of the ninth MOSFET is grounded, and the PD cathode of the eighth MOSFET is externally biased.

[0026] The retina-like bionic circuit for frequency encoding of light intensity described in this invention has the following advantages:

[0027] 1. The use of a PD-MOS structure compatible with CMOS technology as the photosensitive component enables the bionic circuit to be highly integrated with the relatively mature silicon-based neuromorphic computing chip.

[0028] 2. By using a PD-MOS transistor as a current mirror to generate an excitation current related to light intensity, it is possible to generate pulse frequencies positively and negatively correlated with light intensity by swapping the positions of the PD-MOS and ordinary MOSFET, thereby simulating the function of ON-type and OFF-type bipolar cells in the retina. This achieves the provision of both bright and dark vision information to improve the sensitivity and contrast of light perception.

[0029] 3. The magnitude of the excitation current can be adjusted by adjusting the bias current of the current mirror, thereby changing the frequency of pulse delivery and enabling it to have gain modulation function.

[0030] 4. This circuit can operate in the subthreshold region and is powered by a lower supply voltage, thus achieving low power consumption. Attached Figure Description

[0031] Figure 1 This is a cross-sectional image of an IGZO-type synaptic transistor as observed using a transmission electron microscope (TEM) in the prior art.

[0032] Figure 2 This is a schematic diagram of the three-dimensional structure of IGZO-type synaptic transistors in the prior art.

[0033] Figure 3 This is a schematic diagram illustrating the principle of ON / OFF type parallel transmission channels in biological visual nerves.

[0034] Figure 4 This is a schematic diagram of the structure of the bionic circuit described in this invention.

[0035] Figure 5 This is a schematic diagram of the output unit described in this invention.

[0036] Figure 6 This is a schematic diagram of the structure of the first photosensitive unit in this invention.

[0037] Figure 7 This is a schematic diagram of the structure of the second photosensitive unit in this invention.

[0038] Figure 8 This is a timing simulation curve of the pulse generation of the bionic circuit described in this invention.

[0039] Figure 9 This is a simulation curve of the pulse frequency of the first neural channel in this invention changing with PD photocurrent.

[0040] Figure 10 This is a simulation curve of the pulse frequency of the second neural channel in this invention as a function of PD photocurrent.

[0041] Figure label:

[0042] i1 - First bias current source, i2 - Second bias current source;

[0043] X1 - Node connecting the output end of the first photosensitive unit to the input end of the first output unit; X2 - Node connecting the output end of the second photosensitive unit to the input end of the second output unit; Xn - Node connecting the output end of the photosensitive unit to the input end of the output unit, where n is the neural channel number.

[0044] Y1 - Node at the output end of the first output unit, Y2 - Node at the output end of the second output unit, Yn - Node at the output end of the output unit, where n is the neural channel number;

[0045] M1 to M9 are the first to ninth MOSFETs;

[0046] C1 - Capacitor. Detailed Implementation

[0047] The retina-like bionic circuit for frequency encoding of light intensity described in this invention includes two parallel neural channels; the frequency of the pulse signal output by the first neural channel increases with light intensity, while the frequency of the pulse signal output by the second neural channel decreases with light intensity.

[0048] Each neural pathway includes:

[0049] Output unit: Used to output pulse signals whose frequency is related to the light intensity;

[0050] Photosensitive unit: used to adjust the output frequency of the output unit according to the light intensity;

[0051] Bias current source: used to provide an adjustable bias current to the photosensitive unit to adjust the sensitivity and gain of the photosensitive unit.

[0052] The output units in the two neural pathways have the same structure, each including a capacitor C1 and the first MOS transistor M1 to the fifth MOS transistor M5.

[0053] The source of the first MOSFET M1 is connected to VDD. The drain of the first MOSFET M1 is connected to the lower plate of capacitor C1, the gate of the second MOSFET M2, and the gate of the fourth MOSFET M4 at the same point and then connected to the output terminal of the photosensitive unit. The gate of the first MOSFET M1 is connected to the upper plate of capacitor C1, the drain of the third MOSFET M3, and the drain of the fifth MOSFET M5 at the same point and then used as the output terminal of the output unit.

[0054] The source of the second MOSFET M2 is connected to VDD, and the drain of the second MOSFET M2 is connected to the gate of the third MOSFET M3, the drain of the fourth MOSFET M4, and the gate of the fifth MOSFET M5, respectively.

[0055] The source of the third MOSFET M3 is connected to VDD; the source of the fourth MOSFET M4 is grounded; and the source of the fifth MOSFET M5 is grounded.

[0056] The first photosensitive unit includes a sixth MOSFET M6 and a seventh MOSFET M7, wherein the seventh MOSFET M7 is a PD-MOS structure;

[0057] The drain and gate of the sixth MOSFET M6 and the gate of the seventh MOSFET M7 are connected to the output terminal of the first bias current source i1 after they are at the same point; the source of the sixth MOSFET M6 is grounded.

[0058] The drain of the seventh MOSFET M7 serves as the output terminal of the photosensitive unit, the source of the seventh MOSFET M7 is grounded, and the PD cathode of the seventh MOSFET M7 is externally biased.

[0059] The second photosensitive unit includes an eighth MOSFET M8 and a seventh MOSFET M7, wherein the seventh MOSFET M7 is a PD-MOS structure;

[0060] The drain and gate of the eighth MOSFET M8 and the gate of the ninth MOSFET M9 are connected to the output terminal of the second bias current source i2 after they are at the same point; the source of the eighth MOSFET M8 is grounded.

[0061] The drain of the ninth MOSFET M9 serves as the output terminal of the photosensitive unit, the source of the ninth MOSFET M9 is grounded, and the PD cathode of the eighth MOSFET M8 is externally biased.

[0062] The PD-MOS structure includes a MOSFET and a PD, and its specific structure and working principle are disclosed in CN112510058A.

[0063] The second MOSFET M2 to the fifth MOSFET M5 form a two-stage inverter.

[0064] The principle of the pulse generation circuit is as follows: The PD-MOS sensor generates a corresponding pull-down excitation current to discharge node Xn according to different light intensities. When the voltage at point Xn reaches the switching voltage of the two-stage inverter, the potential of node Yn drops more drastically, forming positive feedback to node Xn through capacitor C1, thereby accelerating the potential drop of node Xn. When the potential of node Yn drops to the point where the reset current of the fifth MOS transistor M5 is much greater than the excitation current, the negative feedback current pulled up by the fifth MOS transistor M5 causes node Xn to rise. During the rise, the positive feedback of the two-stage inverter is triggered, quickly restoring it to the resting potential, completing one cycle. The larger the excitation current, the faster the discharge speed, and therefore the higher the frequency of pulse generation. Pulse simulation is as follows. Figure 8 As shown.

[0065] PD-MOS itself can generate photocurrent positively correlated with light intensity. Therefore, connecting the drain of the seventh MOS transistor M7 to node X1 can generate pulses positively correlated with light intensity, simulating photoreceptors and ON-type bipolar cells in the retina. Conversely, to generate photocurrent negatively correlated with light intensity, a circuit structure similar to a current mirror is used. A constant current bias causes the PD-MOS to generate a fixed VGS-VTH. When the light intensity increases, the threshold voltage decreases. Since VGS-VTH is clamped by the current bias, the VGS of the PD-MOS also decreases, causing the excitation current generated by the ninth MOS transistor M9 to decrease, simulating photoreceptors and OFF-type bipolar cells in the retina.

[0066] When the current bias is changed, the mirrored excitation current generated by the current mirror also changes accordingly, thus changing the pulse frequency. Simulation results are as follows: Figure 9 and Figure 10 As shown, the current bias is provided by the PMOS, and the bias current passes through the |V| of the PMOS. gs Adjustments are made.

[0067] For those skilled in the art, various other corresponding changes and modifications can be made based on the technical solutions and concepts described above, and all such changes and modifications should fall within the protection scope of the claims of this invention.

Claims

1. A retina-like bionic circuit for frequency encoding of light intensity, characterized in that, It includes two parallel neural channels; the frequency of the pulse signal output by the first neural channel increases with light intensity, while the frequency of the pulse signal output by the second neural channel decreases with light intensity. The output units in the two neural pathways have the same structure, each including a capacitor (C1) and the first MOS transistor (M1) to the fifth MOS transistor (M5). The source of the first MOSFET (M1) is connected to VDD. The drain of the first MOSFET (M1) is connected to the lower plate of the capacitor (C1), the gate of the second MOSFET (M2), and the gate of the fourth MOSFET (M4) at the same point and then connected to the output terminal of the photosensitive unit. The gate of the first MOSFET (M1) is connected to the upper plate of the capacitor (C1), the drain of the third MOSFET (M3), and the drain of the fifth MOSFET (M5) at the same point and then used as the output terminal of the output unit. The source of the second MOSFET (M2) is connected to VDD, and the drain of the second MOSFET (M2) is connected to the gate of the third MOSFET (M3), the drain of the fourth MOSFET (M4), and the gate of the fifth MOSFET (M5), respectively. The source of the third MOSFET (M3) is connected to VDD; the source of the fourth MOSFET (M4) is grounded; and the source of the fifth MOSFET (M5) is grounded.

2. The retina-like bionic circuit for frequency encoding of light intensity according to claim 1, characterized in that, Each neural pathway includes: Output unit: Used to output pulse signals whose frequency is related to the light intensity; Photosensitive unit: used to adjust the output frequency of the output unit according to the light intensity; Bias current source: used to provide an adjustable bias current to the photosensitive unit to adjust the sensitivity and gain of the photosensitive unit.

3. The retina-like bionic circuit for frequency encoding of light intensity according to claim 2, characterized in that, The first photosensitive unit includes a sixth MOS transistor (M6) and a seventh MOS transistor (M7), wherein the seventh MOS transistor (M7) is a PD-MOS structure; The drain of the sixth MOSFET (M6), the gate of the sixth MOSFET (M6), and the gate of the seventh MOSFET (M7) are connected to the output terminal of the first bias current source (i1) after they are at the same point; The source of the sixth MOSFET (M6) is grounded; The drain of the seventh MOSFET (M7) serves as the output terminal of the photosensitive unit, the source of the seventh MOSFET (M7) is grounded, and the PD cathode of the seventh MOSFET (M7) is externally biased.

4. The retina-like bionic circuit for frequency encoding of light intensity according to claim 2, characterized in that, The second photosensitive unit includes an eighth MOS transistor (M8) and a seventh MOS transistor (M7), wherein the seventh MOS transistor (M7) is a PD-MOS structure; The drain of the eighth MOSFET (M8), the gate of the eighth MOSFET (M8), and the gate of the ninth MOSFET (M9) are connected to the output terminal of the second bias current source (i2) after they are at the same point; the source of the eighth MOSFET (M8) is grounded; The drain of the ninth MOSFET (M9) serves as the output terminal of the photosensitive unit, the source of the ninth MOSFET (M9) is grounded, and the PD cathode of the eighth MOSFET (M8) is externally biased.

Citation Information

Patent Citations

  • Integrated photoelectric sensor and preparation method thereof

    CN112510058A