Injection molded solder head with improved sealing properties

Abstract

An apparatus for injecting solder material into a via located in a top surface of a wafer is provided. The apparatus includes an injection head having a contact surface for contacting the top surface of the wafer, and at least one aperture for injecting solder material into the via through the injection head. The apparatus also includes a venting device connected to the injection head for venting gas from the via. The injection head has a chamfered portion on an edge of the contact surface that contacts the top surface of the wafer.

Description

Technical Field

[0001] This invention generally relates to integrated circuits, and more particularly to injection-molded solder heads with improved sealing performance. Background Technology

[0002] Injection molding soldering (IMS) is a solder bump formation technology used in the field of electronic packaging. In this technology, solder bumps are created by injecting molten solder into through-holes formed in a photoresist layer on a silicon wafer.

[0003] One of the challenges in fine-pitch bump formation using IMS is the variation in solder bump height. As the bump pitch decreases, the bump height also decreases. Therefore, even minute height variations on the order of a few micrometers become significant. Bump height variations can lead to electrical short circuits, interconnect dewetting, and other mechanical failures.

[0004] The IMS head is made of rubber covered with a thin PTFE sheet. Surface analysis of the IMS head shows that the surface roughness can reach tens of micrometers at room temperature. Since the height of the solder bumps is determined by the surface scraping of the molten solder by the IMS head, the surface roughness of the head is directly reflected in the variation of the solder bump height.

[0005] Another challenge in fine-pitch IMS is the lack of solder in through-holes. Injecting molten solder into smaller holes becomes increasingly difficult due to the surface tension of the molten solder and the residual gas pressure in the through-hole.

[0006] One solution to this problem is to increase the injection pressure. However, as the injection pressure increases, the load applied to the head also needs to be increased to prevent solder leakage. The increased load improves the vacuum seal and thus reduces the residual gas pressure in the via. However, the higher load increases friction between the head and the wafer, leading to premature degradation of the head rubber. Summary of the Invention

[0007] According to one aspect of the invention, an apparatus is provided for injecting solder material into a through-hole located on the top surface of a wafer. The apparatus includes an injection head having a contact surface for contacting the top surface of the wafer, and at least one orifice for injecting solder material into the through-hole through the injection head. The apparatus also includes an venting device connected to the injection head for discharging gas from the through-hole. The injection head has a chamfered portion at the edge of the contact surface contacting the top surface of the wafer.

[0008] According to another aspect of the invention, an apparatus is provided for injecting solder material into a through-hole located on the top surface of a wafer. The apparatus includes an injection head having a contact surface for contacting the top surface of the wafer, and a plurality of holes for injecting solder material into the through-hole through one or more solder grooves of the injection head. The apparatus also includes an venting device connected to the injection head for discharging gas from the through-hole. The injection head has a chamfered portion on the edge of the contact surface contacting the top surface of the wafer and a chamfered portion contacting at least one of the plurality of holes.

[0009] According to another aspect of the invention, a method is provided for injecting solder material into a through-hole located in the top surface of a wafer. The method includes venting gas from the through-hole through an venting device. The method further includes injecting solder material into the through-hole through an injection head connected to the venting device, the injection head having a contact surface for contacting the top surface of the wafer and at least one orifice for solder injection to form a solder bump. The method further includes moving the injection head to move a chamfered portion of the edge of the injection head over the solder bump to scrape the solder bump to a desired height.

[0010] According to another aspect of the invention, a method is provided for injecting solder material into a through-hole located on the top surface of a wafer. The method includes venting gas from the through-hole through an venting device. The method further includes injecting solder material into the through-hole through an injection head connected to the venting device, the injection head having a contact surface for contacting the top surface of the wafer and a plurality of holes for solder injection to form one or more solder bumps. The method further includes moving the injection head to move a chamfered portion of the edge of the injection head over the one or more solder bumps to scrape the one or more solder bumps to a desired height.

[0011] These and other features and advantages will become apparent from the following detailed description of illustrative embodiments of the invention, which is read in conjunction with the accompanying drawings. Attached Figure Description

[0012] The following description will provide details of preferred embodiments with reference to the following figures, in which:

[0013] Figure 1 This is a block diagram illustrating an exemplary computing device according to an embodiment of the present invention;

[0014] Figure 2 This is a schematic diagram illustrating an exemplary injection-molded solder (IMS) head on a semiconductor device according to an embodiment of the present invention;

[0015] Figure 3 This illustrates an embodiment according to the present invention. Figure 2 A top view of the IMS head;

[0016] Figure 4 This illustrates an embodiment according to the present invention. Figure 2 Another top view of the IMS head;

[0017] Figure 5 This illustrates an embodiment according to the present invention. Figure 2 Another bottom view of the IMS head;

[0018] Figure 6 This illustrates an embodiment according to the present invention. Figure 2 Another top view of the IMS head;

[0019] Figure 7 This is a schematic diagram illustrating a modified backend of the IMS header according to an embodiment of the present invention;

[0020] Figure 8 This is a schematic diagram illustrating a modified backend of the IMS header according to an embodiment of the present invention;

[0021] Figure 9 This is a schematic diagram illustrating a modified backend of the IMS header according to an embodiment of the present invention;

[0022] Figure 10 This is a schematic diagram illustrating a modified backend of the IMS header according to an embodiment of the present invention;

[0023] Figure 11 This is a schematic diagram illustrating a modified backend of the IMS header according to an embodiment of the present invention;

[0024] Figure 12 This is a schematic diagram illustrating the low-friction layer of the IMS head according to an embodiment of the present invention;

[0025] Figure 13 This is a flowchart illustrating an exemplary method for injecting solder material into a through-hole located on the top surface of a wafer according to an embodiment of the present invention;

[0026] Figure 14 This is a flowchart illustrating another exemplary method for injecting solder material into a through-hole located on the top surface of a wafer, according to an embodiment of the present invention;

[0027] Figure 15 This illustrates an embodiment according to the present invention. Figure 2 Another schematic diagram of the IMS head from below; and

[0028] Figure 16 This illustrates an embodiment according to the present invention. Figure 4 A variant of the diagram, which has a solder injection slit and a vacuum application slit. Detailed Implementation

[0029] Embodiments of the present invention relate to injection-molded solder (IMS) heads with improved sealing performance.

[0030] The original IMS head has a square edge. It has been found that the seal at the head edge can be improved by chamfering, because chamfering increases local vertical stress at the edge. One or more embodiments of the present invention use chamfered edges to address the two challenges described above in the background section.

[0031] Regarding solder bump height variation, considering that a higher vacuum level has been established to improve solder bump height variation, embodiments of the present invention employ chamfered edges to seal the space between the head and the wafer to increase vacuum performance. Higher contact pressure has also been established to improve bump height variation. The higher vertical stress of the chamfered edges can also be used to level molten solder by scraping.

[0032] Regarding solder joint leakage in through-holes, embodiments of the present invention add a second injection slit to compensate for the leakage. Since the second injection slit requires a higher vacuum to operate, embodiments of the present invention feature chamfered edges to achieve a good seal. Embodiments of the present invention also produce surfaces with different roughnesses: a rough surface for better conductivity; and a smooth surface for better sealing.

[0033] Figure 1 This is a block diagram illustrating an exemplary computing device 100 according to an embodiment of the present invention. The computing device 100 can be used to control an integrated circuit manufacturing line or a portion thereof. The computing device 100 is configured to provide an injection-molded solder head with improved sealing performance.

[0034] Computing device 100 can be embodied as any type of computing or computer device capable of performing the functions described herein, including but not limited to computers, servers, rack-based servers, blade servers, workstations, desktop computers, laptop computers, notebook computers, tablet computers, mobile computing devices, wearable computing devices, network devices, web devices, distributed computing systems, processor-based systems, and / or consumer electronics devices. Additionally or alternatively, computing device 100 can be implemented as one or more computer rails, memory rails, or other racks, rails, computer shelves, or other components of physically separate computing devices. Figure 1As shown, computing device 100 illustratively includes processor 110, input / output subsystem 120, memory 130, data storage device 140, and communication subsystem 150, and / or other components and devices common in servers or similar computing devices. Of course, in other embodiments, computing device 100 may include other or additional components, such as those typically found in server computers (e.g., various input / output devices). Additionally, in some embodiments, one or more illustrative components may be incorporated into another component or otherwise formed part of another component. For example, in some embodiments, memory 130 or a portion thereof may be incorporated into processor 110.

[0035] Processor 110 can be implemented as any type of processor capable of performing the functions described herein. Processor 110 can be implemented as a single processor, multiple processors, a central processing unit, a graphics processing unit, a single-core or multi-core processor, a digital signal processor, a microcontroller, or other processor or processing / control circuitry.

[0036] Memory 130 can be implemented as any type of volatile or non-volatile memory or data storage device capable of performing the functions described herein. In operation, memory 130 can store various data and software used during the operation of computing device 100, such as operating systems, applications, programs, libraries, and drivers. Memory 130 is communicatively coupled to processor 110 via I / O subsystem 120, which can be embodied as circuitry and / or components to facilitate input / output operations with processor 110, memory 130, and other components of computing device 100. For example, I / O subsystem 120 can be implemented as or otherwise include a memory controller hub, input / output control hub, platform controller hub, integrated control circuitry, firmware devices, communication links (e.g., point-to-point links, bus links, wires, cables, optical fibers, printed circuit board traces, etc.) and / or other components and subsystems to facilitate input / output operations. In some embodiments, the I / O subsystem 120 may form part of a system-on-a-chip (SOC) and be integrated onto a single integrated circuit chip along with the processor 110, memory 130, and other components of the computing device 100.

[0037] Data storage device 140 can be embodied as one or more devices of any type configured for short-term or long-term data storage, such as memory devices and circuits, memory cards, hard disk drives, solid-state drives, or other data storage devices. Data storage device 140 can store program code for providing injection-molded solder heads with improved sealing performance. The communication subsystem 150 of computing device 100 can be implemented as any network interface controller or other communication circuitry, device, or combination thereof capable of enabling communication between computing device 100 and other remote devices via a network. Communication subsystem 150 can be configured to use any one or more communication technologies (e.g., wired or wireless communication) and associated protocols (e.g., Ethernet, etc.). This communication can be achieved using methods such as WiMAX.

[0038] As shown in the figure, the computing device 100 may also include one or more peripheral devices 160. Peripheral devices 160 may include any number of additional input / output devices, interface devices, and / or other peripheral devices. For example, in some embodiments, peripheral devices 160 may include a display, touchscreen, graphics circuitry, keyboard, mouse, speaker system, microphone, network interface, and / or other input / output devices, interface devices, and / or peripheral devices.

[0039] Of course, the computing device 100 may also include other elements (not shown) that are readily apparent to those skilled in the art, and some elements may be omitted. For example, as will be readily understood by those skilled in the art, various other input and / or output devices may be included depending on the specific implementation of the computing device 100. For example, various types of wireless and / or wired input and / or output devices may be used. Furthermore, additional processors, controllers, memories, etc., may be utilized in various configurations. Given the teachings of the invention provided herein, these and other variations of the processing system 100 will readily occur to those skilled in the art.

[0040] As used herein, the terms "hardware processor subsystem" or "hardware processor" can refer to a processor, memory (including RAM, cache(s), etc.), software (including memory management software), or a combination thereof that cooperate to perform one or more specific tasks. In useful embodiments, a hardware processor subsystem may include one or more data processing elements (e.g., logic circuitry, processing circuitry, instruction execution means, etc.). One or more data processing elements may be included in a central processing unit, a graphics processing unit, and / or a separate processor- or computing element-based controller (e.g., logic gates, etc.). A hardware processor subsystem may include one or more on-board memories (e.g., cache, dedicated memory array, read-only memory, etc.). In some embodiments, a hardware processor subsystem may include one or more memories that may be on-board or off-board, or may be dedicated to use by the hardware processor subsystem (e.g., ROM, RAM, basic input / output system (BIOS), etc.).

[0041] In some embodiments, the hardware processor subsystem may include and execute one or more software elements. The one or more software elements may include an operating system and / or one or more applications and / or specific code to achieve a specified result.

[0042] In other embodiments, the hardware processor subsystem may include dedicated, specialized circuitry that performs one or more electronic processing functions to achieve a specified result. Such circuitry may include one or more application-specific integrated circuits (ASICs), FPGAs, and / or PLAs.

[0043] According to embodiments of the present invention, these and other variations of the hardware processor subsystem are also contemplated.

[0044] Figure 2 This is a schematic diagram of an exemplary injection-molded solder (IMS) head 200 on a semiconductor device 250 according to an embodiment of the present invention.

[0045] Semiconductor device 250 includes substrate 260, dielectric 270, solder receiving vias 281 and 282, vacuum receiving via 291, and wafer 299. When element 291 is considered a vacuum receiving via, all vias to be filled with solder first receive vacuum, and then the solder is filled by the IMS head as it moves along and over the wafer 299.

[0046] The IMS header 200 includes solder injection slits 211 and 212, a vacuum application slit 221, a first solder reservoir 231, a second solder reservoir 232, and a vacuum line 244. Although shown separately for illustration, the vacuum line 244 is part of the IMS header 200, as... Figure 2 and 3 As shown.

[0047] The pressures involved include solder pressure 201, solder pressure 202, vacuum suction 203, and head pressure 204.

[0048] Figure 3 This illustrates an embodiment according to the present invention. Figure 2 A bottom view of the IMS head 200.

[0049] In this view, the IMS head 200 includes solder injection slits 211 and 212, a vacuum application slit 221, silicone rubber 320, and a chamfered portion 311. A thermo-mechanical analysis was performed on the IMS head 200 to illustrate the scraping produced by the chamfered edge. The chamfered edge is inserted into a through-hole defining the solder height. Because the surface change at the chamfered edge is smaller than the surface change across the entire head surface, the solder height variation is reduced. Although in Figure 3 The location of the chamfered portion is marked, as in other drawings, but the actual chamfer is not shown to focus on other aspects of the drawing. Figures 7 to 11 An exemplary chamfer configuration is shown and described in detail.

[0050] Figure 4 This illustrates an embodiment according to the present invention. Figure 2 Another bottom view of the IMS head 200.

[0051] In this view, the IMS head 200 includes solder injection slits 211 and 212, vacuum application slit 221, a high average roughness region 411, a low average roughness region 412, and a chamfered portion 321.

[0052] The high average roughness region 411 corresponds to a higher average roughness surface for better conductivity. The high average roughness region 411 can be formed from, for example, but not limited to, silicone rubber, polytetrafluoroethylene (PTFE), polyetherimide (PEI), polyetheretherketone (PEEK), polybenzimidazole (PBI), polydicyclopentadiene (PDCPD), and epoxy resin (EP). An exemplary high average roughness region 411 can include an average surface roughness in the range of 32 to 400 microinches. The low average roughness region 412 corresponds to a high-stress region with a smooth surface for better sealing. The low average roughness region 412 can be formed from a low-friction material, including, for example, but not limited to, polytetrafluoroethylene (PTFE), polyetherimide (PEI), polyetheretherketone (PEEK), polybenzimidazole (PBI), polydicyclopentadiene (PDCPD), and epoxy resin (EP). An exemplary low average roughness region 412 can include an average surface roughness in the range of 8 to 32 microinches.

[0053] The contact surface may include surface roughness to minimize friction with the solder balls. Although the solder balls are in a liquid state, it is desirable to prevent capillary action along the chamfered surface. If the surface roughness is low (e.g., less than about 32 microinches), wicking can be minimized.

[0054] Furthermore, the material selection preferably includes a dielectric coating. The dielectric coating may include polytetrafluoroethylene (PTFE), polyethylene, or other materials with a low coefficient of friction and capable of withstanding welding temperatures without degradation.

[0055] The dimensions and configuration of the chamfer and / or radius should be designed to maintain the surface tension of the solder balls. For example, in one embodiment, the chamfer angle θ can be an acute angle ranging from about 1 degree to about 60 degrees.

[0056] In other embodiments, the non-linear profile or radius is used in conjunction with or in addition to chamfering. In one embodiment, the radius is between about 0.25 and 7.5 mm. Its size is a percentage of the solder ball radius, for example, in the range of 10% to 500%.

[0057] Figure 5 This illustrates an embodiment according to the present invention. Figure 2 Another bottom view of the IMS head 200.

[0058] In this view, the IMS head 200 includes solder injection slits 511 and 212, vacuum application slit 221, and chamfered portion 321.

[0059] exist Figure 5 In this process, the size of the solder injection slit 511 is smaller than that of the solder injection slit 212, and it works well because it only requires sufficient solder to correct streaks and / or other minor defects in the first application. That is, the primary solder deposit is formed using the solder injection slit 212, and the secondary solder deposit is subsequently formed using the solder injection slit 511.

[0060] Figure 6 This illustrates an embodiment according to the present invention. Figure 2 Another top view of the IMS head 200.

[0061] In this view, the IMS head 200 includes solder injection slits 211 and 212, vacuum application slit 221, and chamfered portion 321.

[0062] Figure 6 Implementation examples and Figure 3The difference in the embodiments is that different solder materials are used for solder injection slits 511 and 512. For example, different solder materials that can be used include, but are not limited to, lead-free solders using tin, indium, tin alloys, or indium alloys containing Ag, Sn, In, Bi, Cu, Sb, Zn, Ni, Pd, Co, Ge, Au, and / or Fe.

[0063] Depending on the properties of different solder materials (e.g., viscosity), different filling pressures can be applied to different solder materials.

[0064] Figure 7 This is a schematic diagram illustrating a modified backend 700 of the IMS header according to an embodiment of the present invention.

[0065] The modified back end 700 includes a flat edge chamfer 710. The angle θ ranges from 1 to 60 degrees.

[0066] The chip 730 and photoresist 740 are also shown.

[0067] Figure 8 This is a schematic diagram illustrating a modified backend 800 of the IMS header according to an embodiment of the present invention.

[0068] As an example, the modified rear end 800 includes a straight portion 810 and a rounded portion 820, where the radius r = 0.25 mm.

[0069] The chip 830 and photoresist 840 are also shown.

[0070] Figure 9 This is a schematic diagram illustrating a modified backend 900 of the IMS header according to an embodiment of the present invention.

[0071] The modified rear end 900 includes a straight portion 910 and a rounded portion 920, with a radius r = 0.5 mm. The rounded portion 920 is twice the size of the rounded portion 910.

[0072] The chip 930 and photoresist 940 are also shown.

[0073] Figure 10 This is a schematic diagram illustrating a modified backend 1000 of the IMS header according to an embodiment of the present invention.

[0074] The modified rear end 1000 includes a rounded portion 1010, with a radius r = 3.914 mm.

[0075] The chip 1030 and photoresist 1040 are also shown.

[0076] Figure 11 This is a schematic diagram illustrating a modified backend 1100 of the IMS header according to an embodiment of the present invention.

[0077] The modified rear end 1100 includes a rounded portion 1110 with a radius r = 7.5 mm.

[0078] The wafer 1130 and photoresist 1140 are also shown.

[0079] Figure 12 This is a schematic diagram showing the low-friction layer 412 of the IMS head according to an embodiment of the present invention.

[0080] In addition to the bottom surface, a low-friction layer 412 is formed on the sidewalls, including the chamfered region 1277, to minimize delamination problems from the rubber 411 (high-friction region) attached to the metal 1266. The injection slit is indicated by reference numeral 1255.

[0081] Figure 13 This is a flowchart illustrating an exemplary method 1300 for injecting solder material into a through-hole located on the top surface of a wafer according to an embodiment of the present invention.

[0082] In block 1310, move the IMS head over the via to be processed.

[0083] In block 1320, gas is discharged from the through-hole through the exhaust device of the IMS head.

[0084] In block 1320, solder material is injected into a through-hole via an injection head connected to an venting device. The injection head has a contact surface for contacting the top surface of the wafer and at least one hole for solder injection to form solder bumps.

[0085] In block 1330, the injection head is moved to move the chamfered portion of the injection head edge on the solder bump to scrape the solder bump to the desired height. The movement of the head in this invention is from through-hole to through-hole to process the through-hole as described above.

[0086] Figure 14 This is a flowchart illustrating another exemplary method 1400 for injecting solder material into a through-hole located on the top surface of a wafer according to an embodiment of the present invention.

[0087] In block 1410, move the IMS head over the via to be processed.

[0088] In block 1420, gas is discharged from the through-hole through the exhaust device of the IMS head.

[0089] In block 1420, solder material is injected into a through-hole via an injection head connected to an venting device. The injection head has a contact surface for contacting the top surface of the wafer and multiple holes for solder injection to form one or more solder bumps.

[0090] In an embodiment, the plurality of holes may include at least a first hole and a second hole, and different filling pressures may be used for the first hole and the second hole.

[0091] In one embodiment, each of the plurality of holes may be connected to a common solder bath. In another embodiment, each of the plurality of holes may be connected to a corresponding one of the plurality of solder baths.

[0092] In this embodiment, the solder material may include a first solder material and a second solder material different from the first solder material. The first solder material may be injected into a first hole, and the second solder material may be injected into a second hole to form a solder bump composed of the first solder material and the second solder material.

[0093] In block 1330, the injection head is moved to move the chamfered portion of the injection head edge over the solder bump to scrape the solder bump to a desired height. One or more solder bumps are scraped to reduce solder height variation between at least one of them and relative to the other solder bumps. The movement of the head in this invention is from via to via to process vias as described above.

[0094] Figure 15 This illustrates an embodiment according to the present invention. Figure 2 Another schematic diagram of the IMS head 200 from below.

[0095] and Figure 4 Compared to the variation of the IMS head 200 shown, there is no region with a higher average roughness at the rear of the second slit 211. Instead, region 413 is a region with a low average roughness.

[0096] Figure 16 This illustrates an embodiment according to the present invention. Figure 4 A schematic diagram of variant 1600, having a solder injection slot 1511 and a vacuum application slot 1521.

[0097] Each embodiment shown here, comprising two solder injection slits, can also be modified to include, as... Figure 16 The single solder injection slit and single vacuum application slit shown herein, along with the teachings of the present invention, will readily lead those skilled in the art to these and other variations of the invention.

[0098] This invention can be a system, method, and / or computer program product at any possible level of technical detail integration. The computer program product may include a computer-readable storage medium (or media) having computer-readable program instructions thereon for causing a processor to perform aspects of the invention.

[0099] Computer-readable storage media can be tangible means capable of retaining and storing instructions for use by an instruction execution device. Computer-readable storage media can be, for example, but not limited to, electronic storage devices, magnetic storage devices, optical storage devices, electromagnetic storage devices, semiconductor storage devices, or any suitable combination of the foregoing. A non-exhaustive list of more specific examples of computer-readable storage media includes the following: portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable optical disc read-only memory (CD-ROM), digital multifunction disc (DVD), memory sticks, floppy disks, mechanical encoding devices such as punch cards or recessed structures with instructions recorded thereon, and any suitable combination of the foregoing. As used herein, computer-readable storage media should not be construed as transient signals themselves, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through waveguides or other transmission media (e.g., light pulses through fiber optic cables), or electrical signals transmitted through wires.

[0100] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to a suitable computing / processing device, or via a network, such as the Internet, a local area network (LAN), a wide area network (WAN), and / or a wireless network, to an external computer or external storage device. The network may include copper cables, optical fibers, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards them to a computer-readable storage medium within the respective computing / processing device.

[0101] Computer-readable program instructions used to perform the operations of this invention may be assembly instructions, instruction set architecture (ISA) instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as SMALLTALK, C++, etc., and conventional procedural programming languages ​​such as the "C" programming language or similar programming languages. The computer-readable program instructions may be executed entirely on the user's computer, partially on the user's computer, as a stand-alone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the latter case, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider). In some embodiments, to perform aspects of this invention, electronic circuits, including, for example, programmable logic circuits, field-programmable gate arrays (FPGAs), or programmable logic arrays (PLAs), may execute computer-readable program instructions to personalize the electronic circuits by utilizing state information from the computer-readable program instructions.

[0102] Various aspects of the present invention are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions.

[0103] These computer-readable program instructions may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions / actions specified in one or more blocks of a flowchart and / or block diagram. These computer-readable program instructions may also be stored in a computer-readable storage medium that can direct a computer, programmable data processing apparatus, and / or other means to operate in a particular manner, such that the computer-readable storage medium in which the instructions are stored includes an article of writing comprising instructions for implementing aspects of the functions / actions specified in one or more blocks of a flowchart and / or block diagram.

[0104] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus or other apparatus to cause a series of operational steps to be performed on the computer, other programmable apparatus or other apparatus to produce a computer-implemented process, such that the instructions, which execute on the computer, other programmable apparatus or other apparatus, perform the functions / actions specified in one or more boxes of a flowchart and / or block diagram.

[0105] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of instructions comprising one or more executable instructions for implementing a specified logical function. In some alternative embodiments, the functions mentioned in the blocks may occur in a non-linear order as shown in the figures. For example, two blocks shown consecutively may actually be executed substantially simultaneously, or these blocks may sometimes be executed in reverse order, depending on the functions involved. It will also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented by a dedicated hardware-based system that performs the specified function or action or executes a combination of dedicated hardware and computer instructions.

[0106] References to "one embodiment" or "embodiment" and other variations of the invention in this specification mean that a particular feature, structure, characteristic, etc., described in connection with that embodiment is included in at least one embodiment of the invention. Therefore, the phrases "in one embodiment" or "in an embodiment" appearing in various places throughout the specification, as well as any other variations, do not necessarily refer to the same embodiment.

[0107] It should be understood that, for example, in the cases of “A / B,” “A and / or B,” and “at least one of A and B,” the use of any of the following “ / ,” “and / or,” and “at least one of” is intended to cover the selection of only the first listed option (A), or only the selection of only the second listed option (B), or the selection of both options (A and B). As a further example, in the cases of “A, B, and / or C” and “at least one of A, B, and C,” such wording is intended to include selecting only the first listed option (A), or only the second listed option (B), or only the third listed option (C), or only the first and second listed options (A and B), or only the first and third listed options (A and C), or only the second and third listed options (B and C), or selecting all three options (A, B, and C). This can be extended to many of the listed items, as will be apparent to those skilled in the art and related fields.

[0108] Preferred embodiments of the systems and methods have been described (these are intended to be illustrative and not limiting), and it is noted that modifications and variations can be made by those skilled in the art based on the foregoing teachings. Therefore, it should be understood that changes can be made to the specific embodiments disclosed, and these changes are within the scope of the invention as summarized by the appended claims. Thus, aspects of the invention have been described in the details and features required by patent law, and the claimed and patentable contents are set forth in the appended claims.

Claims

1. An apparatus for injecting solder material into a through-hole located on the top surface of a wafer, the apparatus comprising: An injection head has a contact surface for contacting the top surface of the wafer and at least one hole for injecting solder material into the through-hole through the injection head; as well as A venting device, connected to the injection head, is used to discharge gas from the through-hole. The injection head has a chamfered portion on the edge of the contact surface that contacts the top surface of the wafer; The injection head includes a low average roughness region near the at least one orifice and a high average roughness region surrounding the low average roughness region, the low average roughness region having a lower average roughness than the high average roughness region.

2. The apparatus of claim 1, wherein the injection head has a plurality of holes for injecting solder material into the through holes through one or more solder grooves of the injection head.

3. The apparatus of claim 1 or 2, wherein each of the holes is connected to a common solder bath.

4. The apparatus according to claim 1 or 2, wherein each of the holes is connected to a corresponding one of the plurality of solder baths.

5. The apparatus according to claim 1 or 2, wherein the chamfered portion is on the outer circumference of the injection head and at least one hole.

6. The apparatus of claim 5, wherein the chamfered portion is located on the next edge of the injection head in the forward travel direction.

7. The apparatus according to claim 1 or 2, wherein the orifice of the injection head comprises at least a first orifice and a second orifice.

8. The apparatus of claim 7, wherein the area of ​​the second hole is smaller than the area of ​​the first hole.

9. The apparatus of claim 7, wherein the solder material comprises a first solder material and a second solder material different from the first solder material, wherein the first solder material is injected into the first hole and the second solder material is injected into the second hole to form a solder bump comprising the first solder material and the second solder material.

10. The apparatus of claim 7, wherein different filling pressures are applied to the first hole and the second hole.

11. The apparatus according to claim 1 or 2, wherein the chamfered portion consists of straight edges.

12. The apparatus according to claim 1 or 2, wherein the chamfered portion comprises a rounded portion.

13. The apparatus of claim 1 or 2, wherein the injection head includes at least one chamfered portion that contacts at least one orifice.

14. A method for injecting solder material into a through-hole located on the top surface of a wafer, the method comprising: Gas is discharged from the through-hole through an exhaust device; Solder material is injected into the through-hole through an injection head connected to the venting device. The injection head has a contact surface for contacting the top surface of the wafer and at least one hole for solder injection to form solder bumps. as well as Move the injection head to move the chamfered portion of the edge of the injection head on the solder bump to scrape the solder bump to the desired height; The injection head includes a low average roughness region near the at least one orifice and a high average roughness region surrounding the low average roughness region, the low average roughness region having a lower average roughness than the high average roughness region.

15. The method of claim 14, wherein the injection head has a plurality of holes for solder injection to form one or more solder bumps.

16. The method of claim 14 or 15, wherein the solder bumps are scraped to reduce solder height variation relative to other solder bumps.

17. The method of claim 14 or 15, wherein the orifice of the injection head comprises at least a first orifice and a second orifice, and wherein different filling pressures are applied to the first orifice and the second orifice.

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