Driving current compensation method and current compensation device
Patent Information
- Application Number
- CN202311171005.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2023-04-11
- Filing Date
- 2023-09-12
- Publication Date
- 2026-10-27
- Estimated Expiration
- 2043-09-12
AI Technical Summary
[0002]现今时序控制器测量像素电路的驱动电流数据时,容易因为杂讯或是像素电路的驱动电流曲线劣化严重,导致像素电路的外部补偿演算法出现错误
Smart Images

Figure CN118116302B_ABST
Abstract
Description
Technical Field
[0001] This case relates to a compensation method and an electronic device. Specifically, this case relates to a drive current compensation method and a current compensation device. Background Technology
[0002] When timing controllers measure the drive current data of pixel circuits, noise or severe degradation of the drive current curve of the pixel circuit can easily cause errors in the external compensation algorithm of the pixel circuit.
[0003] Therefore, the above-mentioned technology still has many shortcomings, and practitioners in this field need to develop other suitable drive current compensation methods. Summary of the Invention
[0004] One aspect of this case relates to a driving current compensation method. The driving current compensation method includes the following steps: obtaining an initial current curve of a first pixel of a panel; measuring a first degraded current curve of the first pixel and a second degraded current curve of a second pixel adjacent to the first pixel; determining whether a first node of the first degraded current curve exceeds a first limit range; if the first node exceeds the first limit range, determining the first node as a divergence point, and determining whether a second node in the second degraded current curve corresponding to the first node at the same gray level exceeds a second limit range; if the second node does not exceed the second limit range, replacing the first node of the first degraded current curve with the second node of the second degraded current curve to generate a third degraded current curve; inputting the original gray level to the initial current curve to calculate a target current; mapping the target current to the third degraded current curve to obtain a compensated gray level; and inputting a gray level compensation voltage to the first pixel to compensate the driving current of the first pixel.
[0005] Another aspect of this case relates to a driving current compensation method. The driving current compensation method includes the following steps: obtaining an initial current curve of a first pixel of the panel; measuring a first degraded current curve of the first pixel and a second degraded current curve of a second pixel adjacent to the first pixel; determining whether a first slope between a first node and a second node of the first degraded current curve is lower than a first preset slope, where the first node corresponds to a first grayscale and the second node corresponds to a second grayscale; if the first slope is lower than the first preset slope, determining that the first node is a divergence point, and determining whether a second slope between a third node and a fourth node of the second degraded current curve is lower than a second preset slope, where the third node corresponds to a first grayscale and the fourth node corresponds to a second grayscale; if the second slope is not lower than the second preset slope, replacing the first node of the first degraded current curve with the third node of the second degraded current curve to generate a third degraded current curve; inputting the original grayscale to the initial current curve to calculate a target current, mapping the target current to the third degraded current curve to obtain a compensated grayscale; and inputting a grayscale compensation voltage to the first pixel based on the compensated grayscale to compensate for the driving current of the first pixel.
[0006] Another aspect of this case relates to a current compensation device. The current compensation device includes a panel and a timing controller. The panel includes a first pixel and a second pixel. The first pixel and the second pixel are adjacent. The timing controller is coupled to the first pixel and the second pixel and is used to store the initial current curve of the first pixel. The timing controller is used to measure the first degraded current curve of the first pixel and the second degraded current curve of the second pixel. The timing controller is used to determine whether a first node of the first degraded current curve exceeds a first limit range. If the first node exceeds the first limit range, the timing controller determines the first node as a divergence point and determines whether a second node in the second degraded current curve corresponding to the first node at the same gray level exceeds a second limit range. If the second node does not exceed the second limit range, the timing controller replaces the first node of the first degraded current curve with the second node of the second degraded current curve to generate a third degraded current curve. The timing controller is used to input the original gray level to the initial current curve to calculate the target current. The timing controller is used to map the target current to the third degraded current curve to obtain a compensated gray level. The timing controller is used to input a grayscale compensation voltage to the first pixel to compensate for the drive current of the first pixel.
[0007] In view of the aforementioned shortcomings and deficiencies of the prior art, this invention provides a driving current compensation method and a current compensation device, which compensate each other by the current curves of adjacent pixels, thereby providing grayscale compensation voltage of the compensation pixel from the outside to compensate the driving current of the pixel. Attached Figure Description
[0008] The following paragraphs describing the implementation methods and the diagrams below will provide a better understanding of the content of this case:
[0009] Figure 1 This is a circuit block diagram of a current compensation device illustrated according to some embodiments of this case;
[0010] Figure 2 This is a magnified schematic diagram of the pixel area of a current compensation device illustrated according to some embodiments of this case;
[0011] Figure 3A and Figure 3B This is a flowchart illustrating the steps of a drive current compensation method according to some embodiments of this case;
[0012] Figure 4A This is a schematic diagram of the current curve of a pixel according to some embodiments of this case;
[0013] Figure 4B This is a schematic diagram of the current curve of a pixel according to some embodiments of this case;
[0014] Figure 5A This is a schematic diagram of the current curve of a pixel according to some embodiments of this case;
[0015] Figure 5B This is a schematic diagram of the current curve of a pixel according to some embodiments of this case;
[0016] Figure 6A This is a schematic diagram of the current curve of a pixel according to some embodiments of this case;
[0017] Figure 6B This is a schematic diagram of the current curve of a pixel according to some embodiments of this case;
[0018] Figure 7 This is a schematic diagram of the current curve of a pixel according to some embodiments of this case;
[0019] Figure 8 This is a schematic diagram of the current curve of a pixel according to some embodiments of this case;
[0020] Figure 9A This is a schematic diagram of the current curve of a pixel according to some embodiments of this case;
[0021] Figure 9B This is a schematic diagram of the current curve of a pixel according to some embodiments of this case;
[0022] Figure 10A This is a schematic diagram of the current curve of a pixel according to some embodiments of this case;
[0023] Figure 10BThis is a schematic diagram of the current curve of a pixel according to some embodiments of this case;
[0024] Figure 11 This is a schematic diagram of the current curve of a pixel according to some embodiments of this case;
[0025] Figure 12A and Figure 12B The following is a flowchart illustrating the steps of a drive current compensation method according to some embodiments of this case; and
[0026] Figure 13 This is a schematic diagram of the current curve of a pixel according to some embodiments of this case.
[0027] In the attached figures, the following labels are used:
[0028] 100: Current compensation device
[0029] 110: Panel
[0030] 120: Timing Controller
[0031] 130: Gate driver
[0032] 140: Source Driver
[0033] 150: Sensing Circuit
[0034] P1~PN: Pixels
[0035] DL1~DLN: Data cables
[0036] G1~GN: Gate lines
[0037] Z: Pixel area
[0038] L1~LN: Signal lines
[0039] I1~I2: Drive current
[0040] SI1~SI2: Sensing drive current
[0041] Vdata1~Vdata2: Gray-scale compensation voltage
[0042] C1~C9: Deterioration current curves
[0043] N1~N30, N4', N7', N23', N28': Nodes
[0044] UL,UL1,UL1',UL1”,UL2,UL2',UL2”: upper limit
[0045] LL,LL1,LL1',LL1”,LL2,LL2',LL2”: lower limit
[0046] GL1~GL5: Grayscale
[0047] OC, OC1~OC2: Initial current curves
[0048] GL O Original grayscale
[0049] GL T Compensation grayscale
[0050] I T Target current
[0051] A1, A3: Interval
[0052] A2: Compensation Stoppage Range
[0053] 300: Method
[0054] 310-380: Step 400: Method
[0055] 410~480: Steps Detailed Implementation
[0056] The spirit of this case will be clearly explained below with diagrams and detailed description. Anyone skilled in the art can make changes and modifications based on the technology taught in this case after understanding the embodiments of this case, without departing from the spirit and scope of this case.
[0057] The terminology used herein is for the purpose of describing specific embodiments only and is not intended to limit the scope of this work. Singular forms such as “a,” “this,” “this,” “the,” and “the” as used herein also include plural forms.
[0058] The terms “include,” “including,” “have,” “contain,” etc., used in this article are all open-ended terms, meaning that they include but are not limited to.
[0059] Unless otherwise specified, the terms used herein generally have their ordinary meaning in the context of the art, the subject matter, and the specific content of this case. Certain terms used to describe this case will be discussed below or elsewhere in this specification to provide additional guidance to those skilled in the art in describing the case.
[0060] Figure 1 This is a circuit block diagram illustrating a current compensation device 100 according to some embodiments of this invention. In some embodiments, please refer to... Figure 1The current compensation device 100 includes a panel 110, a timing controller 120, a gate driver 130, a source driver 140, and a sensing circuit 150. The panel 110 includes a first pixel P1, a second pixel P2 to an Nth pixel PN, multiple gate lines (e.g., gate lines G1 to the Nth gate line GN), multiple data lines (e.g., data lines DL1, DL2 to the Nth data line DLN), and signal lines L1 to the Nth signal line LN. The first pixel P1 and the second pixel P2 are adjacent.
[0061] Gate driver 130 is coupled to first pixel P1, second pixel P2 to Nth pixel PN via multiple gate lines. Source driver 140 is coupled to first pixel P1, second pixel P2 to Nth pixel PN via multiple data lines. Timing controller 120 is indirectly coupled to first pixel P1, second pixel P2 to Nth pixel PN via source driver 140 and multiple data lines. Sensing circuit 150 is coupled to first pixel P1, second pixel P2 to Nth pixel PN via signal lines L1 to Nth signal lines LN, and is used to sense multiple sensing drive currents of first pixel P1, second pixel P2 to Nth pixel PN.
[0062] Figure 2 The illustrations are based on some embodiments of this case. Figure 1 A magnified schematic diagram of the pixel region Z in the current compensation device 100. In some embodiments, please refer to... Figure 1 and Figure 2 , Figure 2 for Figure 1 A magnified schematic diagram of the pixel area Z in the current compensation device 100. Figure 2 The first pixel P1 corresponds to Figure 1 The first pixel P1 of the current compensation device 100. Figure 2 The second pixel P2 corresponds to Figure 1 The second pixel P2 of the current compensation device 100.
[0063] In some embodiments, please refer to Figure 1 and Figure 2 The first pixel P1 generates a sensing drive current SI1, which is transmitted back to the timing controller 120 via the sensing circuit 150 through the signal line L1. The timing controller 120 outputs a compensation grayscale (not shown) based on the sensing drive current SI1, thereby outputting a grayscale compensation voltage Vdata1 to the first pixel P1 to compensate for the drive current I1 of the first pixel P1.
[0064] Similarly, the second pixel P2, adjacent to the first pixel P1, generates a sensing drive current SI2, which is transmitted back to the timing controller 120 via the sensing circuit 150 through the signal line L2. The timing controller 120 outputs a compensation grayscale (not shown) based on the sensing drive current SI2, thereby outputting a grayscale compensation voltage Vdata2 to the second pixel P2 to compensate for the drive current I2 of the second pixel P2.
[0065] In some embodiments, please refer to Figure 1 and Figure 2 The first pixel P1 contains multiple transistors, including P-type metal-oxide-semiconductor field-effect transistors (PMOS). The second pixel P2 contains multiple transistors, including P-type metal-oxide-semiconductor field-effect transistors (PMOS).
[0066] In some embodiments, please refer to Figure 1 and Figure 2 The first pixel P1 contains multiple transistors, including N-type metal-oxide-semiconductor field-effect transistors (PMOS). The second pixel P2 contains multiple transistors, including N-type metal-oxide-semiconductor field-effect transistors (PMOS).
[0067] It should be noted that the internal pixel circuits of the first pixel P1 and the second pixel P2 are not limited to the embodiments shown in the figures of this case.
[0068] Figure 3A and Figure 3B The diagram below illustrates the steps of a drive current compensation method 300 according to some embodiments of this invention. In some embodiments, for ease of understanding of the drive current compensation method 300, please refer to the following references. Figures 1 to 4B . Figure 4A The illustrations are based on some embodiments of this case. Figure 2 A schematic diagram of the first degraded current curve C1 of the sensing drive current SI1 of the first pixel P1. Figure 4B The illustrations are based on some embodiments of this case. Figure 2A schematic diagram of the second degraded current curve C2 of the sensing drive current SI2 of the second pixel P2. In some embodiments, the drive current compensation method 300 may be provided by... Figure 1 The current compensation device 100 performs the operation.
[0069] In step 310, the initial current curve of the first pixel of the panel is obtained.
[0070] In some embodiments, please refer to Figures 1 to 3B The timing controller 120 is used to obtain the initial current curve (not shown) of the first pixel P1 stored in the memory (not shown) of the current compensation device 100.
[0071] In step 320, the first degradation current curve of the first pixel and the second degradation current curve of the second pixel adjacent to the first pixel are measured.
[0072] In some embodiments, please refer to Figures 1 to 4B The timing controller 120 is used to store the initial current curve of the first pixel P1 (not shown in the figure). The timing controller 120 is used to measure the first degraded current curve C1 of the first pixel P1 and the second degraded current curve C2 of the second pixel P2.
[0073] In some embodiments, the first degradation current curve C1 includes nodes N1 to N5. Nodes N1 to N5 correspond to different gray levels (e.g., gray levels GL1 to GL5). The second degradation current curve C2 includes nodes N6 to N10. Nodes N6 to N10 correspond to different gray levels (e.g., gray levels GL1 to GL5). It should be noted that node N1 of the first degradation current curve C1 and node N6 of the second degradation current curve C2 correspond to the same gray level GL1. Nodes N2 and N7 correspond to the same gray level GL2. Nodes N3 and N8 correspond to the same gray level GL3. Nodes N4 and N9 correspond to the same gray level GL4. Nodes N5 and N10 correspond to the same gray level. In some embodiments, the number of gray levels includes 256. In some embodiments, the number of gray levels includes 2... n There are several types, where n is a positive integer.
[0074] In step 330, it is determined whether the first node of the first degradation current curve exceeds the first limit range.
[0075] In some embodiments, please refer to Figure 1 , Figure 2 , Figure 3A and Figure 4AThe timing controller 120 determines whether the first node (e.g., node N1 to node N5) of the first degraded current curve C1 exceeds the first limit range (i.e., the range squeezed by the upper limit UL1 and the lower limit LL1). If the first node of the first degraded current curve C1 does not exceed the first limit range, step 331 is executed by the timing controller 120. If the first node of the first degraded current curve C1 exceeds the first limit range, step 340 is executed by the timing controller 120. It should be noted that the timing controller 120 determines whether all nodes on the first degraded current curve C1 exceed the first limit range.
[0076] Step 331: Output the grayscale of the first node of the first degradation current curve. In some embodiments, please refer to... Figure 1 , Figure 2 , Figure 3A and Figure 4A If the first node of the first deterioration current curve C1 (e.g., node N1 to node N3, node N5) does not exceed the first limit range, the timing controller 120 is used to output the gray level (e.g., gray level GL1 to gray level GL3, gray level GL5) of the first node of the first deterioration current curve C1 (e.g., node N1 to node N3, node N5).
[0077] In step 340, it is determined whether the second node in the second degradation current curve, which corresponds to the first node to the same gray level, exceeds the second limit range.
[0078] In some embodiments, following step 330 above, if the first node (e.g., node N4) exceeds the first limit range (e.g., upper limit UL1), the timing controller 120 determines that the first node is a divergence point and determines whether the second node (e.g., node N9) in the second deterioration current curve C2, which corresponds to the first node (e.g., node N4) to the same gray level (e.g., gray level GL4), exceeds the second limit range (i.e., the range squeezed by the upper limit UL2 and the lower limit LL2).
[0079] Next, if the second node in the second degradation current curve C2 that corresponds to the first node at the same gray level exceeds the second limit range, then step 341 is executed by the timing controller 120. If the second node in the second degradation current curve C2 that corresponds to the first node (e.g., node N4) at the same gray level (e.g., gray level GL4) (e.g., node N9) does not exceed the second limit range, then step 350 is executed by the timing controller 120.
[0080] In step 341, obtaining the compensated grayscale is stopped, and the voltage of the original grayscale is input to the first pixel. In some embodiments, please refer to... Figure 1 and Figure 2The timing controller 120 is used to stop obtaining the compensated grayscale (not shown in the figure) and uses the voltage of the original grayscale as the grayscale compensation voltage Vdata1 to input to the first pixel P1.
[0081] In step 350, the first node of the first degradation current curve is replaced by the second node of the second degradation current curve to generate a third degradation current curve.
[0082] In some embodiments, please refer to Figure 1 , Figure 2 , Figure 3B and Figure 4B If the second node (e.g., node N9) does not exceed the second limit range, the timing controller 120 replaces the first node (e.g., node N4) of the first deterioration current curve C1 with the second node (e.g., node N9) of the second deterioration current curve C2 to generate a third deterioration current curve (not shown in the figure).
[0083] In step 360, the original grayscale to the initial current curve is input to calculate the target current.
[0084] In some embodiments, please refer to Figures 1 to 4B The timing controller 120 is used to input the original grayscale (not shown in the figure) to the initial current curve (not shown in the figure) to calculate the target current (not shown in the figure).
[0085] In step 370, the target current is mapped to the third degradation current curve to obtain a compensation grayscale. In some embodiments, please refer to... Figures 1 to 3B The timing controller 120 is used to map the target current (not shown) to the third degraded current curve (not shown) to obtain a compensation grayscale (not shown).
[0086] In step 380, a grayscale compensation voltage is applied to the first pixel to compensate for the driving current of the first pixel. In some embodiments, please refer to... Figures 1 to 3B The timing controller 120 is used to input a grayscale compensation voltage Vdata1 to the first pixel P1 according to the compensation grayscale (not shown in the figure) to compensate the driving current I1 of the first pixel P1. Similarly, the timing controller 120 compensates the second pixel P2 in a similar way to the timing controller 120 compensates the first pixel P1, and will not be described in detail here.
[0087] Figure 5A The illustrations are based on some embodiments of this case. Figure 2 A schematic diagram of the first degraded current curve C1 and the initial current curve OC1 of the first pixel P1. Figure 5B The illustrations are based on some embodiments of this case. Figure 2A schematic diagram of the second degraded current curve C2 and the initial current curve OC2 of the second pixel P2.
[0088] In some embodiments, please refer to Figure 5A The upper limit UL1 can be adjusted to either the upper limit UL1' or the upper limit UL1". In some embodiments, the lower limit LL1 can be adjusted to either the lower limit LL1' or the lower limit LL1". The upper limit UL1 and the lower limit LL1 of the first limit range can be adjusted according to actual needs and are not limited to the embodiments of this case. The initial current curve OC1 is the current curve of the first pixel P1 when it is first manufactured. The first degraded current curve C1 is the current curve of the first pixel P1 after it has been running for a period of time.
[0089] In some embodiments, please refer to Figure 5B The upper limit UL2 can be adjusted to either the upper limit UL2' or the upper limit UL2". In some embodiments, the lower limit LL2 can be adjusted to either the lower limit LL2' or the lower limit LL2". The upper limit UL2 and lower limit LL2 of the second limit range can be adjusted according to actual needs and are not limited to the embodiments of this case. The initial current curve OC2 is the current curve of the second pixel P2 when it is first manufactured. The second degradation current curve C2 is the current curve of the second pixel P2 after it has been running for a period of time.
[0090] In some embodiments, please refer to Figure 5A and Figure 5B The first limiting range of the first degradation current curve C1 and the second limiting range of the second degradation current curve C2 may be the same or different. It should be noted that since the first pixel P1 and the second pixel P2 are adjacent pixels, the initial current curves OC1 and OC2 may differ slightly in practice due to process errors.
[0091] Figure 6A The illustrations are based on some embodiments of this case. Figure 2 A schematic diagram of the third degradation current curve C3 of the first pixel P1. Figure 5B The illustrations are based on some embodiments of this case. Figure 2 A schematic diagram of the degradation current curve C4 of the second pixel P2.
[0092] In some embodiments, please refer to Figure 1 , Figure 4A , Figure 4B , Figure 6A If the second node (e.g., node N9) of the second degradation current curve C2 does not exceed the second limit range, then the timing controller 120 replaces the first node (e.g., node N4) of the first degradation current curve C1 with the second node (e.g., node N9) of the second degradation current curve C2 to generate... Figure 6AThe third degradation current curve C3 is shown, in which Figure 6A The node N4 of the first degraded current curve C1 is replaced as follows: Figure 6A The node N4' of the third degradation current curve C3.
[0093] In some embodiments, please refer to Figure 1 , Figure 4A , Figure 4B , Figure 6B The timing controller 120 is further used to determine whether the second node (e.g., node N6 to node N10) of the second degradation current curve C2 exceeds the second limit range (i.e., the range squeezed by the upper limit UL2 and the lower limit LL2).
[0094] Next, if the second node (e.g., node N7) exceeds the first limit range (e.g., lower limit LL2), the timing controller 120 determines that the second node (e.g., node N7) is a divergence point, and determines whether the first node (e.g., node N2) in the first deterioration current curve C1, which corresponds to the second node (e.g., node N7) to the same gray level (e.g., gray level GL2), exceeds the first limit range (i.e., the range squeezed by the upper limit UL1 and the lower limit LL1).
[0095] Furthermore, please refer to Figure 1 , Figure 4A , Figure 4B , Figure 6B If the first node (e.g., node N2) does not exceed the second limit range, the timing controller 120 replaces the second node (e.g., node N7) of the second degradation current curve C2 with the first node (e.g., node N2) of the first degradation current curve C1 to generate... Figure 6B The degradation current curve C4 is shown, where Figure 6B The node N7 of the second degraded current curve C2 is replaced as follows: Figure 6B The second degradation current curve C2 is at node N7'.
[0096] Figure 7 This is a schematic diagram illustrating the initial current curve OC1 and the third degradation current curve C3 of the first pixel P1 according to some embodiments of this case. Figure 7 The embodiment is as follows Figure 5A The third degraded current curve C3 of the first pixel P1 is added to the initial current curve OC1 of the first pixel P1.
[0097] In some embodiments, please refer to Figure 1 , Figure 2 and Figure 7 The timing controller 120 is used to input the original grayscale GL. O The target current I is calculated using the initial current curve OC1. TThe timing controller 120 is used to determine the target current I. T Mapped to the third degraded current curve C3 to obtain the compensated grayscale GL T The timing controller 120 is used to adjust the grayscale values according to the compensation GL. T Input grayscale compensation voltage Vdata1 to the first pixel P1 to compensate for the driving current I1 of the first pixel P1.
[0098] In some embodiments, the timing controller 120 is further configured to determine the target current I. T Can the initial current curve OC1 be mapped to the third degraded current curve C3? If the target current I... T If the initial current curve OC1 can be mapped to the third degraded current curve C3, then the compensated grayscale GL can be obtained. T .
[0099] Figure 8 This is a schematic diagram illustrating the initial current curve OC1 and the degradation current curve C5 of the first pixel P1 according to some embodiments of this invention. In some embodiments, please refer to... Figure 1 , Figure 2 and Figure 8 The timing controller 120 is used to input the original grayscale GL. O The target current I is calculated using the initial current curve OC1. T The timing controller 120 is used to determine the target current I. T Mapping to the degradation current curve C5 to obtain the compensated grayscale GL T In order to compensate for grayscale GL T Output Figure 2 The grayscale compensation voltage Vdata1 is shown.
[0100] In some embodiments, the timing controller 120 is further configured to determine the target current I. T Can the initial current curve OC1 be mapped to the degraded current curve C5? If the target current I... T Unable to map from the initial current curve OC1 to the degraded current curve C5, the timing controller 120 sets the highest grayscale voltage as... Figure 2 The grayscale compensation voltage Vdata1 is shown. In some embodiments, the color depth is 8 bits, and its grayscale range is from level 0 to level 255. There are a total of 256 grayscale levels. The highest grayscale voltage here is... Figure 1 The voltage value corresponding to the 255th gray level in the data voltage output by the panel 110 of the current compensation device 100. In some embodiments, the color depth is n bits, and the number of gray levels is 2. n The order is given by n, where n is a positive integer. The highest grayscale voltage here is... Figure 1The second grayscale value in the data voltage output from the panel 110 of the current compensation device 100 n The voltage value corresponding to the -1st order.
[0101] It should be noted that the degraded current curve C5 is the curve after the nodes of the first degraded current curve C1 were identified as dissimilar points and replaced. Furthermore, due to the severe degradation of the degraded current curve C5, nodes above node N13 of the initial current curve OC1 cannot be mapped to the degraded current curve C5.
[0102] Figure 9A and Figure 10A The illustrations are based on some embodiments of this case. Figure 2 A schematic diagram of the degradation current curve C6 of the sensing drive current SI1 of the first pixel P1. Figure 9B and Figure 10B The illustrations are based on some embodiments of this case. Figure 2 The diagram shows the degradation current curve C7 of the sensing drive current SI2 of the second pixel P2. Both degradation current curves C6 and C7 contain multiple line segments.
[0103] In some embodiments, please refer to Figure 1 , Figure 2 and Figure 9A The timing controller 120 is used to determine whether the nodes of the degradation current curve C6 (e.g., nodes N21 to N25) exceed the first limit range (i.e. the range squeezed by the upper limit UL1 and the lower limit LL1).
[0104] Next, if node N23 exceeds the first limit range (e.g., upper limit UL1), the timing controller 120 determines that node N23 is a divergence point and determines whether node N28 in the degradation current curve C7, which corresponds to the same gray level (e.g., gray level GL3) as node N23, exceeds the second limit range (i.e., the range squeezed by the upper limit UL2 and the lower limit LL2).
[0105] Furthermore, please refer to Figure 1 , Figure 2 , Figures 9A to 10B If node N28 exceeds the second limit range, the timing controller 120 determines node N28 as a divergence point, sets node N23 to zero, and sets two line segments (i.e., line segments N22N23 and N23N24) connected to node N23 among the multiple line segments of the degradation current curve C6 of the first pixel P1 as the stop compensation interval, so as to generate... Figure 10A The degraded current curve C6.
[0106] In addition, please see Figure 1 , Figure 2 , Figures 9A to 10BThe timing controller 120 is used to set node N28 to zero, and to set two line segments (i.e., line segments N27N28 and N28N29) connected to node N28 among the multiple line segments of the degradation current curve C7 of the second pixel P1 as the stop compensation interval, so as to generate... Figure 10B The degraded current curve C7.
[0107] Figure 11 This is a schematic diagram illustrating the initial current curve OC1 and the deterioration current curve C8 of the first pixel P1 according to some embodiments of this case. Figure 10A In the embodiment, node N23' of the degradation current curve C6 is the divergence point, and Figure 10B In this embodiment, node N28' of the degraded current curve C7 is the point of divergence. Therefore, the two adjacent line segments connected to node N23' are set as the stop compensation interval A2 to generate... Figure 11 The degradation current curve C8 is shown.
[0108] Next, please refer to Figure 1 , Figure 2 and Figure 11 If the target current I T When mapping from the initial current curve OC1 to the stop compensation interval A2 of the degraded current curve C8, and the slope of the degraded current curve C8 is abnormal, the timing controller 120 stops obtaining the compensation grayscale (not shown in the figure) and uses the original grayscale GL. O The voltage is used as the grayscale compensation voltage Vdata1 and input to the first pixel P1 to compensate the driving current I1 of the first pixel P1.
[0109] If the target current I T When the initial current curve OC1 is mapped to the outside of the stop compensation interval A2 (i.e. intervals A1 and A3) of the degraded current curve C8, a compensation grayscale (not shown in the figure) is obtained, thereby outputting a grayscale compensation voltage Vdata1 based on the compensation grayscale (not shown in the figure) to compensate the driving current I1 of the first pixel P1.
[0110] Figure 12A and Figure 12B The diagram below illustrates the steps of a drive current compensation method 400 according to some embodiments of this invention. In some embodiments, for ease of understanding of the drive current compensation method 400, please also refer to... Figures 1 to 4B In some embodiments, the drive current compensation method 400 may be provided by... Figure 1 The current compensation device 100 performs the operation.
[0111] In step 410, the initial current curve of the first pixel of the panel is obtained. In some embodiments, please refer to... Figures 1 to 3BThe timing controller 120 is used to obtain the initial current curve (not shown) of the first pixel P1 stored in the memory (not shown) of the current compensation device 100.
[0112] In step 420, the first degradation current curve of the first pixel and the second degradation current curve of the second pixel adjacent to the first pixel are measured.
[0113] In some embodiments, please refer to Figures 1 to 4B The timing controller 120 is used to store the initial current curve of the first pixel P1. The timing controller 120 is used to measure the first degraded current curve C1 of the first pixel P1 and the second degraded current curve C2 of the second pixel P2.
[0114] In step 430, it is determined whether the first slope between the first node and the second node of the first deterioration current curve is lower than the first preset slope.
[0115] In some embodiments, please refer to Figure 1 , Figure 4A and Figure 12A The timing controller 120 is further used to determine whether the first slope between the first node (e.g., node N4) and the second node (e.g., node N5) of the first deterioration current curve C1 is lower than a first preset slope. The first node (e.g., node N4) corresponds to the first gray level (e.g., gray level GL4). The second node (e.g., node N5) corresponds to the second gray level (e.g., gray level GL5).
[0116] Next, if the first slope is not lower than the first preset slope, step 431 is executed by the timing controller 120. If the first slope is lower than the first preset slope, step 440 is executed by the timing controller 120. It should be noted that the timing controller 120 is used to determine whether the slope between all nodes on the first deterioration current curve C1 exceeds the first preset slope.
[0117] Step 431: Output the grayscale of the first node of the first degradation current curve. In some embodiments, please refer to... Figure 1 , Figure 2 , Figure 4A and Figure 12A If the first node of the first deterioration current curve C1 (e.g., node N1 to node N3, node N5) does not exceed the first limit range, the timing controller 120 is used to output the gray level (e.g., gray level GL1 to gray level GL3, gray level GL5) of the first node of the first deterioration current curve C1 (e.g., node N1 to node N3, node N5).
[0118] In step 440, it is determined whether the second slope between the third and fourth nodes of the second degradation current curve is lower than a second preset slope. In some embodiments, following step 430 above, please refer to... Figure 4B and Figure 12A If the first slope is lower than the first preset slope, then the first node is determined to be a divergence point, and it is determined whether the second slope between the third node (e.g., node N9) and the fourth node (e.g., node N10) of the second deterioration current curve C2 is lower than the second preset slope. The third node (e.g., node N9) corresponds to the first gray level (e.g., gray level GL4). The fourth node (e.g., node N10) corresponds to the second gray level (e.g., gray level GL5).
[0119] Next, if the second slope between the third node (e.g., node N9) and the fourth node (e.g., node N10) of the second degradation current curve C2 is lower than the second preset slope, then step 441 is executed by the timing controller 120. If the second slope between the third node (e.g., node N9) and the fourth node (e.g., node N10) of the second degradation current curve C2 is not lower than the second preset slope, then step 450 is executed by the timing controller 120.
[0120] In step 441, obtaining the compensated grayscale is stopped, and the voltage of the original grayscale is input to the first pixel. In some embodiments, please refer to... Figure 1 and Figure 12A The timing controller 120 is used to stop obtaining the compensated grayscale (not shown in the figure) and input the voltage of the original grayscale (not shown in the figure) to the first pixel P1.
[0121] In step 450, the first node of the first degradation current curve is replaced with the third node of the second degradation current curve to generate a third degradation current curve. In some embodiments, please refer to... Figure 1 , Figure 2 , Figure 4B and Figure 12B If the second slope is not lower than the second preset slope, then the first node (e.g., node N4) of the first deteriorated current curve C1 is replaced by the third node (e.g., node N9) of the second deteriorated current curve C2 to generate a third deteriorated current curve (not shown in the figure). It should be noted that the first preset slope and the second preset slope can be the same or different, and both can be designed according to actual needs.
[0122] In step 460, the original grayscale to the initial current curve is input to calculate the target current.
[0123] In some embodiments, please refer to Figure 1 , Figure 2 , Figure 4B and Figure 12BThe timing controller 120 is used to input the original grayscale to the initial current curve (not shown in the figure) to calculate the target current (not shown in the figure).
[0124] In step 470, the target current is mapped to the third degradation current curve to obtain a compensation grayscale. In some embodiments, please refer to... Figure 1 , Figure 2 , Figure 4B and Figure 12B The timing controller 120 is used to map the target current (not shown) to the third degraded current curve (not shown) to obtain the gray-scale compensation voltage (not shown).
[0125] In step 480, a grayscale compensation voltage is applied to the first pixel to compensate for the driving current of the first pixel. In some embodiments, please refer to... Figure 1 , Figure 2 , Figure 4B and Figure 12B The timing controller 120 inputs a grayscale compensation voltage Vdata1 to the first pixel P1 based on the compensation grayscale (not shown in the figure) to compensate the driving current I1 of the first pixel P1. Similarly, the timing controller 120 compensates the second pixel P2 in a similar way to the timing controller 120 compensates the first pixel P1, and will not be described in detail here.
[0126] In some embodiments, the current compensation device 100 is used to perform the drive current compensation method 300 independently. In some embodiments, the current compensation device 100 is used to perform the drive current compensation method 400 independently.
[0127] In some embodiments, the current compensation device 100 of this invention can simultaneously execute the drive current compensation method 300 and the drive current compensation method 400, that is, it can simultaneously determine whether multiple nodes of the degraded current curve exceed the limit range and whether the slope of the line segment between the nodes exceeds the preset slope.
[0128] Figure 13 The illustrations are based on some embodiments of this case. Figure 2 A schematic diagram of the initial current curve OC and the degradation current curve C9 of the first pixel P1. In some embodiments, please refer to... Figure 1 , Figure 2 and Figure 13 Several nodes of the degradation current curve C9 did not exceed the limit range (i.e., the range squeezed by the upper limit UL and the lower limit LL), but the slope of the curve segment of degradation current curve C9 was lower than the preset slope. Therefore, the concave curve segment was set as the aforementioned stop compensation interval. The following will... Figure 13 The values of the initial current curve OC and the degradation current curve C9 are listed in the table below.
[0129] Table 1.
[0130]
[0131] Please refer to Table 1 and Figure 13 , Figure 13 The embodiment is a color depth of 12 bits. Figure 1 The degradation current curve of any pixel of panel 110 has a grayscale level of 4096. Figure 13 The segment of the degraded current curve C9 between gray levels 880 and 3104 is designated as the stop compensation interval (not shown in the figure), and the voltage of the original gray level (not shown in the figure) is used as the gray level compensation voltage (not shown in the figure). Outside the stop compensation interval (not shown in the figure), the target current (not shown in the figure) is mapped from the initial current curve OC to the degraded current curve C9 to obtain the compensation gray level (not shown in the figure), thereby obtaining the gray level compensation voltage (not shown in the figure) based on the compensation gray level (not shown in the figure).
[0132] Based on the foregoing embodiments, this invention provides a driving current compensation method and a current compensation device. By mutually compensating the current curves of adjacent pixels, a grayscale compensation voltage is provided externally to compensate the driving current of the pixels. Furthermore, if a portion of the current curves of adjacent pixels cannot mutually compensate, the voltage of the original grayscale is input.
[0133] Although detailed embodiments have been disclosed above, this application does not exclude other possible implementations. Therefore, the scope of protection of this application shall be determined by the appended claims and not by the foregoing embodiments.
[0134] For those skilled in the art, various modifications and refinements can be made to this case without departing from its spirit and scope. Based on the foregoing embodiments, all modifications and refinements made to this case are also covered within the protection scope of this case.
Claims
1. A method for compensating driving current, characterized in that, Include: Obtain an initial current curve for the first pixel of a panel; Measure a first degradation current curve of the first pixel and a second degradation current curve of a second pixel adjacent to the first pixel; Determine whether a first node of the first degradation current curve exceeds a first limit range; If the first node exceeds the first limit range, the first node is determined to be a divergence point, and it is determined whether a second node in the second degradation current curve that corresponds to the first node to the same gray level exceeds a second limit range. If the second node does not exceed the second limit range, then the first node of the first degradation current curve is replaced by the second node of the second degradation current curve to generate a third degradation current curve. Input an original grayscale value into the initial current curve to calculate a target current; A compensation grayscale is obtained by mapping the target current to the third deteriorated current curve. as well as According to the compensation grayscale input, a grayscale compensation voltage is applied to the first pixel to compensate for a driving current of the first pixel.
2. The drive current compensation method as described in claim 1, characterized in that, The step of obtaining the compensated grayscale by mapping the target current to the third degraded current curve includes: Determine whether the target current can be mapped from the initial current curve to the third degraded current curve; as well as If the target current can be mapped from the initial current curve to the third degraded current curve, then the compensated gray level is obtained.
3. The drive current compensation method as described in claim 2, characterized in that, The step of mapping the target current to the third degraded current curve to obtain the compensated grayscale further includes: If the target current fails to map from the initial current curve to the third degraded current curve, a highest grayscale voltage is set as the grayscale compensation voltage, wherein the highest grayscale voltage includes the second grayscale value in a data voltage output by the panel. n The voltage value corresponding to the -1st order, where n is a positive integer.
4. The drive current compensation method as described in claim 1, characterized in that, The first degradation current curve contains multiple line segments. If the first node exceeds the first limit range, the first node is determined to be the divergence point. The step of determining whether the second node in the second degradation current curve, which corresponds to the first node to the same gray level, exceeds the second limit range includes: If the second node exceeds the second limit range, the second node is determined to be the divergence point, and the first node and the second node are set to zero. The two segments of the first degradation current curve connected to the first node are set as a stop compensation interval to generate the third degradation current curve.
5. The drive current compensation method as described in claim 4, characterized in that, The step of obtaining the compensated grayscale by mapping the target current to the third degraded current curve includes: If the target current is mapped from the initial current curve to the stop compensation interval of the third degraded current curve, then the compensation gray level is stopped, and a voltage value of the original gray level is used to input to the first pixel to compensate the driving current of the first pixel. as well as If the target current is mapped from the initial current curve to outside the stop compensation range of the third degraded current curve, the compensation grayscale is obtained to compensate the driving current of the first pixel.
6. A method for compensating driving current, characterized in that, Include: Obtain an initial current curve for the first pixel of a panel; Measure a first degradation current curve of the first pixel and a second degradation current curve of a second pixel adjacent to the first pixel; Determine whether a first slope between a first node and a second node of the first deterioration current curve is lower than a first preset slope, wherein the first node corresponds to a first gray level, and the second node corresponds to a second gray level; If the first slope is lower than the first preset slope, the first node is determined to be a divergence point, and it is determined whether the second slope between the third node and the fourth node of the second deterioration current curve is lower than the second preset slope, wherein the third node corresponds to the first gray level, and the fourth node corresponds to the second gray level. If the second slope is not lower than the second preset slope, then the first node of the first deteriorated current curve is replaced by the third node of the second deteriorated current curve to generate a third deteriorated current curve. Input an original grayscale value into the initial current curve to calculate a target current; A compensation grayscale is obtained by mapping the target current to the third deteriorated current curve. as well as According to the compensation grayscale input, a grayscale compensation voltage is applied to the first pixel to compensate for a driving current of the first pixel.
7. The drive current compensation method as described in claim 6, characterized in that, The step of obtaining the compensated grayscale by mapping the target current to the third degraded current curve includes: Determine whether the target current can be mapped from the initial current curve to the third degraded current curve; as well as If the target current can be mapped from the initial current curve to the third degraded current curve, then the compensated gray level is obtained.
8. The drive current compensation method as described in claim 7, characterized in that, The step of mapping the target current to the third degraded current curve to obtain the compensated grayscale further includes: If the target current fails to map from the initial current curve to the third degraded current curve, a highest grayscale voltage is set as the grayscale compensation voltage, wherein the highest grayscale voltage includes the second grayscale value in a data voltage output by the panel. n The voltage value corresponding to the -1st order, where n is a positive integer.
9. A current compensation device, characterized in that, Include: One panel, including: The first pixel; and A second pixel, wherein the first pixel and the second pixel are adjacent; and A timing controller, coupled to the first pixel and the second pixel, is used to store an initial current curve of the first pixel. The timing controller measures a first degradation current curve of the first pixel and a second degradation current curve of the second pixel. The timing controller determines whether a first node of the first degradation current curve exceeds a first limit range. If the first node exceeds the first limit range, the timing controller determines the first node as a divergence point and determines whether a second node in the second degradation current curve corresponding to the first node at the same gray level exceeds a first... In a second limit range, if the second node does not exceed the second limit range, the timing controller replaces the first node of the first degraded current curve with the second node of the second degraded current curve to generate a third degraded current curve. The timing controller inputs an original grayscale to the initial current curve to calculate a target current. The timing controller maps the target current to the third degraded current curve to obtain a compensated grayscale. The timing controller inputs a grayscale compensation voltage to the first pixel based on the compensated grayscale to compensate for a driving current of the first pixel.
10. The current compensation device as described in claim 9, characterized in that, The first degradation current curve includes multiple line segments. If the second node exceeds the second limit range, the timing controller determines the second node as the divergence point, sets the first node and the second node to zero, and sets the two intervals connected to the first node in the first degradation current curve as a stop compensation interval to generate the third degradation current curve. If the target current is mapped from the initial current curve to the stop compensation interval of the third degradation current curve, the timing controller stops obtaining the compensation grayscale and uses a voltage value of the original grayscale to input to the first pixel to compensate the driving current of the first pixel. If the target current is mapped from the initial current curve to outside the stop compensation interval of the third degradation current curve, the timing controller obtains the compensation grayscale to compensate the driving current of the first pixel based on the compensation grayscale.
Citation Information
Patent Citations
OLED efficiency attenuation compensation method, device and system for display panel
CN111354312A
Screen brightness control apparatus and method
WO2020232588A1