High-gain voltage converter and boosting method for photovoltaic power generation

Abstract

The application relates to the technical field of voltage conversion of photovoltaic power generation, and discloses a high-gain voltage converter and a boosting method for photovoltaic power generation, wherein the voltage converter comprises a capacitor loop provided with capacitors C0, C3, C2 and C4; the capacitor C4 is electrically connected with the capacitor C0 through a first switch tube S Q The capacitor C2 is electrically connected with the anode of the capacitor C3 through a first anti-reverse unit; the capacitor C4 is electrically connected with the capacitor C0 through a second anti-reverse unit; and the capacitor C0 is electrically connected with the anode of the capacitor C2 through a third anti-reverse unit; in actual use, the voltage converter realizes high gain; the number of electronic components used is small, the overall structure is simple; and the overall leakage inductance is eliminated due to the absence of a transformer.

Description

Technical Field

[0001] This invention relates to the field of voltage conversion technology for photovoltaic power generation, and specifically to a high-gain voltage converter and boost method for photovoltaic power generation. Background Technology

[0002] As environmental pollution caused by fossil fuels becomes increasingly severe, clean energy sources such as solar and wind power are gradually replacing fossil fuels in the energy mix to avoid further pollution. Solar energy is mostly converted into electrical energy through photovoltaic (PV) power generation, thus realizing the utilization of solar energy. However, the output voltage of PV power generation is low, requiring a DC-DC boost converter to boost the PV output voltage before it can be connected to the power grid. The higher the gain of the DC-DC boost converter, the better.

[0003] Theoretically, the voltage gain of existing Boost converters used for voltage boosting can be increased by increasing the duty cycle. However, in practical applications, due to limitations imposed by parasitic parameters, it is still difficult to significantly improve the voltage gain. Currently, the gain of Boost converters is mostly improved through the following three methods: Method 1: Connect two traditional Boost converters in series. The boost capability of the Boost converter after series connection is equal to the product of the voltage gains of the two individual Boost converters. However, this method has drawbacks such as doubling the number of components, doubling the cost, and the efficiency being equal to the product of the efficiencies of the two individual converters, as well as deteriorating stability. Method 2: Based on Method 1, the filter inductor of the preceding Boost converter is connected in series with its output capacitor to reduce the current ripple of the filter inductor. However, since the number of components remains unchanged, the voltage gain and efficiency are not improved. Furthermore, both Method 1 and Method 2 require two sets of drive circuits, which not only increases cost but also reduces the overall circuit stability. Method 3: The Boost converter in this method is a square-type Boost converter, which consists of two traditional Boost converters connected in series and sharing a single switch. Compared with the previous two cascaded Boost converters, it removes one switch and its driving circuit, reducing costs and improving system stability. However, it increases the voltage and current stress on the switch, the voltage stress on the output diode is relatively large, and the efficiency is reduced.

[0004] In practical applications, although the three types of cascaded converters mentioned above improve voltage gain and reduce the operating range of duty cycle, they increase cost and the number of components, have poor stability, and inherit other disadvantages of traditional Boost converters. Summary of the Invention

[0005] In view of the shortcomings of the prior art, the present invention provides a high-gain voltage converter and a boost method for photovoltaic power generation. The technical problem to be solved is that the current method of increasing the gain by cascading boost converters has problems such as a large number of components, high cost and poor stability.

[0006] To solve the above technical problems, in a first aspect, the present invention provides the following technical solution: a high-gain voltage converter for photovoltaic power generation, comprising a capacitor circuit, wherein capacitors C0, C3, C2 and C4 are provided on the capacitor circuit; In the capacitor circuit, the negative terminal of capacitor C4 is connected to the first switching transistor S. Q One end of capacitor C0 is electrically connected to the negative terminal of capacitor C3, and the other end of capacitor C0 is electrically connected to the negative terminal of capacitor C3. The positive terminal of capacitor C2 is electrically connected to the positive terminal of capacitor C3 through the first anti-reverse unit. The first anti-reverse unit conducts when the voltage difference between the positive terminals of capacitor C2 and capacitor C3 is greater than the first threshold voltage. The negative terminal of capacitor C2 is electrically connected to the positive terminal of capacitor C4. The negative terminal of capacitor C4 is electrically connected to the other end of capacitor C0 through the second anti-reverse unit. The second anti-reverse unit is turned on when the voltage difference between the negative terminal of capacitor C4 and the other end of capacitor C0 is greater than the first threshold voltage. The other end of capacitor C0 is also electrically connected to the positive terminal of capacitor C2 through a third anti-reverse unit. The third anti-reverse unit is turned on when the voltage difference between the other end of capacitor C0 and the positive terminal of capacitor C2 is greater than the second threshold voltage. The positive terminal of capacitor C4 and the other end of capacitor C0 are electrically connected to a controlled voltage source.

[0007] In one embodiment of the first aspect, the first anti-reverse unit includes a diode D1, the positive terminal of which is electrically connected to the positive terminal of a capacitor C2, and the negative terminal of which is electrically connected to the positive terminal of a capacitor C3. The third anti-reverse unit includes a diode D2, the positive terminal of which is electrically connected to the other end of the capacitor C0, and the negative terminal of which is electrically connected to the positive terminal of the capacitor C2. The second anti-reverse unit includes a diode D3, the positive terminal of which is electrically connected to the negative terminal of a capacitor C4, and the negative terminal of which is electrically connected to the other end of a capacitor C0.

[0008] In one embodiment of the first aspect, the controlled voltage source includes a second switch S and an inductor L1. The first connection terminal of the second switch S and the positive terminal of the capacitor C4 are used to connect to the photovoltaic voltage. The second connection terminal of the second switch S is electrically connected to one end of the inductor L1 and the other end of the capacitor C4, respectively. The other end of the inductor L1 is electrically connected to the positive terminal of the capacitor C4.

[0009] In one embodiment of the first aspect, the second switch S is an NMOS transistor, the source of the NMOS transistor is its first connection terminal, the drain of the NMOS transistor is its second connection terminal, the gate of the NMOS transistor is used to input a second driving signal, and the second driving signal is used to control the switching on and off of the NMOS transistor.

[0010] Secondly, the present invention provides another high-gain voltage converter for photovoltaic power generation, including a capacitor circuit, wherein capacitors C0, C3, C2 and C4 are provided on the capacitor circuit; In the capacitor circuit, the positive terminal of capacitor C4 is connected to the first switching transistor S. Q One end of capacitor C0 is electrically connected to the positive terminal of capacitor C3; the negative terminal of capacitor C3 is electrically connected to the negative terminal of capacitor C2 through a fourth anti-reverse unit, which conducts when the voltage difference between the negative terminals of capacitor C3 and C2 exceeds a fourth threshold voltage; the negative terminal of capacitor C2 is electrically connected to the positive terminal of capacitor C3 through a fifth anti-reverse unit, which conducts when the voltage difference between the negative terminals of capacitor C2 and C3 exceeds a fifth threshold voltage; the positive terminal of capacitor C2 is electrically connected to the negative terminal of capacitor C4. The other end of capacitor C0 is also electrically connected to the positive terminal of capacitor C4 through a sixth anti-reverse unit. The sixth anti-reverse unit is turned on when the voltage difference between the other end of capacitor C0 and the positive terminal of capacitor C4 is greater than the sixth threshold voltage. The negative terminal of capacitor C4 and the other end of capacitor C0 are electrically connected to a controlled voltage source.

[0011] In one embodiment of the second aspect, the fourth anti-reverse unit includes a diode D1, the positive terminal of which is electrically connected to the negative terminal of a capacitor C3, and the negative terminal of which is electrically connected to the negative terminal of a capacitor C2. The fifth anti-reverse unit includes a diode D2, the positive terminal of which is electrically connected to the negative terminal of capacitor C2, and the negative terminal of which is electrically connected to the positive terminal of capacitor C3. The sixth anti-reverse unit includes a diode D3, the positive terminal of which is electrically connected to the other end of a capacitor C0, and the negative terminal of which is electrically connected to the positive terminal of a capacitor C4.

[0012] In one embodiment of the second aspect, the controlled voltage source includes a second switch S and an inductor L1. The first connection terminal of the second switch S and the negative terminal of the capacitor C4 are used to connect to the photovoltaic voltage. The second connection terminal of the second switch S is electrically connected to one end of the inductor L1 and the other end of the capacitor C0, respectively. The other end of the inductor L1 is electrically connected to the negative terminal of the capacitor C4.

[0013] In one embodiment of the second aspect, the second switch S is an NMOS transistor, the source of the NMOS transistor is its first connection terminal, the drain of the NMOS transistor is its second connection terminal, the gate of the NMOS transistor is used to input a second drive signal, and the second drive signal is used to control the on / off state of the NMOS transistor.

[0014] Thirdly, the present invention provides a boost method, implemented using the aforementioned high-gain voltage converter for photovoltaic power generation, comprising the following steps: S1: Drives the second switch S to conduct and drives the first switch S Q Turn off; S2: Drives the second switch S and drives the first switch S Q All are turned off; S3: Drives the second switch S to turn off and drives the first switch S Q Conduction.

[0015] The advantages of this invention compared with the prior art are as follows: First, the high-gain voltage converter for photovoltaic power generation of this invention achieves high gain; second, the number of electronic components used is small and the overall structure is simple; in addition, since there is no transformer, there is no leakage inductance; finally, by charging and discharging capacitor C0 through the first switching transistor, the voltage on capacitor C0 and capacitor C3 can be the same, ensuring that the output voltage is ripple-free. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the high-gain voltage converter for photovoltaic power generation in Example 1; Figure 2 This is a circuit diagram of the high-gain voltage converter for photovoltaic power generation in Example 1; Figure 3 for Figure 2 Current flow diagram when the circuit is operating in the first mode; Figure 4 for Figure 2 Current flow diagram when the circuit operates in the second mode; Figure 5 This is a schematic diagram of the high-gain voltage converter for photovoltaic power generation in Example 2; Figure 6 This is a circuit diagram of the high-gain voltage converter for photovoltaic power generation in Example 2; Figure 7 for Figure 6 Current flow diagram when the circuit is operating in the first mode; Figure 8 for Figure 6 Current flow diagram when the circuit operates in the second mode; Figure 9 for Figure 6Current flow diagram when the circuit is operating in the third mode. Detailed Implementation

[0017] The present invention will now be described in further detail with reference to the accompanying drawings. These drawings are simplified schematic diagrams, illustrating only the basic structure of the invention, and therefore only show the components relevant to the invention.

[0018] Example 1 For existing Boost converters used in photovoltaic power generation, most currently cascade multiple Boost converters to increase their gain. However, this results in complex circuit structure, more components, poor stability, and low efficiency, which is not conducive to the actual utilization of photovoltaic power generation. The poor stability is reflected in the fact that the uncontrollable factors of each Boost converter lead to an increase in the total number of uncontrollable factors. The low efficiency is reflected in the fact that the efficiency of each Boost converter needs to be multiplied to obtain the total efficiency.

[0019] To obtain a high-gain and simple-structure voltage converter, such as Figure 1 As shown, this embodiment provides a high-gain voltage converter for photovoltaic power generation, including a capacitor circuit, on which capacitors C0, C3, C2 and C4 are provided; In the capacitor circuit, the negative terminal of capacitor C4 is connected to the first switching transistor S. Q One end of capacitor C0 is electrically connected to the negative terminal of capacitor C3, and the other end of capacitor C0 is electrically connected to the negative terminal of capacitor C3. The positive terminal of capacitor C2 is electrically connected to the positive terminal of capacitor C3 through the first anti-reverse unit 1. The first anti-reverse unit 1 is turned on when the voltage difference between the positive terminals of capacitor C2 and capacitor C3 is greater than the first threshold voltage. The negative terminal of capacitor C2 is electrically connected to the positive terminal of capacitor C4. The negative terminal of capacitor C4 is electrically connected to the other end of capacitor C0 through the second anti-reverse unit 2. The second anti-reverse unit 2 is turned on when the voltage difference between the negative terminal of capacitor C4 and the other end of capacitor C0 is greater than the first threshold voltage. The other end of capacitor C0 is also electrically connected to the positive terminal of capacitor C2 through the third anti-reverse unit 3. The third anti-reverse unit 3 is turned on when the voltage difference between the other end of capacitor C0 and the positive terminal of capacitor C2 is greater than the second threshold voltage. The positive terminal of capacitor C4 and the other end of capacitor C0 are electrically connected to the controlled voltage source 4.

[0020] In this embodiment, the first anti-reverse unit 1, the second anti-reverse unit 2, and the third anti-reverse unit 3 form a freewheeling path, thereby creating different charging and discharging paths for capacitor C2 and capacitor C4. Capacitors C0 and C3 form an interleaved small capacitor structure, which is controlled by the first switching transistor S. QControlling the charging time of capacitor C0 can make the voltage across capacitor C0 and capacitor C3 the same, thereby making the output voltage at the other end of capacitor C0 ripple-free; where capacitor C0 can be a CBB capacitor. Controlled voltage source 4 outputs a controlled voltage based on the input photovoltaic voltage according to the output ratio, and the controlled voltage is the source of the boost voltage.

[0021] In this embodiment, a circuit diagram of a high-gain voltage converter for photovoltaic power generation is shown below. Figure 2 As shown, the first anti-reverse unit 1 includes a diode D1, the positive terminal of which is electrically connected to the positive terminal of capacitor C2, and the negative terminal of which is electrically connected to the positive terminal of capacitor C3. The third anti-reverse unit 3 includes a diode D2, the positive terminal of which is electrically connected to the other end of the capacitor C0, and the negative terminal of which is electrically connected to the positive terminal of the capacitor C2.

[0022] The second anti-reverse unit 2 includes a diode D3, the positive terminal of which is electrically connected to the negative terminal of capacitor C4, and the negative terminal of which is electrically connected to the other end of capacitor C0.

[0023] Furthermore, the first threshold voltage, the second threshold voltage, and the third threshold voltage are determined by the conduction threshold voltage of their respective diodes. In this embodiment, the first threshold voltage, the second threshold voltage, and the third threshold voltage are the same. In some implementations, at least two diodes connected in series can be provided in at least one of the first anti-reverse unit 1, the second anti-reverse unit 2, and the third anti-reverse unit 3, thereby obtaining different threshold voltages.

[0024] Book Figure 2 In the middle, the first switching transistor S Q This is an NMOS transistor. The source of the NMOS transistor is electrically connected to the negative terminal of capacitor C4, and the drain of the NMOS transistor is electrically connected to one end of capacitor C0. The gate of the NMOS transistor is used to input the drive signal, and the drive signal is used to control the on and off of the NMOS transistor.

[0025] In one implementation, the first switching transistor S Q It can also be a transistor or other types of switching transistor, which can be selected based on the conduction frequency and withstand voltage.

[0026] exist Figure 2 In the control voltage source 4, there are a second switch S and an inductor L1. The first connection terminal of the second switch S and the positive terminal of the capacitor C4 are used to connect to the photovoltaic voltage, which is generated by the external photovoltaic panel or solar panel. The second connection terminal of the second switch S is electrically connected to one end of the inductor L1 and the other end of the capacitor C4, respectively. The other end of the inductor L1 is electrically connected to the positive terminal of the capacitor C4.

[0027] exist Figure 2In the circuit, the second switch S is an NMOS transistor. The source of the NMOS transistor is its first connection terminal, and the drain of the NMOS transistor is its second connection terminal. The gate of the NMOS transistor S is used to input the second drive signal, which is used to control the on / off state of the NMOS transistor S.

[0028] In practical use, the switching on and off of the second switch S can be controlled to determine whether the photovoltaic voltage is connected to the voltage converter for charging.

[0029] Figure 2 The analysis of the two modes of the circuit shown during continuous operation is as follows: The two modes are the first mode and the second mode. The first mode is as follows: First mode: When the second switch S is turned on, the photovoltaic voltage charges inductor L1, capacitor C4, and also capacitors C2 and C3. The current flow diagram at this time is shown below. Figure 3 As shown, according to mode one, we can obtain:

[0030] Second mode: When the second switch S is turned off, inductor L1 is connected in series with capacitors C3 and C4, supplying power to the load resistor R. At the same time, inductor L1 also charges capacitor C2. According to mode two, we can obtain:

[0031] Simplifying the two formulas above, we get:

[0032] in Voltage when charging an inductor D is the voltage when the inductor discharges, and D is the duty cycle of the working cycle, that is, the duty cycle of the conduction time of the second switch S in one switching cycle. According to the operating mode of the converter, capacitors C0 and C3 are connected in series and alternately charge and discharge to suppress the output voltage ripple.

[0033] The AC expression for the output voltage of the voltage converter in this embodiment is:

[0034] During one switching cycle, the AC output voltage of capacitor C0 is:

[0035] During one switching cycle, the AC output voltage of capacitor C3 is:

[0036] If capacitor C0 is the same as capacitor C3, then in one switching cycle,

[0037] Since the amplitude of the output voltage ripple is symmetrical about the duty cycle D, the expression for the AC output voltage during the period t≥0 and t≤D is:

[0038] According to this formula, when D=0.5, the output voltage AC quantity is zero, meaning that as long as the duty cycle D=0.5, the converter's output voltage has no ripple. When D<0.5, the output voltage AC quantity gradually increases from a negative minimum as t increases, reaching zero at t=0.5D, and then reaching a positive maximum. When D>0.5, the output voltage AC quantity gradually decreases from a positive maximum as t increases to a negative minimum. The absolute value of the difference between the output voltage AC quantity at t=0 and t=D is the output voltage ripple, which is:

[0039] Based on the above, it can be concluded that when the duty cycle D is equal to 0.5, the output voltage ripple is independent of the capacitor value and the load, and the output voltage ripple is zero.

[0040] In summary, the high-gain photovoltaic power generation in this embodiment achieves high gain; secondly, it uses fewer electronic components and has a simple overall structure; furthermore, since there is no transformer, there is no leakage inductance; finally, it achieves high gain through the first switching transistor S. Q Charging and discharging capacitor C0 can make the voltage across capacitor C0 and capacitor C3 the same, ensuring that the output voltage is ripple-free.

[0041] Example 2 like Figure 5 As shown, this embodiment provides a high-gain voltage converter for photovoltaic power generation with another structure, including a capacitor circuit, on which capacitors C0, C3, C2 and C4 are provided; In the capacitor circuit, the positive terminal of capacitor C4 is connected to the first switching transistor S. Q One end of capacitor C0 is electrically connected to the positive terminal of capacitor C3; the negative terminal of capacitor C3 is electrically connected to the negative terminal of capacitor C2 through the fourth reverse protection unit 5, which conducts when the voltage difference between the negative terminals of capacitor C3 and C2 exceeds the fourth threshold voltage; the negative terminal of capacitor C2 is electrically connected to the positive terminal of capacitor C3 through the fifth reverse protection unit 6, which conducts when the voltage difference between the negative terminals of capacitor C2 and C3 exceeds the fifth threshold voltage; the positive terminal of capacitor C2 is electrically connected to the negative terminal of capacitor C4. The other end of capacitor C0 is also electrically connected to the positive terminal of capacitor C4 through the sixth anti-reverse unit 7. The sixth anti-reverse unit 7 is turned on when the voltage difference between the other end of capacitor C0 and the positive terminal of capacitor C4 is greater than the sixth threshold voltage. The negative terminal of capacitor C4 and the other end of capacitor C0 are electrically connected to the controlled voltage source 8.

[0042] In this embodiment, the fourth anti-reverse unit 5, the fifth anti-reverse unit 6, and the sixth anti-reverse unit 7 form a freewheeling path, thereby creating different charging and discharging paths for capacitor C2 and capacitor C4. Capacitors C0 and C3 form an interleaved small capacitor structure, which is controlled by the first switching transistor S. Q Controlling the charging time of capacitor C0 can make the voltage across capacitor C0 and capacitor C3 the same, thereby making the output voltage at the other end of capacitor C0 ripple-free; where capacitor C0 can be a CBB capacitor. Controlled voltage source 4 outputs a controlled voltage based on the input photovoltaic voltage according to the output ratio, and the controlled voltage is the source of the boost voltage.

[0043] In this embodiment, a circuit diagram of a high-gain voltage converter for photovoltaic power generation is shown below. Figure 6 As shown, Similarly, in the figure, the fourth anti-reverse unit 5 includes a diode D1, the positive terminal of which is electrically connected to the negative terminal of capacitor C3, and the negative terminal of which is electrically connected to the negative terminal of capacitor C2. The fifth anti-reverse unit 6 includes a diode D2, the positive terminal of which is electrically connected to the negative terminal of capacitor C2, and the negative terminal of diode D2 is electrically connected to the positive terminal of capacitor C3. The sixth anti-reverse unit 7 includes a diode D3, the positive terminal of which is electrically connected to the other end of the capacitor C0, and the negative terminal of which is electrically connected to the positive terminal of the capacitor C4.

[0044] Furthermore, the fifth, sixth, and seventh threshold voltages are determined by the conduction threshold voltages of their respective diodes. In this embodiment, the fifth, sixth, and seventh threshold voltages are the same. In some implementations, at least two diodes connected in series can be provided in at least one of the fourth anti-reverse unit 5, the fifth anti-reverse unit 6, and the sixth anti-reverse unit 7, thereby obtaining different threshold voltages.

[0045] Book Figure 6 In the middle, the first switching transistor S Q This is an NMOS transistor. The source of the NMOS transistor is electrically connected to the positive terminal of capacitor C4, and the drain of the NMOS transistor is electrically connected to one end of capacitor C0. The gate of the NMOS transistor is used to input the drive signal, and the drive signal is used to control the on and off of the NMOS transistor.

[0046] exist Figure 6In the controllable voltage source 8, there are a second switch S and an inductor L1. The first connection terminal of the second switch S and the negative terminal of the capacitor C4 are used to connect to the photovoltaic voltage. The second connection terminal of the second switch S is electrically connected to one end of the inductor L1 and the other end of the capacitor C0, respectively. The other end of the inductor L1 is electrically connected to the negative terminal of the capacitor C4.

[0047] In addition, the second switch S is an NMOS transistor, with its source at its first connection terminal and its drain at its second connection terminal. The gate of the NMOS transistor is used to input a second drive signal, which is used to control the switching on and off of the NMOS transistor.

[0048] Among them Figure 6 The calculation and analysis of the circuit's output voltage can be referred to in Example 1, and will not be described in detail here.

[0049] right Figure 6 The performance analysis of the controlled voltage source 8 in the middle is as follows: Since the charging voltage of inductor L1 is affected by the input voltage V in Controlled, and balanced according to the inductive magnetomotive force. Therefore, the discharge voltage of inductor L1 is affected by the input voltage V. in The duty cycle of the second switch S is controlled, thus the input voltage V can be controlled. in The second switch S and inductor L1 are equivalent to a controlled voltage source. When the second switch S is on, the controlled voltage source and capacitor C2 charge capacitor C3 through diode D1, and capacitor C4 is charged through diode D3. When the second switch S is off, the controlled voltage source charges capacitor C2 through diode D2. The voltage across OP is the sum of the voltage of the controlled voltage source and the voltage of capacitor C4. Combining the above, we can conclude that:

[0050] When the duty cycle D = 0.5, we can obtain:

[0051] Therefore, when the duty cycle D = 0.5, this structure can output a four-fold voltage. Due to the asymmetry of the physical structure, it is an asymmetric four-fold voltage multiplier structure. In practical applications, different boost ratios can be obtained by adjusting the duty cycle D.

[0052] In practical use, the first switching transistor S of the present invention Q The control method of the second switch S is as follows: when the second switch S is turned on, the first switch S... Q When switched off, capacitor C3 is charged and capacitor C0 is discharged. The current flow in the circuit at this time is as follows: Figure 7 As shown; when the second switch S is turned off, the first switch S QWhen the circuit is turned on, capacitor C3 discharges and capacitor C0 charges. The current flow direction at this time is as follows: Figure 8 As shown; when the second switch S turns off the first switch S Q When turned off, capacitor C3 discharges and capacitor C0 charges, and current flows from the first switching transistor S. Q When the body diode flows through, the current in the circuit flows as follows: Figure 9 As shown.

[0053] Regarding the first switching transistor S of the present invention Q The control method of the second switch S avoids the mode where capacitors C3 and C0 simultaneously discharge to the load (resistor R). This topology achieves ripple-free output voltage by controlling the alternating charging and discharging of capacitors C3 and C0. Furthermore, capacitor C3 originates from the asymmetric quadruple boost converter, thus there is actually only one output capacitor. The output three-level structure is constructed by connecting output capacitor C0 and capacitor C3 in series, saving one capacitor and reducing conversion costs. Additionally, compared to other three-level output structures, it employs a two-switch complementary conduction control method, with the second switch S and the first switch S in the switch conduction combination mode. Q The digits are 10, 00, and 01. Therefore, according to the voltage ripple expression... The proposed three-level output structure has small output ripple and is symmetrical about D=0.5.

[0054] Example 3 This embodiment provides a voltage boosting method, implemented using a high-gain voltage converter for photovoltaic power generation as described in Embodiment 1 or Embodiment 2, comprising the following steps: S1: Drives the second switch S to conduct and drives the first switch S Q Turn off; S2: Drives the second switch S and drives the first switch S Q All are turned off; S3: Drives the second switch S to turn off and drives the first switch S Q Conduction.

[0055] Based on the above description, those skilled in the art can make various changes and modifications without departing from the technical concept of this invention. The technical scope of this invention is not limited to the contents of the specification, but must be determined according to the scope of the claims.

Claims

1. A high-gain voltage converter for photovoltaic power generation, characterized in that, It includes a capacitor circuit, wherein capacitors C0, C3, C2 and C4 are provided on the capacitor circuit; In the capacitor circuit, the negative terminal of capacitor C4 is connected to the first switching transistor S. Q One end of capacitor C0 is electrically connected to the negative terminal of capacitor C3, and the other end of capacitor C0 is electrically connected to the negative terminal of capacitor C3. The positive terminal of capacitor C2 is electrically connected to the positive terminal of capacitor C3 through the first anti-reverse unit. The first anti-reverse unit conducts when the voltage difference between the positive terminals of capacitor C2 and capacitor C3 is greater than the first threshold voltage. The negative terminal of capacitor C2 is electrically connected to the positive terminal of capacitor C4. The negative terminal of capacitor C4 is electrically connected to the other end of capacitor C0 through the second anti-reverse unit. The second anti-reverse unit is turned on when the voltage difference between the negative terminal of capacitor C4 and the other end of capacitor C0 is greater than the first threshold voltage. The other end of capacitor C0 is also electrically connected to the positive terminal of capacitor C2 through a third anti-reverse unit. The third anti-reverse unit is turned on when the voltage difference between the other end of capacitor C0 and the positive terminal of capacitor C2 is greater than the second threshold voltage. The positive terminal of capacitor C4 and the other end of capacitor C0 are electrically connected to a controlled voltage source. The controlled voltage source includes a second switch S and an inductor L1. The first connection terminal of the second switch S and the positive terminal of the capacitor C4 are used to connect to the photovoltaic voltage. The second connection terminal of the second switch S is electrically connected to one end of the inductor L1 and the other end of the capacitor C0, respectively. The other end of the inductor L1 is electrically connected to the positive terminal of the capacitor C4.

2. The high-gain voltage converter for photovoltaic power generation according to claim 1, characterized in that, The first anti-reverse unit includes a diode D1, the positive terminal of which is electrically connected to the positive terminal of a capacitor C2, and the negative terminal of which is electrically connected to the positive terminal of a capacitor C3. The third anti-reverse unit includes a diode D2, the positive terminal of which is electrically connected to the other end of the capacitor C0, and the negative terminal of which is electrically connected to the positive terminal of the capacitor C2. The second anti-reverse unit includes a diode D3, the positive terminal of which is electrically connected to the negative terminal of a capacitor C4, and the negative terminal of which is electrically connected to the other end of a capacitor C0.

3. The high-gain voltage converter for photovoltaic power generation according to claim 1, characterized in that, The first switch S Q The transistor is an NMOS transistor. The source of the NMOS transistor is electrically connected to the negative terminal of capacitor C4, and the drain of the NMOS transistor is electrically connected to one end of capacitor C0. The gate of the NMOS transistor is used to input a drive signal, and the drive signal is used to control the switching on and off of the NMOS transistor.

4. The high-gain voltage converter for photovoltaic power generation according to claim 1, characterized in that, The second switch S is an NMOS transistor, with its source at its first connection terminal and its drain at its second connection terminal. The gate of the NMOS transistor is used to input a second driving signal, which is used to control the switching on and off of the NMOS transistor.

5. A high-gain voltage converter for photovoltaic power generation, characterized in that, It includes a capacitor circuit, wherein capacitors C0, C3, C2 and C4 are provided on the capacitor circuit; In the capacitor circuit, the positive terminal of capacitor C4 is connected to the first switching transistor S. Q One end of capacitor C0 is electrically connected to the positive terminal of capacitor C3; the negative terminal of capacitor C3 is electrically connected to the negative terminal of capacitor C2 through a fourth anti-reverse unit, which conducts when the voltage difference between the negative terminals of capacitor C3 and C2 exceeds a fourth threshold voltage; the negative terminal of capacitor C2 is electrically connected to the positive terminal of capacitor C3 through a fifth anti-reverse unit, which conducts when the voltage difference between the negative terminals of capacitor C2 and C3 exceeds a fifth threshold voltage; the positive terminal of capacitor C2 is electrically connected to the negative terminal of capacitor C4. The other end of capacitor C0 is also electrically connected to the positive terminal of capacitor C4 through a sixth anti-reverse unit. The sixth anti-reverse unit is turned on when the voltage difference between the other end of capacitor C0 and the positive terminal of capacitor C4 is greater than the sixth threshold voltage. The negative terminal of capacitor C4 and the other end of capacitor C0 are electrically connected to the controlled voltage source. The controlled voltage source includes a second switch S and an inductor L1. The first connection terminal of the second switch S and the negative terminal of the capacitor C4 are used to connect to the photovoltaic voltage. The second connection terminal of the second switch S is electrically connected to one end of the inductor L1 and the other end of the capacitor C0, respectively. The other end of the inductor L1 is electrically connected to the negative terminal of the capacitor C4.

6. The high-gain voltage converter for photovoltaic power generation according to claim 5, characterized in that, The fourth anti-reverse unit includes a diode D1, the positive terminal of which is electrically connected to the negative terminal of capacitor C3, and the negative terminal of which is electrically connected to the negative terminal of capacitor C2. The fifth anti-reverse unit includes a diode D2, the positive terminal of which is electrically connected to the negative terminal of capacitor C2, and the negative terminal of which is electrically connected to the positive terminal of capacitor C3. The sixth anti-reverse unit includes a diode D3, the positive terminal of which is electrically connected to the other end of a capacitor C0, and the negative terminal of which is electrically connected to the positive terminal of a capacitor C4.

7. The high-gain voltage converter for photovoltaic power generation according to claim 5, characterized in that, The second switch S is an NMOS transistor, with its source at its first connection terminal and its drain at its second connection terminal. The gate of the NMOS transistor is used to input a second driving signal, which is used to control the switching on and off of the NMOS transistor.

8. A method for boosting voltage, characterized in that, This is achieved using the high-gain voltage converter for photovoltaic power generation as described in claim 4 or 7, comprising the following steps: S1: Drives the second switch S to conduct and drives the first switch S Q Turn off; S2: Drives the second switch S and drives the first switch S Q All are turned off; S3: Drives the second switch S to turn off and drives the first switch S Q Conduction.

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