Plasma-resistant bi-layer coating structure and method of manufacturing the same

Abstract

The present invention provides a double-layer coating structure formed on the surface of a ceramic or metal substrate to reduce plasma etching and a method for manufacturing the same. The present invention provides a plasma-resistant double-layer coating structure, which includes: a ceramic or metal substrate having pits on the surface; a first coating layer, which is a crack-free ceramic coating film formed on the surface of the substrate by a spraying method other than thermal spraying, applied in a manner to fill the pits on the surface of the substrate, has fine pits formed on the surface due to the bonding of ceramic particles, and contains ceramic polycrystals having a size of less than 300 nm; and a second coating layer, which is a plasma-resistant ceramic film applied on the first coating layer by one of chemical vapor deposition (CVD), physical vapor deposition (PVD), and atomic layer deposition (ALD), formed to have a surface roughness (Ra) of less than or equal to 0.2 μm without a separate polishing process, applied in a manner to cover the fine pits, and formed to have a surface in which sites that can become starting points of plasma etching are minimized, composed of crystalline or composed of a mixture of crystalline and amorphous.

Description

Technical Field

[0001] This invention relates to a double-layer coating structure formed on the surface of a ceramic or metal substrate to reduce plasma etching and a method for manufacturing the same. Background Technology

[0002] As is well known, in semiconductor processes, process components exposed to plasma preferentially develop localized depressions (grooves; hereinafter referred to as pits) on the surface of the process component, and over time, etching proceeds to the entire process component, with the locally initiated etching spreading to the entire surface of the process component (Byung-Kuk Lee and 5 others, Non-Patent Literature 1).

[0003] Furthermore, in the past, a protective layer against plasma etching was formed by coating the surface of process components exposed to plasma in semiconductor processes with a plasma-resistant material (e.g., Y2O3, Junichi Iwasawa 4, Non-Patent Document 2).

[0004] As an example, the technology of Korean Patent 10-2213756 (Patent Document 1) forms a plasma protective coating on the surface of a substrate (process component) using a thermal spray method. However, the coating formed by the thermal spray method inevitably includes cracks and pores, and plasma etching starts locally from the initiation point of these cracks and pores and spreads to the entire process component.

[0005] Furthermore, the technology in Korean Patent 10-0938474 (Patent Document 2) forms a crack-free and almost pore-free coating on the surface of the process component through aerosol deposition (AD) method, thereby achieving a protective layer to prevent plasma etching.

[0006] Korean Patent Publication 10-2013-0044170 (Patent Document 3) builds upon the technology in Patent Document 2, which forms an aerosol deposition layer exposed to plasma, by creating cross-scratches with a depth of 1 to 2 μm on the surface of the aerosol deposition layer.

[0007] The technology in Korean Patent 10-1563130 (Patent Document 4) is based on the technology in Patent Document 3. After removing the valleys and peaks on the surface of the process component and forming a coating film, the valleys and peaks on the surface of the coating film are removed, which shows a further improvement in plasma resistance compared with the technologies in Patent Documents 1, 2 and 3.

[0008] The coatings (layers) of patent documents 1 to 4 all employ powder spraying technology. Patent document 1 employs a melt spraying method, patent documents 2 and 3 employ aerosol deposition methods, and patent document 4 employs a spraying method other than melt spraying.

[0009] On the other hand, as methods for forming a plasma protective layer, coating methods other than the spraying method include ion-assisted deposition (IAD), plasma reactive deposition (PRD), plasma-enhanced CVD, plasma-enhanced evaporation, physical vapor deposition (PVD), and plasma immersion ion process (PIIP) technology (Korean Patent 10-1309716, Patent Document 5). Other methods for forming a plasma protective layer include PECVD (plasma-enhanced CVD), physical vapor deposition (PVD), chemical vapor deposition (CVD), and atomic layer deposition (ALD) technology (Korean Patent Publication 10-2016-0143532, Patent Document 6).

[0010] The technologies described in Patent Documents 1 to 6 all involve forming a single-layer plasma protective layer on the surface of the process component exposed to plasma.

[0011] On the other hand, there is also a technology that forms a single-layer coating between the surface of the process component exposed to plasma and the plasma protection layer.

[0012] The technology of Korean Patent 10-1108692 (Patent Document 7) provides plasma resistance by forming an aerosol deposition layer of Patent Document 2 on the fusion coating of Patent Document 1. Its highlight is that the surface of the coating formed on the process component is roughened by sandblasting (average surface roughness of 0.4 to 2.3 μm), which makes the aerosol deposition layer adhere well to the fusion coating.

[0013] The technology of Korean Patent 10-2182690 (Patent Document 8) involves forming a molten coating on the surface of a process component exposed to plasma, melting a portion of the surface of the molten coating to form a surface molten layer, and forming a surface reinforcement layer on the molten layer by an aerosol deposition method.

[0014] The technology of Korean Patent 10-1817779 (Patent Document 9) provides plasma resistance by forming an aerosol deposition layer of Patent Document 2 on the molten coating of Patent Document 1. This is the same as Patent Document 7, except that the molten coating and the aerosol deposition layer are hydrated.

[0015] The technology of Korean Patent Publication 10-2019-0057753 (Patent Document 10) provides plasma resistance by forming an aerosol deposition layer of Patent Document 2 on the molten coating of Patent Document 1. This is the same as Patent Document 7, except that the surface of the molten coating is polished.

[0016] As described above, all of the patent documents 7 to 10 form an aerosol deposition layer (patent documents 2 and 3) on a plasma coating (layer) (patent document 1) with pores and cracks on the surface of the process component exposed to plasma, in order to reduce localized plasma etching.

[0017] Content of the invention

[0018] The technical problem that the invention aims to solve

[0019] The purpose of this invention is to provide a plasma-resistant double-layer coating structure that significantly reduces plasma etching by forming a first coating on the surface of a ceramic substrate and a second coating on the first coating.

[0020] Technical solutions for solving the problem

[0021] To address the problems described above, the present invention provides a plasma-resistant double-layer coating structure comprising: a ceramic or metal substrate having pits on its surface; a first coating, which is a crack-free ceramic coating formed on the surface of the substrate by a spraying method other than thermal spraying, applied to fill the pits on the surface of the substrate, the surface having micro-pits formed by the bonding of ceramic particles, including ceramic polycrystals with a crystalline size of less than 300 nm; and a second coating, which is a plasma-resistant ceramic film applied to the first coating by a method of chemical vapor deposition (CVD), physical vapor deposition (PVD), or atomic layer deposition (ALD), forming a surface roughness (Ra) of less than or equal to 0.2 μm without a separate grinding process, applied to cover the micro-pits, thereby forming a surface that minimizes sites that may become the starting point of plasma etching, and is composed of crystalline material or a mixture of crystalline and amorphous materials.

[0022] Semiconductor process components can be used as the substrate.

[0023] The first coating may be formed from any one or more of Al2O3, Y2O3, Tm2O3, Gd2O3, Dy2O3, Er2O3, and Sm2O3, such that the coating is free of cracks, has a porosity of less than or equal to 1 vol%, and a thickness of less than or equal to 20 μm.

[0024] The second coating can be formed from a ceramic film containing yttrium (Y) or a ceramic film containing metal oxides. Specifically, the second coating can be formed from any one or more of Y₂O₃, YF₃, YOF, YAG, YAP, and YAM, or from any one or more of Tm₂O₃, Gd₂O₃, Dy₂O₃, Er₂O₃, and Sm₂O₃, making the coating non-porous and with a thickness less than or equal to 15 μm. The surface hardness (Vickers hardness, Hv) of the second coating can be from Hv₅₀ to Hv₅₀.

[0025] The present invention also provides a method for manufacturing a plasma-resistant double-layer coating structure, comprising: step (a) spraying ceramic powder onto a ceramic or metal substrate having pits on its surface by a spraying method other than thermal spraying, to fill the pits on the surface of the substrate to form a first coating, wherein the surface of the first coating has micro-pits caused by the bonding of ceramic particles and contains ceramic polycrystals with a primordia size of less than 300 nm; and step (b) applying the first coating to cover the micro-pits by a method of chemical vapor deposition (CVD), physical vapor deposition (PVD), or atomic layer deposition (ALD) to form a surface that minimizes sites that may become the starting point of plasma etching, to form a second coating, wherein the second coating is composed of crystalline material or a mixture of crystalline and amorphous material and is formed of a yttrium (Y) or a ceramic film containing metal oxides, and the surface roughness (Ra) is less than or equal to 0.2 μm.

[0026] Before step (a), the method further includes step (a-0), which involves grinding the surface of the substrate. In step (a-0), the surface of the substrate can be ground until the surface roughness (Ra) is less than or equal to 0.2 μm.

[0027] Between step (a) and step (b), there is also a step (a-1), in which the surface of the first coating is ground, and in step (a-1), the surface of the first coating is ground until the surface roughness (Ra) is less than or equal to 0.2 μm.

[0028] Following step (a-1), the process further includes: step (a-2), increasing the thickness of the first coating; and step (a-3), grinding the surface of the first coating with increased thickness. In step (a-2), the thickness of the first coating can also be increased by a spraying method other than thermal spraying. In step (a-3), the surface of the first coating with increased thickness can be ground until the surface roughness (Ra) is less than or equal to 0.2 μm.

[0029] Following step (b), the method further includes step (c), which involves heat-treating the double-coated structure.

[0030] The effects of the invention

[0031] According to the present invention, the following effects can be achieved by forming a plasma-resistant double-layer coating structure on the surface of a ceramic or metal substrate:

[0032] 1. A first coating is formed on the surface of a substrate having pits ranging from several micrometers (μm) to tens of micrometers in size. A plasma-resistant ceramic film is formed on the first coating having micro-pits smaller than those on the substrate surface (the starting points where plasma etching may concentrate). This forms a second coating with no pits or significantly reduced pits to ensure the plasma resistance of the substrate, where the pits are the sites where plasma etching concentrates.

[0033] 2. Semiconductor process components with plasma-resistant double-layer coating structures reduce particle adhesion during plasma application processes.

[0034] 3. Through the plasma etching and particle reduction described above, semiconductor manufacturing and processing can be carried out continuously and stably, thereby improving production yield.

[0035] 4. Reduce the defect rate of products after the manufacturing and processing of semiconductors, etc.

[0036] 5. Extend the external cleaning cycle according to the ceramic or metal substrate. Attached Figure Description

[0037] Figure 1 This is a cross-sectional view of the plasma-resistant double-layer coating structure of the present invention.

[0038] Figure 2 This is a cross-sectional view of a single-layer coating formed along pits present on the surface of a substrate using existing PVD, CVD, or ALD methods.

[0039] Figure 3 Cross-sectional views of existing thermal spray coatings and aerosol deposition layers formed on a substrate surface by aerosol deposition.

[0040] Figure 4 This is a detailed cross-sectional view of the plasma-resistant double-layer coating structure of the present invention.

[0041] Figure 5 This is a process flow diagram of the manufacturing method of the plasma-resistant double-layer coating structure of the present invention.

[0042] Best practice

[0043] A plasma-resistant double-layer coating structure, comprising:

[0044] Ceramic or metal substrate with pits on the surface;

[0045] The first coating is a crack-free ceramic film formed on the surface of the substrate by a spraying method other than thermal spraying, applied to fill the pits on the surface of the substrate, forming micro-pits on the surface caused by the bonding of ceramic particles, including ceramic polycrystals with a crystalline size of less than 300 nm; and

[0046] The second coating is a plasma-resistant ceramic film applied to the first coating by one of the following methods: chemical vapor deposition (CVD), physical vapor deposition (PVD), or atomic layer deposition (ALD). It is formed without a separate polishing process to achieve a surface roughness (Ra) of less than or equal to 0.2 μm, and is applied in a manner that covers the micro-pits, thereby forming a surface that minimizes sites that may become the starting point of plasma etching. It is composed of crystalline material or a mixture of crystalline and amorphous materials. Detailed Implementation

[0047] The technical concept of this invention is significantly different from that of the aforementioned patent documents 1 to 10.

[0048] The aforementioned Patent Document 1 employs a spraying method, and the coating formed by this technique includes cracks and pores, through which plasma etching is significant.

[0049] Patent documents 2 to 4 mentioned above achieve plasma resistance in a single layer using powder spraying methods other than melt spraying. According to this group of technologies, although a coating with virtually no pores or cracks is achieved, micro-pits are formed on the surface during the coating process due to the bonding between powder particles. These micro-pits become weak points where plasma etching concentrates; starting from these points, the width and depth of the pits increase, also affecting the substrate.

[0050] The aforementioned patent documents 5 and 6 achieve plasma resistance by forming a single-layer coating using methods other than powder coating. According to this group of technologies, although a dense coating can be applied, the coating is thin and forms a film. Therefore, the coating is formed in the shape of pits rather than filling the pits on the substrate surface. This morphological feature of the coating becomes a vulnerability to plasma.

[0051] Patent documents 7 to 10 mentioned above achieve plasma resistance using a two-layer (melt spray coating + aerosol coating) powder spraying method. However, the surface of the aerosol coating, which is the second coating layer, still suffers from the problem of micro-pit formation described in patent documents 2 to 4. Since the melt spray coating, which is the first coating layer, is inevitably accompanied by cracks and pores, it cannot adequately prevent plasma etching that spreads from the micro-pits formed on the surface of the second coating layer.

[0052] Conversely, in the plasma-resistant double-layer coating structure of the present invention, a first coating is formed by powder spraying other than thermal spraying, and a second coating is formed by methods such as chemical vapor deposition (CVD), physical vapor deposition (PVD), and atomic layer deposition (ALD) to form a coating that is denser than the first coating (e.g., deposited at atomic units).

[0053] Even when the substrate surface has large pits ranging from several micrometers (μm) to tens of micrometers in size, the present invention fills the pits on the substrate surface with a first coating and covers the fine pits formed on the surface of the first coating with a densely applied second coating, thereby minimizing the sites where plasma etching concentrates on the surface of the second coating. Therefore, it exhibits significantly superior plasma etching resistance compared to the prior art (Patent Documents 1 to 10).

[0054] The present invention will now be described with reference to the accompanying drawings.

[0055] I. Plasma-resistant double-layer coating structure

[0056] This invention provides a plasma-resistant double-layer coating structure, comprising: a ceramic or metal substrate with pits on its surface; a first coating, which is a crack-free ceramic coating formed on the surface of the substrate by a spraying method other than thermal spraying, applied to fill the pits on the surface of the substrate, the surface having micro-pits formed by the bonding of ceramic particles, including ceramic polycrystals with a crystalline size of less than 300 nm; and a second coating, which is a plasma-resistant ceramic film applied to the first coating by one of chemical vapor deposition (CVD), physical vapor deposition (PVD), or atomic layer deposition (ALD), forming a surface roughness (Ra) of less than or equal to 0.2 μm without a separate grinding process, applied to cover the micro-pits, thereby forming a surface that minimizes sites that may become the starting point of plasma etching, and is composed of crystalline material or a mixture of crystalline and amorphous materials.

[0057] The plasma-resistant double-layer coating structure of the present invention can be manufactured according to the description in "II. Method for manufacturing plasma-resistant double-layer coating structure" described later.

[0058] like Figure 1 As shown, the structure of the present invention consists of a first coating and a second coating sequentially deposited on a ceramic or metal substrate.

[0059] like Figure 1 As shown, the plasma-resistant double-layer coating structure provided by the present invention is a coating structure consisting of a first coating layer formed on the surface of a ceramic or metal substrate and a second coating layer formed on the first coating layer.

[0060] 1. First coating

[0061] The first coating is a ceramic film containing ceramic polycrystals with a primordial size of less than 300 nm.

[0062] The first coating comprising ceramic polycrystalline means that the first coating is formed entirely of polycrystalline material, or may have a portion of amorphous material.

[0063] That is, by using powder spraying as a method for forming the first coating, the powder particles collide with the substrate at high speed (or ultra-high speed) or collide with each other, causing the particles to break and lose their crystallinity and become an amorphous phase, so that a portion of amorphous material may exist between crystals.

[0064] Furthermore, unlike the coating formed by melting ceramic powder particles through thermal spraying, the polycrystalline first coating is characterized by the ceramic powder particles breaking down due to collisions between the ceramic powder particles and the substrate or between the particles, thereby forming primordial crystals with a size of less than 300 nm.

[0065] The size of the polycrystalline precursor can be confirmed by transmission electron microscopy (TEM) images, and the composition of the ceramic film can be confirmed by energy dispersive X-ray (EDX) analysis.

[0066] The first coating may be formed from any one or more of Al2O3, Y2O3, Tm2O3, Gd2O3, Dy2O3, Er2O3, and Sm2O3.

[0067] On the other hand, unlike powder coating methods, ceramic films formed by physical vapor deposition (PVD), chemical vapor deposition (CVD), or atomic layer deposition (ALD) methods are typically formed along pits on the substrate surface, such as... Figure 2 As shown.

[0068] However, as Figure 4 As shown, the first coating is formed by filling pits on the surface of the substrate. However, during the bonding process of the ceramic powder particles used to form the coating, micro-pits may be formed on the surface of the first coating.

[0069] Furthermore, the first coating of the present invention is characterized by having a thickness of less than or equal to 20 μm. The thickness of the first coating can be confirmed by scanning electron microscopy (SEM) images.

[0070] On the other hand, such as Figure 3 As shown, thermal spray coatings on substrate surfaces inevitably involve cracks due to the method of spraying by melting powder. However, the first coating on the substrate surface of the invention is characterized by being crack-free, unlike thermal spray coatings. The presence or absence of cracks in the coating can be confirmed by scanning electron microscopy (SEM) images.

[0071] Furthermore, the first coating is characterized by having a porosity of less than or equal to 1 vol%. It may also have no porosity, or if porosity is present, it may be less than or equal to 1 vol%. The presence or absence of porosity in the first coating can be confirmed by SEM or TEM images.

[0072] 2. Second coating

[0073] The second coating is a plasma-resistant ceramic film formed on the first coating. It can be formed from a ceramic film containing yttrium (Y) or a ceramic film containing metal oxides to ensure plasma resistance.

[0074] Ceramic films containing yttrium (Y) can be made from Y₂O₃, YF₃, YOF (yttrium oxyfluoride), and YAG (yttrium aluminum, Y₃Al₅O₃). 12 It can be formed from any one or more of YAP (yttrium aluminum perovskite, YAlO3) and YAM (yttrium aluminum monoclinic, Y4Al2O9).

[0075] The ceramic film containing metal oxides can be formed from any one or more of Tm2O3, Gd2O3, Dy2O3, Er2O3, and Sm2O3.

[0076] The second coating can be entirely crystalline or a mixture of crystalline and amorphous materials. When forming the ceramic film using methods such as CVD, PVD, and ALD, a mixture of crystalline and amorphous materials can be observed. Heat treatment of this type of film transforms it into a crystalline film. Whether the ceramic film of the second coating is composed of crystalline material or a mixture of crystalline and amorphous materials can be confirmed using TEM images or selected area (SAD) diffraction patterns.

[0077] As described above, the first coating is applied in a manner that fills the pits on the surface of the substrate, but forms micro-pits on the surface. By covering the micro-pits of the first coating with the second coating, the potential starting point for plasma etching is minimized, thereby improving plasma resistance.

[0078] The second coating has a thickness of less than or equal to 15 μm and a surface hardness (Vickers hardness, Hv) of Hv500 to Hv1500, exhibiting a tendency for higher surface hardness to correlate with higher plasma resistance (plasma etching resistance). It is characterized by a surface roughness (Ra) of less than or equal to 0.2 μm.

[0079] II. Manufacturing method of plasma-resistant double-layer coating structure

[0080] This invention provides a method for manufacturing a plasma-resistant double-layer coating structure, comprising: step (a) spraying ceramic powder onto a ceramic or metal substrate with pits on its surface using a spraying method other than thermal spraying, to fill the pits on the surface of the substrate to form a first coating, wherein the surface of the first coating has micro-pits caused by the bonding of ceramic particles and contains ceramic polycrystals with a primordia size of less than 300 nm; and step (b) applying the first coating to cover the micro-pits using one of chemical vapor deposition (CVD), physical vapor deposition (PVD), or atomic layer deposition (ALD), to form a surface that minimizes sites that may become the starting point of plasma etching, to form a second coating, wherein the second coating is composed of crystalline material or a mixture of crystalline and amorphous materials and is formed of a yttrium (Y) or a ceramic film containing metal oxides, and has a surface roughness (Ra) of less than or equal to 0.2 μm.

[0081] In the section "I. Plasma-resistant double-layer coating structure" above, the features of the plasma-resistant double-layer coating structure provided by the present invention and the phenomena and effects exhibited by these features are described. The manufacturing method of the plasma-resistant double-layer coating structure will be described below.

[0082] The plasma-resistant double-layer coating structure of the present invention is constructed by means of, for example Figure 5 The process shown forms a first coating and a second coating to manufacture the product.

[0083] In step (a), ceramic powder is sprayed onto a ceramic or metal substrate to form a first coating. As described above, a semiconductor process component can be used as the substrate.

[0084] In step (a), the first coating can be formed by a spraying method other than thermal spraying (ALD method, etc.).

[0085] Before step (a), the method further includes step (a-0), grinding the surface of the substrate to make the pits on the surface of the substrate shallower, wherein in step (a-0), the surface of the substrate is ground to a surface roughness (Ra) of less than or equal to 0.2 μm.

[0086] Between steps (a) and (b), the method further includes step (a-1), which involves grinding the surface of the first coating to reduce the depth and width of the micro-pits on the surface of the first coating. In step (a-1), the surface of the first coating may also be ground until the surface roughness (Ra) is less than or equal to 0.2 μm.

[0087] Following step (a-1), the process further includes: step (a-2), increasing the thickness of the first coating; and step (a-3), grinding the surface of the first coating with increased thickness. In step (a-2), the thickness of the first coating can also be increased by a spraying method other than thermal spraying. In step (a-3), the surface of the first coating with increased thickness can be ground until the surface roughness (Ra) is less than or equal to 0.2 μm, minimizing the depth of micro-pits on the surface of the first coating with increased thickness.

[0088] In step (b), a second coating is formed on the first coating by a spraying method other than melt spraying, consisting of a ceramic film containing yttrium (Y) or a ceramic film containing metal oxides.

[0089] In step (b), a second coating can be formed by one of the following methods: chemical vapor deposition (CVD), physical vapor deposition (PVD), or atomic layer deposition (ALD). This second coating can achieve a surface roughness (Ra) of less than or equal to 0.2 μm without a separate polishing process.

[0090] Through step (b), the second coating can form a thickness of less than or equal to 15 μm, a surface hardness (Vickers hardness, Hv) of 500 to 1500, and exhibits a tendency for higher surface hardness to result in higher plasma resistance (plasma etching resistance).

[0091] Various modifications and variations can be made without departing from the spirit of the invention, and it can be applied to various fields. Therefore, the scope of protection claimed by this invention includes modifications and variations that fall within the actual scope of the aforementioned invention.

[0092] Industrial applicability

[0093] The plasma-resistant double-layer coating structure and its manufacturing method provided by this invention can be applied to the semiconductor industry.

Claims

1. A plasma-resistant double-layer coating structure, characterized in that, include: Ceramic or metal substrate with pits on the surface; The first coating is a crack-free ceramic film with a porosity of less than or equal to 1 vol% formed on the surface of the substrate by a spraying method other than melt spraying. It is applied to fill the pits on the surface of the substrate, forming micro-pits on the surface caused by the bonding of ceramic particles, and includes ceramic polycrystals with a crystalline size of less than 300 nm. The second coating is a plasma-resistant ceramic film applied to the first coating by one of chemical vapor deposition (CVD), physical vapor deposition (PVD), or atomic layer deposition (ALD). It is formed to a surface roughness Ra of less than or equal to 0.2 μm without a separate grinding process, and is applied in a manner that covers the micro-pits, thereby forming a surface that minimizes sites that may become the starting point of plasma etching. It is composed of crystalline material or in a mixture of crystalline and amorphous materials.

2. The plasma-resistant double-layer coating structure according to claim 1, characterized in that, The substrate is a semiconductor process component.

3. The plasma-resistant double-layer coating structure according to claim 1, characterized in that, The first coating is formed from any one or more of Al2O3, Y2O3, Tm2O3, Gd2O3, Dy2O3, Er2O3, and Sm2O3.

4. The plasma-resistant double-layer coating structure according to claim 1, characterized in that, The thickness of the first coating is less than or equal to 20 μm.

5. The plasma-resistant double-layer coating structure according to claim 1, characterized in that, The second coating is a ceramic film containing yttrium (Y) or a ceramic film containing metal oxides.

6. The plasma-resistant double-layer coating structure according to claim 1, characterized in that, The second coating is formed from any one or more of Y2O3, YF3, YOF, YAG, YAP, and YAM.

7. The plasma-resistant double-layer coating structure according to claim 1, characterized in that, The second coating is formed from any one or more of Tm2O3, Gd2O3, Dy2O3, Er2O3, and Sm2O3.

8. The plasma-resistant double-layer coating structure according to any one of claims 1 to 7, characterized in that, The second coating is non-porous.

9. The plasma-resistant double-layer coating structure according to claim 8, characterized in that, The thickness of the second coating is less than or equal to 15 μm.

10. The plasma-resistant double-layer coating structure according to claim 8, characterized in that, The surface hardness of the second coating is Hv500 to Hv1500.

11. A method for manufacturing a plasma-resistant double-layer coating structure, characterized in that, The plasma-resistant double-layer coating structure is the plasma-resistant double-layer coating structure as described in claim 1. The manufacturing method includes: Step (a): Ceramic powder is sprayed onto a ceramic or metal substrate with pits on its surface using a spraying method other than melt spraying, in order to fill the pits on the surface of the substrate, to form a first coating. The surface of the first coating has micro-pits caused by the bonding of ceramic particles and contains ceramic polycrystals with a crystalline size of less than 300 nm. Step (b) involves applying a coating onto the first coating in a manner that covers the micro-pits using one of chemical vapor deposition (CVD), physical vapor deposition (PVD), or atomic layer deposition (ALD), thereby forming a surface that minimizes sites that could become the starting point for plasma etching, to form a second coating. The second coating is composed of crystalline material or a mixture of crystalline and amorphous materials and is formed from yttrium Y or a ceramic film containing metal oxides, with a surface roughness Ra less than or equal to 0.2 μm.

12. The method for manufacturing a plasma-resistant double-layer coating structure according to claim 11, characterized in that, Prior to step (a), the method further includes: Step (a-0): Grind the surface of the substrate.

13. The method for manufacturing a plasma-resistant double-layer coating structure according to claim 12, characterized in that, In step (a-0), the surface of the substrate is ground until the surface roughness Ra is less than or equal to 0.2 μm.

14. The method for manufacturing a plasma-resistant double-layer coating structure according to claim 11, characterized in that, Between step (a) and step (b), the following is also included: Step (a-1): Grind the surface of the first coating.

15. The method for manufacturing a plasma-resistant double-layer coating structure according to claim 14, characterized in that, In step (a-1), the surface of the first coating is ground until the surface roughness Ra is less than or equal to 0.2 μm.

16. The method for manufacturing a plasma-resistant double-layer coating structure according to claim 15, characterized in that, Following step (a-1), the following is also included: Step (a-2): Ceramic powder is sprayed using a spraying method other than melt spraying to increase the thickness of the first coating; and Step (a-3) involves grinding the surface of the first coating with increased thickness.

17. The method for manufacturing a plasma-resistant double-layer coating structure according to claim 16, characterized in that, In step (a-3), the surface of the first coating with increased thickness is ground until the surface roughness Ra is less than or equal to 0.2 μm.

18. The method for manufacturing a plasma-resistant double-layer coating structure according to claim 11, characterized in that, Following step (b), the following is also included: Step (c) involves heat-treating the double-coated structure.

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