Gallium oxide diode based on bottom channel ohmic and double-sided flip-chip packaging technology

Abstract

The invention discloses a gallium oxide diode based on bottom flow channel ohmic and double-sided flip-chip packaging technology, including a device area and a packaging area; the device area includes a gallium oxide substrate, a gallium oxide drift layer, a cathode, an insulating layer, and an anode; the packaging area includes an upper substrate and a lower substrate; the gallium oxide drift layer is located below the gallium oxide substrate; a plurality of flow channels are formed on one side of the upper surface of the substrate, and a groove array is formed on one side of the lower surface of the drift layer; the cathode is located on the upper surface of the substrate to form a cathode ohmic area; the insulating layer is arranged in each groove of the drift layer, and extends downward from the bottom of the groove through the side wall to the lower surface covering part of the drift layer; the anode is located on the lower surface of the gallium oxide drift layer and the insulating layer to form an anode Schottky area; the packaging area adopts a double-sided flip-chip packaging method to connect the anode Schottky area to the lower substrate; and the cathode ohmic area is connected to the upper substrate at the same time. The device structure comprehensively improves the thermoelectric characteristics and reliability of the gallium oxide diode under steady and transient conditions.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor technology, and in particular relates to a gallium oxide diode based on bottom channel ohmic and double-sided flip-chip packaging technology and a preparation method thereof. Background Art

[0002] Gallium oxide (Ga2O3), also known as gallium trioxide, is a wide bandgap semiconductor material. Due to its ultra-wide bandgap (4.6-4.9 eV) and the advantages of providing high-quality, low-cost melt-grown substrates, it has become the main candidate material for the next generation of power electronic devices. Among them, Schottky diodes made of Ga2O3 materials have the advantage of fast switching speed, which is of great significance for improving the efficiency and high-temperature operability of induction motor controllers and power supplies, as well as reducing forward voltage drop. However, due to the low anisotropic thermal conductivity of Ga2O3 materials (11-27 W / mK at 300K), the device will cause overheating problems, especially for ampere-level high-current gallium oxide diodes. The above problem has become one of the main obstacles to the maturity of this technology. Therefore, device thermal management is required to improve the thermoelectric properties of the device.

[0003] At present, the existing thermal management solutions for gallium oxide diodes are mainly based on packaging-level thermal management solutions. For example, the technical solution of transistor outline (TO) packaging is adopted. This solution performs pressureless nanosilver sintering at 250°C, flips the Ga2O3 device onto a 0.5mm thick copper-molybdenum-copper substrate, and connects the device cathode to the lead frame through five gold bonding wires with a diameter of 1mm, and finally encapsulates it in epoxy compound. Another is the heat dissipation technical solution of double-sided nanosilver flip-chip. This solution first performs a pressureless sintering process on the nanosilver paste in the air. The sintering method is: from room temperature to 250°C at a heating rate of 6°C / min, and maintains at 250°C for 30 minutes, then air cools to room temperature, and then uses a laser cutting mask to print a 50μm thick nanosilver paste on the pad with the minimum lateral leakage. The anode and cathode of the Ga2O3 chip are sintered on a 1mm thick Ag plate using the above method to complete the packaging.

[0004] However, for Ga2O3 devices, on the one hand, under steady-state conditions, about 30% of the heat generated by the Ga2O3 diode is concentrated in the area near the Schottky junction, and 70% of the heat is conducted through the Ga2O3 body area with low thermal conductivity; on the other hand, under transient conditions, a large amount of heat generated by the Ga2O3 diode is concentrated in the Schottky junction area and needs to be dissipated from the Schottky junction area. Therefore, it is difficult for the TO package that only manages the heat of a single contact end to meet the thermal management requirements of the Ga2O3 diode under steady-state and transient conditions. More importantly, the thermal conductivity of Ga2O3 is only 1 / 6 of that of silicon, and the heat dissipation level of the material body area is severely limited. Even if the existing nanosilver flip-chip packaging thermal management method is used to manage the heat accumulation in the Schottky junction area and the substrate ohmic body area, its steady-state and transient thermoelectric characteristics cannot be significantly improved.

[0005] In summary, the existing thermal management solutions have poor thermal management effects on the problem of poor heat dissipation in the device body area, and cannot effectively improve the thermoelectric characteristics of gallium oxide diodes under stable and transient conditions. Summary of the invention

[0006] In order to solve the above problems existing in the prior art, the present invention provides a gallium oxide diode based on bottom channel ohmic and double-sided flip-chip packaging technology and a preparation method thereof. The technical problem to be solved by the present invention is achieved by the following technical solutions:

[0007] In the first aspect, the present invention proposes a gallium oxide diode based on bottom channel ohmic and double-sided flip-chip packaging technology, including a device area and a packaging area; the device area includes a gallium oxide substrate, a gallium oxide drift layer, a cathode, an insulating layer, and an anode; the packaging area includes an upper substrate and a lower substrate; wherein,

[0008] The gallium oxide drift layer is located below the gallium oxide substrate; a plurality of flow channels are formed on one side of the upper surface of the gallium oxide substrate, and a groove array is formed on one side of the lower surface of the gallium oxide drift layer;

[0009] The cathode is located on the upper surface of the gallium oxide substrate and covers the sidewall and bottom of the flow channel to form a cathode ohmic region;

[0010] The insulating layer is disposed in each groove of the gallium oxide drift layer groove array and extends downward from the bottom of the groove through the side wall to the lower surface of the portion of the gallium oxide drift layer covering the side edge of the top of the groove; the anode is located on the lower surface of the gallium oxide drift layer and the insulating layer and completely fills each groove to form an anode Schottky region;

[0011] The packaging area adopts double-sided flip-chip packaging technology to connect the anode Schottky area to the lower substrate and the cathode ohmic area to the upper substrate.

[0012] In a second aspect, the present invention proposes a method for preparing a gallium oxide diode based on bottom channel ohmic and double-sided flip-chip packaging technology, which is used to prepare the gallium oxide diode provided by the first aspect of the present invention, comprising:

[0013] Providing a gallium oxide substrate, and growing a gallium oxide drift layer on the gallium oxide substrate;

[0014] The gallium oxide substrate is etched by a laser etching process to form a plurality of flow channels on a side away from the gallium oxide drift layer;

[0015] A cathode is made on the side of the gallium oxide substrate where the flow channel is etched, so as to form a cathode ohmic region of the device;

[0016] The gallium oxide drift layer is etched to form a groove array on the side away from the gallium oxide substrate, and the insulating layer is grown and etched to expose the Schottky region, and an anode is made to form the anode Schottky region of the device, thereby obtaining a gallium oxide diode device;

[0017] The anode and cathode of the obtained gallium oxide diode device are subjected to thickening electrode treatment, and then the anode is flipped down between the pre-prepared upper and lower substrates for packaging, and the anode Schottky area is connected to the lower substrate, and the cathode ohmic area is connected to the upper substrate to form a gallium oxide diode structure based on bottom channel ohmic and double-sided flip-chip packaging technology.

[0018] Beneficial effects of the present invention:

[0019] 1. The present invention proposes a thermal management solution based on the combination of ohmic contact technology based on bottom channel etching and double-sided flip-chip packaging technology from the perspective of global thermal management of device-level body heat dissipation and packaging-level main heat source area heat dissipation. On the one hand, in view of the heat dissipation problem of the gallium oxide diode device body area, a thermoelectrically optimized ohmic contact technology based on bottom channel etching is proposed. By etching the channel on one side of the substrate, the device heat dissipation area is increased, the ohmic contact is optimized, and the heat dissipation level of the device body area is improved; on the other hand, the double-sided flip-chip packaging technology is adopted to directly connect the Schottky junction area and the body area of ​​the channel substrate where heat is concentrated with the upper and lower heat dissipation carriers, further effectively improving the heat dissipation capacity of the main heat source area of ​​the gallium oxide trench diode, and comprehensively improving the thermoelectric characteristics and reliability of the gallium oxide diode under steady and transient conditions;

[0020] 2. When performing double-sided flip-chip packaging of the device, the present invention uses nano silver paste solder as a connecting layer, and dopes the nano silver paste with micro particles with high thermal conductivity, further improving the thermal conductivity of the nano silver paste connecting layer. At the same time, the nano silver paste solder filled with micro particles is used to fill the flow channel on the device substrate, greatly improving the heat dissipation level of the body area of ​​the gallium oxide diode.

[0021] 3. The present invention adopts a diamond substrate and a silver-plated metallization layer to realize double-sided flip-chip packaging of the device. The contact layer between the silver-plated metallization layer and the diamond is a metal with high thermal conductivity and large sound velocity, which can effectively reduce the interface contact thermal resistance and reduce the interface acoustic mismatch, and further effectively improve the heat dissipation capacity of the main heat source area of ​​the gallium oxide diode.

[0022] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 It is a schematic structural diagram of a gallium oxide diode based on bottom channel ohmic and double-sided flip-chip packaging technology provided by an embodiment of the present invention;

[0024] Figure 2 It is a schematic flow chart of a method for preparing a gallium oxide diode based on bottom channel ohmic and double-sided flip-chip packaging technology provided by an embodiment of the present invention;

[0025] Figure 3 (a)-3(m) is a schematic diagram of the process of preparing a gallium oxide diode based on bottom channel ohmic and double-sided flip-chip packaging technology provided by an embodiment of the present invention;

[0026] Description of reference numerals:

[0027] 1-gallium oxide substrate, 2-gallium oxide drift layer, 3-cathode, 4-insulating layer, 5-anode, 6-upper substrate, 7-lower substrate, 8-flow channel, 9-groove array, 10-thickened electrode, 11-connecting layer, 12-first metallization layer, 13-second metallization layer, 14-third metallization layer, 15-bonding wire, 16-copper pillar. DETAILED DESCRIPTION

[0028] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0029] Embodiment 1

[0030] See also Figure 1 , Figure 1 Schematic diagram of the structure of the gallium oxide diode based on flow channel and double-sided flip-chip thermal management provided by the embodiment of the present invention. The gallium oxide diode based on flow channel and double-sided flip-chip thermal management provided by this embodiment includes a device area and a packaging area; the device area includes a gallium oxide substrate 1, a gallium oxide drift layer 2, a cathode 3, an insulating layer 4, and an anode 5; the packaging area includes an upper substrate 6 and a lower substrate 7; wherein,

[0031] The gallium oxide drift layer 2 is located below the gallium oxide substrate 1; a plurality of flow channels 8 are formed on one side of the upper surface of the gallium oxide substrate 1, and a groove array 9 is formed on one side of the lower surface of the gallium oxide drift layer 2;

[0032] The cathode 3 is located on the upper surface of the gallium oxide substrate 1 and covers the sidewall and bottom of the flow channel 8 to form a cathode ohmic region;

[0033] The insulating layer 4 is disposed in each groove of the groove array 9 and extends downward from the bottom of the groove through the side wall to cover the lower surface of the gallium oxide drift layer 2 at the side edge of the top of the groove; the anode 5 is located on the lower surface of the gallium oxide drift layer 2 and the insulating layer 4 and completely fills each groove to form an anode Schottky region;

[0034] The packaging area adopts a double-sided flip-chip packaging method to connect the anode Schottky area to the lower substrate 7; and at the same time, the cathode ohmic area is connected to the upper substrate 6.

[0035] Preferably, as an implementation method, a plurality of flow channels 8 can be evenly arranged on the gallium oxide substrate 1, and the depth of the flow channel is the same as the spacing between two adjacent flow channels. The advantage of such a design is that the body region of the device can dissipate heat evenly. For example, in this embodiment, the depth and spacing of the flow channel 8 can be selected to be set between 50-200 μm.

[0036] It is understandable that in the process of implementing this solution, the flow channel distribution, groove shape and size information can be adaptively adjusted according to the heat distribution of the device. For example, more flow channels can be etched in areas with more heat, and the number of flow channels can be relatively reduced in areas with less heat.

[0037] In addition, regarding the cross-sectional shape of the flow channel, the embodiment preferably has a rectangular shape. Obviously, in specific applications, it can also be designed as a trapezoid, a circle, a polygon or other shapes, and the distribution can also be different. The specific selection can be made according to the actual situation, and this embodiment does not make specific limitations on this.

[0038] It should be noted that in the process of implementing the present invention, in order to overcome the problem that the existing ICP (Inductively Coupled Plasma) etching is difficult to etch deep trenches in gallium oxide, this embodiment proposes for the first time to use a microjet etching process to etch deep trenches on one side of the device body area, thereby increasing the device's heat dissipation area and optimizing the ohmic contact.

[0039] In this embodiment, a thermoelectrically optimized ohmic contact solution based on bottom channel etching is designed to solve the heat dissipation problem in the body region of the gallium oxide diode device. This embodiment adopts a micro jet etching process to etch a number of channels 8 on the gallium oxide substrate 1, and then forms a large-sized gallium oxide diode on this material, which effectively improves the device ohmic contact characteristics and the thermal management capability of the device body region while ensuring the device breakdown characteristics.

[0040] Furthermore, based on the above optimization scheme, in order to effectively improve the heat dissipation capacity of the main heat source area of ​​the gallium oxide diode (ie, the Schottky junction area and the flow channel substrate body area), this embodiment adopts a double-sided flip-chip packaging scheme.

[0041] For more details, please see Figure 1 , wherein the packaging area further includes a thickened electrode 10, a connecting layer 11, a first metallization layer 12 and a second metallization layer 13; wherein,

[0042] The thickened electrode 10 includes two parts, which are respectively arranged on the surface of the anode 5 and the cathode 3;

[0043] The connecting layer 11 includes two parts, which are respectively arranged on the two thickened electrodes 10;

[0044] The first metallization layer 12 includes two parts, which are respectively arranged on the lower surface of the upper substrate 6 and the upper surface of the lower substrate 7;

[0045] The device region anode is flipped downward between the upper substrate 6 and the lower substrate 7; wherein the first metallization layer 12 located on the upper substrate 6 is connected to the thickened electrode 10 located on the surface of the cathode 3 through the corresponding connection layer 11, and the first metallization layer 12 located on the lower substrate 7 is connected to the thickened electrode 10 located on the surface of the anode 5 through the corresponding connection layer 11; and on the cathode 3 side, the connection layer 11 completely fills a plurality of flow channels 8;

[0046] The second metallization layer 13 includes two parts, which are arranged on the upper surface of the lower substrate 7 and located on both sides of the first metallization layer 12; and the second metallization layer 13 is connected to the first metallization layer 12 located on the upper substrate.

[0047] Optionally, as an implementation method, this embodiment can lengthen the first metallization layer 12 located at the lower surface of the upper substrate 6, and then use conductive silver paste to sinter bonding wires or conductive tapes to achieve connection and conductivity between the first metallization layer 12 and the second metallization layer 13.

[0048] In addition, a third metallization layer 14 may be disposed on the upper surface of the upper substrate 6 and connected to the second metallization layer 13 ; and the third metallization layer 14 may be connected to the first metallization layer 12 disposed on the lower surface of the upper substrate 6 .

[0049] Optionally, this embodiment uses bonding wires 15 to achieve connection between the third metallization layer 14 and the second metallization layer 13. At the same time, copper pillars 16 are plated on the upper substrate 6 to achieve connection and conduction between the upper third metallization layer 14 and the lower first metallization layer 12.

[0050] In this embodiment, the thickened electrode 10 is mainly used to protect the electrode during the packaging process, and can be made of the same material as the electrode material, generally Ti / Ag metal. In addition, other metals with good electrical and thermal conductivity are also applicable.

[0051] Further, the main function of the connecting layer 11 is to solder the device body to the package substrate, and its conventional solder is generally sintered with nano silver. However, since the previous sintering process itself will cause the connection surface to be rough, the contact thermal resistance between the nano silver layer and its contact layer will increase, resulting in a poor heat dissipation capacity of the device. Therefore, the present embodiment uses a nano silver paste solder made by a sintering process that optimizes the sintering temperature, heating rate and holding time as the material of the connecting layer 11.

[0052] In the specific implementation, Figure 1 As shown, the flow channel 8 on the gallium oxide substrate 1 is filled with nano silver solder. The heat dissipation level of the body region of the gallium oxide diode can be further improved by filling the flow channel at the bottom of the device with solder and connecting the flow channel cathode with the heat dissipation substrate.

[0053] It should be noted that, in order to further improve the thermal conductivity of the connection layer, this embodiment also selects to fill some microparticles with high thermal conductivity in the nanosilver paste solder. Those skilled in the art know that common microparticles with high thermal conductivity mainly include: FeCr / Al2O3 composite particles, boron nitride, graphene and carbon nanotubes. By adding microparticles with high thermal conductivity to the nanosilver paste of the connection layer 11, the thermal conductivity of the nanosilver paste connection layer is further improved, and at the same time, the nanosilver paste solder filled with microparticles is used to fill the flow channel on the device substrate, which greatly improves the heat dissipation level of the body area of ​​the gallium oxide diode, thereby further improving the thermoelectric performance of the device.

[0054] Furthermore, in this embodiment, the material of the thickened electrode is Ti / Ag metal; the materials of the first metallization layer 12, the second metallization layer 13 and the third metallization layer 14 are generally selected from metallization layers with good electrical and thermal conductivity, such as titanium, tungsten, nickel, chromium, manganese, gold, silver, copper, etc. In this embodiment, silver-plated metallization layers are preferred.

[0055] In addition, the upper substrate 6 and the lower substrate 7 used for packaging can be made of materials with high thermal conductivity and good heat dissipation ability, such as diamond substrate, silver substrate, aluminum nitride substrate, etc. Specifically, the diamond substrate is preferred in this embodiment.

[0056] This embodiment adopts a double-sided flip-chip solution based on a diamond carrier to optimize nanosilver connection. On the one hand, the Schottky junction area (anode metal and gallium oxide contact area) where heat is concentrated is directly connected to the heat dissipation carrier, so that the main heat conduction avoids the heat dissipation channel of the body area (substrate area) with low thermal conductivity of gallium oxide as much as possible, and realizes the short-distance low thermal resistance direct transmission of heat in the Schottky junction area. On the other hand, on the basis of optimizing the ohmic contact characteristics by etching the flow channel at the bottom, the flow channel grooved at the bottom of the device is filled with nanosilver paste solder filled with microparticles, and the connection of the flow channel cathode with the heat dissipation carrier can further improve the heat dissipation level of the body area of ​​the gallium oxide diode.

[0057] In addition, the present embodiment uses a diamond substrate, a silver thickened electrode and a silver-plated metallization layer to implement double-sided flip-chip packaging of the device, further effectively improving the heat dissipation capacity of the main heat source area of ​​the gallium oxide diode.

[0058] Specifically, in this embodiment, the surfaces in contact with the nano silver paste are all made of metallic silver, which can minimize the contact thermal resistance between each metallization layer and the nano silver paste. In this embodiment, the silver-plated metallization layer used on the diamond substrate is a composite multilayer metallization layer, and the contact layer between the silver-plated metallization layer and the diamond is a metal with high thermal conductivity and high sound velocity (such as metals such as Cr, W and Ti), which can effectively reduce the interface contact thermal resistance and reduce the interface acoustic mismatch. Therefore, the device structure and material combination provided by this embodiment can achieve the optimal heat dissipation capacity.

[0059] The present invention proposes a thermal management scheme combining ohmic contact technology based on bottom channel etching and double-sided flip-chip packaging technology from the perspective of global thermal management of heat dissipation in the device-level body area and heat dissipation in the main heat source area at the packaging level. On the one hand, an ohmic contact technology based on thermoelectric optimization of bottom channel etching is proposed. By etching the channel on one side of the substrate, the heat dissipation area of ​​the device is increased, the ohmic contact is optimized, and the heat dissipation level of the device body area is improved. On the other hand, the double-sided flip-chip packaging technology is adopted to directly connect the Schottky junction area where heat is concentrated with the lower heat dissipation carrier, so that the main heat conduction avoids the body area (substrate area) with low thermal conductivity of gallium oxide as much as possible, and realizes the short-distance low thermal resistance direct transmission of heat in the Schottky junction area. At the same time, on the basis of optimizing the ohmic contact characteristics of the bottom etching channel, the bottom channel of the device is filled with nano silver paste solder filled with microparticles, and then the body area of ​​the channel is further connected to the heat dissipation carrier, which can greatly improve the heat dissipation level of the body area of ​​the gallium oxide diode. The present invention comprehensively improves the thermoelectric characteristics and reliability of gallium oxide diodes under stable and transient conditions, and provides the possibility of significantly improving the thermoelectric characteristics and life of the device.

[0060] Embodiment 2

[0061] Based on the above-mentioned embodiment 1, and based on the same inventive concept, this embodiment provides a method for preparing a gallium oxide diode based on bottom channel ohmic and double-sided flip-chip packaging technology. The preparation method provided in this embodiment mainly includes the preparation of the device area and the preparation of double-sided nano-flip-chip packaging of the device area. Figure 2 and Figure 3 (a)-3(m) provides a detailed introduction to the preparation method and implementation process provided in this embodiment. Figure 2 It is a schematic flow chart of a method for preparing a gallium oxide diode based on bottom channel ohmic and double-sided flip-chip packaging technology provided by an embodiment of the present invention; Figure 3 (a)-3(m) is a schematic diagram of the process of preparing a gallium oxide diode based on bottom channel ohmic and double-sided flip-chip packaging technology provided in an embodiment of the present invention.

[0062] The method for preparing a gallium oxide diode based on bottom channel ohmic and double-sided flip-chip packaging technology provided in this embodiment specifically includes the following steps:

[0063] Step 1: providing a gallium oxide substrate 1 and growing a gallium oxide drift layer 2 on the gallium oxide substrate 1.

[0064] Specifically, the present embodiment adopts the HVPE (Hydride Vapor Phase Epitaxy) process to grow the gallium oxide drift layer 2 on the gallium oxide substrate 1. Figure 3 (a) shown.

[0065] Step 2: Etch the gallium oxide substrate 1 using a laser etching process to form a plurality of flow channels 8 on a side away from the gallium oxide drift layer 2 .

[0066] Specifically, a laser etching process can be used to carve evenly arranged flow channels with a depth and interval of about 50-200 μm on the gallium oxide substrate layer, such as Figure 3 (b) as shown.

[0067] Step 3: A cathode 3 is fabricated by etching the side of the gallium oxide substrate 1 where the flow channel 8 is formed, so as to form a cathode ohmic region of the device.

[0068] Specifically, titanium (Ti) / gold (Au) is grown on the lower surface of the gallium oxide substrate layer by metal evaporation and annealing process as cathode metal, and then annealed at high temperature to form an ohmic contact, such as Figure 3 (c) as shown.

[0069] Step 4: Etch the gallium oxide drift layer 2 to form a groove array 9 on the side away from the gallium oxide substrate 1, and at the same time grow and etch the insulating layer 4 to expose the Schottky area, and make the anode 5 to form the anode Schottky region of the device, thereby obtaining a gallium oxide diode device.

[0070] Specifically, a first layer of Schottky metal is grown on the gallium oxide drift layer 2 by using photolithography and metal evaporation process. The material is nickel (Ni) / gold (Au) gold, which can form a Schottky contact with the gallium oxide material and can be used as a metal mask for etching grooves. Figure 3 (d) as shown.

[0071] Then, a plasma etching process is used to etch a number of evenly arranged grooves with a depth greater than 1 μm on the gallium oxide drift 2 to form a groove array 9, such as Figure 3 (e) as shown.

[0072] Next, an atomic layer deposition technique is used to grow a groove dielectric on the first Schottky metal upper surface in each groove in the groove array 9 and on the gallium oxide drift layer 2 at the top side edge of each groove to form an insulating layer 4, such as Figure 3 (f) Wherein, the dielectric material may be hafnium oxide, aluminum oxide, etc.

[0073] Next, a portion of the insulating layer 4 is etched using photolithography and ICP etching processes so that the metal and the gallium oxide material form a Schottky contact, such as Figure 3 (g) as shown.

[0074] Finally, a second layer of Schottky metal is grown on the gallium oxide drift layer 2 by using photolithography and metal evaporation technology. The material is nickel (Ni) / gold (Au) to form a device anode 5. Figure 3 (h) shown.

[0075] At this point, the fabrication of the gallium oxide diode device is completed.

[0076] Next, execute step 5 to perform double-sided flip-chip packaging on the device.

[0077] Step 5: The anode 5 and cathode 3 of the obtained gallium oxide diode device are treated with thickened electrodes 10, and then the anode 5 is flipped down between the pre-prepared upper substrate 6 and lower substrate 7 for packaging, and the anode Schottky area is connected to the lower substrate 7, and the cathode ohmic area is connected to the upper substrate 6, so as to form a gallium oxide diode structure based on bottom channel ohmic and double-sided flip-chip packaging technology.

[0078] It is understandable that before device packaging, a thickened electrode 10 and a connecting layer 11 need to be formed on the surface of the anode 5 and the cathode 3 of the device obtained in step 4; wherein, on the cathode 3 side, the connecting layer 11 needs to completely fill several flow channels 9.

[0079] Specifically, firstly, a layer of titanium and silver with a thickness of about 0.5 μm is grown on the anode 5 and cathode 3 of the device as the thickened electrode 10, such as Figure 3 (i) as shown.

[0080] Then, a nano silver paste filled with high thermal conductivity micro particles is sintered on the thickened electrodes 10 on both sides, with a thickness of about 30 μm, to form two connecting layers 11, such as Figure 3 It should be noted that, on the cathode 3 side, the nano silver paste should completely fill the plurality of flow channels 8 .

[0081] The obtained device anode 5 is then flipped down on the lower substrate 7 formed of diamond ceramic material. The lower substrate 7 is pre-formed with a first metallization layer 12 and a second metallization layer 13; the second metallization layer 13 includes two parts, which are arranged on the upper surface of the lower substrate 7 and are located on both sides of the device mounting area (i.e., the location of the first metallization layer 12). Figure 3 (k) as shown.

[0082] Then the upper substrate 6 is mounted above the entire device.

[0083] It can be understood that the upper and lower surfaces of the upper substrate 6 are pre-formed with the third metallization layer 14 and the first metallization layer 12. At the same time, the upper substrate 6 is provided with through holes and electroplated with copper pillars 16 to connect the upper third metallization layer 14 and the lower first metallization layer 12. When installing, the first metallization layer 12 on the upper substrate 6 is placed downward and connected to the connection layer 11, as shown in FIG. Figure 3 (l) as shown.

[0084] Finally, the third metallization layer 14 is connected to the second metallization layer 13 at the bottom by means of bonding wires to complete the packaging of the gallium oxide diode. Figure 3 (m) shown.

[0085] At this point, the preparation of gallium oxide diodes based on flow channels and double-sided flip-chip thermal management has been achieved.

[0086] It can be understood that the method provided in the second embodiment can be used to prepare the device provided in the first embodiment above. For relevant details, please refer to some descriptions in the first embodiment. In the specific implementation process, those skilled in the art can also adaptively adjust the order of the process steps according to the actual situation.

[0087] Therefore, the gallium oxide diode prepared by this method also has a high level of body heat dissipation, as well as good thermoelectric properties and reliability under steady and transient conditions.

[0088] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0089] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0090] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.

[0091] The above contents are further detailed descriptions of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions or substitutions can be made without departing from the concept of the present invention, which should be regarded as falling within the protection scope of the present invention.

Claims

1. A gallium oxide diode based on bottom channel ohmic and double-sided flip-chip packaging technology, characterized in that: It includes a device area and a packaging area; the device area includes a gallium oxide substrate, a gallium oxide drift layer, a cathode, an insulating layer and an anode; the packaging area includes an upper substrate and a lower substrate; wherein, The gallium oxide drift layer is located below the gallium oxide substrate; a plurality of flow channels are formed on one side of the upper surface of the gallium oxide substrate, and a groove array is formed on one side of the lower surface of the gallium oxide drift layer; The cathode is located on the upper surface of the gallium oxide substrate and covers the sidewall and bottom of the flow channel to form a cathode ohmic region; The insulating layer is disposed in each groove of the gallium oxide drift layer groove array, and extends downward from the bottom of the groove through the side wall to the lower surface of a portion of the gallium oxide drift layer covering the side edge of the top of the groove; the anode is located on the lower surface of the gallium oxide drift layer and the insulating layer, and completely fills each groove to form an anode Schottky region; The packaging area uses a double-sided flip-chip packaging technology to connect the anode Schottky area to the lower substrate and connect the cathode ohmic area to the upper substrate; The packaging area also includes a thickened electrode, a connection layer, a first metallization layer and a second metallization layer; wherein, The thickened electrode comprises two parts, which are respectively arranged on the surfaces of the anode and the cathode; The connecting layer includes two parts, which are respectively arranged on the two thickened electrodes; The first metallization layer includes two parts, which are respectively arranged on the lower surface of the upper substrate and the upper surface of the lower substrate; The device region anode is flipped downward between the upper substrate and the lower substrate; wherein the first metallization layer located on the upper substrate is connected to the thickened electrode located on the cathode surface through a corresponding connection layer, and the first metallization layer located on the lower substrate is connected to the thickened electrode located on the anode surface through a corresponding connection layer; and on the cathode side, the connection layer completely fills the plurality of flow channels; The second metallization layer includes two parts, which are arranged on the upper surface of the lower substrate and located on both sides of the first metallization layer; and the second metallization layer is connected to the first metallization layer located on the upper substrate.

2. The gallium oxide diode based on bottom channel ohmic and double-sided flip chip packaging technology according to claim 1, characterized in that: The plurality of flow channels are evenly arranged on one side of the upper surface of the gallium oxide substrate; and the depth of the plurality of flow channels is the same as the distance between two adjacent flow channels.

3. The gallium oxide diode based on bottom channel ohmic and double-sided flip chip packaging technology according to claim 1, characterized in that: The material of the connection layer includes nano silver paste solder; and the nano silver paste solder is filled with micro particles with high thermal conductivity.

4. The gallium oxide diode based on bottom channel ohmic and double-sided flip chip packaging technology according to claim 1, characterized in that: The packaging area also includes a third metallization layer; the third metallization layer is arranged on the upper surface of the upper substrate and connected to the second metallization layer; the third metallization layer is also connected to the first metallization layer arranged on the lower surface of the upper substrate.

5. The gallium oxide diode based on bottom channel ohmic and double-sided flip chip packaging technology according to claim 4, characterized in that: The first metallization layer, the second metallization layer and the third metallization layer are all silver-plated metallization layers.

6. The gallium oxide diode based on bottom channel ohmic and double-sided flip chip packaging technology according to claim 1, characterized in that: The material of the thickened electrode includes Ti / Ag metal.

7. The gallium oxide diode based on bottom channel ohmic and double-sided flip chip packaging technology according to claim 1, characterized in that: The upper substrate and the lower substrate are both made of diamond substrates.

8. A method for preparing a gallium oxide diode based on bottom channel ohmic and double-sided flip-chip packaging technology, used to prepare the gallium oxide diode according to any one of claims 1 to 7, characterized in that: include: Providing a gallium oxide substrate, and growing a gallium oxide drift layer on the gallium oxide substrate; Etching the gallium oxide substrate by laser etching process to form a plurality of flow channels on a side away from the gallium oxide drift layer; A cathode is fabricated on the side of the gallium oxide substrate where the flow channel is etched, so as to form a cathode ohmic region of the device; Etching the gallium oxide drift layer to form a groove array on a side away from the gallium oxide substrate, and simultaneously growing and etching an insulating layer to expose a Schottky region, and manufacturing an anode to form an anode Schottky region of the device, thereby obtaining a gallium oxide diode device; The anode and cathode of the obtained gallium oxide diode device are subjected to thickening electrode processing, and then the anode is flipped down between the pre-prepared upper substrate and lower substrate for packaging, and the anode Schottky region is connected to the lower substrate, and the cathode ohmic region is connected to the upper substrate, so as to form a gallium oxide diode structure based on bottom channel ohmic and double-sided flip-chip packaging technology; Before packaging the gallium oxide diode device, the method further includes: Forming a connection layer on the surface of the anode and the cathode; wherein, on the cathode side, the connection layer completely fills the plurality of flow channels; At the same time, a first metallization layer and a second metal layer are formed on a pre-prepared lower substrate, and a first metallization layer is formed on a pre-prepared upper substrate; wherein the second metallization layer includes two parts, which are arranged on the upper surface of the lower substrate and located on both sides of the device mounting area.

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