Modular multilevel converter stability evaluation method, system, terminal and medium

Abstract

The application discloses a kind of modular multilevel converter stability evaluation method, system, terminal and medium, comprising: the single-phase sequence admittance matrix of the AC side of the modular multilevel converter under asymmetric condition is truncated, and a plurality of orders of first admittance matrix are obtained;Every first admittance matrix of order is traversed, the ratio of the vector norm of the central column vector residual element of single-phase sequence admittance matrix and the central column vector norm of the first admittance matrix of current order is used as the dimensionality reduction error of current order, if the dimensionality reduction error of current order is less than preset threshold, then the order corresponding to current order is used as the dimensionality reduction order and traversal is ended;According to the dimensionality reduction order, the three-phase sequence admittance matrix corresponding to the converter is dimensionality reduced, then the dimensionality reduced admittance matrix obtained by dimensionality reduction is equivalent to single-input single-output impedance, and the stability of the converter is evaluated based on single-input single-output impedance. Adopting the embodiment of the present application, the resource occupation is reduced and the evaluation accuracy of the stability of the converter is improved.

Description

Technical Field

[0001] This invention relates to the field of performance analysis of modular multilevel converters, and in particular to a method, system, terminal and medium for stability evaluation of modular multilevel converters. Background Technology

[0002] Modular multilevel converters (MMCs) are voltage source converters with many advantages, such as good output waveform quality, low loss, and strong fault handling capabilities, and are therefore often used in high voltage direct current (HVDC) transmission. However, with the increase in voltage and capacity levels of MMC-HVDCs, the stability issues of flexible DC transmission projects have become increasingly prominent. For example, the risk of harmonic resonance is high in flexible DC transmission systems for new energy sources. Furthermore, due to the high degree of power electronics and the integration of new energy sources, MMC-HVDCs are characterized by wide resonant frequency bands, diverse types, and complex mechanisms. Resonance problems in flexible DC projects can affect the stable operation of the power grid.

[0003] In practical engineering, there may be asymmetrical operating conditions such as three-phase grid voltage asymmetry, grid-side impedance asymmetry, and bridge arm inductance asymmetry. Under asymmetrical operating conditions, MMC-HVDC exhibits the phenomenon of multiple frequency harmonics coupling with each other. At this time, the admittance matrix of the AC side port of MMC-HVDC exhibits the characteristics of multiple inputs and multiple outputs. Theoretically, the admittance matrix is ​​an infinite order matrix, making it difficult to quantitatively select a dimension reduction model of a reasonable order for small disturbance stability judgment. Summary of the Invention

[0004] This invention provides a method, system, terminal, and medium for evaluating the stability of a modular multilevel converter. When determining the dimensionality reduction order of the three-phase sequence admittance matrix of the modular multilevel converter, the sequential analysis of the dimensionality reduction error at different orders is terminated, and the dimensionality-reduced matrix is ​​equivalent to a single-input single-output impedance. This can accurately identify potential stability problems of the converter under asymmetrical operating conditions while reducing resource consumption.

[0005] To address the aforementioned technical problems, embodiments of the present invention provide a method for evaluating the stability of a modular multilevel converter, comprising: According to the preset order, the single-phase sequence admittance matrix of the AC side of the modular multilevel converter under asymmetrical operating conditions is truncated to obtain a first admittance matrix of several orders, and the vector norm of the remaining elements of the central column vector of the single-phase sequence admittance matrix is ​​obtained. The first admittance matrix of each order is traversed in ascending order. The norm of the central column vector of the first admittance matrix of the current order is obtained. Then, the ratio of the vector norm of the remaining elements of the central column vector of the single-phase sequence admittance matrix to the norm of the central column vector of the first admittance matrix of the current order is used as the dimension reduction error of the current order. If the dimension reduction error of the current order is less than a preset threshold, the order corresponding to the current order is used as the dimension reduction order of the three-phase sequence admittance matrix of the AC side of the modular multilevel converter under asymmetrical operating conditions, and the traversal ends. The three-phase sequence admittance matrix is ​​reduced in dimension according to the specified dimension reduction order to obtain the dimension-reduced admittance matrix corresponding to the three-phase sequence admittance matrix. Then, the dimension-reduced admittance matrix is ​​equivalent to a single-input single-output impedance, and the stability of the modular multilevel converter is evaluated using the single-input single-output impedance.

[0006] In implementing this embodiment of the invention, the single-phase sequence admittance matrix of the AC side of the modular multilevel converter under asymmetrical operating conditions is truncated according to a preset order to obtain first admittance matrices of several orders. The characteristics of the modular multilevel converter in different frequency ranges are characterized by matrices of different orders. The vector norm of the remaining elements of the central column vector of the single-phase sequence admittance matrix is ​​obtained. Then, the first admittance matrix of each order is traversed in ascending order to obtain the norm of the central column vector of the current order first admittance matrix. The ratio of the vector norm of the remaining elements to the norm of the central column vector of the first admittance matrix of the current order is used as the dimension reduction error of the current order. If the dimension reduction error of the current order is less than a preset threshold, the order corresponding to the current order is used as the dimension reduction order of the three-phase sequence admittance matrix of the AC side of the modular multilevel converter under asymmetrical operating conditions. Based on the dimension reduction error of the column vector norm of the admittance matrix, the error of the dimension reduction process is quantitatively analyzed, and a reasonable dimension reduction order can be accurately selected. When the dimension reduction order is determined, the traversal is ended in time to reduce the occupation of computing resources. In addition, the three-phase sequence admittance matrix is ​​reduced in dimension according to the dimension reduction order to obtain the dimension-reduced admittance matrix corresponding to the three-phase sequence admittance matrix. This reduces the computational complexity of subsequent equivalent processing and the computational resources required for subsequent equivalent processing. Then, the dimension-reduced admittance matrix is ​​equivalent to a single-input single-output impedance. Based on the analysis of the equivalent single-input single-output impedance, potential stability problems of modular multilevel converters under different asymmetrical operating conditions when facing small disturbances can be identified. This helps managers optimize system design and improve the reliability and stability of the power system.

[0007] As a preferred embodiment, the step of equating the dimension-reduced admittance matrix to a single-input single-output impedance specifically involves: If the reduced admittance matrix is ​​a 2×2 admittance matrix, then the Schul complement of the reduced admittance matrix is ​​calculated, and the Schul complement of the reduced admittance matrix is ​​used as the single-input single-output impedance corresponding to the reduced admittance matrix. If the dimension-reduced admittance matrix is ​​an N×N admittance matrix, then the dimension-reduced admittance matrix is ​​simplified to a second admittance matrix. Then, the Schul complement of the second admittance matrix is ​​calculated, and the Schul complement of the second admittance matrix is ​​used as the single-input single-output impedance corresponding to the dimension-reduced admittance matrix; where N≥3 and N∈R, the second admittance matrix is ​​a 2×2 admittance matrix.

[0008] In a preferred embodiment of the present invention, when the order of the dimension-reduced admittance matrix is ​​greater than or equal to 3, the dimension-reduced admittance matrix is ​​simplified to a second-order admittance matrix, which can reduce the computational complexity of the matrix Schur complement, thereby improving the accuracy of the single-input single-output impedance corresponding to the dimension-reduced admittance matrix.

[0009] As a preferred embodiment, simplifying the dimension-reduced admittance matrix into a second admittance matrix specifically involves: Obtain the first current-voltage relationship expression corresponding to the system admittance of the modular multilevel converter, and the second current-voltage relationship expression corresponding to the grid-side impedance of the modular multilevel converter; By combining the first current-voltage relationship expression and the second current-voltage relationship expression, the dimension-reduced admittance matrix is ​​simplified to the second admittance matrix.

[0010] The preferred embodiment of the present invention, based on the second current-voltage relationship expression corresponding to the grid-side impedance of the modular multilevel converter, helps to analyze the grid-side characteristics in the system. By combining the first current-voltage relationship expression corresponding to the system admittance of the modular multilevel converter and the second current-voltage relationship expression corresponding to the grid-side impedance of the modular multilevel converter, the simplification accuracy of the dimension-reduced admittance matrix can be improved, thereby providing a more accurate evaluation basis for system stability and performance analysis.

[0011] As a preferred embodiment, the step of performing dimensionality reduction processing on the three-phase sequence admittance matrix according to the dimensionality reduction order to obtain the dimensionality-reduced admittance matrix corresponding to the three-phase sequence admittance matrix is ​​specifically as follows: According to the dimensionality reduction order, the vector norm of the remaining elements of the central column vector of the single-phase sequence admittance matrix is ​​reduced to obtain the corresponding first vector norm dimensionality reduction result. Based on the dimensionality reduction result of the first vector norm, a multi-input multi-output admittance matrix is ​​established. Then, based on the multi-input multi-output admittance matrix and the Clark transformation matrix, the three-phase sequence admittance dimensionality reduction matrix is ​​transferred to the complex vector domain to obtain multiple first block admittance matrices corresponding to the three-phase sequence admittance dimensionality reduction matrix, which are used as the dimensionality reduction matrix corresponding to the three-phase sequence admittance matrix.

[0012] In a preferred embodiment of the present invention, the vector norm of the remaining elements of the central column vector of the single-phase sequence admittance matrix is ​​first reduced in dimension. Then, based on the dimension reduction result, a multi-input multi-output admittance matrix is ​​established. Finally, the three-phase sequence admittance dimension reduction matrix is ​​transferred to the complex vector domain using the multi-input multi-output admittance matrix and the Clark transformation matrix. This helps to optimize the design of the modular multilevel converter and simplifies the calculation process.

[0013] As a preferred embodiment, the step of performing dimensionality reduction processing on the three-phase sequence admittance matrix according to the dimensionality reduction order to obtain the dimensionality-reduced matrix corresponding to the three-phase sequence admittance matrix is ​​as follows: Based on the Clark transformation matrix, the three-phase sequence admittance matrix is ​​transformed into the complex vector domain to obtain multiple second block admittance matrices corresponding to the three-phase sequence admittance matrix; Obtain the vector norm of the remaining elements of the central column vector of each second block admittance matrix, and perform dimensionality reduction processing on the vector norm of the remaining elements of the central column vector of each second block admittance matrix according to the dimensionality reduction order to obtain the second vector norm dimensionality reduction result corresponding to each second block admittance matrix. Then, based on the second vector norm dimensionality reduction result corresponding to each second block admittance matrix, perform dimensionality reduction processing on each second block admittance matrix to obtain the first block admittance matrix corresponding to each second block admittance matrix, which is used as the dimensionality reduction matrix corresponding to the three-phase sequence admittance matrix.

[0014] In a preferred embodiment of the present invention, the three-phase sequence admittance matrix is ​​first transformed into the complex vector domain based on the Clark transformation matrix to obtain multiple second block admittance matrices corresponding to the three-phase sequence admittance matrix, providing more detailed and comprehensive information for subsequent system characteristic analysis. Then, according to the dimensionality reduction order, the vector norm of the remaining elements of the central column vector of each second block admittance matrix is ​​reduced. Then, based on the dimensionality reduction result of the second vector norm corresponding to each second block admittance matrix, the dimensionality reduction of each second block admittance matrix is ​​performed to obtain the first block admittance matrix corresponding to each second block admittance matrix. This reduces computational complexity while maintaining an accurate description of system characteristics.

[0015] As a preferred embodiment, obtaining the dimensionality reduction order further includes: The first admittance matrix of each order is traversed in ascending order. The norm of the central column vector of the first admittance matrix of the current order is obtained. If the norm of the central column vector of the first admittance matrix of the current order begins to converge, the order corresponding to the current order is taken as the dimension reduction order of the three-phase sequence admittance matrix of the AC side of the modular multilevel converter under asymmetric operating conditions, and the traversal ends.

[0016] In a preferred embodiment of the present invention, during the process of traversing the first admittance matrix of each order in ascending order, the convergence of the norm of the central column vector is observed. If the norm of the central column vector of the first admittance matrix of the current order begins to converge, the order corresponding to the current order is used as the dimension reduction order of the three-phase sequence admittance matrix of the AC side of the modular multilevel converter under asymmetric operating conditions, so as to determine the optimal dimension reduction order, thereby helping to reduce the computational complexity of the modular multilevel converter while maintaining sufficient accuracy.

[0017] To address the same technical problem, embodiments of the present invention also provide a modular multilevel converter stability evaluation system, comprising: The truncation acquisition module is used to truncate the single-phase sequence admittance matrix of the AC side of the modular multilevel converter under asymmetrical operating conditions according to a preset order, to obtain a first admittance matrix of several orders, and to obtain the vector norm of the remaining elements of the central column vector of the single-phase sequence admittance matrix. The traversal module is used to traverse the first admittance matrix of each order in ascending order, obtain the norm of the central column vector of the first admittance matrix of the current order, and then use the ratio of the vector norm of the remaining elements of the central column vector of the single-phase sequence admittance matrix to the norm of the central column vector of the first admittance matrix of the current order as the dimension reduction error of the current order. If the dimension reduction error of the current order is less than a preset threshold, the order corresponding to the current order is used as the dimension reduction order of the three-phase sequence admittance matrix of the AC side of the modular multilevel converter under asymmetrical operating conditions, and the traversal ends. The dimension reduction equivalent module is used to perform dimension reduction processing on the three-phase sequence admittance matrix according to the dimension reduction order to obtain the dimension-reduced admittance matrix corresponding to the three-phase sequence admittance matrix, and then the dimension-reduced admittance matrix is ​​equivalent to a single-input single-output impedance, and the stability of the modular multilevel converter is evaluated using the single-input single-output impedance.

[0018] As a preferred embodiment, the dimensionality reduction equivalent module specifically includes: A dimensionality reduction unit is used to perform dimensionality reduction processing on the three-phase sequence admittance matrix according to the dimensionality reduction order; An equivalent unit is used to calculate the Schul complement of the reduced-dimensional admittance matrix if the reduced-dimensional admittance matrix is ​​a 2×2 admittance matrix, and use the Schul complement of the reduced-dimensional admittance matrix as the single-input single-output impedance corresponding to the reduced-dimensional admittance matrix; if the reduced-dimensional admittance matrix is ​​an N×N admittance matrix, the reduced-dimensional admittance matrix is ​​simplified to a second admittance matrix, and then the Schul complement of the second admittance matrix is ​​calculated, and the Schul complement of the second admittance matrix is ​​used as the single-input single-output impedance corresponding to the reduced-dimensional admittance matrix; wherein, N≥3 and N∈R, and the second admittance matrix is ​​a 2×2 admittance matrix; An evaluation unit is used to evaluate the stability of the modular multilevel converter using the single-input single-output impedance.

[0019] To address the same technical problem, the present invention also provides a terminal, including a processor, a memory, and a computer program stored in the memory; wherein the computer program can be executed by the processor to implement the aforementioned modular multilevel converter stability evaluation method.

[0020] To address the same technical problem, the present invention also provides a computer-readable storage medium comprising a stored computer program; wherein, when the computer program is executed, it controls the device containing the computer-readable storage medium to perform the aforementioned modular multilevel converter stability evaluation method. Attached Figure Description

[0021] Figure 1 : A schematic flowchart of a modular multilevel converter stability evaluation method provided in Embodiment 1 of the present invention; Figure 2 : A schematic diagram of the asymmetric fault process in an AC system provided in Embodiment 1 of the present invention; Figure 3 : This is a block diagram of a modular multilevel converter with multiple inputs and multiple outputs for a flexible DC transmission project provided in Embodiment 1 of the present invention; Figure 4 : A schematic diagram of the vector norm of the first admittance matrix of each order under asymmetric operating conditions provided in Embodiment 1 of the present invention; Figure 5 : A schematic diagram of the dimensionality reduction error at each order under asymmetric working conditions provided in Embodiment 1 of the present invention; Figure 6 : A schematic diagram of the structure of an AC system considering grid-side impedance provided in Embodiment 1 of the present invention; Figure 7 The asymmetric operating condition provided in Embodiment 1 of the present invention and Amplitude-frequency response diagram of grid-side impedance and converter equivalent impedance; Figure 8: Provided for Embodiment 1 of the present invention Electromagnetic transient simulation diagram; Figure 9 The asymmetric operating condition provided in Embodiment 1 of the present invention and Amplitude-frequency response diagram of grid-side impedance and converter equivalent impedance; Figure 10 : Provided for Embodiment 1 of the present invention Electromagnetic transient simulation diagram; Figure 11 : A schematic diagram of the structure of a modular multilevel converter stability evaluation system provided in Embodiment 1 of the present invention. Detailed Implementation

[0022] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0023] Example 1: Please refer to Figure 1 This invention provides a method for evaluating the stability of a modular multilevel converter, comprising steps S1 to S4, the specific details of which are as follows: Step S1: According to the preset order, the single-phase sequence admittance matrix of the AC side of the modular multilevel converter under asymmetrical operating conditions is truncated to obtain a first admittance matrix of several orders, and the vector norm of the remaining elements of the central column vector of the single-phase sequence admittance matrix is ​​obtained.

[0024] It should be noted that flexible DC transmission projects including modular multilevel converters, when connected to AC systems, are likely to experience harmonic resonance, which could affect the stable operation of the power grid. Please refer to [link / reference needed]. Figure 2When an asymmetrical fault (such as a single-line grounding fault) occurs in an AC system, the system will undergo a transient process to reach a new quasi-steady state 1 (or quasi-steady state 2). The asymmetrical operating condition of the AC side voltage (the AC side voltage includes positive and negative sequence components) is precisely to correspond to the actual operating condition of quasi-steady state 1 (or quasi-steady state 2). If a small disturbance instability occurs in quasi-steady state 1 (or quasi-steady state 2) in actual engineering, it may cause the fault line disconnection or reclosing circuit to fail to operate normally. That is, in actual engineering, the three-phase sequence admittance matrix of MMC-HVDC under asymmetrical operating conditions is reduced in dimension to obtain its single-input single-output impedance. This can accurately analyze the small disturbance stability of the quasi-steady state 1 and quasi-steady state 2 processes, thereby helping to propose relevant suppression or protection measures. Under asymmetrical operating conditions, due to the multi-frequency coupling effect, the form of the single-phase sequence admittance matrix of the AC side of MMC-HVDC (modular multilevel converter for high voltage DC) can be found in Equation (1).

[0025] (1) in, For any frequency The corresponding complex frequency. Equation (1) at any frequency has a frequency of... The admittance is always located at the center of the matrix, therefore it is also referred to below as For the center frequency, , For power frequency, That is, power frequency The corresponding complex frequency, This refers to the single-phase sequence admittance matrix on the AC side. Taking phase admittance as an example, the superscript The position of the admittance element in the matrix This element represents the central element of the single-phase sequence admittance matrix. Listed as the center column Behavior-centered approach.

[0026] Define the Euclidean norm of each column vector of the matrix as: Please refer to Figure 3 The frequency range of 10~1000Hz is divided into three bands, and the central column vector norm in equation (1) is selected. and the norms of the two column vectors excluding the center column. and Amplitude plot.

[0027] Depend on Figure 3 It can be seen that there are frequencies in the range of 10~1000Hz. Therefore, we can conclude that across the entire frequency band, the information contained in each column vector of the single-phase sequence admittance matrix is ​​consistent, which is reflected in the fact that the vector norm has an arbitrary column vector norm | Equal to the norm of the central column vector That is, the multi-input multi-output admittance of equation (1) has the column vector norm of each column. Both are equal to the norm of the central column vector. Therefore, the subsequent dimensionality reduction work can be carried out on the central column vector.

[0028] In this embodiment, the single-phase sequence admittance matrix is ​​truncated to The rank is recorded as follows. The norm of the central column vector of order is The vector norm of the remaining elements of the central column vector is denoted as . .

[0029] Step S2: Traverse the first admittance matrix of each order in ascending order to obtain the norm of the central column vector of the first admittance matrix of the current order. Then, referring to equations (2), (3), and (4), the vector norm of the remaining elements of the central column vector of the single-phase sequence admittance matrix is... With the central column vector norm of the first admittance matrix of the current order The ratio of these values ​​is used as the dimensionality reduction error for the current order. If the dimensionality reduction error of the current order is If it is less than the preset threshold, then the order corresponding to the current order will be changed. The dimensionality reduction order of the three-phase sequence admittance matrix on the AC side of the modular multilevel converter under asymmetrical operating conditions is used to end the traversal.

[0030] (2) (3) (4) It should be noted that the dimensionality reduction error is used to measure the order of the matrix dimensionality reduction. If the dimensionality reduction error is less than a certain preset threshold, it is considered that a theoretically infinite-order admittance matrix can be reduced to a matrix of the current order for stability analysis. In this embodiment, the preset threshold is 0.2. From a physical perspective, when the dimensionality reduction error is less than 0.2, the selected dimensionality-reduced matrix contains five times the information of the truncated matrix. This error can be considered sufficiently small across the entire frequency band. If more refined and accurate requirements are needed for certain frequency bands, a smaller dimensionality reduction error threshold can be selected depending on the application scenario.

[0031] As a preferred option, the "dimensionality reduction order of the three-phase sequence admittance matrix of the modular multilevel converter on the AC side under asymmetrical operating conditions" mentioned in step S2 can be obtained not only by implementing step S2, but also by implementing step S01, which is as follows: Step S01: Traverse the first admittance matrix of each order in ascending order, obtain the norm of the central column vector of the first admittance matrix of the current order, and if the norm of the central column vector of the first admittance matrix of the current order begins to converge, then take the order corresponding to the current order as the dimension reduction order of the three-phase sequence admittance matrix of the AC side of the modular multilevel converter under asymmetric operating conditions, and end the traversal.

[0032] It should be noted that the dimensionality reduction orders obtained by implementing the two different methods of obtaining dimensionality reduction order described in steps S2 and S01 can be mutually verified.

[0033] In this embodiment, an asymmetrical operating condition following an AC side fault is simulated by the simultaneous presence of a positive-sequence voltage amplitude of 400kV and a negative-sequence voltage amplitude of 125kV on the AC side. The vector norms of the first admittance matrices of each order are provided in the reference [reference needed]. Figure 4 .according to Figure 4 It can be seen that there is a significant difference between the first-order and fifth-order vector norms, meaning that the first-order vector norm has not yet converged. However, the fifth-order and ninth-order vector norms are essentially consistent within the 0-1800Hz frequency range, indicating that the fifth-order vector norm is considered to be converging. Therefore, the dimension reduction order of the three-phase sequence admittance matrix is ​​5, and it is preliminarily determined that the three-phase sequence admittance matrix can be reduced to a fifth-order matrix. It should be noted that, based on... Figure 4 The reasons for selecting the 1st, 5th, and 9th order admittance matrices for analysis are as follows: Under asymmetrical operating conditions, although the admittance of the AC side of the MMC-HVDC exhibits the characteristics of multiple inputs and multiple outputs, it is still a sparse matrix. The coupling is concentrated between different phase sequences at the same frequency (corresponding to the 1st order admittance matrix of each admittance matrix block in Equation (6)) and between different phase sequences with a center frequency that differs from the center frequency by twice the power frequency (corresponding to the 5th order admittance matrix of each admittance matrix block in Equation (6)). According to Equations (2), (3), and (4), when the elements of the admittance matrix are 0, there is no effect on the calculation of the vector norm. That is, due to the sparsity of the elements of the admittance matrix, the vector norm of the 3rd order admittance matrix is ​​consistent with the vector norm of the 1st order admittance matrix, and the vector norm of the 7th order admittance matrix is ​​consistent with that of the 5th order admittance matrix. Therefore, the vector norms of the 1st, 5th, and 9th order admittance matrices are selected.

[0034] Simultaneously, referring to equations (2), (3), and (4), the dimensionality reduction errors of the 1st and 5th orders with weaker asymmetry in the AC system are calculated, thus constituting... Figure 5 .Depend on Figure 5 It can be seen that, within the frequency range of 0~1800Hz, the dimensionality reduction error of the 5th order is much smaller than that of the 1st order, and the dimensionality reduction error of the 5th order is... The dimensionality reduction condition is met over a wide frequency band, i.e., it is less than a preset threshold of 0.2, while the dimensionality reduction error of the first order exceeds the preset threshold of 0.2 in the frequency range of 0~1800Hz. Therefore, it is further verified that the dimensionality reduction order of the three-phase sequence admittance matrix is ​​5, and it is determined that the three-phase sequence admittance matrix can be reduced to a 5th order matrix. Additionally, according to... Figure 4 and Figure 5 As can be seen, the theoretical values ​​and the scanned values ​​agree well. The matrix dimensionality reduction method proposed in this embodiment is based on the external characteristics of the system, and can directly obtain the norms of each order of the system and the dimensionality reduction error through the electromagnetic transient scan results. Therefore, the matrix dimensionality reduction method proposed in this embodiment is also applicable to systems in a "black box" state. It should be noted that a system in a "black box" state refers to a system whose internal control structure and parameters are unknown.

[0035] Step S3: Although the dimensionality reduction problem of the entire infinite-order matrix is ​​focused on the vector norm of the central column vector, the central column vector still theoretically has infinite elements. Therefore, according to the dimensionality reduction order, the three-phase sequence admittance matrix is ​​dimensionality reduced to obtain the dimensionality-reduced admittance matrix corresponding to the three-phase sequence admittance matrix.

[0036] As a preferred embodiment, step S3 may include steps S31 to S32, the specific details of which are as follows: Step S31, please refer to equation (5), according to the dimension reduction order, the vector norm of the remaining elements of the central column vector of the single-phase sequence admittance matrix. Dimensionality reduction is performed to obtain the corresponding first vector norm dimensionality reduction result.

[0037] (5) In the formula, For any k, we have Here, it is assumed that λ < 1. Verification shows that this assumption is satisfied over a wide bandwidth in the admittance matrix of MMC. Theoretically, λ should be taken as... The maximum value in the matrix is ​​λ, but in reality, the admittance matrix of MMC is a sparse matrix, so λ takes the maximum value within a finite order.

[0038] Step S32: Based on the dimensionality reduction result of the first vector norm, establish the multi-input multi-output admittance matrix. Then please refer to equation (6), based on the multi-input multi-output admittance matrix. and Clark transformation matrix The three-phase sequence admittance dimension reduction matrix is ​​transferred to the complex vector domain. Under the axis, multiple first block admittance matrices corresponding to the dimensionality reduction matrix of the three-phase sequence admittance are obtained. , , and , to be the reduced-dimensional admittance matrix corresponding to the three-phase sequence admittance matrix .

[0039] (6) In the formula, the matrix Please refer to equation (7) for details, matrix Please refer to equation (8) for details regarding the multi-input multi-output admittance matrix. With single-phase sequence admittance matrix and the exchange side For the specific relationship between the small disturbance voltage and the small disturbance current, please refer to equation (9). Because... The under-axis admittance has the advantage of reflecting the admittance relationship between different phase sequences at the same frequency. Therefore, through equation (6), the dimension-reduced three-phase sequence admittance matrix obtained by dimension reduction from the three-phase sequence admittance matrix is ​​transferred to... Matrix dimensionality reduction and stability analysis are performed under the axis.

[0040] (7) (8) It should be noted that in equation (7) The matrix is ​​not invertible; however, multiplying the two matrices in equation (7) and equation (8) yields a 2×2 identity matrix, which is therefore denoted as shown above.

[0041] (9) In the formula, and This represents the three-phase disturbance voltage and disturbance current; It is a multi-input multi-output admittance matrix; For phase a admittance, equation (9) is and And the relationship between the small disturbance voltage and small disturbance current of phases abc on the AC side.

[0042] As another preferred embodiment, step S3 may include steps S33 to S34, each of which is as follows: Step S33: Based on the Clark transformation matrix, transfer the three-phase sequence admittance matrix to the complex vector domain. Under the axis, multiple second block admittance matrices corresponding to the three-phase sequence admittance matrix are obtained.

[0043] Step S34: Obtain the vector norm of the remaining elements of the central column vector of each second block admittance matrix, and refer to Equation (5). Substitute the vector norm of the remaining elements of the central column vector of the second block admittance matrix into Equation (5). According to the dimensionality reduction order, the vector norm of the remaining elements of the central column vector of each second block admittance matrix is ​​reduced to obtain the second vector norm dimensionality reduction result corresponding to each second block admittance matrix. Then, based on the second vector norm dimensionality reduction result corresponding to each second block admittance matrix, the dimensionality reduction process is performed on each second block admittance matrix to obtain the first block admittance matrix corresponding to each second block admittance matrix. , , and , to be the reduced-dimensional admittance matrix corresponding to the three-phase sequence admittance matrix .

[0044] Step S4, reduce the dimension of the admittance matrix. Equivalent to single-input single-output impedance And utilize single-input single-output impedance To evaluate the stability of modular multilevel converters.

[0045] As a preferred embodiment, step S4 includes steps S41 to S43, each of which is detailed below: Step S41, if the reduced-dimensional admittance matrix Given a 2×2 admittance matrix, refer to equation (10) to calculate the dimension-reduced admittance matrix. The Schul complement, and the dimension-reduced admittance matrix Schul complement, as a dimension-reduced admittance matrix Corresponding single-input single-output impedance .

[0046] In the formula, To transfer to The back-side impedance is the wire-side impedance, and the rest of the impedances are... The central element of the block admittance matrix: such as , , , The block admittance matrices in equation (6) are respectively , , , The central element.

[0047] Step S42, if the reduced-dimensional admittance matrix If the admittance matrix is ​​N×N, then the dimension reduction admittance matrix will be... Simplify to the second admittance matrix, then calculate the Schul complement of the second admittance matrix, and use the Schul complement of the second admittance matrix as the dimension-reduced admittance matrix. Corresponding single-input single-output impedance .

[0048] Where N≥3 and N∈R, the second admittance matrix is ​​a 2×2 admittance matrix.

[0049] As a preferred embodiment, step S42 includes steps S421 to S423, each of which is detailed below: Step S421, if the reduced-dimensional admittance matrix Given an N×N admittance matrix, we can obtain the first current-voltage relationship expression corresponding to the system admittance of the modular multilevel converter, and the second current-voltage relationship expression corresponding to the grid-side impedance of the modular multilevel converter.

[0050] In this embodiment, please refer to the AC system considering grid-side impedance. Figure 6 .in, , , , It is a variable resistor. This is an AC-side voltage source. As an example, Pick N=10. That is, the dimension-reduced admittance matrix. It is a 10×10 admittance matrix.

[0051] For the system admittance of the modular multilevel converter, there is a first current-voltage relationship expression as shown in equations (11)(12)(13)(14)(15); for the grid-side impedance of the modular multilevel converter, there is a second current-voltage relationship expression as shown in equation (16).

[0052] (11) (12) (13) (14) (15) (16) in, express The frequency below the axis is the center frequency. The 2×2 admittance matrix, A 2×8 Indicates the description of the center frequency The current and frequency are , , , The relationship between voltages , and The principle is similar. For the specific forms of the remaining matrices in equation (11), please refer to equations (17)(18)(19)(20). Equations (11) and (16) are both used to reduce the multi-input multi-output admittance matrix (i.e., the dimension-reduced admittance matrix). The expression is divided into blocks, and the difference between equation (11) and equation (16) is that the grid-side impedance is a linear element, and its voltage and current at various frequencies exhibit a single-input, single-output relationship. Therefore, in order to match equation (11), the matrix here... and Let f(x) represent matrices with 8 rows and 2 columns and matrices with 2 rows and 8 columns, respectively, where all elements are 0. For the specific forms of each element in equation (16), please refer to equations (21) and (22).

[0053] (17) (18) (19) (20) (twenty one) (twenty two) Step S422: Combine the first current-voltage relationship expressions from (11)(12)(13)(14)(15) and the second current-voltage relationship expression from (16) to obtain the expression for (23). Based on the expression for (23), reduce the dimension of the admittance matrix. The simplified form is the second admittance matrix as shown in equation (24). .

[0054] (twenty three) (twenty four) In the formula, It is an 8th-order identity matrix. According to equation (11), all element information in the 10×10 admittance matrix is ​​contained within... In this 2×2 admittance matrix, the matrix is ​​also calculated... The equivalent single-input single-output impedance expression can be obtained from the Schul complement.

[0055] Step S423, please refer to equation (25) to calculate the second admittance matrix. The Schul complement, and the second admittance matrix Shuer Supplement As a dimension-reduced admittance matrix Corresponding single-input single-output impedance .

[0056] (25) In the formula, , , , The second admittance matrix in equation (24) is respectively The elements. It should be noted that the single-input single-output impedance equivalent method described above is applicable to the equivalent of any finite-order matrix.

[0057] Step S43, using single-input single-output impedance To evaluate the stability of modular multilevel converters.

[0058] In this embodiment, under asymmetrical operating conditions and When the frequency response of the grid-side impedance is as follows, please refer to... Figure 7 (a) The MMC equivalent impedance of the modular multilevel converter (i.e., single-input single-output impedance). Please refer to the amplitude-frequency characteristics of (). Figure 7 (b). To verify Figure 7 In the electromagnetic transient model, the electromagnetic transient simulation is set as follows: the initial system delay is set to 0 μs, and at t=1.5 s, the system control link delay is switched from 0 μs back to the normal 400 μs. The phase a AC voltage at the common coupling point in the electromagnetic transient simulation is shown in the figure. Figure 8 For (a), please refer to the Fast Fourier Analysis results of the AC voltage after the control link delay switching. Figure 8 (b)

[0059] according to Figure 7 It can be seen that the amplitudes of the MMC equivalent impedance and the grid-side impedance intersect only at 1402.8 Hz. When the amplitudes of the MMC equivalent impedance and the grid-side impedance intersect, their phase difference is 178.28°, which is close to the critical stability, but still less than 180°, satisfying the phase margin condition for system stability. Furthermore, electromagnetic transient simulation results show that the system operates stably after the switching delay, consistent with the theoretical analysis results.

[0060] Pick For the amplitude-frequency characteristics of the grid-side impedance, please refer to [reference needed]. Figure 9 For (a), please refer to the amplitude-frequency characteristic of the equivalent impedance. Figure 9(b) shows the MMC equivalent impedance amplitude-frequency characteristic curve with the three-phase sequence admittance matrix reduced to a 10×10 matrix, and the dotted curve with the admittance matrix reduced to a 2×2 matrix. It can be observed that the equivalent MMC converter impedance amplitude-frequency characteristics differ significantly under different dimensionality reductions. The MMC equivalent impedance amplitude of the 2×2 matrix intersects with the grid-side impedance amplitude at 1369.98 Hz, with a phase difference of 177.46°, indicating system stability. However, the MMC equivalent impedance amplitude of the 10×10 matrix intersects with the grid-side impedance amplitude at 1397.7 Hz, with a phase difference of 182.13°, indicating the system has crossed the critical stability threshold and become unstable, with a resonant frequency of 1397.7 Hz.

[0061] To verify Figure 9 Similarly, electromagnetic transient simulations are performed in PSCAD / EMTDC. For the AC voltage of phase a at the common coupling point during the simulation, please refer to [reference needed]. Figure 10 For (a), please refer to the Fast Fourier Analysis results after switching delay. Figure 10 (b) Electromagnetic transient simulation results show that the system becomes unstable after the switching delay, with the main resonant frequency being 1399Hz. The electromagnetic simulation results verify the correctness of reducing the system admittance matrix to a 10×10 matrix for stability analysis under complete control, and also show that simply reducing the dimension to a 2×2 matrix will lead to erroneous stability analysis results. That is, the dimension reduction method proposed in this embodiment can accurately analyze the small disturbance stability of the modular multilevel converter under asymmetric operating conditions.

[0062] Please refer to Figure 11 This is a schematic diagram of a modular multilevel converter stability evaluation system provided by an embodiment of the present invention. The system includes a truncation acquisition module M1, a traversal module M2, and a dimension reduction equivalent module M3. The specific details of each module are as follows: The truncation acquisition module M1 is used to truncate the single-phase sequence admittance matrix of the AC side of the modular multilevel converter under asymmetrical operating conditions according to a preset order, to obtain a first admittance matrix of several orders, and to obtain the vector norm of the remaining elements of the central column vector of the single-phase sequence admittance matrix. The traversal module M2 is used to traverse the first admittance matrix of each order in ascending order, obtain the norm of the central column vector of the first admittance matrix of the current order, and then use the ratio of the vector norm of the remaining elements of the central column vector of the single-phase sequence admittance matrix to the norm of the central column vector of the first admittance matrix of the current order as the dimension reduction error of the current order. If the dimension reduction error of the current order is less than a preset threshold, the order corresponding to the current order is used as the dimension reduction order of the three-phase sequence admittance matrix of the AC side of the modular multilevel converter under asymmetrical operating conditions, and the traversal ends. The dimension reduction equivalent module M3 is used to reduce the dimension of the three-phase sequence admittance matrix according to the dimension reduction order to obtain the dimension-reduced admittance matrix corresponding to the three-phase sequence admittance matrix. Then, the dimension-reduced admittance matrix is ​​equivalent to a single-input single-output impedance, and the stability of the modular multilevel converter is evaluated using the single-input single-output impedance.

[0063] As a preferred embodiment, the dimensionality reduction equivalent module M3 specifically includes dimensionality reduction unit 31, equivalent unit 32, and evaluation unit 33, with each unit described in detail below: Dimension reduction unit 31 is used to perform dimension reduction processing on the three-phase sequence admittance matrix according to the dimension reduction order; Equivalent unit 32 is used to calculate the Schul complement of the dimension-reduced admittance matrix if the dimension-reduced admittance matrix is ​​a 2×2 admittance matrix, and use the Schul complement of the dimension-reduced admittance matrix as the single-input single-output impedance corresponding to the dimension-reduced admittance matrix; if the dimension-reduced admittance matrix is ​​an N×N admittance matrix, the dimension-reduced admittance matrix is ​​simplified to a second admittance matrix, and then the Schul complement of the second admittance matrix is ​​calculated, and the Schul complement of the second admittance matrix is ​​used as the single-input single-output impedance corresponding to the dimension-reduced admittance matrix; where N≥3 and N∈R, and the second admittance matrix is ​​a 2×2 admittance matrix; Evaluation unit 33 is used to evaluate the stability of a modular multilevel converter using a single-input single-output impedance.

[0064] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working process of the system described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0065] Additionally, embodiments of the present invention also provide a computer-readable storage medium, which includes a stored computer program; wherein, when the computer program is running, it controls the device where the computer-readable storage medium is located to execute a modular multilevel converter stability evaluation method according to Embodiment 1.

[0066] Additionally, this embodiment of the invention also provides a terminal, including a processor, a memory, and a computer program stored in the memory; wherein the computer program can be executed by the processor to implement a modular multilevel converter stability evaluation method according to Embodiment 1.

[0067] Preferably, the computer program can be divided into one or more modules / units (such as a computer program, a computer program), and one or more modules / units are stored in memory and executed by a processor to complete the present invention. One or more modules / units can be a series of computer program instruction segments capable of performing a specific function, which describe the execution process of the computer program in a terminal.

[0068] The processor can be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor can be a microprocessor, or any conventional processor. The processor is the control center of the terminal, connecting various parts of the terminal through various interfaces and lines.

[0069] The memory mainly consists of a program storage area and a data storage area. The program storage area can store the operating system, applications required for at least one function, etc., while the data storage area can store related data. In addition, the memory can be a high-speed random access memory, or a non-volatile memory, such as a plug-in hard drive, a smart media card (SMC), a secure digital card (SD), and a flash card, or other volatile solid-state storage devices.

[0070] It should be noted that the above-mentioned terminal may include, but is not limited to, processors and memory. Those skilled in the art will understand that the above-mentioned terminal is merely an example and does not constitute a limitation on the terminal. It may include more or fewer components, or combine certain components, or different components.

[0071] Compared with the prior art, the embodiments of the present invention have the following beneficial effects: This invention provides a method, system, terminal, and medium for stability assessment of modular multilevel converters. According to a preset order, the single-phase sequence admittance matrix of the AC side of the modular multilevel converter under asymmetrical operating conditions is truncated to obtain first admittance matrices of several orders. The characteristics of the modular multilevel converter in different frequency ranges are characterized by matrices of different orders. The vector norm of the remaining elements of the central column vector of the single-phase sequence admittance matrix is ​​obtained. Then, the first admittance matrix of each order is traversed in ascending order to obtain the central column vector norm of the first admittance matrix of the current order. The ratio of the vector norm of the remaining elements of the central column vector of the single-phase sequence admittance matrix to the norm of the central column vector of the first admittance matrix of the current order is used as the dimension reduction error of the current order. If the dimension reduction error of the current order is less than a preset threshold, the order corresponding to the current order is used as the dimension reduction order of the three-phase sequence admittance matrix of the AC side of the modular multilevel converter under asymmetrical operating conditions. Based on the dimension reduction error of the column vector norm of the admittance matrix, the error of the dimension reduction process is quantitatively analyzed, and a reasonable dimension reduction order can be accurately selected. When the dimension reduction order is determined, the traversal is ended in time to reduce the occupation of computing resources. In addition, the three-phase sequence admittance matrix is ​​reduced in dimension according to the dimension reduction order to obtain the dimension-reduced admittance matrix corresponding to the three-phase sequence admittance matrix. This reduces the computational complexity of subsequent equivalent processing and the computational resources required for subsequent equivalent processing. Then, the dimension-reduced admittance matrix is ​​equivalent to a single-input single-output impedance. Based on the analysis of the equivalent single-input single-output impedance, potential stability problems of modular multilevel converters under different asymmetrical operating conditions when facing small disturbances can be identified. This helps managers optimize system design and improve the reliability and stability of the power system.

[0072] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above descriptions are merely specific embodiments of the present invention and are not intended to limit the scope of protection of the present invention. In particular, it should be noted that any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention for those skilled in the art.

Claims

1. A method for evaluating the stability of a modular multilevel converter, characterized in that, include: According to the preset order, the single-phase sequence admittance matrix of the AC side of the modular multilevel converter under asymmetrical operating conditions is truncated to obtain a first admittance matrix of several orders, and the vector norm of the remaining elements of the central column vector of the single-phase sequence admittance matrix is ​​obtained. The first admittance matrix of each order is traversed in ascending order. The norm of the central column vector of the first admittance matrix of the current order is obtained. Then, the ratio of the vector norm of the remaining elements of the central column vector of the single-phase sequence admittance matrix to the norm of the central column vector of the first admittance matrix of the current order is used as the dimension reduction error of the current order. If the dimension reduction error of the current order is less than a preset threshold, the order corresponding to the current order is used as the dimension reduction order of the three-phase sequence admittance matrix of the AC side of the modular multilevel converter under asymmetrical operating conditions, and the traversal ends. According to the dimensionality reduction order, the three-phase sequence admittance matrix is ​​dimensionality reduced to obtain the dimensionality-reduced admittance matrix corresponding to the three-phase sequence admittance matrix. Then, the dimensionality-reduced admittance matrix is ​​equivalent to a single-input single-output impedance, and the stability of the modular multilevel converter is evaluated using the single-input single-output impedance. The process of equating the reduced admittance matrix to a single-input single-output impedance specifically involves: If the reduced admittance matrix is ​​a 2×2 admittance matrix, then the Schul complement of the reduced admittance matrix is ​​calculated, and the Schul complement of the reduced admittance matrix is ​​used as the single-input single-output impedance corresponding to the reduced admittance matrix. If the reduced admittance matrix is ​​an N×N admittance matrix, then the reduced admittance matrix is ​​simplified to a second admittance matrix, and then the Schul complement of the second admittance matrix is ​​calculated. The Schul complement of the second admittance matrix is ​​used as the single-input single-output impedance corresponding to the reduced admittance matrix; where N≥3 and N∈R, the second admittance matrix is ​​a 2×2 admittance matrix. The simplification of the dimension-reduced admittance matrix into a second admittance matrix is ​​specifically as follows: Obtain the first current-voltage relationship expression corresponding to the system admittance of the modular multilevel converter, and the second current-voltage relationship expression corresponding to the grid-side impedance of the modular multilevel converter; By combining the first current-voltage relationship expression and the second current-voltage relationship expression, the dimension-reduced admittance matrix is ​​simplified to the second admittance matrix.

2. The method for evaluating the stability of a modular multilevel converter as described in claim 1, characterized in that, The step of reducing the dimensionality of the three-phase sequence admittance matrix according to the dimensionality reduction order to obtain the dimensionality-reduced admittance matrix corresponding to the three-phase sequence admittance matrix is ​​as follows: According to the dimensionality reduction order, the vector norm of the remaining elements of the central column vector of the single-phase sequence admittance matrix is ​​reduced to obtain the corresponding first vector norm dimensionality reduction result. Based on the dimensionality reduction result of the first vector norm, a multi-input multi-output admittance matrix is ​​established. Then, based on the multi-input multi-output admittance matrix and the Clark transformation matrix, the three-phase sequence admittance dimensionality reduction matrix is ​​transferred to the complex vector domain to obtain multiple first block admittance matrices corresponding to the three-phase sequence admittance dimensionality reduction matrix, which are used as the dimensionality reduction matrix corresponding to the three-phase sequence admittance matrix.

3. The method for evaluating the stability of a modular multilevel converter as described in claim 1, characterized in that, The step of reducing the dimensionality of the three-phase sequence admittance matrix according to the dimensionality reduction order to obtain the dimensionality-reduced admittance matrix corresponding to the three-phase sequence admittance matrix is ​​as follows: Based on the Clark transformation matrix, the three-phase sequence admittance matrix is ​​transformed into the complex vector domain to obtain multiple second block admittance matrices corresponding to the three-phase sequence admittance matrix; Obtain the vector norm of the remaining elements of the central column vector of each second block admittance matrix, and perform dimensionality reduction processing on the vector norm of the remaining elements of the central column vector of each second block admittance matrix according to the dimensionality reduction order to obtain the second vector norm dimensionality reduction result corresponding to each second block admittance matrix. Then, based on the second vector norm dimensionality reduction result corresponding to each second block admittance matrix, perform dimensionality reduction processing on each second block admittance matrix to obtain the first block admittance matrix corresponding to each second block admittance matrix, which is used as the dimensionality reduction matrix corresponding to the three-phase sequence admittance matrix.

4. The method for evaluating the stability of a modular multilevel converter as described in claim 1, characterized in that, The method for obtaining the dimensionality reduction order also includes: The first admittance matrix of each order is traversed in ascending order. The norm of the central column vector of the first admittance matrix of the current order is obtained. If the norm of the central column vector of the first admittance matrix of the current order begins to converge, the order corresponding to the current order is taken as the dimension reduction order of the three-phase sequence admittance matrix of the AC side of the modular multilevel converter under asymmetric operating conditions, and the traversal ends.

5. A modular multilevel converter stability evaluation system, characterized in that, include: The truncation acquisition module is used to truncate the single-phase sequence admittance matrix of the AC side of the modular multilevel converter under asymmetrical operating conditions according to a preset order, to obtain a first admittance matrix of several orders, and to obtain the vector norm of the remaining elements of the central column vector of the single-phase sequence admittance matrix. The traversal module is used to traverse the first admittance matrix of each order in ascending order, obtain the norm of the central column vector of the first admittance matrix of the current order, and then use the ratio of the vector norm of the remaining elements of the central column vector of the single-phase sequence admittance matrix to the norm of the central column vector of the first admittance matrix of the current order as the dimension reduction error of the current order. If the dimension reduction error of the current order is less than a preset threshold, the order corresponding to the current order is used as the dimension reduction order of the three-phase sequence admittance matrix of the AC side of the modular multilevel converter under asymmetrical operating conditions, and the traversal ends. The dimension reduction equivalent module is used to perform dimension reduction processing on the three-phase sequence admittance matrix according to the dimension reduction order to obtain the dimension reduction admittance matrix corresponding to the three-phase sequence admittance matrix, and then the dimension reduction admittance matrix is ​​equivalent to a single-input single-output impedance, and the stability of the modular multilevel converter is evaluated using the single-input single-output impedance. The dimensionality reduction equivalent module specifically includes: A dimensionality reduction unit is used to perform dimensionality reduction processing on the three-phase sequence admittance matrix according to the dimensionality reduction order; An equivalent unit is used to calculate the Schul complement of the reduced-dimensional admittance matrix if the reduced-dimensional admittance matrix is ​​a 2×2 admittance matrix, and use the Schul complement of the reduced-dimensional admittance matrix as the single-input single-output impedance corresponding to the reduced-dimensional admittance matrix; if the reduced-dimensional admittance matrix is ​​an N×N admittance matrix, the reduced-dimensional admittance matrix is ​​simplified to a second admittance matrix, and then the Schul complement of the second admittance matrix is ​​calculated, and the Schul complement of the second admittance matrix is ​​used as the single-input single-output impedance corresponding to the reduced-dimensional admittance matrix; wherein, N≥3 and N∈R, and the second admittance matrix is ​​a 2×2 admittance matrix; An evaluation unit is used to evaluate the stability of the modular multilevel converter using the single-input single-output impedance. The equivalent unit simplifies the dimension-reduced admittance matrix into a second admittance matrix, specifically: The equivalent unit obtains the first current-voltage relationship expression corresponding to the system admittance of the modular multilevel converter, and the second current-voltage relationship expression corresponding to the grid-side impedance of the modular multilevel converter. By combining the first current-voltage relationship expression and the second current-voltage relationship expression, the dimension-reduced admittance matrix is ​​simplified to the second admittance matrix.

6. A terminal, characterized in that, It includes a processor, a memory, and a computer program stored in the memory; wherein the computer program can be executed by the processor to implement a modular multilevel converter stability evaluation method as described in any one of claims 1 to 4.

7. A computer-readable storage medium, characterized in that, The computer-readable storage medium includes a stored computer program; wherein, when the computer program is executed, it controls the device containing the computer-readable storage medium to perform a modular multilevel converter stability evaluation method as described in any one of claims 1 to 4.

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