A semiconductor laser

By designing a third mesa and an insulating layer covering the substrate surface in a semiconductor laser, the short-circuit risk during packaging and the film rupture problem during dicing are solved, thereby improving the reliability and performance of the device.

CN118281695BActive Publication Date: 2026-07-31QUANZHOU SANAN SEMICON TECH CO LTD
View PDF 2 Cites 0 Cited by

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
QUANZHOU SANAN SEMICON TECH CO LTD
Filing Date
2024-05-10
Publication Date
2026-07-31

AI Technical Summary

Technical Problem

Existing semiconductor lasers have a short-circuit risk due to AuSn solder expansion during packaging in high-power applications, and the end-face cover film is susceptible to cracking due to external stress during the cutting process, affecting device reliability.

Method used

A semiconductor laser structure was designed, including a substrate, a semiconductor stack, electrodes, and a resonator end face. By forming a third mesa on the surface of the substrate and covering it with an insulating layer, the propagation of AuSn solder is controlled. At the same time, a distance is reserved during the cutting process to reduce the impact of external stress on the end face cover film.

Benefits of technology

This reduces the risk of short circuits during the packaging process of high-power semiconductor lasers, improves device reliability during the cutting process, reduces the risk of end-face cover film rupture, and enhances overall performance.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN118281695B_ABST
    Figure CN118281695B_ABST
Patent Text Reader

Abstract

This application provides a semiconductor laser, comprising: a substrate including an upper surface and a lower surface; a semiconductor stack formed on the upper surface of the substrate, including a first semiconductor layer, an active layer, and a second semiconductor layer stacked sequentially along a third direction, the semiconductor stack including a ridge extending along a first direction, the first direction being perpendicular to the third direction; a first electrode located on the upper surface of the semiconductor stack, the ridge being electrically contacted; a second electrode located on the lower surface of the substrate, being electrically contacted with the substrate; wherein, the semiconductor laser includes a third mesa, the third mesa exposing a portion of the substrate surface, the third mesa having a third depth along the third direction, the third depth being between 1 and 30 μm.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This application relates to the field of semiconductor-related technologies, and in particular to a semiconductor laser. Background Technology

[0002] In recent years, semiconductor lasers have developed rapidly. Due to their many advantages such as high power, high reliability, long life, small size and low cost, they have been widely used in laser display, laser communication and laser surgery. Summary of the Invention

[0003] The purpose of this application is to provide a semiconductor laser, comprising:

[0004] The substrate includes an upper surface and a lower surface;

[0005] A semiconductor stack is formed on the upper surface of the substrate, comprising a first semiconductor layer, an active layer, and a second semiconductor layer stacked sequentially along a third direction. The semiconductor stack includes a ridge extending along a first direction, which is perpendicular to the third direction.

[0006] The first electrode is located on the upper surface of the semiconductor stack, and the ridge is electrically contacted.

[0007] The second electrode is located on the lower surface of the substrate and is in electrical contact with the substrate.

[0008] The semiconductor laser includes a third mesa, which exposes a portion of the substrate surface. The third mesa has a third depth along the third direction, and the third depth is between 1 and 30 μm.

[0009] In one embodiment, the third depth is between 2 and 15 μm.

[0010] In one embodiment, an insulating layer formed on the surface of the semiconductor stack is further included, the insulating layer also covering the third mesa.

[0011] In one embodiment, the device further includes a first mesa adjacent to the ridge and a second mesa adjacent to the first mesa. The first mesa exposes a portion of the surface of the second semiconductor layer, and the second mesa exposes the surface of the first semiconductor layer. The ridge distributes the first mesa, the second mesa, and the third mesa along the edge of the semiconductor laser in a second direction. The first direction is perpendicular to the second direction, and the third direction is perpendicular to the second direction.

[0012] In one embodiment, the third platform has a third width along the second direction, the third width being between 5 and 50 μm.

[0013] In one embodiment, the semiconductor stack includes a resonator end face, which includes a light emitting end face and a light reflecting end face, the light emitting end face and the light reflecting end face being located at opposite ends of the ridge extension direction.

[0014] In one embodiment, an end-face cover film is further included, the end-face cover film comprising a first end-face cover film and a second end-face cover film, the first end-face cover film being formed on the light emitting end-face and the second end-face cover film being formed on the light reflecting end-face.

[0015] In one embodiment, the third platform and the resonator end face have a third distance in the first direction, the third distance being between 5 and 50 μm.

[0016] In one embodiment, a first sidewall is provided between the first countertop and the second countertop, and a second sidewall is provided between the second countertop and the third countertop, wherein the length of the first sidewall is less than the length of the second sidewall.

[0017] In one embodiment, the angle between the first sidewall and the second tabletop is a first included angle, and the angle between the second sidewall and the third tabletop is a second included angle, wherein the second included angle is smaller than the first included angle.

[0018] In one embodiment, the substrate includes a first side, a second side, a third side, and a fourth side connected in sequence. The first side and the third side extend along a first direction, and the second side and the fourth side extend along a second direction. The first side or the third side includes a first region and a second region distributed along the first direction. The first region is adjacent to the second side or the fourth side, and the second region is located between the first regions. The first region has a smooth surface, and the second region has a rough surface.

[0019] In one embodiment, the distance by which the first region extends along the first direction is 5 to 50 μm.

[0020] In one embodiment, the second region has a first portion and a second portion along the thickness direction of the semiconductor stack, the first portion being close to the first electrode and the second portion being close to the second electrode, and the height of the first portion being greater than the height of the second portion.

[0021] In one embodiment, the texture of the first rough surface is spaced vertical stripes, and the second rough surface includes an upper portion near the first portion and a lower portion near the second electrode, wherein the roughness of the upper portion is less than that of the lower portion. Attached Figure Description

[0022] The features and advantages of the invention will be more clearly understood by referring to the accompanying drawings, which are illustrative and should not be construed as limiting the invention in any way.

[0023] Figure 1 This is a top view of a semiconductor laser disclosed in an embodiment of the present invention;

[0024] Figure 2 Along Figure 1 A sectional view of the tangent line A-A';

[0025] Figure 3 Along Figure 1 A sectional view of the tangent line B-B';

[0026] Figure 4 Along Figure 1 A cross-sectional view of the tangent line C-C';

[0027] Figure 5 This is a perspective view of a semiconductor laser disclosed in an embodiment of this application;

[0028] Figure 6 for Figure 5 Top view;

[0029] Figure 7 and Figure 8 All along Figure 5 A cross-sectional view of the tangent line I-I';

[0030] Figure 9 A surface view of the first or third side of the substrate;

[0031] Figure 10 This describes the process of unitizing the bar strips in a semiconductor laser. Detailed Implementation

[0032] The following specific embodiments illustrate the implementation of this application. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification. This application can also be implemented or operated through other different specific embodiments, and various details in this application can also be modified or changed based on different viewpoints and applications without departing from the spirit of this application.

[0033] In the description of this application, it should be noted that the terms "upper," "lower," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product of this application is in use. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on this application. In addition, the terms "first" and "second," etc., are only used to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0034] Figure 1 This is a top view of a semiconductor laser disclosed in an embodiment of the present invention. Figure 2 Along Figure 1 A sectional view of the tangent line A-A'. Figure 3 Along Figure 1 A sectional view of the tangent line B-B'. Figure 4 Along Figure 1 A cross-sectional view of the tangent line C-C'.

[0035] Semiconductor lasers can have polygonal shapes, such as triangular, hexagonal, rectangular, or square. For example... Figure 1 As shown, the size of the semiconductor laser can be, for example, a square shape or a rectangular shape of similar size with dimensions of 1200μm×200μm, 600μm×200μm, 600μm×150μm, 1200μm×150μm, 1100μm×120μm, 800μm×200μm and 800μm×150μm, but is not particularly limited thereto.

[0036] like Figures 1 to 3 As shown, the semiconductor laser includes a first direction X, a second direction Y, and a third direction Z, which are perpendicular to each other.

[0037] The semiconductor laser includes a substrate 110, a semiconductor stack 120 made of nitride-based semiconductors formed on the upper surface of the substrate 110, a first electrode 160 (p-side electrode) formed on the semiconductor stack 120, and a second electrode 170 (n-side electrode) formed on the lower surface of the substrate 110. Furthermore, a pair of resonator end faces are formed on the semiconductor stack 120, with a light-emitting end face 181 and a light-reflecting end face 182, which are formed perpendicularly to the laser emission direction (first direction X).

[0038] The substrate 110 can be a growth substrate, including a nitride semiconductor, SiC, or a high-resistivity substrate such as a sapphire substrate. In one embodiment, the substrate 110 preferably contains a nitride semiconductor, more preferably n-type GaN. The substrate containing an n-type nitride semiconductor has a higher thermal conductivity than sapphire, which improves heat dissipation efficiency, thereby reducing defects such as dislocations and resulting in good crystallinity. Moreover, it is preferable to grow the laser diode on the C-plane of the substrate containing the n-type nitride semiconductor. If the laser diode is formed on the C-plane of the nitride semiconductor, the cleavage plane (m-plane) appears easily, and the C-plane is chemically stable, thus providing advantages such as ease of processing and etching tolerance required by subsequent processes. In another embodiment, the substrate 110 can be a support substrate, and the growth substrate originally used for epitaxial growth of the semiconductor stack 120 can be selectively removed according to the application requirements, and the semiconductor stack 120 can be transferred to the aforementioned support substrate.

[0039] In one embodiment of the present invention, the thickness of the substrate 110 is, for example, at least 40 μm and / or at most 400 μm, preferably 50 μm, 60 μm, 80 μm, 100 μm, 120 μm and 150 μm.

[0040] A semiconductor stack 120 is formed on the upper surface of the substrate 110. The semiconductor stack 120 includes a first semiconductor layer 121, an active layer 122, and a second semiconductor layer 123, which are sequentially disposed on the upper surface of the substrate 110 along the third direction Z.

[0041] In one embodiment of the present invention, a semiconductor stack 120 is formed on a substrate 110 by means of metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), hydride vapor deposition (HVPE), physical vapor deposition (PVD), or ion plating.

[0042] In one embodiment of the present invention, the first semiconductor layer 121 may include a buffer layer (not shown), a first cladding layer (not shown), and a first waveguide layer (not shown), which are sequentially disposed on the first surface 110a of the substrate 110 along the third direction Z.

[0043] The buffer layer is an n-type material layer made of a GaN-based III-V group nitride semiconductor, or an undoped material layer. More specifically, for example, buffer layer 121 is an n-GaN layer, and Si is suitable as an n-type dopant. Furthermore, the film thickness of buffer layer 121 is preferably, for example, from 100 nm to 2000 nm. A first cladding layer is formed on the buffer layer, and the first cladding layer is composed of one or more gallium nitride-based semiconductor layers with added n-type dopant. More specifically, for example, the first cladding layer may be composed of an n-type GaN layer, an n-type AlGaN layer, an n-type InAlGaN layer, etc., and Si is suitable as an n-type dopant. Furthermore, the film thickness of the first cladding layer 122 is preferably, for example, from 500 nm to 3000 nm. A first waveguide layer is formed on the first cladding layer, and the first waveguide layer is composed of one or more gallium nitride-based semiconductor layers. More specifically, for example, the first waveguide layer may be composed of an n-type GaN layer, an n-type InGaN layer, an n-type InAlGaN layer, etc. Alternatively, the first waveguide layer may be composed of an undoped gallium nitride-based semiconductor layer, or the first waveguide layer may have a laminated structure composed of an n-type layer and an undoped layer. Furthermore, the film thickness of the first waveguide layer is preferably, for example, from 10 nm to 500 nm.

[0044] In one embodiment of the invention, an active layer 122 is formed on a first semiconductor layer 121 and has the following configuration, wherein, for example, a well layer (not shown) and a barrier layer (not shown) composed of an undoped gallium nitride-based semiconductor layer without impurities are alternately arranged. More specifically, for example, the well layer and the barrier layer may be composed of an AlGaN layer, a GaN layer, an InGaN layer, an InAlGaN layer, etc. Alternatively, the active layer (specifically, the barrier layer) may be composed of a gallium nitride-based semiconductor layer doped with an n-type dopant. In this case, the band gap of the barrier layer is set to a value larger than the band gap of the well layer. Furthermore, the film thickness of each layer is preferably, for example, from 1 nm to 100 nm. The active layer may have a single quantum well structure including a single well layer, or the active layer may have a multi-quantum well structure in which multiple well layers and multiple barrier layers are alternately arranged.

[0045] In one embodiment of the present invention, the second semiconductor layer 123 includes a second waveguide layer (not shown), a carrier blocking layer (electron blocking layer, not shown), a second cladding layer (not shown), and a contact layer (not shown), which are sequentially disposed on the active layer along the third direction Z.

[0046] A second waveguide layer is formed on the active layer 122, and the second waveguide layer is composed of one or more gallium nitride-based semiconductor layers. More specifically, for example, the second waveguide layer may be composed of a GaN layer, an InGaN layer, etc., and a Mg-doped p-type gallium nitride-based semiconductor layer is suitable for the second waveguide layer. Furthermore, the film thickness of the second waveguide layer is preferably, for example, from 10 nm to 500 nm. A carrier blocking layer is formed on the second waveguide layer, and the carrier blocking layer is composed of a gallium nitride-based semiconductor layer with a p-type dopant. More specifically, for example, the carrier blocking layer may be composed of a p-type AlGaN layer, etc., and Mg is suitable as a p-type dopant. Furthermore, the film thickness of the carrier blocking layer is preferably, for example, from 5 nm to 100 nm. It should be noted that, in one embodiment of the present invention, the carrier blocking layer may be formed between the active layer 122 and the second waveguide layer, or may be formed in the middle of the second waveguide layer. Furthermore, a structure in which the carrier blocking layer is not disposed in the semiconductor stack 120 may be adopted. Even without a carrier blocking layer, it maintains its function as a semiconductor laser. A second cladding layer is formed on the carrier blocking layer, and the second cladding layer is composed of one or more gallium nitride-based semiconductor layers. More specifically, for example, the second cladding layer can be composed of a p-type GaN layer, a p-type AlGaN layer, a p-type InAlGaN layer, etc., with Mg suitable as a p-type dopant. Furthermore, the film thickness of the second cladding layer is preferably, for example, from 100 nm to 1000 nm. A contact layer is formed on the second cladding layer, and the contact layer is composed of a gallium nitride-based semiconductor layer with a p-type dopant. More specifically, for example, the contact layer can be composed of a p-type GaN layer, with Mg suitable as a p-type dopant. Furthermore, the film thickness of the contact layer is preferably, for example, from 5 nm to 100 nm.

[0047] A strip-shaped ridge 130 is provided on the upper surface of the second semiconductor layer 123, thereby enabling the formation of an effective refractive index waveguide. The ridge 130 extends along the first direction X.

[0048] In one embodiment of the present invention, selective etching is performed on the semiconductor stack 120 to form a ridge 130, a first mesa M1 adjacent to the ridge 130, and a second mesa M2 adjacent to the first mesa M1 on the semiconductor stack 120. Specifically, the semiconductor stack 120 forms the ridge 130 and the first mesa M1 adjacent to the ridge 130 by removing a portion of the second semiconductor layer 123. The semiconductor stack 120 forms the second mesa M2 by removing a portion of the second semiconductor layer 123, the active layer 122, and a portion of the first semiconductor layer 121.

[0049] An ohmic contact electrode 140 is formed on the upper surface of the ridge 130, which can be fabricated, for example, by sputtering. Specifically, the main function of the ohmic contact electrode 140 is to improve the lateral extension capability and expand the area where the current is applied. The material of the ohmic contact electrode 140 can be indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), gallium oxide (GaO3), etc., or it can be a metal such as nickel or gold.

[0050] An insulating layer 150 is formed on the semiconductor stack 120. The insulating layer 150 includes covering the side surface 130b of the ridge 130 and a portion of the upper surface of the ridge 130, ensuring insulation between the surface of the second semiconductor layer 123 exposed as a first mesa M1 adjacent to the ridge 130 and the side surface of the ridge 130, and ensuring a refractive index difference relative to the second semiconductor layer 123. The insulating layer 150 located on the upper surface of the ridge 130 has an opening exposing the ohmic contact electrode 140. The insulating layer 150 also covers the first mesa M1 and the second mesa M2.

[0051] As the insulating layer 150, it is suitable to use an insulating material containing one or more of SiO2, SiN, Al2O3, and ZrO2. The film thickness of the insulating layer is preferably, for example, from 100 nm to 500 nm.

[0052] A first electrode 160 is formed on the ridge 130 and contacts an ohmic contact electrode through an opening in the insulating layer 150, thereby electrically connecting to the second semiconductor layer 123. The area where the first electrode 160 is formed is not limited to the upper surface of the ridge 130, but may also extend to the first mesa M1 through the insulating layer 150. The material of the first electrode 160 may include, for example, any one of Pd, Pt, Ni, Au, Ti, W, Cu, Ag, Zn, Sn, In, Al, Ir, Rh, or ITO.

[0053] The second electrode 170 is formed on the lower surface of the substrate 110 and is electrically connected to the first semiconductor layer 121.

[0054] In one embodiment of the present invention, the material of the second electrode 170 includes any one or more combinations of Ni, Ti, Pd, Pt, Au, Al, TiN, ITO and IGZO, and is not limited thereto.

[0055] like Figure 1 and Figure 4As shown, since the strip-shaped direction of the ridge 130 (i.e., the first direction) is used as the resonator direction, a pair of resonator end faces 180 can be formed on the end faces by cleaving or etching. During cleaving formation, the substrate 110 or the semiconductor stack 120 needs to have cleaving properties, which allows for easy obtaining of excellent mirror surfaces. Furthermore, even without cleaving properties, the resonator end faces 180 can be formed by etching. The resonator end faces formed by cleaving or etching are coated using ECR or other deposition processes to form an end face cover film 190 composed of a single film or multiple films, so as to efficiently reflect the light from the active layer 122. One side of the resonator end face 180 is a light-reflecting end face 181, composed of a relatively high reflectivity surface, primarily functioning as a light-reflecting side resonator surface reflecting light into the waveguide region; the other side is a light-emitting end face 182, composed of a relatively low reflectivity surface, primarily functioning as a light-emitting side resonator surface emitting light to the outside.

[0056] Finally, by unitizing the semiconductor laser bar strips in a direction parallel to the direction extending along the ridge 130 (first direction X), a [structure / form] is formed. Figure 1 The semiconductor laser shown.

[0057] To make the first tabletop M1, the second tabletop M2, and the third tabletop M3 more visually appealing and three-dimensional, Figures 5 to 7 A schematic diagram showing the removal of the ohmic contact electrode, insulating layer, and first electrode. Figure 5 This is a perspective view of a semiconductor laser disclosed in an embodiment of this application. Figure 6 for Figure 5 Top view, Figure 7 and Figure 8 All along Figure 5 A sectional view of the tangent line I-I'.

[0058] In this application, as Figures 5 to 8 As shown, the semiconductor laser includes a third mesa M3. The semiconductor stack 120 forms the third mesa M3 by removing portions of the second semiconductor layer 123, the active layer 122, the first semiconductor layer 121, and a portion of the substrate 110. The third mesa M3 exposes a portion of the substrate 110 surface. Along the second direction Y, ridges 130 distribute the first mesa M1, the second mesa M2, and the third mesa M3 towards the edge of the semiconductor laser. Figure 3 As shown, the insulating layer 150 covers the third platform M3.

[0059] like Figure 6 As shown, the third platform M3 has a third width K3 along the second direction Y, and the third width K3 is between 5 and 50 μm.

[0060] like Figure 7As shown, the second platform M2 has a second depth S2 along the third direction Z (equivalent to the height between the first platform M1 and the second platform M2), and the second depth S2 is between 1 and 4 μm. The third platform M3 has a third depth S3 along the third direction Z (equivalent to the height between the second platform M2 and the third platform M3), and the third depth S3 of the third platform M3 is between 1 and 30 μm, preferably between 2 and 15 μm.

[0061] During the unitization of semiconductor lasers, since the semiconductor lasers designed in this application have a third mesa M3 that exposes part of the surface of the substrate 110, and the edge of the insulating layer 150 covering the semiconductor laser is located on the third mesa M3, the cracking of the insulating layer 150 due to external stress can be controlled within the third mesa M3. In high-power semiconductor lasers, the first electrode 160 (P-side electrode) is typically eutectic-bonded to the packaging substrate using AuSn solder. The third mesa M3 prevents Sn from the AuSn solder from extending along the outer edge of the insulating layer 150 to the third mesa M3. Firstly, compared to the second mesa M2, the third mesa M3 is located closer to the edge of the semiconductor laser, making it more difficult for Sn to extend onto the third mesa M3. Secondly, based on the second mesa M2, the third depth S3 of the third mesa M3 is between 1 and 30 μm, making it difficult for Sn to extend along the sidewall of the third mesa M3 to onto the third mesa M3. Therefore, even if the insulating layer 150 covering the third mesa M3 breaks due to external stress, the semiconductor laser packaging device can significantly reduce the probability of Sn creep and reduce the risk of short circuits.

[0062] In one embodiment, such as Figure 8 As shown, there is a first sidewall B1 between the first platform M1 and the second platform M2, and a second sidewall B2 between the second platform M2 and the third platform M3. Since the second depth S2 of the second platform M2 is between 1 and 4 μm and the depth of the third platform M3 is between 2 and 15 μm, the length of the second sidewall B2 is greater than the length of the first sidewall B1.

[0063] In one embodiment, the angle between the first sidewall B1 and the second platform M2 is the first included angle α1, and the angle between the second sidewall B2 and the third platform M3 is the second included angle α2, wherein the first included angle α1 is greater than the second included angle α2.

[0064] In one embodiment, the first included angle α1 is greater than 90° and the second included angle α2 is less than 90°.

[0065] In one embodiment, such as Figure 6 As shown, there is a minimum distance between the third platform M3 and the resonator end face 180, which is the third distance C3. The third distance C3 is between 5 and 50 μm, preferably between 15 and 40 μm.

[0066] like Figure 6 As shown, the substrate 110 has a first side surface 110a, a second side surface 110b, a third side surface 110c, and a fourth side surface 110d connected in sequence. The first side surface 110a and the third side surface 110c extend along a first direction X, and the second side surface 110b and the fourth side surface 110d extend along a second direction Y. An end-face cover film 190 is covered on the second side surface 110b and the fourth side surface 110d.

[0067] Figure 9 This is a surface view of the first or third side of the substrate. Figure 10 This describes the process of unitizing the bar strips in a semiconductor laser.

[0068] like Figure 9 As shown, the first side 110a and the third side 110c respectively include a first region Q1 and a second region Q2 distributed along the first direction X. The first region Q1 is adjacent to the second side 110b or the fourth side 110d, and the second region Q2 is located between the two first regions Q1 (i.e., away from the second side 110b or the fourth side 110d).

[0069] like Figure 9 and Figure 10 As shown, during the unitization process of the semiconductor laser bar, the third mesa M3 serves as the cutting path for unitization. A third distance C3 is reserved in the first direction X between the third mesa M3 and the resonator end face 180 (light emitting end face 181 or light reflecting end face 182). Within this distance range, the substrate 110 is not cut by a diamond cutter or laser, corresponding to the first region Q1 of the first side face 110a or the third side face 110c of the substrate 110. The substrate of the third mesa M3 is therefore cut by a diamond cutter or laser, corresponding to the second region Q2 of the first side face 110a or the third side face 110c of the substrate 110. Therefore, the first region Q1 has a smooth surface, and the second region Q2 has a rough surface. In one embodiment, the distance that the first region Q1 extends along the first direction X is 5~50 μm. If the diamond cutter or laser starts cutting from the resonator end face of the semiconductor laser bar, it may cause the end face cover film to be subjected to external stress, resulting in film breakage and crystal fragmentation, affecting the effective gain of the laser in the resonant cavity. In this application, a third distance C3 is reserved in the first direction X between the third mesa M3 and the resonator end face 180 (light emitting end face 181 or light reflecting end face 182), and the third mesa M3 exposed on the substrate surface serves as a cutting path. The external stress mainly acts on the third mesa M3 and the second region Q2 of the first side surface 110a or the third side surface 110c of the substrate 110 corresponding to the third mesa, thereby reducing the risk of the end face cover film breaking and crystal fragmentation.

[0070] In one embodiment, the semiconductor laser bar is first surface-cut with a laser on the second electrode 170 (N-side electrode), and then diamond-cut with a diamond cutter on the first electrode 160 (P-side electrode). Therefore, as... Figure 9 As shown, the second region Q2 has a first portion Q21 near the first electrode 160 and a second portion Q22 near the second electrode 170 along the third direction Z (semiconductor stack thickness direction). Along the third direction, the height of the first portion Q21 is greater than the height of the second portion Q22. Because the first portion Q21 and the second portion Q22 are cut using different methods, their surface roughness marks are different. The first portion Q21 consists of spaced vertical stripes. Due to the limited depth of laser surface cutting, the second portion Q22 is divided into an upper half Q221 near the first portion Q21 and a lower half Q222 near the second electrode 170. The upper half Q221 is located between the first portion Q21 and the lower half Q222. The surface of the lower half Q222 is directly burned by the laser, while the surface of the upper half Q221 is affected by residual heat from the laser; therefore, the roughness of the upper half Q221 is less than that of the lower half Q222.

Claims

1. A semiconductor laser, comprising: The substrate includes an upper surface and a lower surface; A semiconductor stack is formed on the upper surface of the substrate, comprising a first semiconductor layer, an active layer, and a second semiconductor layer stacked sequentially along a third direction. The semiconductor stack includes a ridge extending along a first direction, which is perpendicular to the third direction. The first electrode is located on the upper surface of the semiconductor stack, and the ridge is electrically contacted. The second electrode is located on the lower surface of the substrate and is in electrical contact with the substrate. The semiconductor laser includes a third mesa, which exposes a portion of the substrate surface. The third mesa has a third depth along the third direction, and the third depth is between 1 and 30 μm.

2. The semiconductor laser of claim 1, wherein, The third depth is between 2 and 15 μm.

3. The semiconductor laser of claim 1, wherein, It also includes an insulating layer formed on the surface of the semiconductor stack, which further covers the third mesa.

4. The semiconductor laser of claim 1, wherein, It also includes a first platform adjacent to the ridge and a second platform adjacent to the first platform. The first platform exposes a portion of the surface of the second semiconductor layer, and the second platform exposes the surface of the first semiconductor layer. The first platform, the second platform, and the third platform are distributed along a second direction from the ridge to the edge of the semiconductor laser. The first direction is perpendicular to the second direction, and the third direction is perpendicular to the second direction.

5. The semiconductor laser of claim 4, wherein, The third platform has a third width along the second direction, and the third width is between 5 and 50 μm.

6. The semiconductor laser according to claim 1, characterized in that, The semiconductor stack includes a resonator end face, which includes a light emitting end face and a light reflecting end face, and the light emitting end face and the light reflecting end face are respectively located at both ends of the ridge extension direction.

7. The semiconductor laser of claim 6, wherein, It also includes an end-face covering film, which includes a first end-face covering film and a second end-face covering film, wherein the first end-face covering film is formed on the light emitting end face and the second end-face covering film is formed on the light reflecting end face.

8. The semiconductor laser of claim 7, wherein, The third platform and the resonator end face have a third distance in the first direction, and the third distance is between 5 and 50 μm.

9. The semiconductor laser of claim 4, wherein, A first sidewall is provided between the first countertop and the second countertop, and a second sidewall is provided between the second countertop and the third countertop. The length of the first sidewall is less than the length of the second sidewall.

10. The semiconductor laser according to claim 9, characterized in that, The angle between the first sidewall and the second tabletop is the first included angle, and the angle between the second sidewall and the third tabletop is the second included angle, which is smaller than the first included angle.

11. The semiconductor laser of claim 4, wherein, The substrate includes a first side, a second side, a third side, and a fourth side connected in sequence. The first side and the third side extend along a first direction, and the second side and the fourth side extend along a second direction. The first side or the third side includes a first region and a second region distributed along the first direction. The first region is adjacent to the second side or the fourth side, and the second region is located between the first regions. The first region has a smooth surface, and the second region has a rough surface.

12. The semiconductor laser of claim 11, wherein, The distance the first region extends along the first direction is 5~50μm.

13. The semiconductor laser of claim 11, wherein, The second region has a first portion and a second portion along the thickness direction of the semiconductor stack. The first portion is close to the first electrode, and the second portion is close to the second electrode. The height of the first portion is greater than the height of the second portion.

14. The semiconductor laser of claim 13, wherein, The texture of the first rough surface is spaced vertical stripes, and the second rough surface includes an upper portion near the first portion and a lower portion near the second electrode, wherein the roughness of the upper portion is less than that of the lower portion.