Signal identification method, device, apparatus and storage medium

Abstract

The application relates to the technical field of signal identification, and discloses a signal identification method, device, equipment and storage medium. The method comprises the following steps: obtaining a to-be-identified signal accessed by a microprocessor through an interface; performing edge trigger detection on the to-be-identified signal by using a timer of the microprocessor to obtain a signal period detection result and a high-level pulse width detection result; performing waveform continuity identification on the to-be-identified signal according to the signal period detection result to obtain an identification result that the to-be-identified signal is a digital signal or an analog signal; when the to-be-identified signal is a digital signal, performing signal period matching on the to-be-identified signal according to the signal period detection result to obtain an identification result that the to-be-identified signal is a target digital signal; and when the to-be-identified signal is an analog signal, performing time length identification on the high-level pulse width detection result to obtain an identification result that the to-be-identified signal is a target analog signal. The application can identify different types of signals on the basis of using fewer interface resources.

Description

Technical Field

[0001] This application relates to the field of signal recognition technology, and in particular to a signal recognition method, apparatus, device and storage medium. Background Technology

[0002] Remote control or radio control models (RC models) encompass a wide range of remote-controlled toys and devices, including but not limited to remote-controlled car models, airplane models, and boat models.

[0003] In related technologies, when a driver controls an RC model, the driver generates a throttle signal through a throttle signal generating device. When the electronic speed controller receives the throttle signal, it identifies the type of the throttle signal and then generates a corresponding drive signal to drive the RC model to travel at the corresponding speed.

[0004] However, there are various types of throttle signal generating devices, and in order to realize the function of recognizing different types of throttle signals, a lot of interface resources of the ESC driver are required. Summary of the Invention

[0005] The purpose of this application is to provide a signal recognition method, apparatus, device, and storage medium that can identify different types of signals with less interface resources.

[0006] This application provides a signal recognition method, including:

[0007] Acquire the signal to be identified that the microprocessor receives through an interface;

[0008] By using the microprocessor's timer, edge-triggered detection is performed on the signal to be identified, and the signal period detection result and high-level pulse width detection result of the signal to be identified are obtained.

[0009] Based on the signal period detection results, the waveform continuity of the signal to be identified is identified to obtain the identification result of whether the signal to be identified is a digital signal or an analog signal;

[0010] When the signal to be identified is a digital signal, the signal period is matched according to the signal period detection result to obtain the identification result that the signal to be identified is the target digital signal;

[0011] When the signal to be identified is an analog signal, the duration of the high-level pulse width detection result is identified to obtain the identification result that the signal to be identified is the target analog signal.

[0012] In some embodiments, a timer of a microprocessor is used to perform edge-triggered detection on the signal to be identified, obtaining the signal period detection result and the high-level pulse width detection result of the signal to be identified, including:

[0013] The timer is started when the first rising edge of the signal to be identified is detected;

[0014] When a rising edge of the signal to be identified is detected, the count value of the timer is read, the timer is cleared, and the detection results of several signal cycles are obtained.

[0015] When a falling edge of the signal to be identified is detected, the count value of the timer is read to obtain several high-level pulse width detection results.

[0016] In some embodiments, the timer has a first capture channel and a second capture channel, and reading the timer's count value includes:

[0017] When a rising edge of the signal to be identified is detected, the first capture channel is triggered to read the count value of the timer and store the read count value into the first memory space.

[0018] When a falling edge of the signal to be identified is detected, the second capture channel is triggered to read the count value of the timer and store the read count value into the second memory space.

[0019] In some embodiments, based on the signal period detection result, waveform continuity identification is performed on the signal to be identified to obtain an identification result indicating whether the signal to be identified is a digital signal or an analog signal, including:

[0020] Determine if the signal period detection result is greater than the first duration;

[0021] If present, output the recognition result for the signal to be recognized as a digital signal;

[0022] If it does not exist, output the recognition result of the signal to be identified as an analog signal.

[0023] In some embodiments, based on the signal period detection result, signal period matching is performed on the signal to be identified to obtain an identification result that the signal to be identified is a target digital signal, including:

[0024] Determine whether the difference in the signal periods of the signals to be identified is less than a preset deviation value;

[0025] If it is not less than, perform baud rate matching on the signal to be identified, and output the identification result that the signal to be identified is the target serial port signal based on the matching result of the baud rate matching.

[0026] If the signal is less than the target signal, the signal period duration is matched. Based on the matching result of the signal period duration matching, the recognition result of the target signal as the target Dshot signal is output.

[0027] In some embodiments, before outputting the recognition result of the signal to be identified as the target Dshot signal, the method further includes:

[0028] Identify the inter-frame voltage value of the signal to be identified. When the inter-frame voltage value is high, configure edge-triggered detection to obtain the low-level pulse width detection result of the signal to be identified.

[0029] In some embodiments, the high-level pulse width detection result is subjected to duration identification to obtain an identification result that the signal to be identified is the target analog signal, including:

[0030] Determine whether the high-level pulse width detection result is within the first pulse width interval or the second pulse width interval;

[0031] If it is within the first pulse width interval, the output will show the recognition result that the signal to be identified is a pulse width modulated signal;

[0032] If it is in the second pulse width interval, the output is the recognition result of the OneShot125 signal to be identified;

[0033] If neither the first nor the second pulse width interval is within the range, return to the step of performing waveform continuity identification on the signal to be identified based on the signal period detection result, and obtaining the identification result that the signal to be identified is a digital signal or an analog signal.

[0034] This application also provides a signal recognition device, including:

[0035] The first module is used to acquire the signal to be identified that the microprocessor receives through an interface;

[0036] The second module is used to perform edge-triggered detection on the signal to be identified using the microprocessor's timer, and obtain the signal period detection result and high-level pulse width detection result of the signal to be identified.

[0037] The third module is used to identify the waveform continuity of the signal to be identified based on the signal period detection result, and to obtain the identification result that the signal to be identified is a digital signal or an analog signal.

[0038] The fourth module is used to perform signal period matching on the signal to be identified when the signal to be identified is a digital signal, based on the signal period detection result, to obtain the identification result that the signal to be identified is the target digital signal;

[0039] The fifth module is used to identify the duration of the high-level pulse width detection result when the signal to be identified is an analog signal, so as to obtain the identification result that the signal to be identified is the target analog signal.

[0040] This application also provides an electronic device, which includes a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the above-described signal recognition method.

[0041] This application also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the above-described signal recognition method.

[0042] The beneficial effects of this application are as follows: The signal to be identified is input through an interface of a microprocessor. The microprocessor's timer performs edge-triggered detection on the signal to be identified, detecting the signal period and high-level pulse width. Based on the signal period detection result, waveform continuity is identified to determine whether the signal is a digital or analog signal. If the signal is identified as a digital signal, the duration dispersion and quantity of the signal period detection result are identified based on the signal period and high-level pulse width detection results to determine the corresponding target digital signal. If the signal is identified as an analog signal, the duration of the high-level pulse width detection result is identified to determine the corresponding target analog signal. Because edge-triggered detection is used to determine the signal period and high-level pulse width detection results, and then the signal type is determined based on the signal period and / or high-level pulse width detection results, different types of signals can be identified with fewer interface resources. Attached Figure Description

[0043] Figure 1 This is an optional flowchart of the signal recognition method provided in the embodiments of this application.

[0044] Figure 2 This is a flowchart of the specific method of step S103 provided in the embodiments of this application.

[0045] Figure 3 This is a flowchart of the specific method for step S104 provided in the embodiments of this application.

[0046] Figure 4 This is a flowchart of the specific method of step S105 provided in the embodiments of this application.

[0047] Figure 5 This is an optional structural schematic diagram of the signal recognition device provided in the embodiments of this application.

[0048] Figure 6 This is a schematic diagram of the hardware structure of the electronic device provided in the embodiments of this application.

[0049] Figure 7 This is a schematic diagram of the wiring structure of an ESC driver in related technologies.

[0050] Figure 8 This is a schematic diagram of the wiring structure of the ESC driver provided in the embodiments of this application. Detailed Implementation

[0051] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0052] It should be noted that although functional modules are divided in the device schematic diagram and a logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than the module division in the device or the order in the flowchart. The terms "first," "second," etc., in the specification, claims, and the aforementioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0053] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only and is not intended to limit this application.

[0054] In related technologies, in the field of remote control or radio control models, due to technological iterations, the response speed of various electronic speed controllers (ESCs) to throttle signals has gradually increased, from the original 50Hz to the current 8kHz, or even higher. Furthermore, the protocols for throttle signals are becoming increasingly diverse for different applications. Previously, ESCs were designed to be compatible with different types of throttle signals generated by various throttle mechanisms, such as… Figure 7 As shown, multiple interfaces need to be brought out simultaneously and merged externally. Each of these interfaces simultaneously listens to the throttle signal on the bus to distinguish the type of throttle signal. Therefore, to achieve the function of identifying different types of throttle signals, a significant amount of interface resources from the ESC driver is required.

[0055] Based on this, embodiments of this application provide a signal recognition method, apparatus, device, and storage medium that can recognize different types of signals with less interface resources.

[0056] Please see Figure 1 , Figure 1 This is a flowchart of a signal recognition method provided in an embodiment of this application. In some embodiments of this application, Figure 1 The method described below may include, but is not limited to, steps S101 to S105. Figure 1 These five steps will be explained in detail.

[0057] Step S101: Obtain the signal to be identified that the microprocessor receives through an interface.

[0058] like Figure 8As shown, the ESC driver has a microprocessor that receives an externally input signal to be identified through an interface, which serves as the basis for identifying the signal type of the signal to be identified.

[0059] It is understandable that the signal to be identified is the throttle signal generated by the throttle device, which can be a throttle device based on the PWM protocol, a throttle device based on the OneShot protocol, a throttle device based on the Dshot protocol, a throttle device based on the S.BUS protocol, etc.

[0060] In this embodiment, the signal to be identified is an analog signal or a digital signal in the form of a square wave.

[0061] In step S101, the microprocessor listens to the bus by bringing out an interface, obtains the signal to be identified from the bus, and the signal to be identified is connected to the microprocessor through the brought-out interface. The microprocessor obtains the signal to be identified in order to identify the signal type of the signal to be identified and generate the corresponding drive control signal.

[0062] Step S102: Using the timer of the microprocessor, edge trigger detection is performed on the signal to be identified to obtain the signal period detection result and the high-level pulse width detection result of the signal to be identified.

[0063] Understandably, the signal period refers to the duration of the waveform of the signal to be identified repeating, that is, the duration between two adjacent rising edges or two adjacent falling edges in the signal to be identified. The high-level pulse width refers to the duration of the high level, that is, the duration between a rising edge in the signal to be identified and the first falling edge that appears after that rising edge.

[0064] In step S102, after the microprocessor receives the signal to be identified through an interface, it can start a timer based on the edge transition information of the signal to be identified to perform edge trigger detection on the signal. By configuring appropriate rising edge trigger conditions and falling edge trigger conditions, the timer's duration count result is obtained when the rising edge trigger conditions and falling edge trigger conditions are met, thus obtaining the signal period detection result and high-level pulse width detection result of the signal to be identified. The number of timers to be activated can be one or more, which can be flexibly set according to the actual situation.

[0065] In some embodiments, step S102 specifically includes the following steps: when the first rising edge of the signal to be identified is detected, a timer is started; when each rising edge of the signal to be identified is detected, the count value of the timer is read and the timer is cleared to obtain a number of signal cycle detection results; when each falling edge of the signal to be identified is detected, the count value of the timer is read to obtain a number of high-level pulse width detection results.

[0066] Specifically, after the microprocessor begins edge-triggered detection of the signal to be identified, if the first rising edge of the signal to be identified is captured, a timer is started at this time. The timer starts counting, and after capturing the first rising edge, the count value of the timer is read every time a rising edge of the signal to be identified is detected, so that several signal cycle detection results can be obtained. After a rising edge is detected, the timer is cleared and the next round of counting begins. The count value of the timer is read every time a falling edge of the signal to be identified is detected. Since the timer restarts counting after a rising edge is detected, several high-level pulse width detection results can be obtained.

[0067] Furthermore, the timer has a first capture channel and a second capture channel.

[0068] Reading the timer count value specifically includes the following steps: when a rising edge of the signal to be identified is detected, the first capture channel is triggered to read the timer count value and store the read count value in the first memory space; when a falling edge of the signal to be identified is detected, the second capture channel is triggered to read the timer count value and store the read count value in the second memory space.

[0069] Specifically, after the timer starts counting, when a rising edge of the signal to be identified is detected, the first capture channel reads the timer's count value, then clears the timer and enters the next round of counting. The first capture channel stores the read count value into the first memory space, which can be read using direct memory access (DMA). The first memory space stores the timer count value read by the first capture channel each time, that is, the detection results of each signal cycle of the signal to be identified. When a falling edge of the signal to be identified is detected, the second capture channel reads the timer's count value and stores the read count value into the second memory space. The second memory space stores the timer count value read by the second capture channel each time, that is, the detection results of each high-level pulse width of the signal to be identified.

[0070] Step S103: Based on the signal period detection result, perform waveform continuity recognition on the signal to be identified to obtain the recognition result of whether the signal to be identified is a digital signal or an analog signal.

[0071] When the recognition result is obtained that the signal to be recognized is a digital signal, step S104 is executed; when the recognition result is obtained that the signal to be recognized is an analog signal, step S105 is executed.

[0072] It should be noted that when the throttle signal generated by the throttle device is an analog signal, the signal to be identified by the microprocessor from the bus is a square wave signal with a continuous waveform within a given range. The corresponding throttle control information is transmitted through the high-level pulse width detection result and the signal period detection result. However, when the throttle signal generated by the throttle device is a digital signal, the signal to be identified by the microprocessor from the bus is a square wave signal with a discrete waveform within a given range. The corresponding throttle control information is transmitted through the signal waveform of each frame. There is no edge jump in the region between two adjacent frames of signal waveform, which makes the digital signal discontinuous.

[0073] In step S103, after continuously performing edge-triggered detection on the signal to be detected within a preset time range, multiple signal cycle detection results are obtained. By identifying the duration of each signal cycle detection result, it is determined whether the waveform of the signal to be identified has continuity. If there is a signal cycle detection result whose cycle duration exceeds the normal cycle duration range, then the signal to be identified does not have continuity, and the identification result of the signal to be identified as a digital signal is obtained. If there is no signal cycle detection result whose cycle duration exceeds the normal cycle duration range, then the signal to be identified has continuity, and the identification result of the signal to be identified as an analog signal is obtained.

[0074] It is understandable that, since signal period detection is based on continuous edge-triggered detection, for analog signals, multiple signal period detection results within the normal period duration range can be obtained through edge-triggered detection. For digital signals, multiple signal period detection results within the normal period duration range can be obtained by detecting the signal period detection results of the waveform within the frame. However, when the detection reaches the region between two adjacent frames of signal waveforms, due to the lack of edge transition, the signal period detection result greatly exceeds the normal period duration range.

[0075] like Figure 2 As shown, in some embodiments, step S103 may specifically include, but is not limited to, steps S201 to S203. The following is a detailed description... Figure 2 These three steps will be explained in detail.

[0076] Step S201: Determine whether there is a signal period detection result greater than the first duration.

[0077] If it exists, proceed to step S202; if it does not exist, proceed to step S203.

[0078] Step S202: Output the recognition result of the signal to be recognized as a digital signal.

[0079] Step S203: Output the recognition result of the signal to be identified as an analog signal.

[0080] In this embodiment, a first duration is pre-set based on the normal period range of the analog signal, making the first duration greater than the maximum duration of the normal period range of the analog signal. Then, within a given range, the detection results of each signal period obtained by edge-triggered detection are compared with the first duration. If there is a signal period detection result greater than the first duration within the given range, it indicates that the signal to be identified has an inter-frame interval that causes the detected signal period detection result to be abnormal. The signal to be identified is determined to be a digital signal, and the identification result that the signal to be identified is a digital signal is output. If there is no signal period detection result greater than the first duration within the given range, it indicates that the signal to be identified does not have an inter-frame interval that causes the detected signal period detection result to be abnormal. The signal to be identified is determined to be an analog signal, and the identification result that the signal to be identified is an analog signal is output.

[0081] Step S104: Based on the signal period detection result, perform signal period matching on the signal to be identified to obtain the identification result that the signal to be identified is the target digital signal.

[0082] In step S104, when the recognition result of the signal to be identified as a digital signal is obtained, the deviation of the signal period of the signal to be identified and the duration of the signal period within a preset time period are determined based on the signal period detection result, and the signal to be identified is determined to be the corresponding target digital signal. Specifically, firstly, the signal period detection results are identified within a preset time period, and the signal period detection results longer than the first time period are eliminated. The remaining signal period detection results represent the signal period of the signal to be identified. Then, it is determined whether the deviation between the signal periods of the signal to be identified matches the deviation between the signal periods of the first target digital signal. If they match, the recognition result of the signal to be identified as the first target digital signal is obtained. The first target digital signal can be a serial port signal. If they do not match, it is determined whether the duration of the signal period of the signal to be identified within another preset time period matches the duration of the signal period of the first target digital signal. If they match, the recognition result of the signal to be identified as the second target digital signal is obtained. The second target digital signal can be a Dshot signal.

[0083] like Figure 3 As shown, in some embodiments, step S104 may specifically include, but is not limited to, steps S301 to S303, as described below. Figure 3 These three steps will be explained in detail.

[0084] Step S301: Determine whether the difference in the signal periods of the signals to be identified is less than a preset deviation value.

[0085] If it is not less than, proceed to step S302; if it is less than, proceed to step S303.

[0086] It is understandable that the difference in signal periods of the Dshot signal is less than the preset deviation value, while the difference in signal periods of the serial port signal is not less than the preset deviation value.

[0087] Step S302: Perform baud rate matching on the signal to be identified, and output the identification result that the signal to be identified is the target serial port signal based on the baud rate matching result.

[0088] In step S302, if the difference in signal periods between the signals to be identified is not less than a preset deviation value, it can be determined that the signal period of the signal to be identified does not match the signal period of the Dshot signal, and the signal to be identified has the signal period characteristics of a serial port signal. The baud rate of the signal to be identified is then matched with the corresponding target serial port signal. When the baud rate of the signal to be identified matches the baud rate of the target serial port signal, the identification result of the signal to be identified as the corresponding target serial port signal is output. Otherwise, it is re-evaluated whether the difference in signal periods between the signals to be identified is less than the preset deviation value. For example, the baud rate of the target serial port signal can be 19200bps, 115200bps, and 400000bps. When the baud rate of the signal to be identified is 19200bps, the identification result of the signal to be identified as the target serial port signal with a baud rate of 19200bps is output.

[0089] Step S303: Perform signal period duration matching on the signal to be identified, and output the identification result that the signal to be identified is the target Dshot signal based on the matching result of the signal period duration matching.

[0090] In step S303, when the difference in signal periods between the signals to be identified is less than a preset deviation value, it can be determined that the signal period of the signal to be identified matches the signal period of the Dshot signal, and the signal to be identified has the signal period characteristics of the Dshot signal. The signal period duration of the signal to be identified is matched with the corresponding target Dshot signal. When the duration of the signal period of the signal to be identified matches the duration of the signal period of the corresponding target Dshot signal within a preset matching duration, the identification result of the signal to be identified as the corresponding target Dshot signal is output. Otherwise, it is re-determined whether the difference in signal periods between the signals to be identified is less than the preset deviation value. For example, the target Dshot signal can be a Dshot150 signal, a Dshot300 signal, and a Dshot600 signal, with corresponding signal period durations of 150kHz, 300kHz, and 600kHz, respectively. When the duration of the signal period of the signal to be identified is 150kHz, the identification result of the signal to be identified as the Dshot150 signal is output.

[0091] In some embodiments, before outputting the recognition result of the signal to be identified as the target Dshot signal, the following steps are further included: identifying the inter-frame voltage value of the signal to be identified, and configuring edge-triggered detection when the inter-frame voltage value is high, so as to obtain the low-level pulse width detection result of the signal to be identified.

[0092] Specifically, the inter-frame voltage value of the signal to be identified is determined. When the inter-frame voltage value is high, edge-triggered detection is configured to obtain the edge-triggered detection configuration result. This allows for the analysis of the signal to be identified by combining the signal period duration matching result and the edge-triggered detection configuration result, ultimately outputting the identification result that the signal to be identified is the target Dshot signal. Specifically, configuring edge-triggered detection involves triggering the first capture channel to read the timer's count value each time a falling edge of the signal to be identified is detected. The read count value is stored in the first memory space, resulting in several signal period detection results. The timer is then cleared. Similarly, triggering the second capture channel to read the timer's count value each time a rising edge of the signal to be identified is detected, storing the read count value in the second memory space, resulting in several low-level pulse width detection results. When the inter-frame voltage value is low, the edge-triggered detection configuration logic described in the above embodiment is maintained.

[0093] Step S105: Perform duration identification on the high-level pulse width detection result to obtain the identification result that the signal to be identified is the target analog signal.

[0094] In step S105, when the identification result of the signal to be identified as an analog signal is obtained, the signal to be identified is determined to be the corresponding target analog signal based on the duration identification result of the high-level pulse width detection result. Specifically, firstly, a corresponding pulse width interval is set according to the pulse width range of the high-level pulse width detection result of the target analog signal. Then, the high-level pulse width detection result is compared with the threshold value of the preset pulse width interval to determine whether the high-level pulse width detection result is within the preset pulse width interval. If the high-level pulse width detection result is within the preset pulse width interval, the identification result that the signal to be identified is the target analog signal corresponding to that pulse width interval is obtained.

[0095] like Figure 4 As shown, in some embodiments, step S105 may specifically include, but is not limited to, steps S401 to S403, as described below. Figure 4 These three steps will be explained in detail.

[0096] Step S401: Determine whether the high-level pulse width detection result is within the first pulse width interval or the second pulse width interval.

[0097] If the pulse width is within the first pulse width interval, proceed to step S402; if the pulse width is within the second pulse width interval, proceed to step S403; if neither the first nor the second pulse width interval is within the second pulse width interval, return to step S103.

[0098] Step S402: Output the recognition result of the signal to be identified as a pulse width modulation signal.

[0099] Step S403: Output the recognition result of the OneShot125 signal to be identified.

[0100] In this embodiment, a first pulse width interval is pre-defined based on the normal high-level pulse width detection result range of the pulse width modulation signal, for example, the first pulse width interval is set to [0.5ms, 2.5ms]. A second pulse width interval is pre-defined based on the normal high-level pulse width detection result range of the OneShot125 signal, for example, the second pulse width interval is set to [100us, 300us]. Then, within the given range, each high-level pulse width detection result obtained by edge trigger detection is compared with the threshold value of either the first or second pulse width interval. If the high-level pulse width detection result is within the first pulse width interval, then the high-level pulse width detection result of the signal to be identified is compared with the high-level pulse width detection result of the pulse width modulation signal. If the test results have the same characteristics, the signal to be identified is determined to be a pulse width modulation signal, and the identification result of the signal to be identified as a pulse width modulation signal is output. If the high-level pulse width detection result is in the second pulse width interval, the high-level pulse width detection result of the signal to be identified has the same characteristics as the high-level pulse width detection result of the OneShot125 signal, and the signal to be identified is determined to be a OneShot125 signal, and the identification result of the signal to be identified as a OneShot125 signal is output. If the high-level pulse width detection results are not in the first pulse width interval or the second pulse width interval, the signal to be identified is not a common analog signal, and the process returns to step S103 to re-determine whether the signal to be identified is an analog signal or a digital signal.

[0101] Please see Figure 5 This application also provides a signal recognition device that can implement the above-described signal recognition method. The device includes:

[0102] The first module 501 is used to acquire the signal to be identified that the microprocessor receives through an interface;

[0103] The second module 502 is used to perform edge-triggered detection on the signal to be identified using the timer of the microprocessor, and obtain the signal period detection result and high-level pulse width detection result of the signal to be identified.

[0104] The third module 503 is used to perform waveform continuity recognition on the signal to be identified based on the signal period detection result, and obtain the recognition result that the signal to be identified is a digital signal or an analog signal;

[0105] The fourth module 504 is used to perform signal period matching on the signal to be identified based on the signal period detection result when the signal to be identified is a digital signal, so as to obtain the identification result that the signal to be identified is the target digital signal;

[0106] The fifth module 505 is used to perform duration recognition on the high-level pulse width detection result when the signal to be identified is an analog signal, so as to obtain the recognition result that the signal to be identified is the target analog signal.

[0107] The specific implementation of this signal recognition device is basically the same as the specific implementation of the above-described signal recognition method, and will not be repeated here.

[0108] Figure 6 This is a block diagram illustrating an electronic device according to an exemplary embodiment.

[0109] The following reference Figure 6 To describe an electronic device 600 according to such an embodiment of the present disclosure. Figure 6 The electronic device 600 shown is merely an example and should not impose any limitation on the functionality and scope of use of the embodiments disclosed herein.

[0110] like Figure 6 As shown, the electronic device 600 is presented in the form of a general-purpose computing device. The components of the electronic device 600 may include, but are not limited to: at least one processing unit 610, at least one storage unit 620, a bus 630 connecting different system components (including storage unit 620 and processing unit 610), a display unit 640, etc.

[0111] The storage unit stores program code, which can be executed by the processing unit 610, causing the processing unit 610 to perform the steps described in the above-described signal recognition method section of this specification according to various exemplary embodiments of this disclosure.

[0112] Storage unit 620 may include a readable medium in the form of a volatile storage unit, such as random access memory (RAM) 6201 and / or cache memory 6202, and may further include a read-only memory (ROM) 6203.

[0113] Storage unit 620 may also include a program / utility 6204 having a set (at least one) of program modules 6205, such program modules 6205 including but not limited to: an operating system, one or more application programs, other program modules and program data, each or some combination of these examples may include an implementation of a network environment.

[0114] Bus 630 can represent one or more of several types of bus structures, including a memory cell bus or memory cell controller, a peripheral bus, a graphics acceleration port, a processing unit, or a local bus using any of the various bus structures.

[0115] Electronic device 600 can also communicate with one or more external devices 600' (e.g., keyboard, pointing device, Bluetooth device, etc.), and with one or more devices that enable a user to interact with electronic device 600, and / or with any device that enables electronic device 600 to communicate with one or more other computing devices (e.g., router, modem, etc.). This communication can be performed via input / output (I / O) interface 650. Furthermore, electronic device 600 can also communicate with one or more networks (e.g., local area network (LAN), wide area network (WAN), and / or public networks, such as the Internet) via network adapter 660. Network adapter 660 can communicate with other modules of electronic device 600 via bus 630. It should be understood that, although not shown in the figures, other hardware and / or software modules can be used in conjunction with electronic device 600, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems.

[0116] This application also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the signal recognition method described above.

[0117] The signal recognition method, apparatus, device, and storage medium provided in this application embodiment receive the signal to be recognized through an interface of a microprocessor. The microprocessor's timer performs edge-triggered detection on the signal to be recognized, detecting the signal period and high-level pulse width of the signal. Based on the signal period detection result, waveform continuity is identified to determine whether the signal is a digital or analog signal. If the signal is identified as a digital signal, the duration dispersion and quantity of the signal period detection result are identified based on the signal period and high-level pulse width detection results to determine the corresponding target digital signal. If the signal is identified as an analog signal, the duration of the high-level pulse width detection result is identified to determine the corresponding target analog signal. Because edge-triggered detection is used to determine the signal period and high-level pulse width detection results, and then the signal type is determined based on the signal period and / or high-level pulse width detection results, different types of signals can be identified with fewer interface resources.

[0118] From the above description of the embodiments, those skilled in the art will readily understand that the exemplary embodiments described herein can be implemented by software or by combining software with necessary hardware. Therefore, the technical solutions according to the embodiments of this disclosure can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (such as a CD-ROM, USB flash drive, external hard drive, etc.) or on a network, including several instructions to cause a computing device (such as a personal computer, server, or network device, etc.) to execute the methods described above according to the embodiments of this disclosure.

[0119] The program product may employ any combination of one or more readable media. A readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples (a non-exhaustive list) of readable storage media include: electrical connections having one or more wires, portable disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0120] Computer-readable storage media may include data signals propagated in baseband or as part of a carrier wave, carrying readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. A readable storage medium may also be any readable medium other than a readable storage medium that can transmit, propagate, or transfer a program for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on the readable storage medium may be transmitted using any suitable medium, including but not limited to wireless, wired, optical fiber, RF, etc., or any suitable combination thereof.

[0121] Program code for performing the operations of this disclosure can be written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Java and C++, and conventional procedural programming languages ​​such as C or similar languages. The program code can execute entirely on the user's computing device, partially on the user's computing device, as a standalone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server. In cases involving remote computing devices, the remote computing devices can be connected to the user's computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computing device (e.g., via the Internet using an Internet service provider).

[0122] Those skilled in the art will understand that the above modules can be distributed in the device as described in the embodiments, or they can be modified accordingly and placed in one or more devices that are unique to this embodiment. The modules in the above embodiments can be combined into one module, or they can be further divided into multiple sub-modules.

[0123] From the above description of the embodiments, those skilled in the art will readily understand that the exemplary embodiments described herein can be implemented by software or by combining software with necessary hardware. Therefore, the technical solutions according to the embodiments of this disclosure can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (such as a CD-ROM, USB flash drive, external hard drive, etc.) or on a network, including several instructions to cause a computing device (such as a personal computer, server, mobile terminal, or network device, etc.) to execute the methods according to the embodiments of this disclosure.

[0124] Exemplary embodiments of this disclosure have been specifically shown and described above. It should be understood that this disclosure is not limited to the detailed structures, arrangements, or implementations described herein; rather, this disclosure is intended to cover various modifications and equivalent arrangements contained within the spirit and scope of the appended claims.

Claims

1. A signal recognition method, characterized in that, include: Acquire the signal to be identified that the microprocessor receives through an interface; Using the timer of the microprocessor, edge-triggered detection is performed on the signal to be identified to obtain the signal period detection result and high-level pulse width detection result of the signal to be identified; Based on the signal period detection result, the waveform continuity of the signal to be identified is identified to obtain the identification result that the signal to be identified is a digital signal or an analog signal; When the signal to be identified is a digital signal, the signal period is matched according to the signal period detection result to obtain the identification result that the signal to be identified is a target digital signal; When the signal to be identified is an analog signal, the duration of the high-level pulse width detection result is identified to obtain the identification result that the signal to be identified is the target analog signal; The step of performing signal period matching on the signal to be identified based on the signal period detection result to obtain the identification result that the signal to be identified is a target digital signal includes: Determine whether the difference in the signal periods of the signals to be identified is less than a preset deviation value; the difference in the signal periods of the signals to be identified is the deviation between the signal periods of the signals to be identified; If it is not less than, perform baud rate matching on the signal to be identified, and output the identification result that the signal to be identified is the target serial port signal based on the matching result of the baud rate matching; If the signal is less than the target signal, the signal period duration is matched. Based on the matching result of the signal period duration matching, the recognition result of the target signal as the target Dshot signal is output.

2. The signal recognition method according to claim 1, characterized in that, The step of using the microprocessor's timer to perform edge-triggered detection on the signal to be identified, and obtaining the signal period detection result and high-level pulse width detection result of the signal to be identified, includes: The timer is started when the first rising edge of the signal to be identified is detected; When a rising edge of the signal to be identified is detected, the count value of the timer is read, the timer is cleared, and several signal cycle detection results are obtained. When a falling edge of the signal to be identified is detected, the count value of the timer is read to obtain a number of high-level pulse width detection results.

3. The signal recognition method according to claim 2, characterized in that, The timer has a first capture channel and a second capture channel, and reading the count value of the timer includes: When a rising edge of the signal to be identified is detected, the first capture channel is triggered to read the count value of the timer and store the read count value into the first memory space. When a falling edge of the signal to be identified is detected, the second capture channel is triggered to read the count value of the timer and store the read count value in the second memory space.

4. The signal recognition method according to claim 1, characterized in that, The step of performing waveform continuity identification on the signal to be identified based on the signal period detection result to obtain an identification result that the signal to be identified is a digital signal or an analog signal includes: Determine whether the signal period detection result is greater than the first duration; If it exists, output the recognition result that the signal to be identified is a digital signal; If it does not exist, output the recognition result that the signal to be identified is an analog signal.

5. The signal recognition method according to claim 1, characterized in that, Before outputting the recognition result that the signal to be identified is the target Dshot signal, the method further includes: The inter-frame voltage value of the signal to be identified is identified. When the inter-frame voltage value is high, the edge trigger detection is configured to obtain the low-level pulse width detection result of the signal to be identified.

6. The signal recognition method according to claim 1, characterized in that, The step of performing duration identification on the high-level pulse width detection result to obtain the identification result that the signal to be identified is the target analog signal includes: Determine whether the high-level pulse width detection result is within the first pulse width interval or the second pulse width interval; If the signal is within the first pulse width range, output the recognition result that the signal to be identified is a pulse width modulation signal; If it is within the second pulse width range, output the recognition result of the signal to be identified as a OneShot125 signal; If neither of the pulse width intervals is within the first pulse width interval or the second pulse width interval, return to the step of performing waveform continuity identification on the signal to be identified based on the signal period detection result to obtain the identification result that the signal to be identified is a digital signal or an analog signal.

7. A signal recognition device, characterized in that, include: The first module is used to acquire the signal to be identified that the microprocessor receives through an interface; The second module is used to perform edge-triggered detection on the signal to be identified using the timer of the microprocessor, and obtain the signal period detection result and high-level pulse width detection result of the signal to be identified. The third module is used to perform waveform continuity identification on the signal to be identified based on the signal period detection result, and obtain the identification result that the signal to be identified is a digital signal or an analog signal; The fourth module is used to perform signal period matching on the signal to be identified based on the signal period detection result when the signal to be identified is a digital signal, so as to obtain the identification result that the signal to be identified is a target digital signal; The fifth module is used to perform duration recognition on the high-level pulse width detection result when the signal to be identified is an analog signal, so as to obtain the recognition result that the signal to be identified is a target analog signal; The step of performing signal period matching on the signal to be identified based on the signal period detection result to obtain the identification result that the signal to be identified is a target digital signal includes: Determine whether the difference in the signal periods of the signals to be identified is less than a preset deviation value; the difference in the signal periods of the signals to be identified is the deviation between the signal periods of the signals to be identified; If it is not less than, perform baud rate matching on the signal to be identified, and output the identification result that the signal to be identified is the target serial port signal based on the matching result of the baud rate matching; If the signal is less than the target signal, the signal period duration is matched. Based on the matching result of the signal period duration matching, the recognition result of the target signal as the target Dshot signal is output.

8. An electronic device, characterized in that, The electronic device includes a memory and a processor, the memory storing a computer program, and the processor executing the computer program to implement the signal recognition method according to any one of claims 1 to 6.

9. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, it implements the signal recognition method according to any one of claims 1 to 6.

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