A three-dimensional interconnected multi-faceted lead-out device
Patent Information
- Application Number
- CN202410475797.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-19
- Publication Date
- 2026-09-25
- Estimated Expiration
- 2044-04-19
AI Technical Summary
如果器件内部采用了SAC305或者Sn62/Sn63这类低熔点焊料,320℃的高温将严重损伤低熔点焊料的力学性能;除此之外,部分芯片对温度极其敏感,320℃的高温将直接导致芯片失效
[0033](1)本方案能够保证气密且避免整体高温,激光或平行缝焊在接触面上析出热量,采用激光或平行缝焊密封能够避免封装体中心区域温度过高。同时激光或平行缝焊能够保证器件的气密;
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Figure CN118382200B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of semiconductor packaging, and specifically relates to a three-dimensional interconnected multifaceted lead-out device. Background Technology
[0002] Area array packaging, represented by pin grid array (PGA), ball grid array (BGA), and pillar grid array (CGA) devices, has been widely adopted. The advantage of area array packaging lies in its ability to arrange more leads within a limited area, thereby achieving higher-density electrical interconnects. Currently, single-sided lead-out area array packaging technology is very mature. Generally, a bare chip carrier is constructed using a substrate or other methods. After the bare chip is placed and interconnected with the carrier, an array of leads (balls / pillars, etc.) is arranged on the bottom surface; the timing of lead arrangement can also be changed according to actual needs. After production, the device is then mounted to the next level using surface mounting or flip-chip technology.
[0003] AOP refers to antenna on package. In this application scenario, the antenna needs to be placed on the upper surface of the package, the lower surface needs to be interconnected with the next layer, multiple chips need to be placed inside the package, and electrical interconnection between the upper and lower surfaces of the package is also required. The miniaturization of high-density BGA devices and tile-type T / R components also requires this type of architecture to support it.
[0004] There are three ways to achieve top and bottom lead-out terminals:
[0005] ① Employ relatively advanced processes to construct the top and bottom surface patterns, and then arrange the leads according to the actual situation. This method is relatively simple and the process is quite mature. For example, embedding in various substrates (circuit boards) and achieving interconnection between the upper and lower layers through internal vias; based on a system-on-a-chip (SoC), integrating the functions of multiple chips together, and then arranging leads on the top and bottom surfaces of the chip.
[0006] This method does not allow for the free placement of various chips or surface-mount components inside. For example, with tile-type T / R modules, it is difficult to fabricate the relevant chips in advance on ceramic plates, resin substrates, or silicon-based chips.
[0007] ② Fabricate two conventional substrates, with patterns arranged on both top and bottom surfaces. Using solder balls or solder pillars, stack one substrate on top of the other. This not only achieves three-dimensional interconnection but also allows for the placement of various chips and surface-mount components between the two substrates. The two external surfaces can be fitted with leads as needed.
[0008] This approach allows for flexible internal layout and facilitates assembly at the next level. However, the chips and components between the two substrates are completely exposed, posing a significant reliability risk. Even filling the space between the two substrates with organic materials cannot achieve a hermetically tight seal. Therefore, this architecture is unsuitable for high-reliability applications.
[0009] ③ Fabricate two parts (shell or substrate), at least one of which has an outer frame and three-dimensional interconnect components. These outer frames and interconnect components are generally metal and can be soldered together or grown by electroplating. Circuit patterns can be fabricated on both the front and back surfaces of each part, and chips or surface-mount components can be placed there. After placement, the two parts are placed face to face and interconnected by heating the entire assembly. Solder is used in this process, and it is generally pre-placed. Simultaneously, the three-dimensional interconnect components are metallurgically bonded to the other part, and the outer frame is also metallurgically bonded to the other part.
[0010] This method achieves excellent airtightness, but requires overall heating. Taking the industry-preferred gold-tin solder as an example, it needs to be heated to over 320℃. If the device uses low-melting-point solders like SAC305 or Sn62 / Sn63, 320℃ will severely damage their mechanical properties. Furthermore, some chips are extremely temperature-sensitive, and 320℃ will directly cause chip failure. If epoxy adhesives are used to bond the chips, 320℃ could cause epoxy decomposition, posing a threat to long-term reliability. Summary of the Invention
[0011] In view of the problems in the background art, the purpose of the present invention is to provide a three-dimensional interconnected multi-faceted lead-out device, which achieves internal three-dimensional interconnection and external multi-faceted lead-out of the device while avoiding overall high temperature and ensuring highly reliable hermetically sealed packaging.
[0012] The specific technical solution for achieving the objective of this invention is as follows:
[0013] A three-dimensional interconnected multifaceted lead-out device includes a packaging substrate, a composite cover plate, and three-dimensional interconnect components;
[0014] The encapsulation substrate and the composite cover are connected by a three-dimensional interconnect.
[0015] Pin arrays are respectively provided on the outer surfaces of the encapsulation substrate and the composite cover plate;
[0016] The number of the encapsulation substrate, composite cover plate, and three-dimensional interconnect components is one or more.
[0017] Furthermore, circuit patterns are provided on both the inner and outer sides of the encapsulation substrate, and electrical channels are provided inside the encapsulation substrate so that the circuit patterns on the inner and outer sides can communicate with each other.
[0018] Furthermore, the encapsulation substrate is a tube shell or a substrate.
[0019] Furthermore, the shell is an all-ceramic shell, or a shell formed by welding a metal frame onto a ceramic substrate or ceramic base plate, or a shell formed by electroplating a frame onto a base plate.
[0020] Furthermore, one or more encapsulation cavities are provided inside the casing.
[0021] Furthermore, the composite cover plate includes a substrate and a metal sheet, wherein the substrate is embedded in the metal sheet;
[0022] Circuit patterns are respectively formed on the upper and lower surfaces of the substrate;
[0023] The substrate has an internal electrical channel, which allows the circuit patterns on the upper and lower surfaces of the substrate to communicate with each other.
[0024] Furthermore, the composite cover plate includes a substrate and a metal sheet, wherein the substrate is disposed on the upper or lower surface of the metal sheet;
[0025] Circuit patterns are respectively formed on the upper and lower surfaces of the substrate;
[0026] The substrate has an internal electrical channel, which allows the circuit patterns on the upper and lower surfaces of the substrate to communicate with each other.
[0027] Furthermore, the three-dimensional interconnect component is one or more of the following: solder, solder ball, pin, solder pillar, solder sheet, metal pillar, metal sheet, spring, or hair button.
[0028] Furthermore, the three-dimensional interconnects are connected to the encapsulation substrate and the composite cover plate by mechanical means including welding, electroplating growth, three-dimensional printing, adhesive bonding, pressing, or snap-fitting.
[0029] Furthermore, the encapsulation substrate is made by electroplating copper dams on a copper-plated ceramic substrate;
[0030] The composite cover plate is made of metal sheet and ceramic plate, with a hollowed-out section on the metal sheet and the ceramic plate welded into the hollowed-out section of the metal sheet.
[0031] The three-dimensional interconnect component uses copper pillars, which are welded to the ceramic plate of the composite cover and the copper dam of the encapsulation substrate, respectively.
[0032] Compared with the prior art, the beneficial effects of the present invention are as follows:
[0033] (1) This solution can ensure airtightness and avoid overall high temperature. Heat is generated on the contact surface by laser or parallel seam welding. Using laser or parallel seam welding to seal can prevent the temperature in the central area of the package from getting too high. At the same time, laser or parallel seam welding can ensure the airtightness of the device;
[0034] (2) This solution enables multi-faceted lead-out. The solution involves hollowing out the center of a conventional laser-welded or parallel-seam welded cover plate, welding a ceramic circuit board onto it, implanting pillars on the ceramic circuit board, and then flip-mounting it onto a ceramic substrate. The external circuit patterns on the composite cover plate and the external circuit patterns on the bottom of the ceramic substrate form the basis for two area array lead-outs. Replacing one side of the ceramic substrate with a composite substrate adds another area array for external lead-outs.
[0035] (3) The internal layout of the devices in this solution is flexible. Since the final sealing will not cause high temperatures inside the package cavity, various low-temperature solders and various colloids that cannot withstand high temperatures can be freely used. In this way, various bare chips and surface-mount components can be arranged well, and temperature-sensitive components can also be arranged.
[0036] (4) This solution is quick to assemble and low in cost. Laser or parallel seam welding is a commonly used sealing method for electronic devices. It is a mature technology with low cost, and the welding heat cycle is rapid, resulting in high assembly efficiency.
[0037] The present invention will be further described below with reference to specific embodiments. Attached Figure Description
[0038] Figure 1 This is a schematic diagram of a three-dimensional interconnected multifaceted lead-out device structure in an embodiment of the present invention. Detailed Implementation
[0039] A three-dimensional interconnected multifaceted lead-out device includes a packaging substrate, a composite cover plate, and three-dimensional interconnect components;
[0040] The encapsulation substrate and the composite cover are connected by a three-dimensional interconnect.
[0041] Pin arrays are respectively provided on the outer surfaces of the encapsulation substrate and the composite cover plate;
[0042] The number of the encapsulation substrate, composite cover plate, and three-dimensional interconnect components is one or more.
[0043] The encapsulation substrate has circuit patterns on both its inner and outer sides, and electrical channels are provided inside the encapsulation substrate so that the circuit patterns on its inner and outer sides can communicate with each other.
[0044] The packaging substrate can be a tube shell or a substrate, or it can be other carriers that can support chips or components.
[0045] Specifically, the casing can be an all-ceramic casing, a casing formed by welding a metal frame onto a ceramic substrate, or a casing formed by electroplating a frame onto a substrate. One or more encapsulation cavities are provided within the casing.
[0046] The composite cover plate includes a substrate and a metal sheet, and is a cover plate in which the metal sheet and the substrate are metallurgically bonded. The substrate can be embedded in the metal sheet to form the cover plate, or the substrate can be disposed on the upper or lower surface of the metal sheet to form the cover plate. There can be one or more metal sheets, and there can be one or more substrates.
[0047] Circuit patterns are respectively set on the upper and lower surfaces of the substrate; one side faces outward from the device and the other side faces inward from the device; the circuit pattern facing outward from the device can be further arranged with leads facing the next level;
[0048] The substrate has an internal electrical channel, which allows the circuit patterns on the upper and lower surfaces of the substrate to communicate with each other.
[0049] In addition, at least one edge of the composite cover plate is available for laser or parallel seam welding to weld the package substrate to the composite cover plate, or to weld the composite cover plate to another composite cover plate. The final sealing of the entire device is achieved through laser or parallel seam welding of the composite cover plate. Laser or parallel seam welding generates heat at the contact surface, and using laser or parallel seam welding for sealing can prevent the temperature in the central area of the package from becoming too high. At the same time, laser or parallel seam welding can ensure the hermeticity of the device.
[0050] The laser or parallel seam welding can be either fusion welding or brazing; if it is brazing, the edges to be welded need to have solder (brazing filler metal).
[0051] The three-dimensional interconnect is one or more of the following: solder, solder ball, pin, solder pillar, solder sheet, metal pillar, metal sheet, spring, or hair button. It is disposed on the package substrate, composite cover plate, or other three-dimensional interconnect.
[0052] The three-dimensional interconnects are connected to the encapsulation substrate and the composite cover plate by mechanical methods including welding, electroplating growth, three-dimensional printing, adhesive bonding, pressing, or snap-fitting.
[0053] Furthermore, the encapsulation substrate is made by electroplating copper dams on a copper-plated ceramic substrate;
[0054] The composite cover plate is made of metal sheet and ceramic plate, with a hollowed-out section on the metal sheet and the ceramic plate welded into the hollowed-out section of the metal sheet.
[0055] The three-dimensional interconnect component uses copper pillars, which are welded to the ceramic plate of the composite cover and the copper dam of the encapsulation substrate, respectively.
[0056] The following description, with reference to the accompanying drawings and embodiments, provides a detailed explanation of this solution.
[0057] Example
[0058] The present invention will be further described below with reference to the accompanying drawings and embodiments. It should be understood that these embodiments are for illustrative purposes only and are not intended to limit the scope of the invention. After reading this invention, any modifications of the invention in various equivalent forms by those skilled in the art fall within the scope defined by the appended claims.
[0059] Combination Figure 1 ,
[0060] A three-dimensional interconnected multifaceted lead-out device includes a packaging substrate, a composite cover plate, and three-dimensional interconnect components;
[0061] In this embodiment, the encapsulation substrate is a copper-plated ceramic substrate (DPC) and a copper dam 2;
[0062] Specifically, a direct copper-plated ceramic substrate (DPC) 1 is used to fabricate a ceramic circuit board. Holes are drilled on the upper and lower surfaces of the copper-plated ceramic substrate (DPC) 11 where interconnection is required. Then, copper is electroplated to fill the vias and electroplat the circuit patterns on the upper and lower surfaces.
[0063] Next, copper dams (2) and copper pillars (3) are electroplated at specific locations on the copper-plated ceramic substrate (DPC) 1. The copper dams 2 and the DPC substrate 1 together form the encapsulation substrate, and the copper pillars 3 are the three-dimensional interconnects. At this point, the three-dimensional interconnects have been fabricated on the DPC substrate. The copper dams 2 and copper pillars 3 can be surface-treated as needed.
[0064] Next, the composite cover plate is fabricated. In this embodiment, the metal sheet 4 is thicker in the middle and thinner around the edges, which allows for parallel seam welding. A cutout is made in the middle of the metal sheet 4, and the pre-fabricated ceramic plate 5 (with its circuit pattern already prepared) is inserted. The metal sheet and the ceramic plate are then welded together, as shown below. Figure 1 The numbers 4 and 5.
[0065] Surface mounting and micro-assembly can be performed on the circuit patterns within the package substrate and the composite cover plate, allowing for the free selection of various high-temperature-sensitive electronic components (6 / 7), as well as low-temperature solders and high-temperature-prone adhesives. Both DieBond and Wire Bond can be unfolded without restrictions. Figure 1 The 6 in the image is a high-temperature resistant chip bonded with conductive adhesive. Figure 1 The number 7 in the figure represents a surface mount capacitor.
[0066] The ceramic plate 4 of the composite cover is welded together with the copper column 3 of the three-dimensional interconnect component using solder, and the metal sheet 4 is welded together with the copper dam using parallel seam welding.
[0067] Finally, pillars 8 are implanted on the outer surface of the copper-plated ceramic substrate (DPC) 1 of the encapsulation substrate, and balls 9 are implanted on the outer surface of the composite cover ceramic plate 4 to obtain a pin array with leads on both sides. The relevant pillar and ball implantation adopts industry-standard processes.
[0068] The resulting device features internal three-dimensional interconnects and pin arrays on both sides, facilitating use at the next level. The device boasts rich functionality, low raw material and manufacturing costs, a mature process, and strong market competitiveness.
[0069] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.
Claims
1. A three-dimensional interconnected multi-faceted lead-out device, characterized in that, This includes the packaging substrate, composite cover, and three-dimensional interconnect components; The encapsulation substrate and the composite cover are connected by a three-dimensional interconnect; Pin arrays are respectively provided on the outer surfaces of the encapsulation substrate and the composite cover plate; The number of the encapsulation substrate, composite cover plate, and three-dimensional interconnect component is one or more; The composite cover plate includes a substrate and a metal sheet, wherein the substrate is embedded in the metal sheet; Circuit patterns are respectively formed on the upper and lower surfaces of the substrate; Electrical channels are provided inside the substrate, allowing the circuit patterns on the upper and lower surfaces of the substrate to communicate with each other; The three-dimensional interconnect is a combination of one or more of solder, pin, metal pillar, metal sheet, spring or hair button, wherein the solder includes solder balls, solder pillars and solder sheets; The three-dimensional interconnects are connected to the encapsulation substrate and the composite cover plate by mechanical methods including welding, electroplating growth, three-dimensional printing, adhesive bonding, pressing or snap-fitting. The composite cover plate is made of a metal sheet and a ceramic plate. The metal sheet has a perforation, and the ceramic plate is welded into the perforation of the metal sheet.
2. The three-dimensional interconnected multi-faceted lead-out device according to claim 1, characterized in that, Circuit patterns are provided on both the inner and outer sides of the encapsulation substrate, and electrical channels are provided inside the encapsulation substrate to allow the circuit patterns on the inner and outer sides to communicate with each other.
3. The three-dimensional interconnected multi-faceted lead-out device according to claim 1 or 2, characterized in that, The encapsulation substrate is a tube shell or a substrate.
4. The three-dimensional interconnected multi-faceted lead-out device according to claim 3, characterized in that, The shell is an all-ceramic shell, or a shell formed by welding a metal frame onto a ceramic substrate or ceramic base, or a shell formed by electroplating a frame onto a base.
5. The three-dimensional interconnected multi-faceted lead-out device according to claim 3, characterized in that, One or more encapsulation cavities are provided inside the tube shell.
6. The three-dimensional interconnected multi-faceted lead-out device according to claim 1, characterized in that, The encapsulation substrate is made of copper-plated dams on a copper-plated ceramic substrate. The three-dimensional interconnect component uses copper pillars, which are welded to the ceramic plate of the composite cover and the copper dam of the encapsulation substrate, respectively.
Citation Information
Patent Citations
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