Chip resistor model recognition method based on mathematical morphology and double attention convolutional neural network

Abstract

The application discloses a patch resistor model identification method based on mathematical morphology and a double-attention convolutional neural network, belongs to the patch resistor image recognition field, and aims to solve the problem of patch resistor fault detection on a circuit board.The method comprises the following steps: cutting and obtaining images of patch resistors at various positions of a model circuit board, and extracting feature maps;obtaining the resistance models of the patch resistors at the various positions of the model circuit board, encoding the resistance model characters of the patch resistors and taking the resistance model characters as labels; inputting the sample pictures as a training set into a double-attention convolutional neural network for training; inputting the feature maps into the trained double-attention convolutional neural network for model identification; comparing the identification result of the resistance model of the patch resistor at a position of the model circuit board with the resistance model of the patch resistor at the position of the model circuit board to determine whether a fault occurs; and the method is used for patch resistor fault detection.

Description

Technical Field

[0001] The present invention belongs to the field of chip resistor image recognition, and relates to a method for identifying the type of chip resistor based on mathematical morphology and dual-attention convolutional neural network. Background Art

[0002] Chip resistors have the advantages of small size, light weight, stable and reliable electrical performance, low assembly cost, high mechanical strength, and excellent high-frequency characteristics. They are widely used in electronic products such as computers, mobile phones, electronic dictionaries, medical electronic products, video cameras, electronic energy meters, and VCD players. There are a large number of chip resistors on the internal circuit boards of electronic products and they are widely used. Among the faults that are likely to occur in chip resistors, the misplacement fault, that is, the wrong type of resistor, may cause the resistance value at a certain place on the circuit board to be too large or too small, and functions such as voltage division, current division, and impedance matching cannot be completed, thereby affecting the performance of electronic products. <000001​​​​​​​​​​The detection method described in Chinese patent application "CN115760753A A Method and System for Detecting Appearance Defects in Chip Resistors" involves cropping character images from character regions in a training dataset of chip resistor images during the forward and reverse detection process. This cropping depends on the position of the character regions in the training dataset, and the size of the character regions varies for different resistor models. If the training set is small and the features it covers are not comprehensive enough, the cropped character images may be inaccurate, thus affecting subsequent detection. Furthermore, a deep learning model is used for both forward / reverse detection and representation detection, resulting in a large workload during model training and a higher risk of overfitting. Summary of the Invention

[0007] To address the problem of detecting faulty surface mount resistors on circuit boards, a surface mount resistor model identification method based on mathematical morphology and dual-attention convolutional neural networks, as described in some specific embodiments of this application, includes:

[0008] S100. Crop and obtain images of surface mount resistors at various locations on a circuit board of a certain model, extract the region containing the resistor model characteristics of the surface mount resistor in the image of the surface mount resistor, and save the region as a feature map;

[0009] S200. Obtain the resistor model of the chip resistor that should be present at each position on the circuit board of the specified model, generate an appropriate number of sample images, and encode the resistor model characters of the chip resistors using one-hot encoding and use them as tags;

[0010] S300. The sample images are used as a training set and input into a dual-attention convolutional neural network for training;

[0011] S400. Input the feature map into the trained dual-attention convolutional neural network for model recognition;

[0012] S500. The identification result of the resistor model of the surface mount resistor at a certain position on the circuit board of the first model is compared with the resistor model of the surface mount resistor that should be at that position on the circuit board of the first model to determine whether a faulty component has occurred.

[0013] According to the chip resistor model identification method based on mathematical morphology and dual-attention convolutional neural network in some specific embodiments of this application, step S10 specifically includes:

[0014] S101. Resize the image of the chip resistor to obtain Figure M0;

[0015] S102. Perform a grayscale operation on the image M0 to obtain a grayscale image M1;

[0016] S103. Perform adaptive thresholding on the grayscale image M1 to obtain a binary image M2;

[0017] S104. Adaptively partition the grayscale image M1 to obtain vertical dividing lines C1 and C2;

[0018] S105. Based on the vertical dividing lines C1 and C2, perform the first region extraction on the binary image M2 to obtain image M3;

[0019] S106. Perform a closing operation in mathematical morphology on the graph M3 using kernel K1 to obtain graph M4;

[0020] S107. Perform a closing operation in mathematical morphology on the graph M4 using kernel K2 to obtain graph M5;

[0021] S108. Perform a mathematical morphological opening operation on the aforementioned figure M5 using kernel K3 to obtain figure M6;

[0022] S109. Extract the connected components from the graph M6, and select an optimal connected component to obtain the location points P1 and P2;

[0023] S110. A second region extraction is performed using the image M4 and the positioning points P1 and P2 to obtain the feature image M7.

[0024] According to the chip resistor model identification method based on mathematical morphology and dual attention convolutional neural network in some specific embodiments of this application, in step S101, the image of the chip resistor to be extracted is first rotated into an image with a width greater than its height, and then the size of the chip resistor image is adjusted to H×W. When scaling, the pixel values ​​are recalculated using bilinear interpolation.

[0025] In step S103, when performing adaptive threshold segmentation on the grayscale image M1, the grayscale value of the pixels that meet the conditions is set to 255. The adaptive method includes the Gaussian weighted sum method. The size of the segmentation calculation region is set to 9. The threshold calculated for each region is subtracted from the constant C to obtain the final threshold for that region. C is set to -5.

[0026] In step S104, the two vertical dividing lines C1 and C2 are calculated using the following formula to maximize the average gray level difference of pixels within a certain range on both sides of the vertical dividing line, and 5 columns of pixels on each side are selected.

[0027]

[0028] in, and The values ​​represent the sum of the grayscale values ​​of the pixels within 5 columns to the left and right of the vertical dividing line C1, divided by the number of rows. l (C1) and colr (C1) represents the number of pixel columns corresponding to these two regions, and N is the total number of pixel columns in the image;

[0029] In step S105, the pixel values ​​of the points to the left of the vertical dividing line C1 and the pixel values ​​of the points to the right of the vertical dividing line C2 in the binary image M2 are both set to 0;

[0030] In step S106, the kernel K1 used for the closing operation has a size of H / 20×2, where the first column of the matrix is ​​all 1s and the second column is all 0s;

[0031] In step S107, the kernel K2 used for the closing operation has a size of H / 30×W / 16, and all elements of the matrix are 1;

[0032] In step S108, the kernel K3 used for the opening operation has a size of H / 30×H / 30, and all elements of the matrix are 1;

[0033] In step S109, after calculating all connected components, an optimal connected component is selected according to the following criteria and the positioning points P1 and P2 are obtained. The two positioning points are the upper left and lower right vertices of the outer rectangle of the connected component, respectively.

[0034] 1) Criterion condition 1: The width of the connected component is greater than W / 4 and less than 2W / 3;

[0035] 2) Criterion condition 2: The height of the connected component is greater than H / 4 and less than 2H / 3;

[0036] 3) Criterion 3: The centroid of the connected component is the shortest distance to the image center (H / 2, W / 2).

[0037] In step S110, in the figure M4, the pixel values ​​of the outer points of the rectangle determined by the positioning points P1 and P2 are all set to 0, and this rectangular area is moved to the center of the image.

[0038] According to the chip resistor model recognition method based on mathematical morphology and dual-attention convolutional neural network in some specific embodiments of this application, in step S200, the font in the sample image is selected to be 2-3 fonts similar to those printed on the circuit board, the background color is "#000000", the font color is "#FFFFFF", and 125 images are generated for each resistor model and font, with the font center position as (H / 2+i, W / 2+j), i,j=-2,-1,0,1,2, and the font size as 28+i, i=-2,-1,0,1,2. 125 images are also generated upside down.

[0039] According to the method for identifying surface mount resistor models based on mathematical morphology and dual-attention convolutional neural networks in some specific embodiments of this application, in step S200, during one-hot encoding, the 11 characters, including the numbers 0-9 and the letter R, are encoded in the order 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, R. For a certain character, let it be in the i-th position, then the encoded result is an array of length 11, where all numbers except the i-th number are 0. If the resistor model contains 4 characters, then the 4 arrays of length 11 are concatenated to form an array of length 44, which is used as the encoded result.

[0040] According to the chip resistor model identification method based on mathematical morphology and dual-attention convolutional neural network in some specific embodiments of this application, in step S300, when the training set is input into the dual-attention convolutional neural network for training, the dual-attention convolutional neural network includes four sequentially connected stages, namely Conv1, Conv2, Conv3, and Conv4, wherein...

[0041] Conv1 takes H×W input, contains a convolutional layer with a 3×3 kernel and a stride of 1, is normalized, randomly discards some neurons with a probability of 0.5, uses the ReLU activation function and a 2×2 max pooling layer, and outputs H / 2×W / 2.

[0042] Conv2 has an input of H / 2×W / 2, contains the same operations as Conv1, and has an output size of H / 4×W / 4.

[0043] Conv3 has an input of H / 4×W / 4, contains the same operations as Conv1, and has an output size of H / 8×W / 8.

[0044] Conv4 has an input of H / 8×W / 8, contains two fully connected layers, and has an output of 1×44.

[0045] After each convolution operation, the model is allowed to assign different weights to different positions of the input sequence through channel attention and spatial attention mechanisms, so as to focus on the most relevant parts when processing each sequence element. The output of the convolutional layer first passes through a channel attention module to obtain a weighted result, and then passes through a spatial attention module to finally obtain the weighted result.

[0046] in:

[0047] The channel attention module uses global average pooling and global max pooling to obtain global statistical information for each channel, and learns the channel weights through two fully connected layers. Then, the two processed results are added together, and the weights are normalized to between 0 and 1 using the Sigmoid function. Each channel is scaled, and finally, the scaled channel features are multiplied with the original features to produce features that enhance the importance of the channels.

[0048] The spatial attention module uses max pooling and average pooling to obtain the maximum and average values ​​at each spatial location. The spatial attention module performs max pooling and average pooling operations on the channels of each feature point to obtain two matrices. After concatenating the two matrices, it learns the weights of each spatial location through a convolutional layer and a sigmoid function. Finally, the weights are applied to each spatial location on the feature map to generate features with enhanced spatial importance.

[0049] According to the method for identifying the model of a patch resistor based on mathematical morphology and dual-attention convolutional neural network in some specific embodiments of this application, in step S300, when training the dual-attention convolutional neural network, the resistor model is used as a training label after one-hot encoding. The multi-label cross-entropy loss between the output result and the training label is calculated, and the network is trained according to the loss. The multi-label cross-entropy loss function is as follows.

[0050]

[0051] in This represents the true value of the i-th sample in the j-th category. This represents the result of softmax processing of the output of the i-th sample in the j-th category, where m represents the number of samples and q represents the number of categories.

[0052] The softmax function is:

[0053]

[0054] Where z i Let C represent the output values ​​of all categories for the i-th sample, and let C represent the number of samples.

[0055] According to the chip resistor model identification method based on mathematical morphology and dual-attention convolutional neural network in some specific embodiments of this application, in step S500, the string of the identification result of the chip resistor model of a chip resistor at a certain position of the circuit board of the same model is compared character by character from left to right with the string of the expected chip resistor model of the chip resistor at the same position of the circuit board of the same model. If the two strings are the same, the chip resistor model is correct; otherwise, it is determined that the chip resistor has a faulty component.

[0056] The present invention has the following beneficial effects:

[0057] This invention first uses a mathematical morphology-based method to extract features of surface mount resistor models from a surface mount resistor image, extracting regions containing the model features and saving them as feature maps. These feature maps are then input into a deep learning network for model recognition. Next, using the model numbers of surface mount resistors that should be present on the circuit board, a suitable number of sample images are generated as a training set for the deep learning network. These images are then input into the deep learning network for training. Finally, the feature maps obtained through the feature extraction method are input into the trained deep learning network model for recognition. The identified model number is then compared character by character with the model number that should be present at the location of the surface mount resistor to determine whether the surface mount resistor has a component error.

[0058] The technical solution proposed in this invention employs a mathematical morphology-based method for extracting model features of surface mount resistors on circuit boards. This method can adaptively extract model feature maps for different types of surface mount resistors. Experiments show that this feature extraction method is effective and can accurately extract the model features of surface mount resistors, facilitating subsequent model identification.

[0059] This invention employs a method that generates sample images of surface-mount resistors (SMRs) on a circuit board as the training set for a convolutional neural network. This method requires only the model numbers to generate a large and comprehensive training set, simplifying the process and avoiding overfitting issues that can occur when training with images of SMRs from actual circuit boards. Experiments show that this method has high model recognition accuracy and fast detection speed. Attached Figure Description

[0060] Figure 1 This is a schematic diagram of a dual attention module.

[0061] Figure 2 This is a diagram of a convolutional neural network structure that incorporates a dual attention module.

[0062] Figure 3 This is a flowchart of a method for intelligent identification of surface mount resistor models on circuit boards.

[0063] Figure 4 This is a flowchart of a method for extracting the model features of surface mount resistors based on mathematical morphology.

[0064] Figure 5 These are the original image and the image after feature extraction.

[0065] Figure 6 These are some of the generated sample images. Detailed Implementation

[0066] To further explain the technical solution of the present invention, the present invention will be described in detail below with reference to the accompanying drawings.

[0067] The purpose of this invention is to propose a method for identifying the model of surface mount resistors on a circuit board, thereby enabling the detection of faulty components in surface mount resistors on the circuit board. Figure 3 This is the main flowchart of the technical solution of this invention. For example... Figure 3 As shown, the chip resistor model identification method based on mathematical morphology and dual-attention convolutional neural network proposed in this invention includes the following steps:

[0068] (1) Based on the image of the chip resistor cut out from a certain type of circuit board, extract the area containing the characteristics of the chip resistor model and save it as a feature map.

[0069] (2) Obtain all resistor models that should be on the circuit board of this model, generate an appropriate number of sample images, and encode the resistor model characters with one-hot encoding as labels.

[0070] (3) Input the sample images from step (2) as the training set into the dual-attention convolutional neural network (e.g., Figure 1 and 2 (As shown) to conduct training.

[0071] (4) Input the feature map from step (1) into the trained network model for model recognition.

[0072] (5) Compare the identification results with the resistor model that should be present at this location on the circuit board to determine whether a faulty component has occurred.

[0073] Figure 4 This is a flowchart of a method for extracting the model features of surface mount resistors based on mathematical morphology, such as... Figure 4 As shown, the proposed feature extraction method includes the following steps:

[0074] (1) The size of the chip resistor image is adjusted to obtain Figure M0.

[0075] (2) Perform a grayscale operation on the resized image M0 to obtain a grayscale image M1.

[0076] (3) Perform adaptive thresholding on the grayscale image M1 to obtain the binary image M2.

[0077] (4) Adaptively partition the grayscale image M1 to obtain vertical dividing lines C1 and C2.

[0078] (5) Based on the vertical dividing lines C1 and C2, the binary image M2 is extracted for the first time to obtain image M3.

[0079] (6) Perform a closing operation in mathematical morphology on graph M3 using kernel K1 to obtain graph M4.

[0080] (7) Perform a closing operation in mathematical morphology on graph M4 using kernel K2 to obtain graph M5.

[0081] (8) Perform the opening operation in mathematical morphology on Figure M5 using kernel K3 to obtain Figure M6.

[0082] (9) Extract the connected components from graph M6 and select an optimal connected component to obtain the location points P1 and P2.

[0083] (10) The feature map M7 is obtained by performing a second region extraction using the map M4 and the location points P1 and P2.

[0084] Specifically, the image of the patch resistor to be extracted is first rotated to an image with a width greater than its height. Then, the size of the patch resistor image is adjusted to H×W, and the pixel values ​​are recalculated using bilinear interpolation during scaling.

[0085] When converting image M0 to grayscale, let R, G, and B represent the grayscale values ​​of the three channels. Then, the formula for calculating the new grayscale value is:

[0086] Gray = 0.299R + 0.587G + 0.114B

[0087] When performing adaptive thresholding on grayscale image M1, the grayscale value of the pixels that meet the conditions is set to 255. The Gaussian weighted sum method is used for the adaptive method. The size of the segmentation calculation region is set to 9. The threshold calculated for each region is subtracted from the constant C to obtain the final threshold for that region. C is set to -5.

[0088] The adaptive partitioning method involves calculating and finding two vertical dividing lines, C1 and C2, to maximize the average grayscale difference of pixels within a certain range on both sides of the dividing lines. This can be achieved by selecting 5 columns of pixels from each side. The formula is as follows:

[0089]

[0090]

[0091] in, and These represent the sum of the grayscale values ​​of pixels within 5 columns to the left and right of the C1 boundary, divided by the number of rows. l (C1) and col r (C1) represents the number of pixel columns corresponding to these two regions, and N is the total number of pixel columns in the image.

[0092] In the first region extraction, the pixel values ​​of the points to the left of C1 and the pixel values ​​of the points to the right of C2 in the binary image M2 are all set to 0.

[0093] The kernel K1, which performs the closing operation, has a size of H / 20×2, where the first column of the matrix is ​​all 1s and the second column is all 0s.

[0094] The kernel K2, which performs the closing operation, has a size of H / 30×W / 16, and all elements of the matrix are 1.

[0095] The kernel K3, which performs the opening operation, has a size of H / 30×H / 30, and all elements of the matrix are 1.

[0096] After calculating all connected components, select an optimal connected component according to the following criteria and obtain the positioning points P1 and P2. These two positioning points are the upper left and lower right vertices of the circumscribed rectangle of the connected component, respectively.

[0097] 1) Criterion condition 1: The width of the connected component is greater than W / 4 and less than 2W / 3.

[0098] 2) Criterion condition 2: The height of the connected component is greater than H / 4 and less than 2H / 3.

[0099] 3) Criterion 3: The centroid of the connected component is the shortest distance to the image center (H / 2, W / 2).

[0100] In the second region extraction, the pixel values ​​of the outer points of the rectangle defined by positioning points P1 and P2 in Figure M4 are all set to 0, and this rectangular region is moved to the center of the image.

[0101] The above method for extracting the model features of surface mount resistors based on mathematical morphology, using a surface mount resistor image as an example, Figure 5 The image shows the original image and the image after feature extraction.

[0102] Next, the training set is prepared. All resistor models that should be present on the circuit board of this type are obtained. When generating an appropriate number of sample images, assuming a circuit board has surface mount resistors of models "1000", "1601", "3301", "3302", "3R30", and "332", some sample images can be generated by the program. The font should be selected to closely resemble the font printed on the circuit board (2-3 colors can be chosen), with a background color of "#000000" and a font color of "#FFFFFF". For each model and font, 125 images are generated with the font center position at (H / 2+i, W / 2+j), i,j=-2,-1,0,1,2, and the font size at 28+i, i=-2,-1,0,1,2. Considering that the model characters may be upside down, 125 images are also generated upside down. Some of the generated images are shown below. Figure 6 As shown.

[0103] In one-hot encoding, the 11 characters (0-9 and the letter R) are encoded in the order 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, R. For a given character, let's say it's in the i-th position. The encoded result is an array of length 11, where all numbers except the i-th are 0. If the resistor model number contains 4 characters, then the four arrays of length 11 are concatenated to form an array of length 44, which is used as the encoded result.

[0104] Next, model training is performed. When the training set is input into the convolutional neural network for training, the convolutional neural network model contains four sequentially connected stages: Conv1, Conv2, Conv3, and Conv4. Conv1 has an input of H×W, contains a convolutional layer with a 3×3 kernel and a stride of 1, normalizes the data, randomly discards some neurons (with a probability of 0.5), uses the ReLU activation function, and employs a 2×2 max-pooling operation. The output size is H / 2×W / 2. Conv2 has an input of H / 2×W / 2, contains the same operations as Conv1, and has an output size of H / 4×W / 4. Conv3 has an input of H / 4×W / 4, contains the same operations as Conv1, and has an output size of H / 8×W / 8. Conv4 has an input of H / 8×W / 8, contains two fully connected layers, and has an output size of 1×44.

[0105] To enhance model performance, a dual attention mechanism—channel attention and spatial attention—is added after each convolutional operation. This allows the model to assign different weights to different positions in the input sequence, focusing on the most relevant parts when processing each sequence element. The output of the convolutional layer first passes through a channel attention module to obtain a weighted result, then through a spatial attention module for final weighting to obtain the final result.

[0106] The channel attention module uses global average pooling and global max pooling to obtain global statistics for each channel, and learns channel weights through two fully connected layers. The two processed results are then summed, and the weights are normalized to between 0 and 1 using the sigmoid function to scale each channel. Finally, the scaled channel features are multiplied by the original features to produce features that enhance channel importance.

[0107] The spatial attention module uses max pooling and average pooling to obtain the maximum and average values ​​at each spatial location. Specifically, since convolution generates multiple channels, the module performs max pooling and average pooling operations on each channel of the feature map, resulting in two matrices. These two matrices are then concatenated, and a convolutional layer and a sigmoid function are used to learn the weights for each spatial location. Finally, these weights are applied to each spatial location on the feature map to generate features that enhance spatial importance.

[0108] Figure 1 This is a schematic diagram of a dual attention module. Figure 2 This is a diagram of the convolutional neural network structure combined with this module.

[0109] During training, the resistor model number, after one-hot encoding, is used as the training label. The multi-label cross-entropy loss between the output result and the training label is calculated, and the network is trained based on this loss. The multi-label cross-entropy loss function is as follows.

[0110]

[0111] in This represents the true value of the i-th sample in the j-th category. This represents the result of the output of the i-th sample in the j-th category after softmax processing. The softmax function is:

[0112]

[0113] Where z i Let i represent the i-th sample point.

[0114] During model identification, the previously extracted feature map is input into the trained model to obtain the identification result, which is a string. The circuit board should also have a surface mount resistor model string at this location. These two strings are compared character by character from left to right. If they are the same, the surface mount resistor model is correct. Otherwise, the surface mount resistor is considered faulty.

[0115] Experimental example:

[0116] The data used in the experiment consisted of 144 images of surface mount resistors cropped from circuit board images, representing 10 different models. The experimental results are shown in the table below.

[0117]

[0118] The above description is merely a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any equivalent substitutions or modifications made by those skilled in the art within the scope of the technology disclosed in the present invention, based on the technical solution and inventive concept of the present invention, should be covered within the scope of protection of the present invention.

Claims

1. A method for identifying the model of a surface mount resistor based on mathematical morphology and a dual-attention convolutional neural network, characterized in that, include: S100. Crop and obtain images of surface mount resistors at various locations on a circuit board of a certain model, extract the region containing the resistor model characteristics of the surface mount resistor in the image of the surface mount resistor, and save the region as a feature map; S200. Obtain the resistor model of the chip resistor that should be present at each position on the circuit board of the specified model, generate an appropriate number of sample images, and encode the resistor model characters of the chip resistors using one-hot encoding and use them as tags; S300. The sample images are used as a training set and input into a dual-attention convolutional neural network for training; S400. Input the feature map into the trained dual-attention convolutional neural network for model recognition; S500. The identification result of the resistor model of the chip resistor at a certain position of the circuit board of the first model is compared with the resistor model of the chip resistor that should be at the certain position of the circuit board of the first model to determine whether a faulty component has occurred. Step S100 specifically includes: S101. Resize the image of the chip resistor to obtain Figure M0; S102. Perform a grayscale operation on the image M0 to obtain a grayscale image M1; S103. Perform adaptive thresholding on the grayscale image M1 to obtain a binary image M2; S104. Adaptively partition the grayscale image M1 to obtain vertical dividing lines C1 and C2; S105. Based on the vertical dividing lines C1 and C2, perform the first region extraction on the binary image M2 to obtain image M3; S106. Perform a closing operation in mathematical morphology on the graph M3 using kernel K1 to obtain graph M4; S107. Perform a closing operation in mathematical morphology on the graph M4 using kernel K2 to obtain graph M5; S108. Perform a mathematical morphological opening operation on the aforementioned figure M5 using kernel K3 to obtain figure M6; S109. Extract the connected components from the graph M6, and select an optimal connected component to obtain the location points P1 and P2; S110. A second region extraction is performed using the image M4 and the positioning points P1 and P2 to obtain the feature image M7.

2. The method for identifying surface mount resistor models based on mathematical morphology and dual-attention convolutional neural networks according to claim 1, characterized in that, In step S101, the image of the patch resistor to be extracted is first rotated to an image with a width greater than its height, and then the size of the patch resistor image is adjusted to H×W. When scaling, the pixel values ​​are recalculated using bilinear interpolation. In step S103, when performing adaptive threshold segmentation on the grayscale image M1, the grayscale value of the pixels that meet the conditions is set to 255. The adaptive method includes the Gaussian weighted sum method. The size of the segmentation calculation region is set to 9. The threshold calculated for each region is subtracted from the constant C to obtain the final threshold for that region. C is set to -5. In step S104, the two vertical dividing lines C1 and C2 are calculated using the following formula to maximize the average gray level difference of pixels within a certain range on both sides of the vertical dividing line, and 5 columns of pixels on each side are selected. in, and These represent the sum of the grayscale values ​​of pixels within 5 columns to the left and right of the vertical dividing line C1, divided by the number of rows. and These represent the number of pixel columns corresponding to these two regions, and N is the total number of pixel columns in the image; In step S105, the pixel values ​​of the points to the left of the vertical dividing line C1 and the pixel values ​​of the points to the right of the vertical dividing line C2 in the binary image M2 are both set to 0; In step S106, the kernel K1 used for the closing operation has a size of H / 20×2, where the first column of the matrix is ​​all 1s and the second column is all 0s; In step S107, the kernel K2 used for the closing operation has a size of H / 30×W / 16, and all elements of the matrix are 1; In step S108, the kernel K3 used for the opening operation has a size of H / 30×H / 30, and all elements of the matrix are 1; In step S109, after calculating all connected components, an optimal connected component is selected according to the following criteria and the positioning points P1 and P2 are obtained. The two positioning points are the upper left and lower right vertices of the outer rectangle of the connected component, respectively. 1) Criterion condition 1: The width of the connected component is greater than W / 4 and less than 2W / 3; 2) Criterion condition 2: The height of the connected component is greater than H / 4 and less than 2H / 3; 3) Criterion 3: The centroid of the connected component is closest to the image center (H / 2, W / 2); In step S110, in the figure M4, the pixel values ​​of the outer points of the rectangle determined by the positioning points P1 and P2 are all set to 0, and this rectangular area is moved to the center of the image.

3. The method for identifying surface mount resistor models based on mathematical morphology and dual-attention convolutional neural networks according to any one of claims 1-2, characterized in that, In step S200, 2-3 fonts similar to those printed on the circuit board are selected from the sample images. The background color is "#000000" and the font color is "#FFFFFF". For each resistor model and font, 125 images are generated with the font center position as (H / 2+i, W / 2+j), i, j = -2,-1,0,1,2, and the font size as 28+i, i = -2,-1,0,1,2. 125 images are also generated upside down.

4. The method for identifying surface mount resistor models based on mathematical morphology and dual-attention convolutional neural networks according to claim 3, characterized in that, In step S200, during one-hot encoding, the 11 characters, including the numbers 0-9 and the letter R, are encoded in the order 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, R. For a given character, let it be in the i-th position. The encoded result is an array of length 11, where all numbers except the i-th number are 0. If the resistor model contains 4 characters, the 4 arrays of length 11 are concatenated to form an array of length 44, which is used as the encoded result.

5. The method for identifying surface mount resistor models based on mathematical morphology and dual-attention convolutional neural networks according to claim 4, characterized in that, In step S300, when the training set is input into the dual-attention convolutional neural network for training, the dual-attention convolutional neural network comprises four sequentially connected stages, namely Conv1, Conv2, Conv3, and Conv4. Conv1 takes H×W input, contains a convolutional layer with a 3×3 kernel and a stride of 1, is normalized, randomly discards some neurons with a probability of 0.5, uses the ReLU activation function and a 2×2 max pooling layer, and outputs H / 2×W / 2. Conv2 has an input of H / 2×W / 2, contains the same operations as Conv1, and has an output size of H / 4×W / 4. Conv3 has an input of H / 4×W / 4, contains the same operations as Conv1, and has an output size of H / 8×W / 8. Conv4 has an input of H / 8×W / 8, contains two fully connected layers, and has an output of 1×44. After each convolution operation, the model is allowed to assign different weights to different positions of the input sequence through channel attention and spatial attention mechanisms, so as to focus on the most relevant parts when processing each sequence element. The output of the convolutional layer first passes through a channel attention module to obtain a weighted result, and then passes through a spatial attention module to finally obtain the weighted result. in: The channel attention module uses global average pooling and global max pooling to obtain global statistical information for each channel, and learns the channel weights through two fully connected layers. Then, the two processed results are added together, and the weights are normalized to between 0 and 1 using the Sigmoid function. Each channel is scaled, and finally, the scaled channel features are multiplied with the original features to produce features that enhance the importance of the channels. The spatial attention module uses max pooling and average pooling to obtain the maximum and average values ​​at each spatial location. The spatial attention module performs max pooling and average pooling operations on the channels of each feature point to obtain two matrices. After concatenating the two matrices, it learns the weights of each spatial location through a convolutional layer and a sigmoid function. Finally, the weights are applied to each spatial location on the feature map to generate features with enhanced spatial importance.

6. The method for identifying surface mount resistor models based on mathematical morphology and dual-attention convolutional neural networks according to claim 5, characterized in that, In step S300, when training the dual-attention convolutional neural network, the resistor model is one-hot encoded and used as the training label. The multi-label cross-entropy loss between the output result and the training label is calculated, and the network is trained based on the loss. The multi-label cross-entropy loss function is as follows: in This represents the true value of the i-th sample in the j-th category. This represents the result of softmax processing of the output of the i-th sample in the j-th category, where m represents the number of samples and q represents the number of categories. The softmax function is: in Let C represent the output values ​​of all categories for the i-th sample, and let C represent the number of samples.

7. The method for identifying surface mount resistor models based on mathematical morphology and dual-attention convolutional neural networks according to claim 6, characterized in that, In step S500, the string of the identification result of the surface mount resistor at a certain position of the circuit board of the first model is compared character by character from left to right with the string of the resistor model of the surface mount resistor that should be at that position of the circuit board of the first model. If the two strings are the same, the surface mount resistor model is correct; otherwise, it is determined that the surface mount resistor has a faulty component.

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