Precise time interval measurement method based on current integration and related device

Abstract

This application provides a method and related equipment for measuring precise time intervals based on current integration. The method includes: when an opening signal arrives, generating an opening fine measurement signal and discharging a capacitor; repeatedly acquiring the capacitor voltage at sub-clock cycles; ending the opening fine measurement signal and ending capacitor discharge and voltage acquisition after at least one master clock cycle; obtaining a linear equation by least squares fitting, and determining the first fine measurement interval of the opening fine measurement signal accordingly; generating a coarse measurement signal when the opening fine measurement signal ends; generating a closing fine measurement signal and discharging a capacitor when a closing signal arrives; repeatedly acquiring the capacitor voltage; ending the coarse measurement signal and closing fine measurement signal at the rising edge of the master clock signal after at least one master clock cycle, and ending capacitor discharge; determining the second fine measurement interval of the closing fine measurement signal based on the capacitor voltage change during capacitor discharge; and determining the actual time interval using the first fine measurement interval, the second fine measurement interval, and the coarse measurement interval.

Description

Technical Field

[0001] The embodiments of this application relate to the technical field of time measurement, and in particular to a method and related equipment for measuring precise time intervals based on current integration. Background Technology

[0002] First, the data acquisition accuracy is not high. Specifically, during the acquisition process, the voltage value corresponding to the falling edge of the fine measurement module needs to be sampled and quantized, which may lead to an increase in measurement uncertainty.

[0003] Furthermore, the introduced random errors are unavoidable and relatively large. Specifically, the entire measurement process relies solely on the single voltage acquired by the ADC module to calculate the time interval, which introduces random errors that are difficult to avoid, resulting in inaccurate measurement results.

[0004] On the other hand, existing solutions use a linear relationship between capacitor charging / discharging voltage and time to calculate time intervals, which is obtained through a single measurement. The time interval is then calculated by collecting and measuring the discharge voltage corresponding to the falling edge. This results in the voltage-time linear relationship data being fixed at a certain measurement stage, which leads to a large accumulation of errors in the measurement results. Summary of the Invention

[0005] In view of this, the purpose of this application is to propose a precise time interval measurement method and related equipment based on current integration.

[0006] To achieve the above objectives, this application provides a precise time interval measurement method based on current integration, comprising: in response to receiving an opening signal, generating an opening fine measurement signal, discharging a preset capacitor, acquiring the capacitor voltage multiple times at intervals of sub-clock cycles, and after at least one main clock cycle, ending the opening fine measurement signal at the rising edge of the main clock signal, ending the capacitor discharge and ending the acquisition of the capacitor voltage, wherein the sub-clock cycle is the clock cycle of the sub-clock signal obtained by multiplying the main clock signal;

[0007] By using the collected capacitor voltages and their corresponding collection times, the least squares method is used to fit the data to obtain a linear equation. The first measurement interval of the door opening measurement signal is then determined using the linear equation.

[0008] In response to the end of the door opening fine measurement signal, a coarse measurement signal is generated. In response to the receipt of the door closing signal, a door closing fine measurement signal is generated, and the capacitor is discharged. The capacitor voltage is sampled multiple times at intervals of the sub-clock cycle. After at least one main clock cycle, the coarse measurement signal and the door closing fine measurement signal are terminated at the rising edge of the main clock signal, and the capacitor discharge is terminated.

[0009] The coarse measurement interval of the coarse measurement signal is determined, and the second fine measurement interval of the fine measurement signal when the capacitor is discharged is determined based on the change in capacitor voltage. The actual time interval is determined using the first fine measurement interval, the second fine measurement interval, and the coarse measurement interval.

[0010] Furthermore, the capacitor is placed in a preset current integration circuit;

[0011] Furthermore, discharging the preset capacitor includes:

[0012] In response to the generation of the door opening fine test signal, the current integration circuit is controlled by controlling a preset constant current so that the capacitor in the current integration circuit is discharged.

[0013] Furthermore, the capacitor voltage is sampled multiple times at sub-clock intervals, including:

[0014] After the rising edge of the door opening measurement signal appears, the capacitor voltage is acquired at each rising edge of the sub-clock signal.

[0015] Furthermore, by using the collected capacitor voltages and their corresponding acquisition times to perform least-squares fitting, a linear equation is obtained, including:

[0016] Starting from the discharge of the capacitor, each collected capacitor voltage and the collection time are used as a set of data points. The collection time of the first collection of capacitor voltage is 0, and any two adjacent collections are separated by one sub-clock cycle.

[0017] The slope and intercept of the linear equation are calculated using the number of data points collected, the voltage of each capacitor, and the corresponding collection time.

[0018] Using the acquisition time as the independent variable, the linear equation relating the acquisition time and the capacitor voltage is determined using the slope and the intercept.

[0019] Further, determining the first fine measurement interval of the door opening fine measurement signal using the aforementioned linear equation includes:

[0020] Determine the maximum capacitor voltage before the capacitor discharges;

[0021] The inflection point at which the capacitor voltage begins to discharge is determined using the maximum capacitor voltage and the linear equation.

[0022] The first detailed measurement interval is determined based on the difference between the last acquisition time and the inflection point time.

[0023] Further, determining the second fine-tuning interval of the gate-closing fine-tuning signal based on the capacitor voltage change during capacitor discharge includes:

[0024] By fitting multiple capacitor voltages and their corresponding acquisition times after the rising edge of the door closing fine measurement signal with the least squares method, a linear equation is obtained. The second fine measurement interval of the door closing fine measurement signal is then determined using the linear equation.

[0025] Further, determining the actual time interval using the first fine measurement interval, the second fine measurement interval, and the coarse measurement interval includes:

[0026] The difference between the sum of the coarse measurement interval and the first fine measurement interval and the second fine measurement interval is determined, and this difference is determined as the actual time interval.

[0027] Based on the same inventive concept, this application also provides a precision time interval measurement device based on current integration, including: a door-open fine measurement module, a first fine measurement interval calculation module, a door-closed fine measurement module, and an actual time interval calculation module;

[0028] The door opening fine measurement module is configured to generate a door opening fine measurement signal in response to receiving a door opening signal, and to discharge a preset capacitor, and to collect the capacitor voltage multiple times at intervals of sub-clock cycles. After at least one main clock cycle, the door opening fine measurement signal ends at the rising edge of the main clock signal, the capacitor discharge ends, and the collection of capacitor voltage ends. The sub-clock cycle is the clock cycle of the sub-clock signal obtained by multiplying the main clock signal.

[0029] The first fine measurement interval calculation module is configured to perform least squares fitting on multiple collected capacitor voltages and their corresponding collection times to obtain a linear equation, and use the linear equation to determine the first fine measurement interval of the door opening fine measurement signal.

[0030] The door-closing fine measurement module is configured to generate a coarse measurement signal in response to the end of the door-opening fine measurement signal, generate a door-closing fine measurement signal in response to receiving a door-closing signal, and discharge the capacitor. The capacitor voltage is sampled multiple times at intervals of the sub-clock cycle. After at least one main clock cycle, the coarse measurement signal and the door-closing fine measurement signal are terminated at the rising edge of the main clock signal, and the capacitor discharge is terminated.

[0031] The actual time interval calculation module is configured to determine the coarse measurement interval of the coarse measurement signal, and determine the second fine measurement interval of the fine measurement signal when the capacitor is discharging, and use the first fine measurement interval, the second fine measurement interval and the coarse measurement interval to determine the actual time interval.

[0032] Based on the same inventive concept, this application also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the precise time interval measurement method based on current integration as described above.

[0033] Based on the same inventive concept, this application also provides a non-transitory computer-readable storage medium, wherein the non-transitory computer-readable storage medium stores computer instructions for causing the computer to perform the above-described precise time interval measurement method based on current integration.

[0034] Based on the same concept, corresponding to the methods of any of the above embodiments, this application also provides a computer program product, including computer program instructions, which, when run on a computer, cause the computer to perform the precision time interval measurement method based on current integration as described in any of the above claims.

[0035] As can be seen from the above, the precision time interval measurement method and related equipment based on current integration provided in this application generate corresponding fine-tuning signals for opening and closing based on the received door opening and closing signals. When the door opening and closing fine-tuning signals arrive, the capacitor is discharged, and the capacitor voltage is simultaneously acquired. During the acquisition of the capacitor voltage, the master clock signal is multiplied to obtain a sub-clock signal. The capacitor voltage is acquired at the rising edge of the sub-clock signal, thus enabling multiple acquisitions within the duration of the door opening and closing fine-tuning signals. This yields multiple data points of capacitor voltage and acquisition time. The least squares method is used to fit the data to determine the linear equation of the capacitor voltage decrease. This linear equation is then used to determine the first fine-tuning interval of the door opening signal and the second fine-tuning interval of the door closing signal, thereby determining the precise actual time interval between the door opening and closing signals. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in this application or related technologies, the drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the drawings described below are only embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0037] Figure 1 This is a flowchart of a precise time interval measurement method based on current integration, according to an embodiment of this application.

[0038] Figure 2 This is a first timing diagram for a precision time interval measurement based on current integration, according to an embodiment of this application.

[0039] Figure 3 This is a second timing diagram for precise time interval measurement based on current integration, according to an embodiment of this application.

[0040] Figure 4 This is a schematic diagram of the structure of a precision time interval measurement device based on current integration according to an embodiment of this application;

[0041] Figure 5 This is a schematic diagram of the electronic device structure according to an embodiment of this application. Detailed Implementation

[0042] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with specific embodiments and the accompanying drawings.

[0043] It should be noted that, unless otherwise defined, the technical or scientific terms used in the embodiments of this application should have the ordinary meaning understood by one of ordinary skill in the art to which this application pertains. The terms "first," "second," and similar terms used in the embodiments of this application do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," and "right" are only used to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0044] As described in the background section, the existing methods for measuring precise time intervals are still insufficient to meet the needs of practical measurements.

[0045] In the process of implementing this application, the applicant discovered that the main problems with the relevant precision time interval measurement method are: First, the data acquisition accuracy is not high. Specifically, during the acquisition process, it is necessary to sample and maintain the voltage value corresponding to the falling edge of the precision measurement module, which may lead to an increase in measurement uncertainty.

[0046] Furthermore, the introduced random errors are unavoidable and relatively large. Specifically, the entire measurement process relies solely on the single voltage acquired by the ADC module to calculate the time interval, which introduces random errors that are difficult to avoid, resulting in inaccurate measurement results.

[0047] On the other hand, existing solutions use a linear relationship between capacitor charging / discharging voltage and time to calculate time intervals, which is obtained through a single measurement. The time interval is then calculated by collecting and measuring the discharge voltage corresponding to the falling edge. This results in the voltage-time linear relationship data being fixed at a certain measurement stage, which leads to a large accumulation of errors in the measurement results.

[0048] Based on this, one or more embodiments of this application provide a method for measuring precise time intervals based on current integration.

[0049] In embodiments of this application, the device for measuring time intervals can receive door opening signals, door closing signals, and master clock signals.

[0050] The master clock period of the master clock signal is T. CLK .

[0051] Furthermore, the device is also equipped with a current integrating circuit, in which a capacitor is provided and connected to a constant current to control the charging and discharging of the capacitor.

[0052] Furthermore, an ADC (analog-to-digital converter) is also provided to acquire the voltage signal of the capacitor and obtain the capacitor voltage at different times.

[0053] The embodiments of this application are described in detail below with reference to the accompanying drawings.

[0054] refer to Figure 1 One embodiment of this application describes a precise time interval measurement method based on current integration, comprising the following steps:

[0055] Step S101: In response to receiving the door opening signal, generate a door opening fine measurement signal, and cause the preset capacitor to discharge. Collect the capacitor voltage multiple times at intervals of sub-clock cycle. After at least one main clock cycle, end the door opening fine measurement signal at the rising edge of the main clock signal, end the capacitor discharge and end the collection of capacitor voltage. The sub-clock cycle is the clock cycle of the sub-clock signal obtained by multiplying the main clock signal.

[0056] In the embodiments of this application, upon receiving the door opening signal, a door opening fine measurement signal is generated, and the capacitor is simultaneously discharged. After multiple acquisitions of the capacitor voltage, and after experiencing one or more master clock cycles, the door opening fine measurement signal ends and the capacitor discharge ends at the rising edge of a certain master clock signal.

[0057] Specifically, with Figure 2 As a concrete example, such as Figure 2 As shown, when the door opening signal arrives, the rising edge of the door opening fine measurement signal is generated at the same time as the rising edge of the door opening signal.

[0058] Furthermore, such as Figure 2 As shown, at the same moment the rising edge of the door opening measurement signal appears, the capacitor in the current integration circuit is controlled to discharge by controlling the constant current applied. Therefore, Figure 2 The capacitor voltage in the capacitor begins to decrease at the same moment the rising edge of the door opening measurement signal appears.

[0059] Furthermore, such as Figure 2 As shown, after the high potential of the door opening fine test signal lasts for several master clock cycles, the door opening fine test signal will have a falling edge at the rising edge of any master clock signal, that is, the door opening fine test signal ends at this time.

[0060] In this embodiment, the master clock period can be, for example, 10n or 20ns. When the master clock period is 10ns, the pulse width of the gate opening fine measurement signal, that is, the first fine measurement interval, is greater than 10ns.

[0061] Furthermore, when the falling edge of the door opening measurement signal appears, the constant current is controlled to stop the capacitor in the current integration circuit from discharging and start charging.

[0062] It can be seen that, Figure 2 In the process of capacitor voltage change, the capacitor voltage starts to decrease from the rising edge of the gate opening fine measurement signal until the falling edge of the gate opening fine measurement signal, and the capacitor voltage starts to rise from this point onwards as the capacitor begins to charge.

[0063] Furthermore, during the capacitor discharge process, that is... Figure 2 During the process of the capacitor voltage decreasing, the capacitor voltage is sampled multiple times using an ADC.

[0064] Specifically, Figure 2 By multiplying the master clock signal in the circuit, we can obtain... Figure 3 The sub-clock signal T shown CLK-Sub .

[0065] Since the sub-clock signal is obtained by multiplying the frequency of the master clock signal, the sub-clock signal and the master clock signal have the same phase and the frequency is doubled. In other words, the master clock period of the master clock signal is many times the sub-clock period of the sub-clock signal, and the number of sub-clock periods in the same time interval is many times the number of master clock periods.

[0066] like Figure 3 As shown, the voltage starts to decrease from point C, and the capacitor voltage is sampled from the moment the capacitor voltage decreases. Specifically, the sampling time interval can be the sub-clock cycle, and multiple samplings can be performed during the capacitor voltage decrease process.

[0067] Specifically, the capacitor voltage is sampled at each rising edge of the sub-clock signal. Figure 3 In the example shown, a total of 10 capacitor voltage measurements were performed, and each measurement was taken at... Figure 3 The voltage change curves are represented as C1, C2, C3, C4, C5, C6, C7, C8, C9, and C. 10 There are a total of 10 data points, each including the value of the collected capacitor voltage and the time of collection; among them, C 10 This data point, representing the last data acquisition point, marks the moment when the capacitor voltage drops to its lowest level.

[0068] Among the collected data points, the data point with the lowest capacitor voltage corresponds to the end time of the door opening fine measurement signal, which is also the falling edge of the door opening fine measurement signal. Figure 3 In the middle, data point C 10 The moment corresponds to the falling edge of the door opening measurement signal.

[0069] In this embodiment, the capacitor voltage before the capacitor begins to discharge, i.e. Figure 3 The capacitor voltages at points A and C are the clamping voltages of the capacitor, denoted as V0.

[0070] The clamping voltage can be obtained by acquisition. Specifically, the capacitor voltage can be acquired multiple times before the capacitor voltage drops until the rising edge of the fine measurement time signal arrives, and the average value of multiple capacitor voltages can be calculated. This average value is used as the clamping voltage V0.

[0071] Furthermore, when acquiring the capacitor voltage, the aforementioned ADC can be used for acquisition. After the ADC acquires the capacitor voltage signal, it is input to a preset low-pass filter.

[0072] Furthermore, the intensity noise of the acquired capacitor voltage signal can be processed using a digital low-pass filter with finite impulse response to obtain a regular capacitor voltage signal, thereby determining the accurate value of the capacitor voltage.

[0073] Step S102: Using the collected capacitor voltages and their corresponding collection times, perform least squares fitting to obtain a linear equation, and use the linear equation to determine the first fine measurement interval of the door opening fine measurement signal.

[0074] In the embodiments of this application, based on the capacitor voltage of each data point determined in the aforementioned steps, a linear equation representing the relationship between capacitor voltage and time when the capacitor voltage drops can be fitted using the least squares method, and the first fine measurement interval of the gate opening fine measurement signal can be calculated accordingly.

[0075] Specifically, the number of data points collected is N, and each data point is represented as (t1, V1), (t2, V2), ..., (t...i V i ), ..., (t N V N ), where t i V represents the acquisition time of the data point in the i-th acquisition. i This represents the capacitor voltage at the data point acquired in the i-th data acquisition.

[0076] Furthermore, based on the number of data points collected, the capacitor voltage at each data point, and the acquisition time of each data point, linear fitting is performed. The slope and intercept of the straight line equation are determined using the formulas shown below, thereby making the fitted straight line equation closer to the collected values:

[0077]

[0078]

[0079] Where m represents the slope and b represents the intercept.

[0080] Based on this, we can construct the following linear equation about the capacitor voltage using the acquisition time as the independent variable, and the slope and intercept:

[0081] V = mt + b

[0082] Where V represents the capacitor voltage and t represents the acquisition time.

[0083] Based on this, the first measurement interval of the door opening measurement signal can be calculated using the linear equation determined above.

[0084] Specifically, the first measurement interval is the difference between the acquisition time of the last data point and the time when the capacitor voltage begins to decrease, and is expressed as:

[0085]

[0086] Among them, T x1 Indicates the first detailed measurement time interval. This indicates the moment when the capacitor voltage is at its lowest, which is also the moment of the last capacitor voltage measurement. Figure 3 In the middle, we can consider it as data point C. 10 At the corresponding time t C This indicates the moment when the rising edge of the door opening fine measurement signal occurs, which is also the moment when the capacitor voltage begins to decrease. Figure 3 In this context, the moment at data point C can be considered as the time point.

[0087] Furthermore, based on the above equation of the straight line, t C This can be represented as follows:

[0088]

[0089] Furthermore, the first detailed measurement time interval T can be... x1 Represented as:

[0090]

[0091] And it is further rewritten as follows:

[0092]

[0093] Based on this, the first detailed measurement time interval T can be calculated. x1 .

[0094] Step S103: In response to the end of the door opening fine measurement signal, a coarse measurement signal is generated; in response to the receiving of the door closing signal, a door closing fine measurement signal is generated, and the capacitor is discharged. The capacitor voltage is sampled multiple times at intervals of the sub-clock cycle. After at least one main clock cycle, the coarse measurement signal and the door closing fine measurement signal are terminated at the rising edge of the main clock signal, and the capacitor discharge is terminated.

[0095] In the embodiments of this application, a door closing fine measurement signal is generated at the same time as the door closing signal is received, and the capacitor is discharged at the same time. After multiple acquisitions of the capacitor voltage, after one or more master clock cycles, the door closing fine measurement signal ends and the capacitor discharge ends at the rising edge of a certain master clock signal.

[0096] Specifically, with Figure 2 As a concrete example, such as Figure 2 As shown, when the door closing signal arrives, the rising edge of the door closing measurement signal is generated at the same time as the rising edge of the door closing signal.

[0097] Furthermore, such as Figure 2 As shown, at the same moment the rising edge of the door closing measurement signal appears, the capacitor in the current integration circuit is controlled to discharge by controlling the constant current applied. Therefore, Figure 2 The capacitor voltage in the middle begins to decrease at the same moment that the rising edge of the gate-closing fine measurement signal appears.

[0098] Furthermore, such as Figure 2 As shown, after the high potential of the gate closing fine test signal lasts for several master clock cycles, the gate closing fine test signal will have a falling edge at the rising edge of any master clock signal, that is, the gate closing fine test signal ends at this time.

[0099] Furthermore, when the falling edge of the door closing measurement signal appears, the constant current is controlled to stop the capacitor in the current integration circuit from discharging and start charging.

[0100] It can be seen that, Figure 2 In the process of capacitor voltage change, the capacitor voltage starts to decrease from the rising edge of the gate closing fine measurement signal until the falling edge of the gate closing fine measurement signal, and the capacitor voltage starts to rise from this point onwards as the capacitor begins to charge.

[0101] Furthermore, during the capacitor discharge process, that is... Figure 2 During the process of the capacitor voltage decreasing, the capacitor voltage is sampled multiple times using an ADC.

[0102] Furthermore, Figure 3 In addition to representing the first fine measurement interval, it can also represent the second fine measurement interval, such as... Figure 3 As shown, the voltage starts to decrease from point C, and the capacitor voltage is sampled from the moment the capacitor voltage decreases. Specifically, the sampling time interval can be the sub-clock cycle, and multiple samplings can be performed during the capacitor voltage decrease process.

[0103] Specifically, the capacitor voltage is sampled at each rising edge of the sub-clock signal. Figure 3 In the example shown, a total of 10 capacitor voltage measurements were performed, and each measurement was taken at... Figure 3 The voltage change curves are represented as C1, C2, C3, C4, C5, C6, C7, C8, C9, and C. 10 There are a total of 10 data points, each including the value of the collected capacitor voltage and the time of collection; among them, C 10 This data point, representing the last data acquisition point, marks the moment when the capacitor voltage drops to its lowest level.

[0104] Among the collected data points, the data point with the lowest capacitor voltage corresponds to the end time of the door-closing fine measurement signal, which is also the falling edge of the door-closing fine measurement signal. Figure 3 In the middle, data point C 10 The time corresponds to the falling edge of the door closing measurement signal.

[0105] In this embodiment, the capacitor voltage before the capacitor begins to discharge, i.e. Figure 3 The capacitor voltages at points A and C are the clamping voltages of the capacitor, denoted as V0.

[0106] Furthermore, when acquiring the capacitor voltage, the aforementioned ADC can be used for acquisition. After the ADC acquires the capacitor voltage signal, it is input to a preset low-pass filter.

[0107] Furthermore, the intensity noise of the acquired capacitor voltage signal can be processed using a digital low-pass filter with finite impulse response to obtain a regular capacitor voltage signal, thereby determining the accurate value of the capacitor voltage.

[0108] In the embodiments of this application, such as Figure 2 As shown, when the fine measurement signal for opening the door in the aforementioned steps ends, a coarse measurement signal is generated simultaneously, that is, the rising edge of the coarse measurement signal appears.

[0109] Furthermore, the high potential of the coarse measurement signal lasts for several master clock cycles and ends at the same time as the gate-closing fine measurement signal.

[0110] Step S104: Determine the coarse measurement interval of the coarse measurement signal, and determine the second fine measurement interval of the fine measurement signal when the capacitor is discharging based on the change in capacitor voltage. Use the first fine measurement interval, the second fine measurement interval, and the coarse measurement interval to determine the actual time interval.

[0111] In the embodiments of this application, by fitting using the least squares method, the second fine measurement interval of the door closing fine measurement signal can be determined based on the change in capacitor voltage during capacitor charging and discharging. Based on the coarse measurement interval, the second fine measurement interval, and the first fine measurement interval of the coarse measurement signal, the precise actual time interval between the door opening signal and the door closing signal can be determined.

[0112] Specifically, following the aforementioned method for determining the first detailed measurement interval, N data points are collected, and each data point is also represented as (t1, V1), (t2, V2), ..., (t... i V i ), ..., (t N V N ).

[0113] Further, similar to step S102 above, linear fitting is performed based on the number of data points collected, the capacitor voltage of each data point, and the collection time of each data point. The slope and intercept of the straight line equation are determined using the formulas shown below:

[0114]

[0115]

[0116] Based on this, we can construct the following linear equation about the capacitor voltage using the acquisition time as the independent variable, and the slope and intercept:

[0117] V = mt + b

[0118] Where V represents the capacitor voltage and t represents the acquisition time.

[0119] Based on this, the second measurement interval of the door closing measurement signal can be calculated using the linear equation determined above.

[0120] Specifically, the second measurement interval is the difference between the acquisition time of the last data point and the time when the capacitor voltage begins to decrease, and is expressed as:

[0121]

[0122] Among them, T x2 This indicates the second detailed measurement time interval.

[0123] Furthermore, based on the above linear equation, the second measurement time interval T can be determined. x2 Represented as:

[0124]

[0125] And it is further rewritten as follows:

[0126]

[0127] Based on this, the second measurement time interval T can be calculated. x2 .

[0128] Based on this, such as Figure 2 As shown, the sum of the coarse measurement interval and the first fine measurement interval can be determined, and the difference between the sum and the second fine measurement interval can be used to obtain the actual time interval.

[0129] Specifically, the actual time interval can be calculated using the formula shown below:

[0130] T total =n*T CLK +T x1 -T x2

[0131] Where n represents the number of master clock cycles spanned by the coarse measurement interval.

[0132] As can be seen, the precise time interval measurement method based on current integration in this application generates corresponding opening and closing fine measurement signals based on the received opening and closing signals. When the opening and closing fine measurement signals arrive, the capacitor is discharged, and the capacitor voltage is simultaneously collected. During voltage collection, the master clock signal is multiplied to obtain a sub-clock signal, and the capacitor voltage is collected at the rising edge of the sub-clock signal. This allows for multiple data collections within the duration of the opening and closing fine measurement signals, resulting in multiple capacitor voltage and data points at the collection times. The least squares method is used to fit the data to determine the linear equation for the decrease in capacitor voltage. This linear equation is then used to determine the first fine measurement interval of the opening signal and the second fine measurement interval of the closing signal, thereby determining the precise actual time interval between the opening and closing signals.

[0133] It should be noted that the method of the embodiments of this application can be executed by a single device, such as a computer or server. The method of this embodiment can also be applied in a distributed scenario, where multiple devices cooperate to complete the task. In such a distributed scenario, one of these devices may execute only one or more steps of the method of the embodiments of this application, and the multiple devices will interact with each other to complete the method described.

[0134] It should be noted that the above description describes some embodiments of this application. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in a different order than that shown in the above embodiments and still achieve the desired result. Furthermore, the processes depicted in the drawings do not necessarily require a specific or sequential order to achieve the desired result. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0135] Based on the same inventive concept, and corresponding to any of the above embodiments, the embodiments of this application also provide a precision time interval measurement device based on current integration.

[0136] refer to Figure 4 The precision time interval measurement device based on current integration includes: a door-opening fine measurement module 401, a first fine measurement interval calculation module 402, a door-closing fine measurement module 403, and an actual time interval calculation module 404.

[0137] The door opening fine measurement module 401 is configured to generate a door opening fine measurement signal in response to receiving a door opening signal, and cause a preset capacitor to discharge, and collect the capacitor voltage multiple times at intervals of sub-clock cycles. After at least one main clock cycle, the door opening fine measurement signal ends at the rising edge of the main clock signal, the capacitor discharge ends, and the collection of capacitor voltage ends. The sub-clock cycle is the clock cycle of the sub-clock signal obtained by multiplying the main clock signal.

[0138] The first fine measurement interval calculation module 402 is configured to perform least squares fitting on multiple collected capacitor voltages and their corresponding collection times to obtain a linear equation, and use the linear equation to determine the first fine measurement interval of the door opening fine measurement signal.

[0139] The door-closing fine measurement module 403 is configured to generate a coarse measurement signal in response to the end of the door-opening fine measurement signal, generate a door-closing fine measurement signal in response to receiving a door-closing signal, and discharge the capacitor. The capacitor voltage is sampled multiple times at intervals of the sub-clock cycle. After at least one main clock cycle, the coarse measurement signal and the door-closing fine measurement signal are terminated at the rising edge of the main clock signal, and the capacitor discharge is terminated.

[0140] The actual time interval calculation module 404 is configured to determine the coarse measurement interval of the coarse measurement signal, and determine the second fine measurement interval of the fine measurement signal of the door closing based on the change in capacitor voltage during capacitor discharge, and use the first fine measurement interval, the second fine measurement interval and the coarse measurement interval to determine the actual time interval.

[0141] For ease of description, the above apparatus is described in terms of its functions, divided into various modules. Of course, in implementing the embodiments of this application, the functions of each module can be implemented in one or more software and / or hardware.

[0142] The apparatus of the above embodiments is used to implement the corresponding precision time interval measurement method based on current integration in any of the foregoing embodiments, and has the beneficial effects of the corresponding method embodiments, which will not be repeated here.

[0143] Based on the same inventive concept, corresponding to the methods of any of the above embodiments, embodiments of this application also provide an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the program, it implements the precise time interval measurement method based on current integration as described in any of the above embodiments.

[0144] Figure 5 This embodiment illustrates a more specific hardware structure of an electronic device, which may include a processor 1010, a memory 1020, an input / output interface 1030, a communication interface 1040, and a bus 1050. The processor 1010, memory 1020, input / output interface 1030, and communication interface 1040 are interconnected internally via the bus 1050.

[0145] The processor 1010 can be implemented using a general-purpose CPU (Central Processing Unit), microprocessor, application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of this application.

[0146] The memory 1020 can be implemented in the form of ROM (Read Only Memory), RAM (Random Access Memory), static storage device, dynamic storage device, etc. The memory 1020 can store the operating system and other applications. When the technical solutions provided in the embodiments of this application are implemented by software or firmware, the relevant program code is stored in the memory 1020 and is called and executed by the processor 1010.

[0147] The input / output interface 1030 is used to connect input / output modules to realize information input and output. Input / output modules can be configured as components within the device (not shown in the figure) or externally connected to the device to provide corresponding functions. Input devices may include keyboards, mice, touchscreens, microphones, various sensors, etc., while output devices may include displays, speakers, vibrators, indicator lights, etc.

[0148] The communication interface 1040 is used to connect a communication module (not shown in the figure) to enable communication between this device and other devices. The communication module can communicate via wired means (such as USB, Ethernet cable, etc.) or wireless means (such as mobile network, WIFI, Bluetooth, etc.).

[0149] Bus 1050 includes a pathway for transmitting information between various components of the device, such as processor 1010, memory 1020, input / output interface 1030, and communication interface 1040.

[0150] It should be noted that although the above-described device only shows the processor 1010, memory 1020, input / output interface 1030, communication interface 1040, and bus 1050, in specific implementations, the device may also include other components necessary for normal operation. Furthermore, those skilled in the art will understand that the above-described device may only include the components necessary for implementing the embodiments of this application, and not necessarily all the components shown in the figures.

[0151] The apparatus of the above embodiments is used to implement the corresponding precision time interval measurement method based on current integration in any of the foregoing embodiments, and has the beneficial effects of the corresponding method embodiments, which will not be repeated here.

[0152] Based on the same inventive concept, corresponding to the methods of any of the above embodiments, this application also provides a non-transitory computer-readable storage medium storing computer instructions for causing the computer to execute the precision time interval measurement method based on current integration as described in any of the above embodiments.

[0153] The computer-readable medium of this embodiment includes permanent and non-permanent, removable and non-removable media, and information storage can be implemented by any method or technology. Information can be computer-readable instructions, data structures, program modules, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transfer medium that can be used to store information accessible by a computing device.

[0154] The computer instructions stored in the storage medium of the above embodiments are used to cause the computer to execute the precision time interval measurement method based on current integration as described in any of the above embodiments, and have the beneficial effects of the corresponding method embodiments, which will not be repeated here.

[0155] Based on the same concept, corresponding to the methods of any of the above embodiments, this application also provides a computer program product, including computer program instructions, which, when run on a computer, cause the computer to execute the precision time interval measurement method based on current integration as described in any of the above embodiments, and have the beneficial effects of the corresponding method embodiments, which will not be repeated here.

[0156] Those skilled in the art should understand that the discussion of any of the above embodiments is merely exemplary and is not intended to imply that the scope of this application (including the claims) is limited to these examples; within the framework of this application, the technical features of the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations of different aspects of the embodiments of this application as described above, which are not provided in detail for the sake of brevity.

[0157] Additionally, to simplify the description and discussion, and to avoid obscuring the embodiments of this application, the well-known power / ground connections to integrated circuit (IC) chips and other components may or may not be shown in the provided drawings. Furthermore, the apparatus may be shown in block diagram form to avoid obscuring the embodiments of this application, and this also takes into account the fact that the details of implementation of these block diagram apparatuses are highly dependent on the platform on which the embodiments of this application will be implemented (i.e., these details should be fully understood by those skilled in the art). While specific details (e.g., circuits) have been set forth to describe exemplary embodiments of this application, it will be apparent to those skilled in the art that the embodiments of this application can be implemented without these specific details or with variations thereof. Therefore, these descriptions should be considered illustrative rather than restrictive.

[0158] Although this application has been described in conjunction with specific embodiments thereof, many substitutions, modifications, and variations of these embodiments will be apparent to those skilled in the art from the foregoing description. For example, other memory architectures (e.g., dynamic RAM (DRAM)) may be used with the embodiments discussed.

[0159] The embodiments of this application are intended to cover all such substitutions, modifications, and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the embodiments of this application should be included within the protection scope of this application.

Claims

1. A method for measuring precise time intervals based on current integration, characterized in that, include: In response to receiving the door opening signal, a door opening fine measurement signal is generated, and a preset capacitor is discharged. The capacitor voltage is sampled multiple times at intervals of sub-clock cycles. After at least one main clock cycle, the door opening fine measurement signal ends at the rising edge of the main clock signal, the capacitor discharge ends, and the sampling of capacitor voltage ends. The sub-clock cycle is the clock cycle of the sub-clock signal obtained by multiplying the main clock signal. By using the collected capacitor voltages and their corresponding collection times, the least squares method is used to fit the data to obtain a linear equation. The first measurement interval of the door opening measurement signal is then determined using the linear equation. In response to the end of the door opening fine measurement signal, a coarse measurement signal is generated. In response to the receipt of the door closing signal, a door closing fine measurement signal is generated, and the capacitor is discharged. The capacitor voltage is sampled multiple times at intervals of the sub-clock cycle. After at least one main clock cycle, the coarse measurement signal and the door closing fine measurement signal are terminated at the rising edge of the main clock signal, and the capacitor discharge is terminated. The coarse measurement interval of the coarse measurement signal is determined, and the second fine measurement interval of the fine measurement signal when the capacitor is discharged is determined based on the change in capacitor voltage. The actual time interval is determined using the first fine measurement interval, the second fine measurement interval, and the coarse measurement interval.

2. The method according to claim 1, characterized in that, The capacitor is set in a preset current integration circuit; The process of discharging the preset capacitor includes: In response to the generation of the door opening fine test signal, the current integration circuit is controlled by a preset constant current to discharge the capacitor in the current integration circuit.

3. The method according to claim 1, characterized in that, The method of repeatedly sampling capacitor voltage at sub-clock intervals includes: After the rising edge of the door opening measurement signal appears, the capacitor voltage is acquired at each rising edge of the sub-clock signal.

4. The method according to claim 1, characterized in that, The process involves using the least squares method to fit multiple collected capacitor voltages and their corresponding collection times to obtain a linear equation, including: Starting from the discharge of the capacitor, each collected capacitor voltage and the collection time are used as a set of data points. The collection time of the first collection of capacitor voltage is 0, and any two adjacent collections are separated by one sub-clock cycle. The slope and intercept of the linear equation are calculated using the number of data points collected, the voltage of each capacitor, and the corresponding collection time. Using the acquisition time as the independent variable, the linear equation relating the acquisition time and the capacitor voltage is determined using the slope and the intercept.

5. The method according to claim 1, characterized in that, The step of determining the first fine measurement interval of the door opening fine measurement signal using the linear equation includes: Determine the maximum capacitor voltage before the capacitor discharges; The inflection point at which the capacitor voltage begins to discharge is determined using the maximum capacitor voltage and the linear equation. The first detailed measurement interval is determined based on the difference between the last acquisition time and the inflection point time.

6. The method according to claim 1, characterized in that, The step of determining the second fine measurement interval of the gate-closing fine measurement signal based on the capacitor voltage change during capacitor discharge includes: By fitting multiple capacitor voltages and their corresponding acquisition times after the rising edge of the door closing fine measurement signal with the least squares method, a linear equation is obtained. The second fine measurement interval of the door closing fine measurement signal is then determined using the linear equation.

7. The method according to claim 1, characterized in that, The step of determining the actual time interval using the first fine measurement interval, the second fine measurement interval, and the coarse measurement interval includes: The difference between the sum of the coarse measurement interval and the first fine measurement interval and the second fine measurement interval is determined, and this difference is determined as the actual time interval.

8. A precision time interval measuring device based on current integration, characterized in that, include: The module includes a door opening fine measurement module, a first fine measurement interval calculation module, a door closing fine measurement module, and an actual time interval calculation module. The door opening fine measurement module is configured to generate a door opening fine measurement signal in response to receiving a door opening signal, and to discharge a preset capacitor, and to collect the capacitor voltage multiple times at intervals of sub-clock cycles. After at least one main clock cycle, the door opening fine measurement signal ends at the rising edge of the main clock signal, the capacitor discharge ends, and the collection of capacitor voltage ends. The sub-clock cycle is the clock cycle of the sub-clock signal obtained by multiplying the main clock signal. The first fine measurement interval calculation module is configured to perform least squares fitting on multiple collected capacitor voltages and their corresponding collection times to obtain a linear equation, and use the linear equation to determine the first fine measurement interval of the door opening fine measurement signal. The door-closing fine measurement module is configured to generate a coarse measurement signal in response to the end of the door-opening fine measurement signal, generate a door-closing fine measurement signal in response to receiving a door-closing signal, and discharge the capacitor. The capacitor voltage is sampled multiple times at intervals of the sub-clock cycle. After at least one main clock cycle, the coarse measurement signal and the door-closing fine measurement signal are terminated at the rising edge of the main clock signal, and the capacitor discharge is terminated. The actual time interval calculation module is configured to determine the coarse measurement interval of the coarse measurement signal, and determine the second fine measurement interval of the fine measurement signal when the capacitor is discharging, and use the first fine measurement interval, the second fine measurement interval and the coarse measurement interval to determine the actual time interval.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable by the processor, characterized in that, When the processor executes the computer program, it implements the method as described in any one of claims 1 to 7.

10. A non-transitory computer-readable storage medium, characterized in that, A non-transitory computer-readable storage medium stores computer instructions for causing a computer to perform the method according to any one of claims 1 to 7.

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