IGBT device structure with simplified driving circuit and preparation method thereof

Abstract

The present invention discloses an IGBT device structure with a simplified driving circuit and a preparation method thereof. By setting the depth of the P-type doping region to be greater than the depth of the pseudo trench gate, the Cies (input capacitance) of the IGBT device structure can be greatly increased; when the PN junction formed by the N-type drift region and the P-type doping region is reverse biased, the depth of the depletion line of the PN junction in the P-type doping region is greater than the depth of the pseudo trench gate, which can reduce the Cres (reverse transfer capacitance) of the IGBT device structure. The present application provides an IGBT device structure with a simplified driving circuit and a preparation method thereof, which can improve the Cies / Cres ratio (input capacitance / reverse transfer capacitance) of the IGBT device structure, realize zero-voltage shutdown, and is conducive to simplifying the driving circuit.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor devices, and in particular relates to an IGBT device structure with a simplified driving circuit and a preparation method thereof. Background Art

[0002] IGBT (Insulated Gate Bipolar Transistor), insulated gate bipolar transistor, is a composite fully controlled voltage-driven power semiconductor device composed of BJT (bipolar transistor) and MOS (insulated gate field effect transistor), which has the advantages of both MOSFET's high input impedance and GTR's low on-state voltage drop. GTR has low saturation voltage drop and high current density, but high driving current; MOSFET has low driving power and fast switching speed, but high on-state voltage drop and low current density. IGBT combines the advantages of the above two devices, with low driving power and low saturation voltage drop.

[0003] Insulated gate bipolar transistor (IGBT) is widely used in aerospace, new energy vehicles, industrial control, white appliances and other fields due to its advantages such as low driving power, fast switching speed and low switching loss.

[0004] However, as the power density requirements of IGBTs become higher and higher, the pitch (line spacing) becomes smaller and smaller, the device capacitance becomes larger and larger, and the drive circuit becomes more and more complex, which seriously affects the switching speed.

[0005] The information disclosed in this background technology section is only intended to enhance the understanding of the overall background of the invention and should not be regarded as an acknowledgment or any form of suggestion that the information constitutes the prior art already known to a person skilled in the art. Summary of the invention

[0006] The object of the present invention is to provide an IGBT device structure with a simplified driving circuit and a preparation method thereof, which can improve the Cies / Cres ratio (input capacitance / reverse transfer capacitance) of the IGBT device structure, achieve zero-voltage shutdown, and help simplify the driving circuit.

[0007] In order to achieve the above object, a specific embodiment of the present invention provides an IGBT device structure with a simplified driving circuit, comprising an N-type drift region and a true trench gate and a dummy trench gate arranged in the N-type drift region, wherein both sides of each true trench gate are the dummy trench gates;

[0008] P-type doping regions are formed in the N-type drift region and are arranged at intervals. A non-doping region is formed between adjacent P-type doping regions. One of the true trench gates is arranged in the non-doping region. The dummy trench gates are all arranged in the P-type doping region, and the depth of the P-type doping region is greater than the depth of the dummy trench gate.

[0009] When the PN junction formed by the N-type drift region and the P-type doping region is reverse biased, the depth of the PN junction at the depletion line of the P-type doping region is greater than the depth of the dummy trench gate.

[0010] In one or more embodiments of the present invention, an N+ source region, a P-type base region and a carrier storage region are sequentially arranged from top to bottom in the non-doped region of the N-type drift region, and the true trench gate located in the non-doped region penetrates the N+ source region and the P-type base region and extends into the carrier storage region.

[0011] In one or more embodiments of the present invention, the IGBT device structure of the simplified driving circuit also includes a dielectric layer formed above the N-type drift region and an emitter metal layer formed above the dielectric layer, and the emitter metal layer partially penetrates the dielectric layer and extends into the P-type base region.

[0012] In one or more embodiments of the present invention, the number of the dummy trench gates on both sides of each true trench gate is greater than or equal to one.

[0013] In one or more embodiments of the present invention, the IGBT device structure of the simplified driving circuit further includes a buffer layer formed below the N-type drift region and a collector layer formed below the buffer layer.

[0014] In one or more embodiments of the present invention, a depth of a depletion line of a PN junction formed by the N-type drift region and the P-type doping region in the P-type doping region is smaller than a depth of the P-type doping region.

[0015] In one or more embodiments of the present invention, other true trench gates are further disposed in the P-type doping region, and the depth of the P-type doping region is greater than the depth of the other true trench gates.

[0016] In one or more embodiments of the present invention, when the PN junction formed by the N-type drift region and the P-type doping region is reverse biased, the depletion line depth of the PN junction in the P-type doping region is greater than the depth of the remaining true trench gates.

[0017] A specific embodiment of the present invention provides an IGBT device structure with a simplified driving circuit, comprising an emitter metal layer, a dielectric layer, an N-type drift region, a buffer layer and a collector layer arranged in sequence from top to bottom, and also comprising a true trench gate and a dummy trench gate arranged in the N-type drift region, wherein both sides of each true trench gate are the dummy trench gates;

[0018] Wherein, the N-type drift region is formed with P-type doped regions arranged at intervals, and the non-doped region between the adjacent P-type doped regions is sequentially arranged with an N+ source region, a P-type base region and a carrier storage region from top to bottom;

[0019] One of the true trench gates penetrates the N+ source region and the P-type base region and extends into the carrier storage region, and the remaining true trench gates and dummy trench gates are all arranged in the P-type doping region, and the depth of the P-type doping region is greater than the depth of the dummy trench gates;

[0020] When the PN junction formed by the N-type drift region and the P-type doping region is reverse biased, the depletion line depth of the PN junction in the P-type doping region is greater than the depth of the dummy trench gate.

[0021] A specific embodiment of the present invention provides a method for preparing an IGBT device structure with a simplified driving circuit, comprising:

[0022] Providing an N-type substrate, the N-type substrate having a first surface and a second surface opposite to each other;

[0023] Performing P-type doping diffusion on the first surface of the N-type substrate to form P-type doping regions arranged at intervals, and forming non-doping regions between adjacent P-type doping regions;

[0024] forming a carrier storage region in a non-doped region of the N-type substrate;

[0025] Forming a true trench gate and a dummy trench gate in the N-type substrate, wherein one true trench gate is disposed in the non-doped region, and the dummy trench gates are all disposed in the P-type doped region, and the depth of the dummy trench gate is less than the depth of the P-type doped region;

[0026] forming a P-type base region and an N+ source region in the non-doped region;

[0027] A dielectric layer and an emitter metal layer are formed on the first surface of the N-type substrate, and a buffer layer and a collector layer are formed on the second surface of the substrate.

[0028] Compared with the prior art, the IGBT device structure of the simplified drive circuit and the preparation method thereof of the present invention can improve the Cies / Cres ratio (input capacitance / reverse transfer capacitance) of the IGBT device structure at 25V, achieve zero-voltage shutdown, and help simplify the drive circuit.

[0029] In the IGBT device structure of the simplified driving circuit and the preparation method thereof of the present invention, the depth of the P-type doping region is greater than the depth of the pseudo trench gate, which can greatly increase the Cies (input capacitance) of the IGBT device structure.

[0030] In the IGBT device structure of the simplified driving circuit and the preparation method thereof, the depth of the depletion line of the PN junction in the P-type doping region is greater than the depth of the pseudo trench gate, which can reduce the Cres (reverse transfer capacitance) of the IGBT device structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the prior art descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0032] Figure 1 A schematic diagram of an IGBT device structure of a simplified driving circuit in an embodiment of the present invention;

[0033] Figure 2 A process flow chart of a method for preparing an IGBT device structure with a simplified driving circuit in one embodiment of the present invention;

[0034] Figure 3a-3e It is a process step diagram of a method for preparing an IGBT device structure of a simplified driving circuit in one embodiment of the present invention. DETAILED DESCRIPTION

[0035] In order to enable those skilled in the art to better understand the technical solutions in the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0036] As mentioned in the background technology, IGBT (Insulated Gate Bipolar Transistor), an insulated gate bipolar transistor, is a composite fully controlled voltage-driven power semiconductor device composed of BJT (bipolar transistor) and MOS (insulated gate field effect transistor), which has the advantages of both MOSFET's high input impedance and GTR's low on-state voltage drop. GTR has a low saturation voltage drop and a large current density, but a large driving current; MOSFET has very low driving power and fast switching speed, but a large on-state voltage drop and a low current density. IGBT combines the advantages of the above two devices, with low driving power and low saturation voltage drop.

[0037] Insulated gate bipolar transistor (IGBT) is widely used in aerospace, new energy vehicles, industrial control, white appliances and other fields due to its advantages such as low driving power, fast switching speed and low switching loss.

[0038] However, as the power density requirements of IGBTs become higher and higher, the pitch (line spacing) becomes smaller and smaller, the device capacitance becomes larger and larger, and the drive circuit becomes more and more complex, which seriously affects the switching speed.

[0039] Based on this, the present application provides an IGBT device structure with a simplified driving circuit and a preparation method thereof. By setting the depth of the P-type doped region to be greater than the depth of the pseudo trench gate, the Cies (input capacitance) of the IGBT device structure can be greatly increased; when the PN junction formed by the N-type drift region and the P-type doped region is reverse biased, the depth of the depletion line a of the PN junction in the P-type doped region is greater than the depth of the pseudo trench gate, which can reduce the Cres (reverse transfer capacitance) of the IGBT device structure. The present application provides an IGBT device structure with a simplified driving circuit and a preparation method thereof, which can improve the Cies / Cres ratio (input capacitance / reverse transfer capacitance) of the IGBT device structure, achieve zero-voltage shutdown, and help simplify the driving circuit.

[0040] like Figure 1 As shown, the IGBT device structure of the simplified driving circuit in an embodiment of the present invention includes an emitter metal layer 10, a dielectric layer 20, an N-type drift region 30, a buffer layer 40 and a collector layer 50 arranged in sequence from top to bottom, and also includes a true trench gate 61 and a dummy trench gate 62 arranged in the N-type drift region 30, and each true trench gate 61 has dummy trench gates 62 on both sides.

[0041] Among them, the N-type drift region 30 is formed with spaced P-type doping regions 31, and the non-doping region 32 between adjacent P-type doping regions 31 is sequentially provided with N+ source region 321, P-type base region 322 and carrier storage region 323 from top to bottom. One of the true trench gates 61 penetrates the N+ source region 321 and the P-type base region 322 and extends into the carrier storage region 323, and the dummy trench gates 62 are all arranged in the P-type doping region 31 and the depth of the P-type doping region 31 is greater than the depth of the dummy trench gate 62. When the PN junction formed by the N-type drift region 30 and the P-type doping region 31 is reverse biased, the depth of the PN junction at the depletion line a of the P-type doping region 31 is greater than the depth of the dummy trench gate 62.

[0042] Moreover, the depth of the PN junction formed by the N-type drift region 30 and the P-type doping region 31 at the depletion line a of the P-type doping region 31 is smaller than the depth of the P-type doping region 31 .

[0043] In the above technical solution, the depth of the P-type doping region 31 is greater than the depth of the pseudo trench gate 62, which can greatly increase the Cies (input capacitance) of the IGBT device structure; the depth of the depletion line a of the PN junction in the P-type doping region 31 is greater than the depth of the pseudo trench gate 62, which can reduce the Cres (reverse transfer capacitance) of the IGBT device structure; therefore, the IGBT device structure of the simplified drive circuit of the present invention can improve the Cies / Cres ratio (input capacitance / reverse transfer capacitance) of the IGBT device structure, achieve zero-voltage shutdown, and is conducive to simplifying the drive circuit.

[0044] In an exemplary embodiment, the number of dummy trench gates 62 on both sides of each true trench gate 61 is greater than or equal to 1. For example, the true trench gate 61 and the dummy trench gate 62 are arranged at intervals of 1:1, or the true trench gate 61 and the dummy trench gate 62 are arranged in a ratio of 1:2 or 1:3. It can be understood that not only the dummy trench gate 62 but also the remaining true trench gates 61 can be arranged in the P-type doping region 31. The true trench gate 61 in the P-type doping region 31 can be used for various purposes such as grounding and suspension. Preferably, the depth of the true trench gate 61 is the same as the depth of the dummy trench gate 62, and the depth of the P-type doping region 31 is also greater than the depth of the remaining true trench gates 61. When the PN junction formed by the N-type drift region 30 and the P-type doping region 31 is reverse biased, the depth of the depletion line a of the PN junction in the P-type doping region 31 is also greater than the depth of the remaining true trench gates 61.

[0045] In the embodiment of the present application, the dielectric layer 20 and the emitter metal layer 10 are arranged on the N-type drift region 30. The emitter metal layer 10 partially penetrates the dielectric layer 20 and the N+ source region 321 at the non-doped region 32 of the N-type drift region 30, and extends into the P-type base region 322. Of course, in other embodiments, the arrangement of the N+ source region 321, the P-type base region 322, the N-type drift region 30, the dielectric layer 20 and the emitter metal layer 10 can also be the arrangement of IGBT devices in other prior arts, because it is not the focus of the present application, and the present application does not limit this.

[0046] refer to Figure 2 As shown, a specific embodiment of the present invention also provides a method for preparing an IGBT device structure with a simplified driving circuit, comprising the following steps:

[0047] S1: providing an N-type substrate having a first surface and a second surface opposite to each other; performing P-type doping diffusion on the first surface of the N-type substrate to form spaced P-type doping regions, and forming a non-doping region between adjacent P-type doping regions.

[0048] Exemplary, reference Figure 3aAs shown, an N-type substrate is provided. The N-type substrate is preferably a silicon substrate, and the N-type substrate constitutes an N-type drift region 30 of the device. The N-type substrate has a first surface 30a and a second surface 30b that are arranged opposite to each other. P-type doping diffusion is performed on the first surface 30a of the N-type substrate to form P-type doping regions 31 arranged at intervals, and non-doping regions 32 are formed between adjacent P-type doping regions 31.

[0049] S2: forming a carrier storage region in a non-doped region of the N-type substrate.

[0050] Exemplary, reference Figure 3b As shown, CS is implanted and diffused in the non-doped region 32 of the N-type substrate to form a carrier storage region 323 .

[0051] S3: forming a true trench gate and a dummy trench gate in the N-type substrate, wherein a true trench gate is arranged in the non-doped region, and the dummy trench gates are all arranged in the P-type doped region, and the depth of the dummy trench gate is less than the depth of the P-type doped region.

[0052] Exemplary, reference Figure 3c and Figure 3d As shown, the first surface 30a of the n-type substrate is grooved by using the existing technology, wherein at least one groove (for forming a true groove gate 61) is formed in the non-doped area 32, and the groove depth is less than the depth of the carrier storage area 323. At least one groove (for forming a pseudo groove gate 62) is formed in each of the two P-type doping areas 31, and the groove depth in the two P-type doping areas 31 is less than the depth of the P-type doping area 31 where each is located, but needs to be greater than the depletion line depth of the PN junction in the P-type doping area 31 when a 25V voltage is applied to the CE end of the IGBT device and the PN junction of the P-type doping area 31 and the N-type drift area 30 is reversely biased. Subsequently, the inner wall of the groove is subjected to processes such as the growth of sacrificial anode oxide, the growth of the gate oxide layer, the filling deposition of polysilicon, and the back etching to prepare the true groove gate and the pseudo groove gate. Based on the fact that the above processes can all adopt the existing technology and are not the innovation of the present application, the present application will not be elaborated in detail again.

[0053] S4: forming a P-type base region and an N+ source region in the non-doped region.

[0054] Exemplary, reference Figure 3e As shown, the P-type base region 322 and the N+ source region 321 are implanted and diffused in the non-doped region 32 of the N-type substrate to form the P-type base region 322 and the N+ source region 321. The above process can adopt the existing technology and is not the innovation of the present application, and the present application will not elaborate on it again.

[0055] S5: forming a dielectric layer and an emitter metal layer on the first surface of the N-type substrate, and forming a buffer layer and a collector layer on the second surface of the substrate.

[0056] Exemplary, reference Figure 1 As shown, a dielectric layer 20 is deposited on the first surface 30a of the N-type substrate and a contact hole is formed, wherein the contact hole exposes the P-type base region 322 and the N+ source region 321. An emitter metal layer 10 is deposited on the surface of the dielectric layer 20 and in the contact hole. A buffer layer 40 and a collector layer 50 are formed on the second surface 30b of the N-type substrate.

[0057] Compared with the prior art, the IGBT device structure of the simplified drive circuit and the preparation method thereof of the present invention can improve the Cies / Cres ratio (input capacitance / reverse transfer capacitance) of the IGBT device structure at 25V, achieve zero-voltage shutdown, and help simplify the drive circuit.

[0058] In the IGBT device structure of the simplified driving circuit and the preparation method thereof of the present invention, the depth of the P-type doping region is greater than the depth of the pseudo trench gate, which can greatly increase the Cies (input capacitance) of the IGBT device structure.

[0059] In the IGBT device structure of the simplified driving circuit and the preparation method thereof, the depth of the depletion line of the PN junction in the P-type doping region is greater than the depth of the pseudo trench gate, which can reduce the Cres (reverse transfer capacitance) of the IGBT device structure.

[0060] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations falling within the meaning and scope of the equivalent elements of the claims be included in the invention. Any reference numeral in a claim should not be considered as limiting the claim to which it relates.

[0061] In addition, it should be understood that although the present specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

Claims

1. An IGBT device structure with a simplified driving circuit, characterized in that: It includes an N-type drift region and a true trench gate and a dummy trench gate arranged in the N-type drift region, and both sides of each true trench gate are the dummy trench gates; P-type doping regions are formed in the N-type drift region and are arranged at intervals. A non-doping region is formed between adjacent P-type doping regions. One of the true trench gates is arranged in the non-doping region. The dummy trench gates are all arranged in the P-type doping region, and the depth of the P-type doping region is greater than the depth of the dummy trench gate. When the PN junction formed by the N-type drift region and the P-type doping region is reverse biased, the depth of the depletion line of the PN junction in the P-type doping region is greater than the depth of the dummy trench gate; The P-type doping region is further provided with other true trench gates, and the depth of the P-type doping region is greater than the depth of the other true trench gates; When a PN junction formed by the N-type drift region and the P-type doping region is reverse biased, a depletion line depth of the PN junction in the P-type doping region is greater than a depth of the remaining true trench gates.

2. The IGBT device structure of the simplified driving circuit according to claim 1, characterized in that: The non-doped region of the N-type drift region is provided with an N+ source region, a P-type base region and a carrier storage region from top to bottom, and the true trench gate located in the non-doped region penetrates the N+ source region and the P-type base region and extends into the carrier storage region.

3. The IGBT device structure of the simplified driving circuit according to claim 2, characterized in that: It also includes a dielectric layer formed above the N-type drift region and an emitter metal layer formed above the dielectric layer. The emitter metal layer partially penetrates the dielectric layer and extends into the P-type base region.

4. The IGBT device structure of the simplified driving circuit according to claim 1, characterized in that: The number of the dummy trench gates on both sides of each true trench gate is greater than or equal to one.

5. The IGBT device structure of the simplified driving circuit according to claim 1, characterized in that: The invention also includes a buffer layer formed under the N-type drift region and a collector layer formed under the buffer layer.

6. The IGBT device structure of the simplified driving circuit according to claim 1, characterized in that: A depth of a depletion line of a PN junction formed by the N-type drift region and the P-type doping region in the P-type doping region is smaller than a depth of the P-type doping region.

7. An IGBT device structure with a simplified driving circuit, characterized in that: An emitter metal layer, a dielectric layer, an N-type drift region, a buffer layer and a collector layer are sequentially arranged from top to bottom, and also include a true trench gate and a dummy trench gate arranged in the N-type drift region, and both sides of each true trench gate are the dummy trench gates; Wherein, the N-type drift region is formed with P-type doped regions arranged at intervals, and the non-doped region between the adjacent P-type doped regions is sequentially arranged with an N+ source region, a P-type base region and a carrier storage region from top to bottom; One of the true trench gates penetrates the N+ source region and the P-type base region and extends into the carrier storage region, and the remaining true trench gates and dummy trench gates are all arranged in the P-type doping region, and the depth of the P-type doping region is greater than the depth of the dummy trench gates; A depletion line depth of a PN junction formed by the N-type drift region and the P-type doping region in the P-type doping region is greater than a depth of the dummy trench gate.

8. A method for preparing an IGBT device structure of a simplified driving circuit according to any one of claims 1 to 6 or claim 7, characterized in that: include: Providing an N-type substrate, the N-type substrate having a first surface and a second surface opposite to each other; Performing P-type doping diffusion on the first surface of the N-type substrate to form P-type doping regions arranged at intervals, and forming non-doping regions between adjacent P-type doping regions; forming a carrier storage region in a non-doped region of the N-type substrate; A true trench gate and a dummy trench gate are formed in the N-type substrate, wherein one true trench gate is disposed in the non-doped region, the dummy trench gates are all disposed in the P-type doped region, the depth of the dummy trench gate is less than the depth of the P-type doped region, and the remaining true trench gates are further disposed in the P-type doped region; forming a P-type base region and an N+ source region in the non-doped region; A dielectric layer and an emitter metal layer are formed on the first surface of the N-type substrate, and a buffer layer and a collector layer are formed on the second surface of the substrate.

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