Single-button electronic switch circuit
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-06-14
- Publication Date
- 2026-08-11
AI Technical Summary
[0002]电子开关相对于机械式开关更加可靠,能够减少因机械磨损造成的开关故障,公告号;CN209488548U公开了一种单按键电子开关电路,该电路能够在单次按键按压时反馈开启/关闭信号,但该电路无法在按压结束后对开/关信号进行反馈以防止单按键电子开关因长按使长按指令介入时造成开关信号的误反馈,同时该电路在关闭信号反馈后,未断电情况下电路始终处于非平衡状态,无法在关闭信号反馈后释放整个电路信号,恢复电路初始平衡状态
[0011]本发明可以在按压结束后对开/关信号进行反馈,防止单按键电子开关因长按使长按指令介入时造成开关信号的误反馈,同时在关闭信号反馈后对整个开关电路进行信号释放使电路恢复到初始的平衡状态。
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Figure CN118554936B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of push-button switches, and particularly to a single-button electronic switch circuit. Background Technology
[0002] Electronic switches are more reliable than mechanical switches, reducing switch failures caused by mechanical wear. Announcement No. CN209488548U discloses a single-button electronic switch circuit that can provide an on / off signal upon a single button press. However, this circuit cannot provide feedback on the on / off signal after the button press ends to prevent false feedback of the switch signal when the long-press command is triggered. Furthermore, after the off signal feedback, the circuit remains in an unbalanced state without power interruption, and cannot release the entire circuit signal and restore the initial balanced state after the off signal feedback. Summary of the Invention
[0003] To address the aforementioned technical problems, the present invention aims to provide a single-button electronic switch circuit, including a control circuit. The control circuit includes a first resistor R1, a second resistor R2, a switch S1, a first MOSFET Q1, and a second MOSFET Q2. One end of the first resistor R1 is connected to a power supply, and one end of the second resistor R2 is connected to the other end of the first resistor R1. The source of the first MOSFET Q1 and the drain of the second MOSFET Q2 are connected, and the gate of the first MOSFET Q1 and the gate of the second MOSFET Q2 are connected. The switch signal output terminal OUT is located between the gate of the first MOSFET Q1 and the gate of the second MOSFET Q2. One end of the switch S1 is connected between the first resistor R1 and the second resistor R2, and the other end of the switch S1 is connected between the source of the first MOSFET Q1 and the drain of the second MOSFET Q2. The other end of the second resistor R2 is connected to a ground terminal.
[0004] Furthermore, the control circuit also includes a first diode D1, a second diode D2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, and a third MOSFET Q3. The anode of the first diode D1 is connected to the drain of the first MOSFET Q1. One end of the third resistor R3 is connected to the power supply. One end of the fourth resistor R4 is connected to the other end of the third resistor R3. One end of the fifth resistor R5 is connected to the power supply. One end of the sixth resistor R6 is connected to the other end of the fifth resistor R5. One end of the seventh resistor R7 is connected to the power supply. One end of the eighth resistor R8 is connected to the other end of the seventh resistor R7. The non-inverting input of the first operational amplifier U1 is connected to the... Between resistor R1 and resistor R2, the inverting input of the first operational amplifier U1 is connected between resistor R5 and resistor R6. The output of the first operational amplifier U1 is connected to the anode of the second diode D2. The cathode of the second diode D2 is connected between resistor R3 and resistor R4. The cathode of the first diode D1 is connected between the cathode of the second diode D2 and resistor R3. The gate of the third MOSFET Q3 is connected between the output of the first operational amplifier U1 and the anode of the second diode D2. The drain of the third MOSFET Q3 is connected between resistor R7 and resistor R8. The other ends of resistors R4, R6, and R8 are connected to ground.
[0005] Furthermore, the control circuit also includes a third diode D3, a fourth transistor Q4, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a second operational amplifier U2, and a switch signal output terminal OUT. The anode of the third diode D3 is connected between the drain of the first MOSFET Q1 and the anode of the first diode D1. The cathode of the third diode D3 is connected to the base of the fourth transistor Q4. The emitter of the fourth transistor Q4 is connected to the source of the third MOSFET Q3. One end of the ninth resistor R9 is connected between the base of the fourth transistor Q4 and the cathode of the third diode D3. One end of the tenth resistor R10 is connected to the collector of the fourth transistor Q4. The second operational amplifier U2... The non-inverting input of the second operational amplifier U2 is connected between the collector of the fourth transistor Q4 and the tenth resistor R10. One end of the eleventh resistor R11 is connected to the power supply. One end of the twelfth resistor R12 is connected to the other end of the eleventh resistor R11. The inverting input of the second operational amplifier U2 is connected between the eleventh resistor R11 and the twelfth resistor R12. The output of the second operational amplifier U2 is connected between the gate of the first MOSFET Q1 and the gate of the second MOSFET Q2. A switching signal output terminal OUT is provided between the output of the second operational amplifier U2, the gate of the first MOSFET Q1, and the gate of the second MOSFET Q2. The other ends of the ninth resistor R9, the tenth resistor R10, and the twelfth resistor R12 are connected to the ground terminal.
[0006] Furthermore, the control circuit also includes a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, a seventeenth resistor R17, an eighteenth resistor R18, a fourth diode D4, a fifth diode D5, a sixth diode D6, a seventh diode D7, a fifth MOSFET Q5, a third operational amplifier U3, and a fourth operational amplifier U4. One end of the thirteenth resistor R13 is connected to the power supply, one end of the fourteenth resistor R14 is connected to the other end of the thirteenth resistor R13, one end of the fifteenth resistor R15 is connected to the power supply, and the sixteenth resistor R16... One end of resistor R16 is connected to the other end of the fifteenth resistor R15. The inverting input of the third operational amplifier U3 is connected between the thirteenth resistor R13 and the fourteenth resistor R14. The non-inverting input of the third operational amplifier U3 is connected between the fifteenth resistor R15 and the sixteenth resistor R16. The anode of the fourth diode D4 is connected to the source of the second MOSFET Q2. The cathode of the fourth diode D4 is connected between the fifteenth resistor R15, the sixteenth resistor R16, and the non-inverting input of the fourth operational amplifier U4. The anode of the fifth diode D5 is connected to the output terminal of the third operational amplifier U3. The cathode is connected between the fifteenth resistor R15 and the sixteenth resistor R16. The gate of the fifth MOSFET Q5 is connected between the output of the third operational amplifier U3 and the anode of the fifth diode D5. The drain of the fifth MOSFET Q5 is connected between the seventh resistor R7 and the eighth resistor R8. The source of the fifth MOSFET Q5 is connected to the emitter of the sixth transistor Q6. The base of the sixth transistor Q6 is connected to one end of the seventeenth resistor R17. The anode of the sixth diode D6 is connected between the anode of the fourth diode D4 and the source of the second MOSFET Q2. The cathode of the sixth diode D6 is connected to the sixth transistor Q6. Between the base of resistor 6 and resistor 17 R17, the collector of transistor 6 Q6 is connected to one end of resistor 18 R18. The non-inverting input of operational amplifier 4 U4 is connected between the collector of transistor 6 Q6 and resistor 18 R18. The inverting input of operational amplifier 4 U4 is connected between resistor 11 R11 and resistor 12 R12. The output of operational amplifier 4 U4 is connected to the anode of diode 7 D7. The cathode of diode 7 D7 is connected between resistor 5 R5 and resistor 6 R6. The other ends of resistors 14 R14 and 16 R16 are connected to ground.
[0007] Furthermore, the control circuit also includes a fifth operational amplifier U5, a seventh MOSFET Q7, an eighth MOSFET Q8, a nineteenth resistor R19, a twentieth resistor R20, an eighth diode D8, and a first capacitor C1. The source of the seventh MOSFET Q7 is connected between the seventh resistor R7 and the eighth resistor R8, the drain of the seventh MOSFET Q7 is connected to one end of the first capacitor C1, and the gate of the seventh MOSFET Q7 is connected between the output of the fourth operational amplifier U4 and the anode of the seventh diode D7. The drain of the eighth MOSFET Q8 is connected between the drain of the seventh MOSFET Q7 and the first capacitor C1, the source of the eighth MOSFET Q8 is connected to one end of the nineteenth resistor R19, and the gate of the eighth MOSFET Q8 is connected to the first capacitor C1. The output of the fourth operational amplifier U4 is connected to the anode of the seventh diode D7. The inverting input of the fifth operational amplifier U5 is connected between the eleventh resistor R11 and the twelfth resistor R12. The non-inverting input of the fifth operational amplifier U5 is connected between the source of the eighth MOSFET Q8 and the nineteenth resistor R19. The output of the fifth operational amplifier U5 is connected to one end of the twentieth resistor R20. The anode of the eighth diode D8 is connected between the output of the fifth operational amplifier U5 and the twentieth resistor R20. The cathode of the eighth diode D8 is connected between the thirteenth resistor R13, the fourteenth resistor R14, and the inverting input of the third operational amplifier U3. The other ends of the first capacitor C1, the nineteenth resistor R19, and the twentieth resistor R20 are connected to the ground terminal.
[0008] Furthermore, the control circuit also includes a second resistor R21, one end of which is connected between the gate of the first MOSFET Q1, the gate of the second MOSFET Q2, and the output terminal of the second operational amplifier U2, and the other end of which is connected to the ground terminal.
[0009] Furthermore, the control circuit also includes a second resistor R22, one end of which is connected between the output of the fourth operational amplifier U4, the gate of the seventh MOS transistor Q7, the gate of the eighth MOS transistor Q8, and the anode of the seventh diode D7, and the other end of which is connected to the ground terminal.
[0010] The advantages of this invention compared to the prior art are:
[0011] This invention can provide feedback on the on / off signal after the press is completed, preventing false feedback of the switch signal caused by the long press command when the single-button electronic switch is pressed for a long time. At the same time, after the signal feedback is turned off, the entire switch circuit is released to restore the circuit to its initial equilibrium state. Attached Figure Description
[0012] To more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the prior art and embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0013] Figure 1 This is an overall structural diagram provided for the present invention. Detailed Implementation
[0014] To make the objectives and advantages of the present invention clearer, the present invention will be specifically described below in conjunction with embodiments. It should be understood that the following text is only used to describe one or more specific embodiments of the present invention and does not strictly limit the scope of protection specifically claimed by the present invention.
[0015] Referring to the accompanying drawings, in this embodiment, the output signal of the first operational amplifier U1 is an on signal, and the output signal of the third operational amplifier U3 is an off signal. The on / off signal is fed back to the actuator via the switch signal output terminal OUT. In the initial state, the first operational amplifier U1 and the third operational amplifier U3 are off, the signal between the third resistor R3 and the fourth resistor R4 is fed back to the non-inverting input of the first operational amplifier U1, and the signal between the fifth resistor R5 and the sixth resistor R6 is fed back to the inverting input of the first operational amplifier U1. When the switch S1 is closed, the signal between the first resistor R1 and the second resistor R2 passes through the source of the first MOSFET Q1, the drain of the first MOSFET Q1, and the inverting input of the first diode D1. The signal is fed between the third resistor R3 and the fourth resistor R4, increasing the signal amplitude between them. This causes the first operational amplifier U1 to output. The output signal of the first operational amplifier U1 is then fed back between the third resistor R3 and the fourth resistor R4 via the second diode D2, ensuring that the first operational amplifier U1 outputs normally. Simultaneously, the output signal of the first operational amplifier U1 is fed back to the gate of the third MOSFET Q3. The voltage difference between the gate and source of the third MOSFET Q3 exceeds the conduction threshold, causing the third MOSFET Q3 to conduct. The output signal of the first operational amplifier U1 then becomes an enable signal, thus providing an enable signal when the operator presses the button for the first time.
[0016] Referring to the accompanying drawings, in this embodiment, considering that the single-button electronic switch is often a non-switching signal when pressed for a long time, this operation state is used to distinguish between long-press operations and single-press operations. When switch S1 is closed, the signal between the first resistor R1 and the second resistor R2 passes through the source and drain of the first MOSFET Q1, the third diode D3, and the ninth resistor R9 to the ground circuit. At the same time, the signal between the seventh resistor R7 and the eighth resistor R8 is fed back to the emitter of the fourth transistor Q4 through the drain and source of the third MOSFET Q3. When the operator completes a single press operation, the signal from the source of the third MOSFET Q3 passes through the emitter and base of the fourth transistor Q4, and the ninth resistor R9 to the ground circuit. The emitter and base of the fourth transistor Q4 are forward biased, and the fourth transistor Q4 is turned on. The signal from the source of the third MOSFET Q3 passes through the emitter and collector of the fourth transistor Q4, and the tenth resistor R9. The signal from resistor 10 to the ground terminal loop, between resistors 11 and 12, is fed back to the inverting input of the second operational amplifier U2. The second operational amplifier U2 outputs a signal, which is simultaneously fed back to the gate of the first MOSFET Q1 and the gate of the second MOSFET Q2. Resistor R21 is used to discharge the parasitic capacitance of the gates of the first MOSFET Q1 and the second MOSFET Q2. When the voltage difference between the gate and source of the first MOSFET Q1 is higher than the conduction threshold, the first MOSFET Q1 is turned off. When the voltage difference between the gate and source of the second MOSFET Q2 is higher than the conduction threshold, the second MOSFET Q2 is turned on. At the same time, the signal is fed back to the actuator via the switch signal output terminal OUT. The switch signal output terminal OUT outputs a high level signal, so that when the operator presses the button for the first time and after the press ends, the switch signal output terminal OUT can feed back an open signal, thereby preventing false feedback of the open signal.
[0017] Referring to the accompanying drawings, in this embodiment, when switch S1 is closed again, the signal between the first resistor R1 and the second resistor R2 is fed back to the fifteenth resistor R15 and the sixteenth resistor R16 via the drain and source of the second MOSFET Q2 and the fourth diode D4. The signal amplitude between the fifteenth resistor R15 and the sixteenth resistor R16 is increased. The signal between the thirteenth resistor R13 and the fourteenth resistor R14 is fed back to the inverting input of the third operational amplifier U3. The third operational amplifier U3 outputs, and the signal at the output of the third operational amplifier U3 is fed back to the fifteenth resistor R15 and the sixteenth resistor R16 via the fifth diode D5. The third operational amplifier U3 is set to normal output, and the output signal of the third operational amplifier U3 is fed back to the gate of the fifth MOSFET Q5. The voltage difference between the gate and source of the fifth MOSFET Q5 is higher than the conduction threshold, so the fifth MOSFET Q5 is turned on, and the output signal of the third operational amplifier U3 is the off signal. The signal between the first resistor R1 and the second resistor R2 passes through the drain and source of the second MOSFET Q2, the sixth diode D6, and the seventeenth resistor R17 to the ground circuit. At the same time, the signal between the seventh resistor R7 and the eighth resistor R8 passes through the drain and source of the fifth MOSFET Q5. The signal is fed to the emitter of transistor Q6, so that a shutdown signal can be fed back when the operator presses the button a second time. When the operator finishes pressing the button a second time, the source signal of transistor Q5 passes through the emitter, base, and seventeenth resistor R17 to the ground circuit. The emitter and base of transistor Q6 are forward biased, and transistor Q6 is turned on. The source signal of transistor Q5 passes through the emitter, collector, and eighteenth resistor R18 to the ground circuit. The signal between the collector of transistor Q6 and eighteenth resistor R18... The signal is fed back to the non-inverting input of the fourth operational amplifier U4. The signal between the eleventh resistor R11 and the twelfth resistor R12 is fed back to the inverting input of the fourth operational amplifier U4. The fourth operational amplifier U4 outputs, and the signal at the output of the fourth operational amplifier U4 is fed back to the area between the fifth resistor R5 and the sixth resistor R6 via the seventh diode D7. The first operational amplifier U1 is turned off, thereby releasing the turn-on signal of the first operational amplifier U1. The switch signal output terminal OUT is low, the first MOSFET Q1 is turned on, and the second MOSFET Q2 is turned off, so that the switch signal output terminal OUT can feed back the turn-off signal after the operator completes the second pressing operation.
[0018] Referring to the accompanying drawings, in this embodiment, considering that after the shutdown signal feedback, the feedback terminal of the on / off signal will always be in an unbalanced state when the circuit is not powered off, the shutdown signal feedback terminal will continuously output a shutdown signal. The circuit remaining in this state for a long time will accelerate the lifespan of the electrical components at the shutdown signal feedback terminal. The signal between the seventh resistor R7 and the eighth resistor R8 causes the potential of the first capacitor C1 to rise through the source and drain of the seventh MOSFET Q7. When the third operational amplifier U3 feeds back the shutdown signal, the output signal of the fourth operational amplifier U4 is fed back to the gate of the seventh MOSFET Q7 and the gate of the eighth MOSFET Q8. The voltage difference between the gate and source of the seventh MOSFET Q7 is higher than the conduction threshold, so the seventh MOSFET Q7 is turned off. The voltage difference between the gate and source of the eighth MOSFET Q8 is higher than the conduction threshold, so the eighth MOSFET Q7 is turned off. When MOSFET Q8 is turned on, the second resistor R22 discharges the parasitic capacitances of the gates of the seventh MOSFET Q7 and the eighth MOSFET Q8. The signal at the first capacitor C1 passes through the drain and source of the eighth MOSFET Q8, through the nineteenth resistor R19, to the ground circuit. The signal between the eleventh resistor R11 and the twelfth resistor R12 is fed back to the inverting input of the fifth operational amplifier U5, and the fifth operational amplifier U5 outputs. The signal at the output of the fifth operational amplifier U5 passes through the twentieth resistor R20 to the ground circuit. At the same time, the signal between the output of the fifth operational amplifier U5 and the twentieth resistor R20 is fed back to the inverting input of the third operational amplifier U3, and the third operational amplifier U3 is turned off. The shutdown signal of the third operational amplifier U3 is released, thus releasing the signal of the entire circuit after the shutdown signal is sent, so that the circuit returns to the initial equilibrium state.
[0019] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within the present invention. No markings in the claims should be construed as limiting the scope of the claims.
Claims
1. Single push button electronic switch circuit comprising a control circuit, characterized in that, The control circuit includes a first resistor, a second resistor, a switch, a first MOSFET, and a second MOSFET. One end of the first resistor is connected to a power supply, one end of the second resistor is connected to the other end of the first resistor, the source of the first MOSFET and the drain of the second MOSFET are connected, the gate of the first MOSFET and the gate of the second MOSFET are connected, the switch signal output terminal is located between the gate of the first MOSFET and the gate of the second MOSFET, one end of the switch is connected between the first resistor and the second resistor, the other end of the switch is connected between the source of the first MOSFET and the drain of the second MOSFET, and the other end of the second resistor is connected to a ground terminal. The control circuit further includes a first diode, a second diode, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, and a third MOSFET. The anode of the first diode is connected to the drain of the first MOSFET. One end of the third resistor is connected to the power supply. One end of the fourth resistor is connected to the other end of the third resistor. One end of the fifth resistor is connected to the power supply. One end of the sixth resistor is connected to the other end of the fifth resistor. One end of the seventh resistor is connected to the power supply. One end of the eighth resistor is connected to the other end of the seventh resistor. The non-inverting input of the first operational amplifier is connected between the first and second resistors. The inverting input of the first operational amplifier is connected between the fifth and sixth resistors. The output of the first operational amplifier is connected to the anode of the second diode. The cathode of the second diode is connected between the third and fourth resistors. The cathode of the first diode is connected between the cathode of the second diode and the third resistor. The gate of the third MOSFET is connected between the output of the first operational amplifier and the anode of the second diode. The drain of the third MOSFET is connected between the seventh and eighth resistors. The other ends of the fourth, sixth, and eighth resistors are connected to the ground terminal. The control circuit further includes a third diode, a fourth transistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a second operational amplifier, and a switch signal output terminal. The anode of the third diode is connected between the drain of the first MOSFET and the anode of the first diode. The cathode of the third diode is connected to the base of the fourth transistor. The emitter of the fourth transistor is connected to the source of the third MOSFET. One end of the ninth resistor is connected between the base of the fourth transistor and the cathode of the third diode. One end of the tenth resistor is connected to the collector of the fourth transistor. The non-inverting input of the second operational amplifier is connected between the collector of the fourth transistor and the tenth resistor. One end of the eleventh resistor is connected to the power supply. One end of the twelfth resistor is connected to the other end of the eleventh resistor. The inverting input of the second operational amplifier is connected between the eleventh and twelfth resistors. The output terminal of the second operational amplifier is connected between the gate of the first MOSFET and the gate of the second MOSFET. A switch signal output terminal is provided between the output terminal of the second operational amplifier, the gate of the first MOSFET, and the gate of the second MOSFET. The other ends of the ninth, tenth, and twelfth resistors are connected to the ground terminal. The control circuit also includes a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a fourth diode, a fifth diode, a sixth diode, a seventh diode, a fifth MOSFET, a third operational amplifier, and a fourth operational amplifier. One end of the thirteenth resistor is connected to the power supply, one end of the fourteenth resistor is connected to the other end of the thirteenth resistor, one end of the fifteenth resistor is connected to the power supply, and one end of the sixteenth resistor is connected to the other end of the fifteenth resistor. The inverting input of the third operational amplifier is connected between the thirteenth and fourteenth resistors, and the non-inverting input of the third operational amplifier is connected between the fifteenth and sixteenth resistors. The anode of the fourth diode is connected to the source of the second MOSFET, and the cathode of the fourth diode is connected between the fifteenth and sixteenth resistors and the non-inverting input of the fourth operational amplifier. The anode of the fifth diode is connected to the output terminal of the third operational amplifier, and the cathode of the fifth diode is connected to the fifteenth resistor. Between resistors 1 and 16, the gate of the fifth MOSFET is connected between the output of the third operational amplifier and the anode of the fifth diode; the drain of the fifth MOSFET is connected between resistors 7 and 8; the source of the fifth MOSFET is connected to the emitter of the sixth transistor; the base of the sixth transistor is connected to one end of resistor 17; the anode of the sixth diode is connected between the anode of the fourth diode and the source of the second MOSFET; the cathode of the sixth diode is connected between the base of the sixth transistor and resistor 17; the collector of the sixth transistor is connected to one end of resistor 18; the non-inverting input of the fourth operational amplifier is connected between the collector of the sixth transistor and resistor 18; the inverting input of the fourth operational amplifier is connected between resistors 11 and 12; the output of the fourth operational amplifier is connected to the anode of the seventh diode; the cathode of the seventh diode is connected between resistors 5 and 6; and the other ends of resistors 14 and 16 are connected to ground. The control circuit further includes a fifth operational amplifier, a seventh MOSFET, an eighth MOSFET, a nineteenth resistor, a twentieth resistor, an eighth diode, and a first capacitor. The source of the seventh MOSFET is connected between the seventh and eighth resistors, the drain of the seventh MOSFET is connected to one end of the first capacitor, and the gate of the seventh MOSFET is connected between the output of the fourth operational amplifier and the anode of the seventh diode. The drain of the eighth MOSFET is connected between the drain of the seventh MOSFET and the first capacitor, the source of the eighth MOSFET is connected to one end of the nineteenth resistor, and the gate of the eighth MOSFET is connected between the output of the fourth operational amplifier and the anode of the seventh diode. The inverting input of the fifth operational amplifier is connected between the eleventh and twelfth resistors, the non-inverting input of the fifth operational amplifier is connected between the source of the eighth MOSFET and the nineteenth resistor, the output of the fifth operational amplifier is connected to one end of the twentieth resistor, the anode of the eighth diode is connected between the output of the fifth operational amplifier and the twentieth resistor, and the cathode of the eighth diode is connected between the thirteenth, fourteenth, and inverting inputs of the third operational amplifier. The other ends of the first capacitor, the nineteenth resistor, and the twentieth resistor are connected to ground.
2. The one-key electronic switch circuit according to claim 1, wherein, The control circuit also includes a second resistor, one end of which is connected between the gate of the first MOS transistor, the gate of the second MOS transistor, and the output terminal of the second operational amplifier, and the other end of which is connected to the ground terminal.
3. The one-key electronic switch circuit according to claim 2, wherein, The control circuit also includes a second resistor, one end of which is connected between the output of the fourth operational amplifier, the gate of the seventh MOS transistor, the gate of the eighth MOS transistor, and the anode of the seventh diode, and the other end of which is connected to the ground terminal.
Citation Information
Patent Citations
Single-key electronic switch circuit
CN209488548U
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CN117792369A
Multi-key reset circuit
CN118034472A