A switched capacitor buck pulse power supply for electric discharge machining

Abstract

The application discloses a switched capacitor Buck pulse power supply for electric spark machining. The power supply comprises a switched capacitor voltage pump-up circuit, a direct current voltage source, an FPGA control circuit and a driving circuit. The switched capacitor voltage pump-up circuit is used for gap breakdown and machining discharge of electric spark machining. The direct current voltage source is used for supplying power for the switched capacitor voltage pump-up circuit. The FPGA control circuit is used for providing a control signal for the driving circuit. The driving circuit is used for controlling the conduction and turn-off of a switch tube in the switched capacitor voltage pump-up circuit after amplifying the control signal output by the FPGA. The application can provide required voltage conversion in different working stages, and relieve the problems of high and low voltage conversion complexity and duty cycle in the prior art. By increasing the number of switched capacitors, different breakdown voltage requirements can be met, and the voltage stress of devices is reduced for optimizing the circuit design.

Description

Technical Field

[0001] This invention relates to the field of pulse power supplies for electrical discharge machining (EDM), and particularly to a switched capacitor Buck pulse power supply for EDM. Background Technology

[0002] With the progress of global industrialization, the demand for independently controlled critical components is growing in key industries such as aerospace, microelectronics, and automotive manufacturing. Electrical discharge machining (EDM) is a non-contact machining technology that uses controlled electrical energy to generate a discharge spark between electrodes and the workpiece to remove material. Compared to traditional machining methods, this technology can handle special metal materials with high hardness, strength, and melting point, as well as process some complex and uniquely shaped precision parts. EDM consists of three main stages: breakdown delay, discharge machining, and deionization. In the breakdown delay stage, a high voltage is supplied to the gap by a pulsed power supply to achieve gap breakdown; in the discharge machining stage, the gap exhibits a quasi-continuous voltage of approximately 20V; in the deionization stage, the pulsed power supply stops supplying power, allowing the gap to gradually return to an insulating state. The single-stage pulsed power supply used in EDM cannot have a capacitor at its output during the discharge machining stage. To ensure machining effect and efficiency, it is necessary to ensure that the inductor current is equal to the gap current and that the gap current remains continuous. Summary of the Invention

[0003] To address the shortcomings of existing technologies, this invention provides a switched-capacitor Buck pulse power supply for electrical discharge machining (EDM). This power supply can output high voltage during the breakdown delay phase and a lower voltage during the discharge machining phase. It also meets the requirements of EDM with large discharge current and low discharge current ripple. The switched-capacitor pulse power supply solves the problems of complex high-low voltage composite topologies and the output capacitor issues of single-stage pulse power supplies. Furthermore, it offers advantages such as no right-half-plane zero point, simple control circuitry, fast dynamic response, inductor current equal to load current, high machining efficiency, and low stress on the switching transistor.

[0004] To solve the above-mentioned technical problems, the present invention adopts the following technical solution: a switched-capacitor Buck pulse power supply for electrical discharge machining, specifically comprising: a switched-capacitor voltage boosting circuit, a DC voltage source, an FPGA control circuit, and a drive circuit. The switched-capacitor voltage boosting circuit is used for gap breakdown and machining discharge in electrical discharge machining. The DC voltage source is used to output DC voltage to power the switched-capacitor voltage boosting circuit. The FPGA control circuit is used to provide control signals to the drive circuit. The drive circuit is used to amplify the control signals output by the FPGA and control the on and off of the switching transistors in the switched-capacitor voltage boosting circuit.

[0005] Preferably, the switched capacitor voltage booster circuit mainly comprises: a DC voltage source (Vin), a first switch (QA1), a second switch (QB1), a third switch (QC1), a fourth switch (QA2), a fifth switch (QB2), a sixth switch (QC2), a seventh switch (QA3), an eighth switch (QB3), a ninth switch (QC3), a tenth switch (Q1), an eleventh switch (Q2), a diode (D), a first capacitor (CF1), a second capacitor (CF2), a third capacitor (CF3), an inductor (L), and a spark gap (Vd). The positive terminal of the DC voltage source (Vin) is connected to the source terminal of the first switch (QA1). The drain of the first switch (QA1) is connected to the source of the fourth switch (QA2). The drain of the fourth switch (QA2) is connected to the source of the seventh switch (QA3). The drain of the seventh switch (QA3) is connected to the drain of the tenth switch (Q1). The source of the tenth switch (Q1) is connected to the left end of the inductor (L). The right end of the inductor (L) is connected to the left end of the diode (D). The right end of the diode (D) is connected to the positive terminal of the spark gap (Vd). The negative terminal of the spark gap (Vd) is connected to the negative terminal of the DC voltage source (Vin). The drain of the second switch (QB1) is connected to the positive terminal of the DC voltage source (Vin) and the source of the first switch (QA1). The points are connected as follows: the source of the second switch (QB1) is connected to the drain of the third switch (QC1); the source of the third switch (QC1) is connected to the connection point between the negative terminal of the spark gap (Vd) and the negative terminal of the DC voltage source (Vin); the positive terminal of the first capacitor (CF1) is connected to the connection point between the drain of the first switch (QA1) and the source of the fourth switch (QA2); the negative terminal of the first capacitor (C1) is connected to the connection point between the source of the second switch (QB1) and the source of the sixth switch (QC2); the drain of the fifth switch (QB2) is connected to the connection point between the positive terminal of the first capacitor (CF1) and the source of the fourth switch (QA2); and the source of the fifth switch (QB2) is connected to the connection point between the positive terminal of the first capacitor (CF1) and the source of the fourth switch (QA2). The drain of the sixth switch (QC2) is connected to the source of the sixth switch (QC2). The source of the sixth switch (QC2) is connected to the junction of the negative terminal of the first capacitor (C1) and the source of the second switch (QB1). The positive terminal of the second capacitor (CF2) is connected to the junction of the drain of the fourth switch (QA2) and the source of the seventh switch (QA3). The negative terminal of the second capacitor (CF2) is connected to the junction of the source of the fifth switch (QB2) and the source of the ninth switch (QC3). The drain of the eighth switch (QB3) is connected to the junction of the positive terminal of the second capacitor (CF2) and the source of the seventh switch (QA3). The source of the eighth switch (QB3) is connected to the drain of the ninth switch (QC3).The source of the ninth switch (QC3) is connected to the junction of the negative terminal of the second capacitor (CF2) and the source of the fifth switch (QB2). The positive terminal of the third capacitor (CF3) is connected to the junction of the drain of the seventh switch (QA3) and the drain of the tenth switch (Q1). The negative terminal of the third capacitor (CF3) is connected to the junction of the source of the eighth switch (QB3) and the drain of the ninth switch (QC3). The source of the tenth switch (Q1) is connected to the junction of the drain of the eleventh switch (Q2) and the left end of the inductor (L). The source of the eleventh switch (Q2) is connected to the junction of the source of the eighth switch (QB3) and the drain of the ninth switch (QC3). In this circuit, the first switch (QA1), the second switch (QB1), the third switch (QC1), and the first capacitor (CF1) can be considered as a module. The voltage boost factor of the switched capacitor voltage boost circuit can be increased by increasing the number of these modules.

[0006] Preferably, the first switch (QA1), the second switch (QB1), the third switch (QC1), the fourth switch (QA2), the fifth switch (QB2), the sixth switch (QC2), the seventh switch (QA3), the eighth switch (QB3), and the ninth switch (QC3) are MOSFETs of model IPP018N10N5 from Infineon Technologies, the tenth switch (Q1) and the eleventh switch (Q2) are MOSFETs of model IPP076N15N5 from Infineon Technologies, the diode (D) is a diode of model CI30S65D3L2 from Tokmas Technologies, and the inductor (L) is a flat copper wire inductor.

[0007] Preferably, a single cycle of electrical discharge machining includes the following steps:

[0008] Step S1: During the breakdown delay stage, the gap is not broken down and remains open. The switched capacitor pulse power supply operates in boost mode, which has two operating modes. In the first operating mode, the FPGA control circuit generates a control signal, which, after passing through the drive circuit, controls the first switch (QA1), fourth switch (QA2), and seventh switch (QA3) to turn on, the second switch (QB1), fifth switch (QB2), and eighth switch (QB3) to turn off, the third switch (QC1), sixth switch (QC2), and ninth switch (QC3) to turn on, the tenth switch (Q1) to turn on, and the eleventh switch (Q2) to turn off. The DC voltage source (Vin) charges the voltage across the first capacitor (CF1), second capacitor (CF2), and third capacitor (CF3) to Vin. In the second operating mode... In this state, the FPGA control circuit generates a control signal, which, after passing through the drive circuit, controls the first switch (QA1), the fourth switch (QA2), and the seventh switch (QA3) to turn off, the second switch (QB1), the fifth switch (QB2), and the eighth switch (QB3) to turn on, the third switch (QC1), the sixth switch (QC2), and the ninth switch (QC3) to turn off, the tenth switch (Q1) to turn on, and the eleventh switch (Q2) to turn off. The first capacitor (CF1), the second capacitor (CF2), and the third capacitor (CF3) are equivalent to a voltage source with a voltage of Vin. The DC voltage source (Vin) is connected in series with the first capacitor (CF1), the second capacitor (CF2), and the third capacitor (CF3) to output a high voltage of 4Vin (or (n+1)Vin if there are n sets of capacitors) to the gap, waiting for the gap to break down;

[0009] Step S2: After the gap is broken down, the discharge machining stage begins. The gap characteristic is a quasi-sustaining voltage source. The switched capacitor pulse power supply operates in buck mode, which has two operating modes. In the first operating mode, the FPGA control circuit generates a control signal, which, after passing through the drive circuit, controls the first switch (QA1), fourth switch (QA2), and seventh switch (QA3) to turn on, the second switch (QB1), fifth switch (QB2), and eighth switch (QB3) to turn off, the third switch (QC1), sixth switch (QC2), and ninth switch (QC3) to turn on, the tenth switch (Q1) to turn on, and the eleventh switch (Q2) to turn off. The gap current rises rapidly. When the current value rises to the current set by the FPGA... After setting the reference value, the switched capacitor pulse power supply operates in the second working mode. The FPGA control circuit generates a control signal, which, after passing through the drive circuit, controls the first switch (QA1), the fourth switch (QA2), and the seventh switch (QA3) to turn on, the second switch (QB1), the fifth switch (QB2), and the eighth switch (QB3) to turn off, the third switch (QC1), the sixth switch (QC2), and the ninth switch (QC3) to turn on, the tenth switch (Q1) to turn off, and the eleventh switch (Q2) to turn on. The gap current freewheels through the third switch (QC1), the sixth switch (QC2), the ninth switch (QC3), and the eleventh switch (Q2). The above two working modes are repeated to perform electrical discharge machining on the spark gap.

[0010] Step S3: After the discharge machining stage, the deionization stage begins. The FPGA control circuit generates a control signal, which, after passing through the drive circuit, controls the first switch (QA1), the fourth switch (QA2), and the seventh switch (QA3) to turn on, the second switch (QB1), the fifth switch (QB2), and the eighth switch (QB3) to turn off, the third switch (QC1), the sixth switch (QC2), and the ninth switch (QC3) to turn on, the tenth switch (Q1) to turn off, and the eleventh switch (Q2) to turn on. Energy in the inductor (L) is released into the gap to deionize. After the energy is exhausted, the gap restores its insulation characteristics, and the voltage across the gap is zero.

[0011] Step S4: Repeat steps S1 to S3 above to enter the next processing cycle.

[0012] Compared with the prior art, the present invention has the following beneficial effects:

[0013] 1. The present invention proposes a switched capacitor Buck pulse power supply for electrical discharge machining, which can solve the problems of complex high and low voltage composite topology and low duty cycle caused by large input and output voltage difference of single-stage power supply.

[0014] 2. The switched capacitor Buck pulse power supply proposed in this invention can meet the requirements of pulse power supply step-up and step-down in electrical discharge machining. It outputs a high voltage breakdown gap during the breakdown delay stage and a low voltage for discharge machining during the discharge machining stage. The topology is simpler and it efficiently and reliably meets the requirements of pulse power supply for electrical discharge machining.

[0015] 3. The switched capacitor Buck pulse power supply for electrical discharge machining proposed in this invention can output a higher voltage by increasing the number of switched capacitor layers, thus meeting the needs of applications with high breakdown voltage.

[0016] 4. The present invention proposes a switched capacitor Buck pulse power supply for electrical discharge machining, which reduces the voltage stress on the switching devices by optimizing the connection method of the switched capacitor circuit.

[0017] 5. The switched capacitor Buck pulse power supply proposed in this invention for electrical discharge machining has no right half-plane zero point, simple control circuit, and fast dynamic response.

[0018] 6. The present invention proposes a switched capacitor Buck pulse power supply for electrical discharge machining, wherein the control circuit is programmed through FPGA to meet the needs of different machining scenarios. Attached Figure Description

[0019] Figure 1 This invention provides a switched capacitor Buck pulse power supply frame for electrical discharge machining.

[0020] Figure 2 This invention presents a switched-capacitor Buck pulse power supply topology for electrical discharge machining.

[0021] Figures 3 to 5 This is a diagram showing the working mode of the switched capacitor Buck pulse power supply for electrical discharge machining proposed in this invention.

[0022] Figure 6 This is a waveform diagram of the switched capacitor Buck pulse power supply discharge machining method for electrical discharge machining proposed in this invention. Detailed Implementation

[0023] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0024] like Figure 1As shown, this invention is a switched-capacitor Buck pulse power supply for electrical discharge machining (EDM), comprising a switched-capacitor voltage boosting circuit, a DC voltage source, an FPGA control circuit, and a drive circuit. The switched-capacitor voltage boosting circuit is used for gap breakdown and machining discharge in EDM. The DC voltage source is used to output DC voltage to power the switched-capacitor voltage boosting circuit. The FPGA control circuit is used to provide control signals to the drive circuit. The drive circuit is used to amplify the control signals output by the FPGA and control the switching transistors in the switched-capacitor voltage boosting circuit to turn on and off.

[0025] As a specific example, the switching transistors QA, QB, and QC in the circuit topology are Infineon's IPP018N10N5 MOSFETs, and the switching transistors Q1 and Q2 are Infineon's IPP076N15N5 MOSFETs. These two types of switching transistors have low RDS(on) (on-resistance). The diode is a Tokmas CI30S65D3L2 diode, and the inductor is a flat copper wire inductor. This is suitable for the switched capacitor Buck pulse power supply for electrical discharge machining described in this invention.

[0026] As a specific example, the control circuit is controlled by an FPGA (Field Programmable Gate Array). In this invention, the Cyclone IV series chip EP4CE6F17C8 from Altera is selected.

[0027] As a specific example, the driving circuit can be selected from a driver chip with dual high- and low-end driving and isolation characteristics. In this invention, the driver chip model UCC21521 from Texas Instruments is selected.

[0028] The operating state of a switched capacitor voltage booster circuit when the first switch (Q1) is off, the second switch (Q2) is on, the third switch (Q3) is on, and the fourth switch (Q4) is off is as follows: Figure 3 As shown; the operating state when the first switch (Q1) is on, the second switch (Q2) is off, the third switch (Q3) is on, and the fourth switch (Q4) is off is as follows: Figure 4 As shown; the operating state when the first switch (Q1) is off, the second switch (Q2) is on, the third switch (Q3) is off, and the fourth switch (Q4) is on is as follows: Figure 5 As shown;

[0029] like Figures 3 to 5 As shown, a single cycle of the electrical discharge machining includes the following steps:

[0030] Step S1: During the breakdown delay stage, the gap is not broken down and remains open. The switched capacitor Buck pulse power supply operates in boost mode, which has two operating modes. In the first operating mode, the FPGA control circuit generates a control signal, which, after passing through the drive circuit, controls the first switch (QA1), fourth switch (QA2), and seventh switch (QA3) to turn on, the second switch (QB1), fifth switch (QB2), and eighth switch (QB3) to turn off, the third switch (QC1), sixth switch (QC2), and ninth switch (QC3) to turn on, the tenth switch (Q1) to turn on, and the eleventh switch (Q2) to turn off. The DC voltage source (Vin) charges the voltage across the first capacitor (CF1), second capacitor (CF2), and third capacitor (CF3) to Vin. Figure 3 As shown; in the second operating mode, the FPGA control circuit generates a control signal, which, after passing through the drive circuit, controls the first switch (QA1), the fourth switch (QA2), and the seventh switch (QA3) to turn off, the second switch (QB1), the fifth switch (QB2), and the eighth switch (QB3) to turn on, the third switch (QC1), the sixth switch (QC2), and the ninth switch (QC3) to turn off, the tenth switch (Q1) to turn on, and the eleventh switch (Q2) to turn off. The first capacitor (CF1), the second capacitor (CF2), and the third capacitor (CF3) are equivalent to a voltage source with a voltage of Vin. The DC voltage source (Vin) is connected in series with the first capacitor (CF1), the second capacitor (CF2), and the third capacitor (CF3) to output a high voltage of 4Vin (or (n+1)Vin if there are n sets of capacitors) to the gap, waiting for the gap to break down, as... Figure 4 As shown;

[0031] Step S2: After the gap is broken down, the discharge machining stage begins. The gap characteristic is a quasi-sustaining voltage source. The switched capacitor Buck pulse power supply operates in buck mode, which has two operating modes. In the first operating mode, the FPGA control circuit generates a control signal, which, after passing through the drive circuit, controls the first switch (QA1), fourth switch (QA2), and seventh switch (QA3) to turn on, the second switch (QB1), fifth switch (QB2), and eighth switch (QB3) to turn off, the third switch (QC1), sixth switch (QC2), and ninth switch (QC3) to turn on, the tenth switch (Q1) to turn on, and the eleventh switch (Q2) to turn off. The gap current rises rapidly, as... Figure 3As shown; when the current value rises to the current reference value set by the FPGA, the switched capacitor Buck pulse power supply operates in the second working mode. The FPGA control circuit generates a control signal, which, after passing through the drive circuit, controls the first switch (QA1), the fourth switch (QA2), and the seventh switch (QA3) to turn on, the second switch (QB1), the fifth switch (QB2), and the eighth switch (QB3) to turn off, the third switch (QC1), the sixth switch (QC2), and the ninth switch (QC3) to turn on, the tenth switch (Q1) to turn off, and the eleventh switch (Q2) to turn on. The gap current freewheels through the third switch (QC1), the sixth switch (QC2), the ninth switch (QC3), and the eleventh switch (Q2), as shown. Figure 5 As shown; repeat the above two working modes to perform electrical discharge machining on the electrical discharge gap;

[0032] Step S3: After the discharge machining stage, the deionization stage begins. The FPGA control circuit generates a control signal, which, after passing through the drive circuit, controls the first switch (QA1), the fourth switch (QA2), and the seventh switch (QA3) to turn on, the second switch (QB1), the fifth switch (QB2), and the eighth switch (QB3) to turn off, the third switch (QC1), the sixth switch (QC2), and the ninth switch (QC3) to turn on, the tenth switch (Q1) to turn off, and the eleventh switch (Q2) to turn on. Energy in the inductor (L) is released into the gap to deionize. After the energy is exhausted, the gap restores its insulation characteristics, and the voltage across the gap is zero.

[0033] Step S4: Repeat steps S1 to S3 above to enter the next processing cycle.

[0034] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A switched-capacitor Buck pulse power supply for electrical discharge machining, characterized in that, The circuit includes a switched-capacitor buck-boost circuit, a DC voltage source, an FPGA control circuit, and a drive circuit. The switched-capacitor buck-boost circuit is used for gap breakdown and machining discharge in electrical discharge machining (EDM). The DC voltage source outputs DC voltage to power the switched-capacitor buck-boost circuit. The FPGA control circuit provides control signals to the drive circuit. The drive circuit amplifies the control signals output by the FPGA and controls the on / off state of the switching transistors in the switched-capacitor buck-boost circuit. The main components of the switched-capacitor buck-boost circuit are: a DC voltage source (Vin), a first switching transistor (QA1), a second switching transistor (QB1), a third switching transistor (QC1), a fourth switching transistor (QA2), a fifth switching transistor (QB2), a sixth switching transistor (QC2), a seventh switching transistor (QA3), an eighth switching transistor (QB3), a ninth switching transistor (QC3), a tenth switching transistor (Q1), an eleventh switching transistor (Q2), a diode (D), a first capacitor (CF1), a second capacitor (CF2), a third capacitor (CF3), an inductor (L), and an EDM gap (Vd).The positive terminal of the DC voltage source (Vin) is connected to the source of the first switching transistor (QA1). The drain of the first switching transistor (QA1) is connected to the source of the fourth switching transistor (QA2). The drain of the fourth switching transistor (QA2) is connected to the source of the seventh switching transistor (QA3). The drain of the seventh switching transistor (QA3) is connected to the drain of the tenth switching transistor (Q1). The source of the tenth switching transistor (Q1) is connected to the left end of the inductor (L). The right end of the inductor (L) is connected to the left end of the diode (D). The right end of the diode (D) is connected to the positive terminal of the spark gap (Vd). The negative terminal of the spark gap (Vd) is connected to the negative terminal of the DC voltage source (Vin). The drain of the second switching transistor (QB1) is connected to the DC voltage source (Vin). The positive terminal of the power source (Vin) is connected to the connection point of the source of the first switching transistor (QA1). The source of the second switching transistor (QB1) is connected to the drain of the third switching transistor (QC1). The source of the third switching transistor (QC1) is connected to the connection point of the negative terminal of the spark gap (Vd) and the negative terminal of the DC voltage source (Vin). The positive terminal of the first capacitor (CF1) is connected to the connection point of the drain of the first switching transistor (QA1) and the source of the fourth switching transistor (QA2). The negative terminal of the first capacitor (C1) is connected to the connection point of the source of the second switching transistor (QB1) and the source of the sixth switching transistor (QC2). The drain of the fifth switching transistor (QB2) is connected to the connection point of the positive terminal of the first capacitor (CF1) and the source of the fourth switching transistor (QA2). The contacts are connected as follows: the source of the fifth switch (QB2) is connected to the drain of the sixth switch (QC2); the source of the sixth switch (QC2) is connected to the junction of the negative terminal of the first capacitor (C1) and the source of the second switch (QB1); the positive terminal of the second capacitor (CF2) is connected to the junction of the drain of the fourth switch (QA2) and the source of the seventh switch (QA3); the negative terminal of the second capacitor (CF2) is connected to the junction of the source of the fifth switch (QB2) and the source of the ninth switch (QC3); the drain of the eighth switch (QB3) is connected to the junction of the positive terminal of the second capacitor (CF2) and the source of the seventh switch (QA3); and the source of the eighth switch (QB3) is connected to the junction of the positive terminal of the ninth switch (QC1). The drain of (QC3) is connected to the source of the ninth switch (QC3), the negative terminal of the second capacitor (CF2) and the source of the fifth switch (QB2) are connected to the connection point. The positive terminal of the third capacitor (CF3) is connected to the drain of the seventh switch (QA3) and the drain of the tenth switch (Q1). The negative terminal of the third capacitor (CF3) is connected to the source of the eighth switch (QB3) and the drain of the ninth switch (QC3). The source of the tenth switch (Q1) is connected to the drain of the eleventh switch (Q2) and the connection point of the left end of the inductor (L). The source of the eleventh switch (Q2) is connected to the source of the eighth switch (QB3) and the drain of the ninth switch (QC3).The first switch (QA1), the second switch (QB1), the third switch (QC1), and the first capacitor (CF1) form a module. Increasing the number of groups increases the voltage boost factor of the switched capacitor voltage boost circuit.

2. The switched capacitor Buck pulse power supply for electrical discharge machining according to claim 1, characterized in that, A single machining cycle of electrical discharge machining includes the following steps: Step S1: During the breakdown delay stage, the gap is not broken down and remains open. The switched capacitor pulse power supply operates in boost mode. Boost mode has two operating modes. In the first operating mode, the FPGA control circuit generates a control signal, which, after passing through the drive circuit, controls the first switch (QA1), fourth switch (QA2), and seventh switch (QA3) to turn on, the second switch (QB1), fifth switch (QB2), and eighth switch (QB3) to turn off, the third switch (QC1), sixth switch (QC2), and ninth switch (QC3) to turn on, the tenth switch (Q1) to turn on, and the eleventh switch (Q2) to turn off. The DC voltage source (Vin) charges the voltage across the first capacitor (CF1), second capacitor (CF2), and third capacitor (CF3) to Vi. In the second operating mode, the FPGA control circuit generates a control signal, which, after passing through the drive circuit, controls the first switch (QA1), the fourth switch (QA2), and the seventh switch (QA3) to turn off, the second switch (QB1), the fifth switch (QB2), and the eighth switch (QB3) to turn on, the third switch (QC1), the sixth switch (QC2), and the ninth switch (QC3) to turn off, the tenth switch (Q1) to turn on, and the eleventh switch (Q2) to turn off. The first capacitor (CF1), the second capacitor (CF2), and the third capacitor (CF3) are equivalent to a voltage source with a voltage of Vin. The DC voltage source (Vin) is connected in series with the first capacitor (CF1), the second capacitor (CF2), and the third capacitor (CF3) to output a high voltage of 4Vin to the gap, waiting for the gap to break down. Step S2: After the gap is broken down, the discharge machining stage begins. The gap characteristic is a quasi-sustaining voltage source, and the switched capacitor pulse power supply operates in buck mode. The buck mode has two operating modes. In the first operating mode, the FPGA control circuit generates a control signal, which, after passing through the drive circuit, controls the first switch (QA1), fourth switch (QA2), and seventh switch (QA3) to turn on, the second switch (QB1), fifth switch (QB2), and eighth switch (QB3) to turn off, the third switch (QC1), sixth switch (QC2), and ninth switch (QC3) to turn on, the tenth switch (Q1) to turn on, and the eleventh switch (Q2) to turn off. The gap current rises rapidly. When the current value rises to the current parameter set by the FPGA... After the test, the switched capacitor pulse power supply operates in the second working mode. The FPGA control circuit generates a control signal, which, after passing through the drive circuit, controls the first switch (QA1), the fourth switch (QA2), and the seventh switch (QA3) to turn on, the second switch (QB1), the fifth switch (QB2), and the eighth switch (QB3) to turn off, the third switch (QC1), the sixth switch (QC2), and the ninth switch (QC3) to turn on, the tenth switch (Q1) to turn off, and the eleventh switch (Q2) to turn on. The gap current freewheels through the third switch (QC1), the sixth switch (QC2), the ninth switch (QC3), and the eleventh switch (Q2). The above two working modes are repeated to perform electrical discharge machining on the spark gap. Step S3: After the discharge machining stage, the deionization stage begins. The FPGA control circuit generates a control signal, which, after passing through the drive circuit, controls the first switch (QA1), the fourth switch (QA2), and the seventh switch (QA3) to turn on, the second switch (QB1), the fifth switch (QB2), and the eighth switch (QB3) to turn off, the third switch (QC1), the sixth switch (QC2), and the ninth switch (QC3) to turn on, the tenth switch (Q1) to turn off, and the eleventh switch (Q2) to turn on. Energy in the inductor (L) is released into the gap to deionize. After the energy is exhausted, the gap restores its insulation characteristics, and the voltage across the gap is zero. Step S4: Repeat steps S1 to S3 above to enter the next processing cycle.

3. A switched-capacitor Buck pulse power supply for electrical discharge machining according to claim 2, characterized in that, The first switch (QA1), the second switch (QB1), the third switch (QC1), the fourth switch (QA2), the fifth switch (QB2), the sixth switch (QC2), the seventh switch (QA3), the eighth switch (QB3), and the ninth switch (QC3) are all made of the same type of MOSFET. The tenth switch (Q1) and the eleventh switch (Q2) are also made of the same type of MOSFET. The selected switches have a small on-resistance.

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